iPXE
ProcessorBind.h
Go to the documentation of this file.
1 /** @file
2  Processor or Compiler specific defines and types for AArch64.
3 
4  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
6  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
7 
8  SPDX-License-Identifier: BSD-2-Clause-Patent
9 
10 **/
11 
12 #ifndef __PROCESSOR_BIND_H__
13 #define __PROCESSOR_BIND_H__
14 
15 FILE_LICENCE ( BSD2_PATENT );
16 
17 ///
18 /// Define the processor type so other code can make processor based choices
19 ///
20 #define MDE_CPU_AARCH64
21 
22 //
23 // Make sure we are using the correct packing rules per EFI specification
24 //
25 #if !defined (__GNUC__) && !defined (__ASSEMBLER__)
26  #pragma pack()
27 #endif
28 
29 #if defined (_MSC_EXTENSIONS)
30 
31 //
32 // Disable some level 4 compilation warnings (same as IA32 and X64)
33 //
34 
35 //
36 // Disabling bitfield type checking warnings.
37 //
38  #pragma warning ( disable : 4214 )
39 
40 //
41 // Disabling the unreferenced formal parameter warnings.
42 //
43  #pragma warning ( disable : 4100 )
44 
45 //
46 // Disable slightly different base types warning as CHAR8 * can not be set
47 // to a constant string.
48 //
49  #pragma warning ( disable : 4057 )
50 
51 //
52 // ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
53 //
54  #pragma warning ( disable : 4127 )
55 
56 //
57 // This warning is caused by functions defined but not used. For precompiled header only.
58 //
59  #pragma warning ( disable : 4505 )
60 
61 //
62 // This warning is caused by empty (after preprocessing) source file. For precompiled header only.
63 //
64  #pragma warning ( disable : 4206 )
65 
66 //
67 // Disable 'potentially uninitialized local variable X used' warnings
68 //
69  #pragma warning ( disable : 4701 )
70 
71 //
72 // Disable 'potentially uninitialized local pointer variable X used' warnings
73 //
74  #pragma warning ( disable : 4703 )
75 
76 //
77 // use Microsoft* C compiler dependent integer width types
78 //
79 typedef unsigned __int64 UINT64;
80 typedef __int64 INT64;
81 typedef unsigned __int32 UINT32;
82 typedef __int32 INT32;
83 typedef unsigned short UINT16;
84 typedef unsigned short CHAR16;
85 typedef short INT16;
86 typedef unsigned char BOOLEAN;
87 typedef unsigned char UINT8;
88 typedef char CHAR8;
89 typedef signed char INT8;
90 
91 #else
92 
93 //
94 // Assume standard AARCH64 alignment.
95 //
96 typedef unsigned long long UINT64;
97 typedef long long INT64;
98 typedef unsigned int UINT32;
99 typedef int INT32;
100 typedef unsigned short UINT16;
101 typedef unsigned short CHAR16;
102 typedef short INT16;
103 typedef unsigned char BOOLEAN;
104 typedef unsigned char UINT8;
105 typedef char CHAR8;
106 typedef signed char INT8;
107 
108 #endif
109 
110 ///
111 /// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
112 /// 8 bytes on supported 64-bit processor instructions)
113 ///
114 typedef UINT64 UINTN;
115 
116 ///
117 /// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
118 /// 8 bytes on supported 64-bit processor instructions)
119 ///
120 typedef INT64 INTN;
121 
122 //
123 // Processor specific defines
124 //
125 
126 ///
127 /// A value of native width with the highest bit set.
128 ///
129 #define MAX_BIT 0x8000000000000000ULL
130 
131 ///
132 /// A value of native width with the two highest bits set.
133 ///
134 #define MAX_2_BITS 0xC000000000000000ULL
135 
136 ///
137 /// Maximum legal AARCH64 address
138 ///
139 #define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
140 
141 ///
142 /// Maximum usable address at boot time (48 bits using 4 KB pages)
143 ///
144 #define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL
145 
146 ///
147 /// Maximum legal AArch64 INTN and UINTN values.
148 ///
149 #define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)
150 #define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
151 
152 ///
153 /// Minimum legal AArch64 INTN value.
154 ///
155 #define MIN_INTN (((INTN)-9223372036854775807LL) - 1)
156 
157 ///
158 /// The stack alignment required for AARCH64
159 ///
160 #define CPU_STACK_ALIGNMENT 16
161 
162 ///
163 /// Page allocation granularity for AARCH64
164 ///
165 #define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
166 #define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
167 
168 //
169 // Modifier to ensure that all protocol member functions and EFI intrinsics
170 // use the correct C calling convention. All protocol member functions and
171 // EFI intrinsics are required to modify their member functions with EFIAPI.
172 //
173 #define EFIAPI
174 
175 // When compiling with Clang, we still use GNU as for the assembler, so we still
176 // need to define the GCC_ASM* macros.
177 #if defined (__GNUC__) || defined (__clang__)
178 ///
179 /// For GNU assembly code, .global or .globl can declare global symbols.
180 /// Define this macro to unify the usage.
181 ///
182 #define ASM_GLOBAL .globl
183 
184 #define GCC_ASM_EXPORT(func__) \
185  .global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
186  .type ASM_PFX(func__), %function
187 
188 #define GCC_ASM_IMPORT(func__) \
189  .extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
190 
191  #if defined (__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
192 #define AARCH64_BTI_NOTE() \
193  .ifndef .Lgnu_bti_notesize ;\
194  .pushsection .note.gnu.property, "a" ;\
195  .set NT_GNU_PROPERTY_TYPE_0, 0x5 ;\
196  .set GNU_PROPERTY_AARCH64_FEATURE_1_AND, 0xc0000000 ;\
197  .set GNU_PROPERTY_AARCH64_FEATURE_1_BTI, 0x1 ;\
198  .align 3 ;\
199  .long .Lnamesize ;\
200  .long .Lgnu_bti_notesize ;\
201  .long NT_GNU_PROPERTY_TYPE_0 ;\
202 0: .asciz "GNU" ;\
203  .set .Lnamesize, . - 0b ;\
204  .align 3 ;\
205 1: .long GNU_PROPERTY_AARCH64_FEATURE_1_AND ;\
206  .long .Lvalsize ;\
207 2: .long GNU_PROPERTY_AARCH64_FEATURE_1_BTI ;\
208  .set .Lvalsize, . - 2b ;\
209  .align 3 ;\
210  .set .Lgnu_bti_notesize, . - 1b ;\
211  .popsection ;\
212  .endif
213 
214 #define AARCH64_BTI(__type) \
215  AARCH64_BTI_NOTE() ;\
216  bti __type
217 
218  #endif
219 
220 #endif
221 
222 #ifndef AARCH64_BTI
223 #define AARCH64_BTI_NOTE()
224 #define AARCH64_BTI(__type)
225 #endif
226 
227 /**
228  Return the pointer to the first instruction of a function given a function pointer.
229  On ARM CPU architectures, these two pointer values are the same,
230  so the implementation of this macro is very simple.
231 
232  @param FunctionPointer A pointer to a function.
233 
234  @return The pointer to the first instruction of a function given a function pointer.
235 
236 **/
237 #define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
238 
239 #ifndef __USER_LABEL_PREFIX__
240 #define __USER_LABEL_PREFIX__
241 #endif
242 
243 #endif
int INT32
Definition: ProcessorBind.h:99
unsigned char BOOLEAN
INT64 INTN
Signed value of native width.
unsigned int UINT32
Definition: ProcessorBind.h:98
unsigned short CHAR16
unsigned char UINT8
long long INT64
Definition: ProcessorBind.h:97
short INT16
unsigned short UINT16
UINT64 UINTN
Unsigned value of native width.
unsigned long long UINT64
Definition: ProcessorBind.h:96
FILE_LICENCE(BSD2_PATENT)
char CHAR8
signed char INT8