iPXE
ani.h
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00001 /*
00002  * Copyright (c) 2008-2011 Atheros Communications Inc.
00003  *
00004  * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
00005  * Original from Linux kernel 3.0.1
00006  *
00007  * Permission to use, copy, modify, and/or distribute this software for any
00008  * purpose with or without fee is hereby granted, provided that the above
00009  * copyright notice and this permission notice appear in all copies.
00010  *
00011  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
00012  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
00013  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
00014  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
00015  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
00016  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
00017  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
00018  */
00019 
00020 #ifndef ANI_H
00021 #define ANI_H
00022 
00023 FILE_LICENCE ( BSD2 );
00024 
00025 #define HAL_PROCESS_ANI           0x00000001
00026 
00027 #define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan)
00028 
00029 #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
00030 
00031 /* units are errors per second */
00032 #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD      500
00033 #define ATH9K_ANI_OFDM_TRIG_HIGH_NEW      1000
00034 
00035 /* units are errors per second */
00036 #define ATH9K_ANI_OFDM_TRIG_LOW_OLD       200
00037 #define ATH9K_ANI_OFDM_TRIG_LOW_NEW       400
00038 
00039 /* units are errors per second */
00040 #define ATH9K_ANI_CCK_TRIG_HIGH_OLD       200
00041 #define ATH9K_ANI_CCK_TRIG_HIGH_NEW       600
00042 
00043 /* units are errors per second */
00044 #define ATH9K_ANI_CCK_TRIG_LOW_OLD        100
00045 #define ATH9K_ANI_CCK_TRIG_LOW_NEW        300
00046 
00047 #define ATH9K_ANI_NOISE_IMMUNE_LVL        4
00048 #define ATH9K_ANI_USE_OFDM_WEAK_SIG       1
00049 #define ATH9K_ANI_CCK_WEAK_SIG_THR        0
00050 
00051 #define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD     7
00052 #define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW     3
00053 
00054 #define ATH9K_ANI_FIRSTEP_LVL_OLD         0
00055 #define ATH9K_ANI_FIRSTEP_LVL_NEW         2
00056 
00057 #define ATH9K_ANI_RSSI_THR_HIGH           40
00058 #define ATH9K_ANI_RSSI_THR_LOW            7
00059 
00060 #define ATH9K_ANI_PERIOD_OLD              100
00061 #define ATH9K_ANI_PERIOD_NEW              1000
00062 
00063 /* in ms */
00064 #define ATH9K_ANI_POLLINTERVAL_OLD        100
00065 #define ATH9K_ANI_POLLINTERVAL_NEW        1000
00066 
00067 #define HAL_NOISE_IMMUNE_MAX              4
00068 #define HAL_SPUR_IMMUNE_MAX               7
00069 #define HAL_FIRST_STEP_MAX                2
00070 
00071 #define ATH9K_SIG_FIRSTEP_SETTING_MIN     0
00072 #define ATH9K_SIG_FIRSTEP_SETTING_MAX     20
00073 #define ATH9K_SIG_SPUR_IMM_SETTING_MIN    0
00074 #define ATH9K_SIG_SPUR_IMM_SETTING_MAX    22
00075 
00076 #define ATH9K_ANI_ENABLE_MRC_CCK          1
00077 
00078 /* values here are relative to the INI */
00079 
00080 enum ath9k_ani_cmd {
00081         ATH9K_ANI_PRESENT = 0x1,
00082         ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2,
00083         ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4,
00084         ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8,
00085         ATH9K_ANI_FIRSTEP_LEVEL = 0x10,
00086         ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20,
00087         ATH9K_ANI_MODE = 0x40,
00088         ATH9K_ANI_PHYERR_RESET = 0x80,
00089         ATH9K_ANI_MRC_CCK = 0x100,
00090         ATH9K_ANI_ALL = 0xfff
00091 };
00092 
00093 struct ath9k_mib_stats {
00094         u32 ackrcv_bad;
00095         u32 rts_bad;
00096         u32 rts_good;
00097         u32 fcs_bad;
00098         u32 beacons;
00099 };
00100 
00101 /* INI default values for ANI registers */
00102 struct ath9k_ani_default {
00103         u16 m1ThreshLow;
00104         u16 m2ThreshLow;
00105         u16 m1Thresh;
00106         u16 m2Thresh;
00107         u16 m2CountThr;
00108         u16 m2CountThrLow;
00109         u16 m1ThreshLowExt;
00110         u16 m2ThreshLowExt;
00111         u16 m1ThreshExt;
00112         u16 m2ThreshExt;
00113         u16 firstep;
00114         u16 firstepLow;
00115         u16 cycpwrThr1;
00116         u16 cycpwrThr1Ext;
00117 };
00118 
00119 struct ar5416AniState {
00120         struct ath9k_channel *c;
00121         u8 noiseImmunityLevel;
00122         u8 ofdmNoiseImmunityLevel;
00123         u8 cckNoiseImmunityLevel;
00124         int ofdmsTurn;
00125         u8 mrcCCKOff;
00126         u8 spurImmunityLevel;
00127         u8 firstepLevel;
00128         u8 ofdmWeakSigDetect;
00129         u8 cckWeakSigThreshold;
00130         u32 listenTime;
00131         int32_t rssiThrLow;
00132         int32_t rssiThrHigh;
00133         u32 noiseFloor;
00134         u32 ofdmPhyErrCount;
00135         u32 cckPhyErrCount;
00136         int16_t pktRssi[2];
00137         int16_t ofdmErrRssi[2];
00138         int16_t cckErrRssi[2];
00139         struct ath9k_ani_default iniDef;
00140 };
00141 
00142 struct ar5416Stats {
00143         u32 ast_ani_niup;
00144         u32 ast_ani_nidown;
00145         u32 ast_ani_spurup;
00146         u32 ast_ani_spurdown;
00147         u32 ast_ani_ofdmon;
00148         u32 ast_ani_ofdmoff;
00149         u32 ast_ani_cckhigh;
00150         u32 ast_ani_ccklow;
00151         u32 ast_ani_stepup;
00152         u32 ast_ani_stepdown;
00153         u32 ast_ani_ofdmerrs;
00154         u32 ast_ani_cckerrs;
00155         u32 ast_ani_reset;
00156         u32 ast_ani_lzero;
00157         u32 ast_ani_lneg;
00158         u32 avgbrssi;
00159         struct ath9k_mib_stats ast_mibstats;
00160 };
00161 #define ah_mibStats stats.ast_mibstats
00162 
00163 void ath9k_enable_mib_counters(struct ath_hw *ah);
00164 void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
00165 void ath9k_hw_ani_setup(struct ath_hw *ah);
00166 void ath9k_hw_ani_init(struct ath_hw *ah);
00167 int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
00168                                  struct ath9k_channel *chan);
00169 
00170 #endif /* ANI_H */