iPXE
Variables
ar9485_initvals.h File Reference

Go to the source code of this file.

Variables

static __unused const u32 ar9485_1_1_mac_core [][2]
 
static __unused const u32 ar9485_1_1_baseband_core [][2]
 
static __unused const u32 ar9485Common_1_1 [][2]
 
static __unused const u32 ar9485_1_1_baseband_postamble [][5]
 
static __unused const u32 ar9485Modes_high_ob_db_tx_gain_1_1 [][5]
 
static __unused const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1 [][5]
 
static __unused const u32 ar9485_1_1_radio_postamble [][2]
 
static __unused const u32 ar9485_1_1_mac_postamble [][5]
 
static __unused const u32 ar9485_1_1_radio_core [][2]
 
static __unused const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1 [][2]
 
static __unused const u32 ar9485Modes_high_power_tx_gain_1_1 [][5]
 
static __unused const u32 ar9485_1_1 [][2]
 
static __unused const u32 ar9485_modes_green_ob_db_tx_gain_1_1 [][5]
 
static __unused const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1 [][2]
 
static __unused const u32 ar9485_1_1_soc_preamble [][2]
 
static __unused const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484 [][2]
 
static __unused const u32 ar9485Modes_low_ob_db_tx_gain_1_1 [][5]
 
static __unused const u32 ar9485_fast_clock_1_1_baseband_postamble [][3]
 
static __unused const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1 [][2]
 
static __unused const u32 ar9485_common_rx_gain_1_1 [][2]
 
static __unused const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1 [][2]
 
static __unused const u32 ar9485Common_wo_xlna_rx_gain_1_1 [][2]
 

Variable Documentation

◆ ar9485_1_1_mac_core

__unused const u32 ar9485_1_1_mac_core[][2]
static

Definition at line 20 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_1_1_baseband_core

__unused const u32 ar9485_1_1_baseband_core[][2]
static

Definition at line 182 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485Common_1_1

__unused const u32 ar9485Common_1_1[][2]
static
Initial value:
= {
{0x00007010, 0x00000022},
{0x00007020, 0x00000000},
{0x00007034, 0x00000002},
{0x00007038, 0x000004c2},
}

Definition at line 319 of file ar9485_initvals.h.

◆ ar9485_1_1_baseband_postamble

__unused const u32 ar9485_1_1_baseband_postamble[][5]
static

Definition at line 327 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485Modes_high_ob_db_tx_gain_1_1

__unused const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5]
static

Definition at line 372 of file ar9485_initvals.h.

Referenced by ar9003_tx_gain_table_apply().

◆ ar9485_modes_lowest_ob_db_tx_gain_1_1

__unused const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5]
static

Definition at line 445 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs(), and ar9003_tx_gain_table_apply().

◆ ar9485_1_1_radio_postamble

__unused const u32 ar9485_1_1_radio_postamble[][2]
static
Initial value:
= {
{0x0001609c, 0x0b283f31},
{0x000160ac, 0x24611800},
{0x000160b0, 0x03284f3e},
{0x0001610c, 0x00170000},
{0x00016140, 0x10804008},
}

Definition at line 518 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_1_1_mac_postamble

__unused const u32 ar9485_1_1_mac_postamble[][5]
static
Initial value:
= {
{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
}

Definition at line 527 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_1_1_radio_core

__unused const u32 ar9485_1_1_radio_core[][2]
static

Definition at line 539 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1

__unused const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2]
static
Initial value:
= {
{0x00018c00, 0x10052e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
}

Definition at line 604 of file ar9485_initvals.h.

◆ ar9485Modes_high_power_tx_gain_1_1

__unused const u32 ar9485Modes_high_power_tx_gain_1_1[][5]
static

Definition at line 611 of file ar9485_initvals.h.

Referenced by ar9003_tx_gain_table_apply().

◆ ar9485_1_1

__unused const u32 ar9485_1_1[][2]
static
Initial value:
= {
{0x0000a580, 0x00000000},
{0x0000a584, 0x00000000},
{0x0000a588, 0x00000000},
{0x0000a58c, 0x00000000},
{0x0000a590, 0x00000000},
{0x0000a594, 0x00000000},
{0x0000a598, 0x00000000},
{0x0000a59c, 0x00000000},
{0x0000a5a0, 0x00000000},
{0x0000a5a4, 0x00000000},
{0x0000a5a8, 0x00000000},
{0x0000a5ac, 0x00000000},
{0x0000a5b0, 0x00000000},
{0x0000a5b4, 0x00000000},
{0x0000a5b8, 0x00000000},
{0x0000a5bc, 0x00000000},
}

Definition at line 684 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_modes_green_ob_db_tx_gain_1_1

__unused const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5]
static

Definition at line 704 of file ar9485_initvals.h.

◆ ar9485_1_1_pcie_phy_clkreq_disable_L1

__unused const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2]
static
Initial value:
= {
{0x00018c00, 0x10013e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
}

Definition at line 777 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_1_1_soc_preamble

__unused const u32 ar9485_1_1_soc_preamble[][2]
static
Initial value:
= {
{0x00004014, 0xba280400},
{0x00004090, 0x00aa10aa},
{0x000040a4, 0x00a0c9c9},
{0x00007010, 0x00000022},
{0x00007020, 0x00000000},
{0x00007034, 0x00000002},
{0x00007038, 0x000004c2},
{0x00007048, 0x00000002},
}

Definition at line 784 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs().

◆ ar9485_1_1_baseband_core_txfir_coeff_japan_2484

__unused const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2]
static
Initial value:
= {
{0x0000a398, 0x00000000},
{0x0000a39c, 0x6f7f0301},
{0x0000a3a0, 0xca9228ee},
}

Definition at line 796 of file ar9485_initvals.h.

◆ ar9485Modes_low_ob_db_tx_gain_1_1

__unused const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5]
static

Definition at line 803 of file ar9485_initvals.h.

Referenced by ar9003_tx_gain_table_apply().

◆ ar9485_fast_clock_1_1_baseband_postamble

__unused const u32 ar9485_fast_clock_1_1_baseband_postamble[][3]
static
Initial value:
= {
{0x00009e00, 0x03721821, 0x03721821},
{0x0000a230, 0x0000400b, 0x00004016},
{0x0000a254, 0x00000898, 0x00001130},
}

Definition at line 876 of file ar9485_initvals.h.

◆ ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1

__unused const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2]
static
Initial value:
= {
{0x00018c00, 0x10012e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
}

Definition at line 883 of file ar9485_initvals.h.

◆ ar9485_common_rx_gain_1_1

__unused const u32 ar9485_common_rx_gain_1_1[][2]
static

Definition at line 890 of file ar9485_initvals.h.

◆ ar9485_1_1_pcie_phy_clkreq_enable_L1

__unused const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2]
static
Initial value:
= {
{0x00018c00, 0x10053e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
}

Definition at line 1022 of file ar9485_initvals.h.

◆ ar9485Common_wo_xlna_rx_gain_1_1

__unused const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2]
static

Definition at line 1029 of file ar9485_initvals.h.

Referenced by ar9003_hw_init_mode_regs(), and ar9003_rx_gain_table_apply().

Generated by   doxygen 1.8.15