iPXE
ath_hw.c
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00001 /*
00002  * Copyright (c) 2009 Atheros Communications Inc.
00003  *
00004  * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
00005  * Original from Linux kernel 3.0.1
00006  *
00007  * Permission to use, copy, modify, and/or distribute this software for any
00008  * purpose with or without fee is hereby granted, provided that the above
00009  * copyright notice and this permission notice appear in all copies.
00010  *
00011  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
00012  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
00013  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
00014  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
00015  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
00016  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
00017  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
00018  */
00019 
00020 #include <ipxe/io.h>
00021 
00022 #include "ath.h"
00023 #include "reg.h"
00024 
00025 #define REG_READ        (common->ops->read)
00026 #define REG_WRITE       (common->ops->write)
00027 
00028 /**
00029  * ath_hw_set_bssid_mask - filter out bssids we listen
00030  *
00031  * @common: the ath_common struct for the device.
00032  *
00033  * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
00034  * which bits of the interface's MAC address should be looked at when trying
00035  * to decide which packets to ACK. In station mode and AP mode with a single
00036  * BSS every bit matters since we lock to only one BSS. In AP mode with
00037  * multiple BSSes (virtual interfaces) not every bit matters because hw must
00038  * accept frames for all BSSes and so we tweak some bits of our mac address
00039  * in order to have multiple BSSes.
00040  *
00041  * NOTE: This is a simple filter and does *not* filter out all
00042  * relevant frames. Some frames that are not for us might get ACKed from us
00043  * by PCU because they just match the mask.
00044  *
00045  * When handling multiple BSSes you can get the BSSID mask by computing the
00046  * set of  ~ ( MAC XOR BSSID ) for all bssids we handle.
00047  *
00048  * When you do this you are essentially computing the common bits of all your
00049  * BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
00050  * the MAC address to obtain the relevant bits and compare the result with
00051  * (frame's BSSID & mask) to see if they match.
00052  *
00053  * Simple example: on your card you have have two BSSes you have created with
00054  * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
00055  * There is another BSSID-03 but you are not part of it. For simplicity's sake,
00056  * assuming only 4 bits for a mac address and for BSSIDs you can then have:
00057  *
00058  *                  \
00059  * MAC:        0001 |
00060  * BSSID-01:   0100 | --> Belongs to us
00061  * BSSID-02:   1001 |
00062  *                  /
00063  * -------------------
00064  * BSSID-03:   0110  | --> External
00065  * -------------------
00066  *
00067  * Our bssid_mask would then be:
00068  *
00069  *             On loop iteration for BSSID-01:
00070  *             ~(0001 ^ 0100)  -> ~(0101)
00071  *                             ->   1010
00072  *             bssid_mask      =    1010
00073  *
00074  *             On loop iteration for BSSID-02:
00075  *             bssid_mask &= ~(0001   ^   1001)
00076  *             bssid_mask =   (1010)  & ~(0001 ^ 1001)
00077  *             bssid_mask =   (1010)  & ~(1000)
00078  *             bssid_mask =   (1010)  &  (0111)
00079  *             bssid_mask =   0010
00080  *
00081  * A bssid_mask of 0010 means "only pay attention to the second least
00082  * significant bit". This is because its the only bit common
00083  * amongst the MAC and all BSSIDs we support. To findout what the real
00084  * common bit is we can simply "&" the bssid_mask now with any BSSID we have
00085  * or our MAC address (we assume the hardware uses the MAC address).
00086  *
00087  * Now, suppose there's an incoming frame for BSSID-03:
00088  *
00089  * IFRAME-01:  0110
00090  *
00091  * An easy eye-inspeciton of this already should tell you that this frame
00092  * will not pass our check. This is because the bssid_mask tells the
00093  * hardware to only look at the second least significant bit and the
00094  * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
00095  * as 1, which does not match 0.
00096  *
00097  * So with IFRAME-01 we *assume* the hardware will do:
00098  *
00099  *     allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
00100  *  --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
00101  *  --> allow = (0010) == 0000 ? 1 : 0;
00102  *  --> allow = 0
00103  *
00104  *  Lets now test a frame that should work:
00105  *
00106  * IFRAME-02:  0001 (we should allow)
00107  *
00108  *     allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
00109  *  --> allow = (0001 & 0010) ==  (0010 & 0001) ? 1 :0;
00110  *  --> allow = (0000) == (0000)
00111  *  --> allow = 1
00112  *
00113  * Other examples:
00114  *
00115  * IFRAME-03:  0100 --> allowed
00116  * IFRAME-04:  1001 --> allowed
00117  * IFRAME-05:  1101 --> allowed but its not for us!!!
00118  *
00119  */
00120 void ath_hw_setbssidmask(struct ath_common *common)
00121 {
00122         void *ah = common->ah;
00123 
00124         REG_WRITE(ah, get_unaligned_le32(common->bssidmask), AR_BSSMSKL);
00125         REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
00126 }
00127 
00128 
00129 /**
00130  * ath_hw_cycle_counters_update - common function to update cycle counters
00131  *
00132  * @common: the ath_common struct for the device.
00133  *
00134  * This function is used to update all cycle counters in one place.
00135  * It has to be called while holding common->cc_lock!
00136  */
00137 void ath_hw_cycle_counters_update(struct ath_common *common)
00138 {
00139         u32 cycles, busy, rx, tx;
00140         void *ah = common->ah;
00141 
00142         /* freeze */
00143         REG_WRITE(ah, AR_MIBC_FMC, AR_MIBC);
00144 
00145         /* read */
00146         cycles = REG_READ(ah, AR_CCCNT);
00147         busy = REG_READ(ah, AR_RCCNT);
00148         rx = REG_READ(ah, AR_RFCNT);
00149         tx = REG_READ(ah, AR_TFCNT);
00150 
00151         /* clear */
00152         REG_WRITE(ah, 0, AR_CCCNT);
00153         REG_WRITE(ah, 0, AR_RFCNT);
00154         REG_WRITE(ah, 0, AR_RCCNT);
00155         REG_WRITE(ah, 0, AR_TFCNT);
00156 
00157         /* unfreeze */
00158         REG_WRITE(ah, 0, AR_MIBC);
00159 
00160         /* update all cycle counters here */
00161         common->cc_ani.cycles += cycles;
00162         common->cc_ani.rx_busy += busy;
00163         common->cc_ani.rx_frame += rx;
00164         common->cc_ani.tx_frame += tx;
00165 
00166         common->cc_survey.cycles += cycles;
00167         common->cc_survey.rx_busy += busy;
00168         common->cc_survey.rx_frame += rx;
00169         common->cc_survey.tx_frame += tx;
00170 }
00171 
00172 int32_t ath_hw_get_listen_time(struct ath_common *common)
00173 {
00174         struct ath_cycle_counters *cc = &common->cc_ani;
00175         int32_t listen_time;
00176 
00177         listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
00178                       (common->clockrate * 1000);
00179 
00180         memset(cc, 0, sizeof(*cc));
00181 
00182         return listen_time;
00183 }