iPXE
igbvf_osdep.h
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00001 /*******************************************************************************
00002 
00003   Intel(R) 82576 Virtual Function Linux driver
00004   Copyright(c) 1999 - 2008 Intel Corporation.
00005 
00006   This program is free software; you can redistribute it and/or modify it
00007   under the terms and conditions of the GNU General Public License,
00008   version 2, as published by the Free Software Foundation.
00009 
00010   This program is distributed in the hope it will be useful, but WITHOUT
00011   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
00012   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
00013   more details.
00014 
00015   You should have received a copy of the GNU General Public License along with
00016   this program; if not, write to the Free Software Foundation, Inc.,
00017   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
00018 
00019   The full GNU General Public License is included in this distribution in
00020   the file called "COPYING".
00021 
00022   Contact Information:
00023   Linux NICS <linux.nics@intel.com>
00024   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
00025   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
00026 
00027 *******************************************************************************/
00028 
00029 FILE_LICENCE ( GPL2_ONLY );
00030 
00031 /* glue for the OS-dependent part of igbvf
00032  * includes register access macros
00033  */
00034 
00035 #ifndef _IGBVF_OSDEP_H_
00036 #define _IGBVF_OSDEP_H_
00037 
00038 #define u8         unsigned char
00039 #define bool       boolean_t
00040 #define dma_addr_t unsigned long
00041 #define __le16     uint16_t
00042 #define __le32     uint32_t
00043 #define __le64     uint64_t
00044 
00045 #define __iomem
00046 #define __devinit
00047 #define ____cacheline_aligned_in_smp
00048 
00049 #define msleep(x) mdelay(x)
00050 
00051 #define ETH_FCS_LEN 4
00052 
00053 typedef int spinlock_t;
00054 typedef enum {
00055     false = 0,
00056     true = 1
00057 } boolean_t;
00058 
00059 #define usec_delay(x) udelay(x)
00060 #define msec_delay(x) mdelay(x)
00061 #define msec_delay_irq(x) mdelay(x)
00062 
00063 #define PCI_COMMAND_REGISTER   PCI_COMMAND
00064 #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
00065 #define ETH_ADDR_LEN           ETH_ALEN
00066 
00067 
00068 #define DEBUGOUT(S) if (0) { printf(S); }
00069 #define DEBUGOUT1(S, A...) if (0) { printf(S, A); }
00070 
00071 #define DEBUGFUNC(F) DEBUGOUT(F "\n")
00072 #define DEBUGOUT2 DEBUGOUT1
00073 #define DEBUGOUT3 DEBUGOUT2
00074 #define DEBUGOUT7 DEBUGOUT3
00075 
00076 #define E1000_WRITE_REG(a, reg, value) do { \
00077     writel((value), ((a)->hw_addr + reg)); } while (0)
00078 
00079 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
00080 
00081 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) do { \
00082     writel((value), ((a)->hw_addr + reg + ((offset) << 2))); } while (0)
00083 
00084 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
00085     readl((a)->hw_addr + reg + ((offset) << 2)))
00086 
00087 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
00088 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
00089 
00090 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
00091     writew((value), ((a)->hw_addr + reg + ((offset) << 1))))
00092 
00093 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
00094     readw((a)->hw_addr + reg + ((offset) << 1)))
00095 
00096 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
00097     writeb((value), ((a)->hw_addr + reg + (offset))))
00098 
00099 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
00100     readb((a)->hw_addr + reg + (offset)))
00101 
00102 #define E1000_WRITE_REG_IO(a, reg, offset) do { \
00103     outl(reg, ((a)->io_base));                  \
00104     outl(offset, ((a)->io_base + 4));      } while(0)
00105 
00106 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
00107 
00108 #define E1000_WRITE_FLASH_REG(a, reg, value) ( \
00109     writel((value), ((a)->flash_address + reg)))
00110 
00111 #define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
00112     writew((value), ((a)->flash_address + reg)))
00113 
00114 #define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
00115 
00116 #define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
00117 
00118 #endif /* _IGBVF_OSDEP_H_ */