iPXE
linda.c
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00001 /*
00002  * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
00003  *
00004  * This program is free software; you can redistribute it and/or
00005  * modify it under the terms of the GNU General Public License as
00006  * published by the Free Software Foundation; either version 2 of the
00007  * License, or any later version.
00008  *
00009  * This program is distributed in the hope that it will be useful, but
00010  * WITHOUT ANY WARRANTY; without even the implied warranty of
00011  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012  * General Public License for more details.
00013  *
00014  * You should have received a copy of the GNU General Public License
00015  * along with this program; if not, write to the Free Software
00016  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00017  * 02110-1301, USA.
00018  *
00019  * You can also choose to distribute this program under the terms of
00020  * the Unmodified Binary Distribution Licence (as given in the file
00021  * COPYING.UBDL), provided that you have satisfied its requirements.
00022  */
00023 
00024 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
00025 
00026 #include <stdint.h>
00027 #include <stdlib.h>
00028 #include <errno.h>
00029 #include <unistd.h>
00030 #include <assert.h>
00031 #include <ipxe/io.h>
00032 #include <ipxe/pci.h>
00033 #include <ipxe/infiniband.h>
00034 #include <ipxe/i2c.h>
00035 #include <ipxe/bitbash.h>
00036 #include <ipxe/malloc.h>
00037 #include <ipxe/iobuf.h>
00038 #include "linda.h"
00039 
00040 /**
00041  * @file
00042  *
00043  * QLogic Linda Infiniband HCA
00044  *
00045  */
00046 
00047 /** A Linda send work queue */
00048 struct linda_send_work_queue {
00049         /** Send buffer usage */
00050         uint8_t *send_buf;
00051         /** Producer index */
00052         unsigned int prod;
00053         /** Consumer index */
00054         unsigned int cons;
00055 };
00056 
00057 /** A Linda receive work queue */
00058 struct linda_recv_work_queue {
00059         /** Receive header ring */
00060         void *header;
00061         /** Receive header producer offset (written by hardware) */
00062         struct QIB_7220_scalar header_prod;
00063         /** Receive header consumer offset */
00064         unsigned int header_cons;
00065         /** Offset within register space of the eager array */
00066         unsigned long eager_array;
00067         /** Number of entries in eager array */
00068         unsigned int eager_entries;
00069         /** Eager array producer index */
00070         unsigned int eager_prod;
00071         /** Eager array consumer index */
00072         unsigned int eager_cons;
00073 };
00074 
00075 /** A Linda HCA */
00076 struct linda {
00077         /** Registers */
00078         void *regs;
00079 
00080         /** In-use contexts */
00081         uint8_t used_ctx[LINDA_NUM_CONTEXTS];
00082         /** Send work queues */
00083         struct linda_send_work_queue send_wq[LINDA_NUM_CONTEXTS];
00084         /** Receive work queues */
00085         struct linda_recv_work_queue recv_wq[LINDA_NUM_CONTEXTS];
00086 
00087         /** Offset within register space of the first send buffer */
00088         unsigned long send_buffer_base;
00089         /** Send buffer availability (reported by hardware) */
00090         struct QIB_7220_SendBufAvail *sendbufavail;
00091         /** Send buffer availability (maintained by software) */
00092         uint8_t send_buf[LINDA_MAX_SEND_BUFS];
00093         /** Send buffer availability producer counter */
00094         unsigned int send_buf_prod;
00095         /** Send buffer availability consumer counter */
00096         unsigned int send_buf_cons;
00097         /** Number of reserved send buffers (across all QPs) */
00098         unsigned int reserved_send_bufs;
00099 
00100         /** I2C bit-bashing interface */
00101         struct i2c_bit_basher i2c;
00102         /** I2C serial EEPROM */
00103         struct i2c_device eeprom;
00104 };
00105 
00106 /***************************************************************************
00107  *
00108  * Linda register access
00109  *
00110  ***************************************************************************
00111  *
00112  * This card requires atomic 64-bit accesses.  Strange things happen
00113  * if you try to use 32-bit accesses; sometimes they work, sometimes
00114  * they don't, sometimes you get random data.
00115  */
00116 
00117 /**
00118  * Read Linda qword register
00119  *
00120  * @v linda             Linda device
00121  * @v qword             Register buffer to read into
00122  * @v offset            Register offset
00123  */
00124 static void linda_readq ( struct linda *linda, uint64_t *qword,
00125                           unsigned long offset ) {
00126         *qword = readq ( linda->regs + offset );
00127 }
00128 #define linda_readq( _linda, _ptr, _offset ) \
00129         linda_readq ( (_linda), (_ptr)->u.qwords, (_offset) )
00130 #define linda_readq_array8b( _linda, _ptr, _offset, _idx ) \
00131         linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
00132 #define linda_readq_array64k( _linda, _ptr, _offset, _idx ) \
00133         linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
00134 
00135 /**
00136  * Write Linda qword register
00137  *
00138  * @v linda             Linda device
00139  * @v qword             Register buffer to write
00140  * @v offset            Register offset
00141  */
00142 static void linda_writeq ( struct linda *linda, const uint64_t *qword,
00143                            unsigned long offset ) {
00144         writeq ( *qword, ( linda->regs + offset ) );
00145 }
00146 #define linda_writeq( _linda, _ptr, _offset ) \
00147         linda_writeq ( (_linda), (_ptr)->u.qwords, (_offset) )
00148 #define linda_writeq_array8b( _linda, _ptr, _offset, _idx ) \
00149         linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
00150 #define linda_writeq_array64k( _linda, _ptr, _offset, _idx ) \
00151         linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
00152 
00153 /**
00154  * Write Linda dword register
00155  *
00156  * @v linda             Linda device
00157  * @v dword             Value to write
00158  * @v offset            Register offset
00159  */
00160 static void linda_writel ( struct linda *linda, uint32_t dword,
00161                            unsigned long offset ) {
00162         writel ( dword, ( linda->regs + offset ) );
00163 }
00164 
00165 /***************************************************************************
00166  *
00167  * Link state management
00168  *
00169  ***************************************************************************
00170  */
00171 
00172 /**
00173  * Textual representation of link state
00174  *
00175  * @v link_state        Link state
00176  * @ret link_text       Link state text
00177  */
00178 static const char * linda_link_state_text ( unsigned int link_state ) {
00179         switch ( link_state ) {
00180         case LINDA_LINK_STATE_DOWN:     return "DOWN";
00181         case LINDA_LINK_STATE_INIT:     return "INIT";
00182         case LINDA_LINK_STATE_ARM:      return "ARM";
00183         case LINDA_LINK_STATE_ACTIVE:   return "ACTIVE";
00184         case LINDA_LINK_STATE_ACT_DEFER:return "ACT_DEFER";
00185         default:                        return "UNKNOWN";
00186         }
00187 }
00188 
00189 /**
00190  * Handle link state change
00191  *
00192  * @v linda             Linda device
00193  */
00194 static void linda_link_state_changed ( struct ib_device *ibdev ) {
00195         struct linda *linda = ib_get_drvdata ( ibdev );
00196         struct QIB_7220_IBCStatus ibcstatus;
00197         struct QIB_7220_EXTCtrl extctrl;
00198         unsigned int link_state;
00199         unsigned int link_width;
00200         unsigned int link_speed;
00201 
00202         /* Read link state */
00203         linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
00204         link_state = BIT_GET ( &ibcstatus, LinkState );
00205         link_width = BIT_GET ( &ibcstatus, LinkWidthActive );
00206         link_speed = BIT_GET ( &ibcstatus, LinkSpeedActive );
00207         DBGC ( linda, "Linda %p link state %s (%s %s)\n", linda,
00208                linda_link_state_text ( link_state ),
00209                ( link_speed ? "DDR" : "SDR" ), ( link_width ? "x4" : "x1" ) );
00210 
00211         /* Set LEDs according to link state */
00212         linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
00213         BIT_SET ( &extctrl, LEDPriPortGreenOn,
00214                   ( ( link_state >= LINDA_LINK_STATE_INIT ) ? 1 : 0 ) );
00215         BIT_SET ( &extctrl, LEDPriPortYellowOn,
00216                   ( ( link_state >= LINDA_LINK_STATE_ACTIVE ) ? 1 : 0 ) );
00217         linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
00218 
00219         /* Notify Infiniband core of link state change */
00220         ibdev->port_state = ( link_state + 1 );
00221         ibdev->link_width_active =
00222                 ( link_width ? IB_LINK_WIDTH_4X : IB_LINK_WIDTH_1X );
00223         ibdev->link_speed_active =
00224                 ( link_speed ? IB_LINK_SPEED_DDR : IB_LINK_SPEED_SDR );
00225         ib_link_state_changed ( ibdev );
00226 }
00227 
00228 /**
00229  * Wait for link state change to take effect
00230  *
00231  * @v linda             Linda device
00232  * @v new_link_state    Expected link state
00233  * @ret rc              Return status code
00234  */
00235 static int linda_link_state_check ( struct linda *linda,
00236                                     unsigned int new_link_state ) {
00237         struct QIB_7220_IBCStatus ibcstatus;
00238         unsigned int link_state;
00239         unsigned int i;
00240 
00241         for ( i = 0 ; i < LINDA_LINK_STATE_MAX_WAIT_US ; i++ ) {
00242                 linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
00243                 link_state = BIT_GET ( &ibcstatus, LinkState );
00244                 if ( link_state == new_link_state )
00245                         return 0;
00246                 udelay ( 1 );
00247         }
00248 
00249         DBGC ( linda, "Linda %p timed out waiting for link state %s\n",
00250                linda, linda_link_state_text ( link_state ) );
00251         return -ETIMEDOUT;
00252 }
00253 
00254 /**
00255  * Set port information
00256  *
00257  * @v ibdev             Infiniband device
00258  * @v mad               Set port information MAD
00259  */
00260 static int linda_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ) {
00261         struct linda *linda = ib_get_drvdata ( ibdev );
00262         struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
00263         struct QIB_7220_IBCCtrl ibcctrl;
00264         unsigned int port_state;
00265         unsigned int link_state;
00266 
00267         /* Set new link state */
00268         port_state = ( port_info->link_speed_supported__port_state & 0xf );
00269         if ( port_state ) {
00270                 link_state = ( port_state - 1 );
00271                 DBGC ( linda, "Linda %p set link state to %s (%x)\n", linda,
00272                        linda_link_state_text ( link_state ), link_state );
00273                 linda_readq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
00274                 BIT_SET ( &ibcctrl, LinkCmd, link_state );
00275                 linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
00276 
00277                 /* Wait for link state change to take effect.  Ignore
00278                  * errors; the current link state will be returned via
00279                  * the GetResponse MAD.
00280                  */
00281                 linda_link_state_check ( linda, link_state );
00282         }
00283 
00284         /* Detect and report link state change */
00285         linda_link_state_changed ( ibdev );
00286 
00287         return 0;
00288 }
00289 
00290 /**
00291  * Set partition key table
00292  *
00293  * @v ibdev             Infiniband device
00294  * @v mad               Set partition key table MAD
00295  */
00296 static int linda_set_pkey_table ( struct ib_device *ibdev __unused,
00297                                   union ib_mad *mad __unused ) {
00298         /* Nothing to do */
00299         return 0;
00300 }
00301 
00302 /***************************************************************************
00303  *
00304  * Context allocation
00305  *
00306  ***************************************************************************
00307  */
00308 
00309 /**
00310  * Map context number to QPN
00311  *
00312  * @v ctx               Context index
00313  * @ret qpn             Queue pair number
00314  */
00315 static int linda_ctx_to_qpn ( unsigned int ctx ) {
00316         /* This mapping is fixed by hardware */
00317         return ( ctx * 2 );
00318 }
00319 
00320 /**
00321  * Map QPN to context number
00322  *
00323  * @v qpn               Queue pair number
00324  * @ret ctx             Context index
00325  */
00326 static int linda_qpn_to_ctx ( unsigned int qpn ) {
00327         /* This mapping is fixed by hardware */
00328         return ( qpn / 2 );
00329 }
00330 
00331 /**
00332  * Allocate a context
00333  *
00334  * @v linda             Linda device
00335  * @ret ctx             Context index, or negative error
00336  */
00337 static int linda_alloc_ctx ( struct linda *linda ) {
00338         unsigned int ctx;
00339 
00340         for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
00341 
00342                 if ( ! linda->used_ctx[ctx] ) {
00343                         linda->used_ctx[ctx ] = 1;
00344                         DBGC2 ( linda, "Linda %p CTX %d allocated\n",
00345                                 linda, ctx );
00346                         return ctx;
00347                 }
00348         }
00349 
00350         DBGC ( linda, "Linda %p out of available contexts\n", linda );
00351         return -ENOENT;
00352 }
00353 
00354 /**
00355  * Free a context
00356  *
00357  * @v linda             Linda device
00358  * @v ctx               Context index
00359  */
00360 static void linda_free_ctx ( struct linda *linda, unsigned int ctx ) {
00361 
00362         linda->used_ctx[ctx] = 0;
00363         DBGC2 ( linda, "Linda %p CTX %d freed\n", linda, ctx );
00364 }
00365 
00366 /***************************************************************************
00367  *
00368  * Send datapath
00369  *
00370  ***************************************************************************
00371  */
00372 
00373 /** Send buffer toggle bit
00374  *
00375  * We encode send buffers as 7 bits of send buffer index plus a single
00376  * bit which should match the "check" bit in the SendBufAvail array.
00377  */
00378 #define LINDA_SEND_BUF_TOGGLE 0x80
00379 
00380 /**
00381  * Allocate a send buffer
00382  *
00383  * @v linda             Linda device
00384  * @ret send_buf        Send buffer
00385  *
00386  * You must guarantee that a send buffer is available.  This is done
00387  * by refusing to allocate more TX WQEs in total than the number of
00388  * available send buffers.
00389  */
00390 static unsigned int linda_alloc_send_buf ( struct linda *linda ) {
00391         unsigned int send_buf;
00392 
00393         send_buf = linda->send_buf[linda->send_buf_cons];
00394         send_buf ^= LINDA_SEND_BUF_TOGGLE;
00395         linda->send_buf_cons = ( ( linda->send_buf_cons + 1 ) %
00396                                  LINDA_MAX_SEND_BUFS );
00397         return send_buf;
00398 }
00399 
00400 /**
00401  * Free a send buffer
00402  *
00403  * @v linda             Linda device
00404  * @v send_buf          Send buffer
00405  */
00406 static void linda_free_send_buf ( struct linda *linda,
00407                                   unsigned int send_buf ) {
00408         linda->send_buf[linda->send_buf_prod] = send_buf;
00409         linda->send_buf_prod = ( ( linda->send_buf_prod + 1 ) %
00410                                  LINDA_MAX_SEND_BUFS );
00411 }
00412 
00413 /**
00414  * Check to see if send buffer is in use
00415  *
00416  * @v linda             Linda device
00417  * @v send_buf          Send buffer
00418  * @ret in_use          Send buffer is in use
00419  */
00420 static int linda_send_buf_in_use ( struct linda *linda,
00421                                    unsigned int send_buf ) {
00422         unsigned int send_idx;
00423         unsigned int send_check;
00424         unsigned int inusecheck;
00425         unsigned int inuse;
00426         unsigned int check;
00427 
00428         send_idx = ( send_buf & ~LINDA_SEND_BUF_TOGGLE );
00429         send_check = ( !! ( send_buf & LINDA_SEND_BUF_TOGGLE ) );
00430         inusecheck = BIT_GET ( linda->sendbufavail, InUseCheck[send_idx] );
00431         inuse = ( !! ( inusecheck & 0x02 ) );
00432         check = ( !! ( inusecheck & 0x01 ) );
00433         return ( inuse || ( check != send_check ) );
00434 }
00435 
00436 /**
00437  * Calculate starting offset for send buffer
00438  *
00439  * @v linda             Linda device
00440  * @v send_buf          Send buffer
00441  * @ret offset          Starting offset
00442  */
00443 static unsigned long linda_send_buffer_offset ( struct linda *linda,
00444                                                 unsigned int send_buf ) {
00445         return ( linda->send_buffer_base +
00446                  ( ( send_buf & ~LINDA_SEND_BUF_TOGGLE ) *
00447                    LINDA_SEND_BUF_SIZE ) );
00448 }
00449 
00450 /**
00451  * Create send work queue
00452  *
00453  * @v linda             Linda device
00454  * @v qp                Queue pair
00455  */
00456 static int linda_create_send_wq ( struct linda *linda,
00457                                   struct ib_queue_pair *qp ) {
00458         struct ib_work_queue *wq = &qp->send;
00459         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00460         int rc;
00461 
00462         /* Reserve send buffers */
00463         if ( ( linda->reserved_send_bufs + qp->send.num_wqes ) >
00464              LINDA_MAX_SEND_BUFS ) {
00465                 DBGC ( linda, "Linda %p out of send buffers (have %d, used "
00466                        "%d, need %d)\n", linda, LINDA_MAX_SEND_BUFS,
00467                        linda->reserved_send_bufs, qp->send.num_wqes );
00468                 rc = -ENOBUFS;
00469                 goto err_reserve_bufs;
00470         }
00471         linda->reserved_send_bufs += qp->send.num_wqes;
00472 
00473         /* Reset work queue */
00474         linda_wq->prod = 0;
00475         linda_wq->cons = 0;
00476 
00477         /* Allocate space for send buffer uasge list */
00478         linda_wq->send_buf = zalloc ( qp->send.num_wqes *
00479                                       sizeof ( linda_wq->send_buf[0] ) );
00480         if ( ! linda_wq->send_buf ) {
00481                 rc = -ENOBUFS;
00482                 goto err_alloc_send_buf;
00483         }
00484 
00485         return 0;
00486 
00487         free ( linda_wq->send_buf );
00488  err_alloc_send_buf:
00489         linda->reserved_send_bufs -= qp->send.num_wqes;
00490  err_reserve_bufs:
00491         return rc;
00492 }
00493 
00494 /**
00495  * Destroy send work queue
00496  *
00497  * @v linda             Linda device
00498  * @v qp                Queue pair
00499  */
00500 static void linda_destroy_send_wq ( struct linda *linda,
00501                                     struct ib_queue_pair *qp ) {
00502         struct ib_work_queue *wq = &qp->send;
00503         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00504 
00505         free ( linda_wq->send_buf );
00506         linda->reserved_send_bufs -= qp->send.num_wqes;
00507 }
00508 
00509 /**
00510  * Initialise send datapath
00511  *
00512  * @v linda             Linda device
00513  * @ret rc              Return status code
00514  */
00515 static int linda_init_send ( struct linda *linda ) {
00516         struct QIB_7220_SendBufBase sendbufbase;
00517         struct QIB_7220_SendBufAvailAddr sendbufavailaddr;
00518         struct QIB_7220_SendCtrl sendctrl;
00519         unsigned int i;
00520         int rc;
00521 
00522         /* Retrieve SendBufBase */
00523         linda_readq ( linda, &sendbufbase, QIB_7220_SendBufBase_offset );
00524         linda->send_buffer_base = BIT_GET ( &sendbufbase,
00525                                             BaseAddr_SmallPIO );
00526         DBGC ( linda, "Linda %p send buffers at %lx\n",
00527                linda, linda->send_buffer_base );
00528 
00529         /* Initialise the send_buf[] array */
00530         for ( i = 0 ; i < LINDA_MAX_SEND_BUFS ; i++ )
00531                 linda->send_buf[i] = i;
00532 
00533         /* Allocate space for the SendBufAvail array */
00534         linda->sendbufavail = malloc_dma ( sizeof ( *linda->sendbufavail ),
00535                                            LINDA_SENDBUFAVAIL_ALIGN );
00536         if ( ! linda->sendbufavail ) {
00537                 rc = -ENOMEM;
00538                 goto err_alloc_sendbufavail;
00539         }
00540         memset ( linda->sendbufavail, 0, sizeof ( *linda->sendbufavail ) );
00541 
00542         /* Program SendBufAvailAddr into the hardware */
00543         memset ( &sendbufavailaddr, 0, sizeof ( sendbufavailaddr ) );
00544         BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
00545                      ( virt_to_bus ( linda->sendbufavail ) >> 6 ) );
00546         linda_writeq ( linda, &sendbufavailaddr,
00547                        QIB_7220_SendBufAvailAddr_offset );
00548 
00549         /* Enable sending and DMA of SendBufAvail */
00550         memset ( &sendctrl, 0, sizeof ( sendctrl ) );
00551         BIT_FILL_2 ( &sendctrl,
00552                      SendBufAvailUpd, 1,
00553                      SPioEnable, 1 );
00554         linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
00555 
00556         return 0;
00557 
00558         free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
00559  err_alloc_sendbufavail:
00560         return rc;
00561 }
00562 
00563 /**
00564  * Shut down send datapath
00565  *
00566  * @v linda             Linda device
00567  */
00568 static void linda_fini_send ( struct linda *linda ) {
00569         struct QIB_7220_SendCtrl sendctrl;
00570 
00571         /* Disable sending and DMA of SendBufAvail */
00572         memset ( &sendctrl, 0, sizeof ( sendctrl ) );
00573         linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
00574         mb();
00575 
00576         /* Ensure hardware has seen this disable */
00577         linda_readq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
00578 
00579         free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
00580 }
00581 
00582 /***************************************************************************
00583  *
00584  * Receive datapath
00585  *
00586  ***************************************************************************
00587  */
00588 
00589 /**
00590  * Create receive work queue
00591  *
00592  * @v linda             Linda device
00593  * @v qp                Queue pair
00594  * @ret rc              Return status code
00595  */
00596 static int linda_create_recv_wq ( struct linda *linda,
00597                                   struct ib_queue_pair *qp ) {
00598         struct ib_work_queue *wq = &qp->recv;
00599         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00600         struct QIB_7220_RcvHdrAddr0 rcvhdraddr;
00601         struct QIB_7220_RcvHdrTailAddr0 rcvhdrtailaddr;
00602         struct QIB_7220_RcvHdrHead0 rcvhdrhead;
00603         struct QIB_7220_scalar rcvegrindexhead;
00604         struct QIB_7220_RcvCtrl rcvctrl;
00605         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
00606         int rc;
00607 
00608         /* Reset context information */
00609         memset ( &linda_wq->header_prod, 0,
00610                  sizeof ( linda_wq->header_prod ) );
00611         linda_wq->header_cons = 0;
00612         linda_wq->eager_prod = 0;
00613         linda_wq->eager_cons = 0;
00614 
00615         /* Allocate receive header buffer */
00616         linda_wq->header = malloc_dma ( LINDA_RECV_HEADERS_SIZE,
00617                                         LINDA_RECV_HEADERS_ALIGN );
00618         if ( ! linda_wq->header ) {
00619                 rc = -ENOMEM;
00620                 goto err_alloc_header;
00621         }
00622 
00623         /* Enable context in hardware */
00624         memset ( &rcvhdraddr, 0, sizeof ( rcvhdraddr ) );
00625         BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr0,
00626                      ( virt_to_bus ( linda_wq->header ) >> 2 ) );
00627         linda_writeq_array8b ( linda, &rcvhdraddr,
00628                                QIB_7220_RcvHdrAddr0_offset, ctx );
00629         memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
00630         BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr0,
00631                      ( virt_to_bus ( &linda_wq->header_prod ) >> 2 ) );
00632         linda_writeq_array8b ( linda, &rcvhdrtailaddr,
00633                                QIB_7220_RcvHdrTailAddr0_offset, ctx );
00634         memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
00635         BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
00636         linda_writeq_array64k ( linda, &rcvhdrhead,
00637                                 QIB_7220_RcvHdrHead0_offset, ctx );
00638         memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
00639         BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
00640         linda_writeq_array64k ( linda, &rcvegrindexhead,
00641                                 QIB_7220_RcvEgrIndexHead0_offset, ctx );
00642         linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00643         BIT_SET ( &rcvctrl, PortEnable[ctx], 1 );
00644         BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
00645         linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00646 
00647         DBGC ( linda, "Linda %p QPN %ld CTX %d hdrs [%lx,%lx) prod %lx\n",
00648                linda, qp->qpn, ctx, virt_to_bus ( linda_wq->header ),
00649                ( virt_to_bus ( linda_wq->header ) + LINDA_RECV_HEADERS_SIZE ),
00650                virt_to_bus ( &linda_wq->header_prod ) );
00651         return 0;
00652 
00653         free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
00654  err_alloc_header:
00655         return rc;
00656 }
00657 
00658 /**
00659  * Destroy receive work queue
00660  *
00661  * @v linda             Linda device
00662  * @v qp                Queue pair
00663  */
00664 static void linda_destroy_recv_wq ( struct linda *linda,
00665                                     struct ib_queue_pair *qp ) {
00666         struct ib_work_queue *wq = &qp->recv;
00667         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00668         struct QIB_7220_RcvCtrl rcvctrl;
00669         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
00670 
00671         /* Disable context in hardware */
00672         linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00673         BIT_SET ( &rcvctrl, PortEnable[ctx], 0 );
00674         BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
00675         linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00676 
00677         /* Make sure the hardware has seen that the context is disabled */
00678         linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00679         mb();
00680 
00681         /* Free headers ring */
00682         free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
00683 
00684         /* Free context */
00685         linda_free_ctx ( linda, ctx );
00686 }
00687 
00688 /**
00689  * Initialise receive datapath
00690  *
00691  * @v linda             Linda device
00692  * @ret rc              Return status code
00693  */
00694 static int linda_init_recv ( struct linda *linda ) {
00695         struct QIB_7220_RcvCtrl rcvctrl;
00696         struct QIB_7220_scalar rcvegrbase;
00697         struct QIB_7220_scalar rcvhdrentsize;
00698         struct QIB_7220_scalar rcvhdrcnt;
00699         struct QIB_7220_RcvBTHQP rcvbthqp;
00700         unsigned int portcfg;
00701         unsigned long egrbase;
00702         unsigned int eager_array_size_0;
00703         unsigned int eager_array_size_other;
00704         unsigned int ctx;
00705 
00706         /* Select configuration based on number of contexts */
00707         switch ( LINDA_NUM_CONTEXTS ) {
00708         case 5:
00709                 portcfg = LINDA_PORTCFG_5CTX;
00710                 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_5CTX_0;
00711                 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER;
00712                 break;
00713         case 9:
00714                 portcfg = LINDA_PORTCFG_9CTX;
00715                 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_9CTX_0;
00716                 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER;
00717                 break;
00718         case 17:
00719                 portcfg = LINDA_PORTCFG_17CTX;
00720                 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_17CTX_0;
00721                 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER;
00722                 break;
00723         default:
00724                 linker_assert ( 0, invalid_LINDA_NUM_CONTEXTS );
00725                 return -EINVAL;
00726         }
00727 
00728         /* Configure number of contexts */
00729         memset ( &rcvctrl, 0, sizeof ( rcvctrl ) );
00730         BIT_FILL_3 ( &rcvctrl,
00731                      TailUpd, 1,
00732                      PortCfg, portcfg,
00733                      RcvQPMapEnable, 1 );
00734         linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00735 
00736         /* Configure receive header buffer sizes */
00737         memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
00738         BIT_FILL_1 ( &rcvhdrcnt, Value, LINDA_RECV_HEADER_COUNT );
00739         linda_writeq ( linda, &rcvhdrcnt, QIB_7220_RcvHdrCnt_offset );
00740         memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
00741         BIT_FILL_1 ( &rcvhdrentsize, Value, ( LINDA_RECV_HEADER_SIZE >> 2 ) );
00742         linda_writeq ( linda, &rcvhdrentsize, QIB_7220_RcvHdrEntSize_offset );
00743 
00744         /* Calculate eager array start addresses for each context */
00745         linda_readq ( linda, &rcvegrbase, QIB_7220_RcvEgrBase_offset );
00746         egrbase = BIT_GET ( &rcvegrbase, Value );
00747         linda->recv_wq[0].eager_array = egrbase;
00748         linda->recv_wq[0].eager_entries = eager_array_size_0;
00749         egrbase += ( eager_array_size_0 * sizeof ( struct QIB_7220_RcvEgr ) );
00750         for ( ctx = 1 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
00751                 linda->recv_wq[ctx].eager_array = egrbase;
00752                 linda->recv_wq[ctx].eager_entries = eager_array_size_other;
00753                 egrbase += ( eager_array_size_other *
00754                              sizeof ( struct QIB_7220_RcvEgr ) );
00755         }
00756         for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
00757                 DBGC ( linda, "Linda %p CTX %d eager array at %lx (%d "
00758                        "entries)\n", linda, ctx,
00759                        linda->recv_wq[ctx].eager_array,
00760                        linda->recv_wq[ctx].eager_entries );
00761         }
00762 
00763         /* Set the BTH QP for Infinipath packets to an unused value */
00764         memset ( &rcvbthqp, 0, sizeof ( rcvbthqp ) );
00765         BIT_FILL_1 ( &rcvbthqp, RcvBTHQP, LINDA_QP_IDETH );
00766         linda_writeq ( linda, &rcvbthqp, QIB_7220_RcvBTHQP_offset );
00767 
00768         return 0;
00769 }
00770 
00771 /**
00772  * Shut down receive datapath
00773  *
00774  * @v linda             Linda device
00775  */
00776 static void linda_fini_recv ( struct linda *linda __unused ) {
00777         /* Nothing to do; all contexts were already disabled when the
00778          * queue pairs were destroyed
00779          */
00780 }
00781 
00782 /***************************************************************************
00783  *
00784  * Completion queue operations
00785  *
00786  ***************************************************************************
00787  */
00788 
00789 /**
00790  * Create completion queue
00791  *
00792  * @v ibdev             Infiniband device
00793  * @v cq                Completion queue
00794  * @ret rc              Return status code
00795  */
00796 static int linda_create_cq ( struct ib_device *ibdev,
00797                              struct ib_completion_queue *cq ) {
00798         struct linda *linda = ib_get_drvdata ( ibdev );
00799         static int cqn;
00800 
00801         /* The hardware has no concept of completion queues.  We
00802          * simply use the association between CQs and WQs (already
00803          * handled by the IB core) to decide which WQs to poll.
00804          *
00805          * We do set a CQN, just to avoid confusing debug messages
00806          * from the IB core.
00807          */
00808         cq->cqn = ++cqn;
00809         DBGC ( linda, "Linda %p CQN %ld created\n", linda, cq->cqn );
00810 
00811         return 0;
00812 }
00813 
00814 /**
00815  * Destroy completion queue
00816  *
00817  * @v ibdev             Infiniband device
00818  * @v cq                Completion queue
00819  */
00820 static void linda_destroy_cq ( struct ib_device *ibdev,
00821                                struct ib_completion_queue *cq ) {
00822         struct linda *linda = ib_get_drvdata ( ibdev );
00823 
00824         /* Nothing to do */
00825         DBGC ( linda, "Linda %p CQN %ld destroyed\n", linda, cq->cqn );
00826 }
00827 
00828 /***************************************************************************
00829  *
00830  * Queue pair operations
00831  *
00832  ***************************************************************************
00833  */
00834 
00835 /**
00836  * Create queue pair
00837  *
00838  * @v ibdev             Infiniband device
00839  * @v qp                Queue pair
00840  * @ret rc              Return status code
00841  */
00842 static int linda_create_qp ( struct ib_device *ibdev,
00843                              struct ib_queue_pair *qp ) {
00844         struct linda *linda = ib_get_drvdata ( ibdev );
00845         int ctx;
00846         int rc;
00847 
00848         /* Locate an available context */
00849         ctx = linda_alloc_ctx ( linda );
00850         if ( ctx < 0 ) {
00851                 rc = ctx;
00852                 goto err_alloc_ctx;
00853         }
00854 
00855         /* Set queue pair number based on context index */
00856         qp->qpn = linda_ctx_to_qpn ( ctx );
00857 
00858         /* Set work-queue private data pointers */
00859         ib_wq_set_drvdata ( &qp->send, &linda->send_wq[ctx] );
00860         ib_wq_set_drvdata ( &qp->recv, &linda->recv_wq[ctx] );
00861 
00862         /* Create receive work queue */
00863         if ( ( rc = linda_create_recv_wq ( linda, qp ) ) != 0 )
00864                 goto err_create_recv_wq;
00865 
00866         /* Create send work queue */
00867         if ( ( rc = linda_create_send_wq ( linda, qp ) ) != 0 )
00868                 goto err_create_send_wq;
00869 
00870         return 0;
00871 
00872         linda_destroy_send_wq ( linda, qp );
00873  err_create_send_wq:
00874         linda_destroy_recv_wq ( linda, qp );
00875  err_create_recv_wq:
00876         linda_free_ctx ( linda, ctx );
00877  err_alloc_ctx:
00878         return rc;
00879 }
00880 
00881 /**
00882  * Modify queue pair
00883  *
00884  * @v ibdev             Infiniband device
00885  * @v qp                Queue pair
00886  * @ret rc              Return status code
00887  */
00888 static int linda_modify_qp ( struct ib_device *ibdev,
00889                              struct ib_queue_pair *qp ) {
00890         struct linda *linda = ib_get_drvdata ( ibdev );
00891 
00892         /* Nothing to do; the hardware doesn't have a notion of queue
00893          * keys
00894          */
00895         DBGC ( linda, "Linda %p QPN %ld modified\n", linda, qp->qpn );
00896         return 0;
00897 }
00898 
00899 /**
00900  * Destroy queue pair
00901  *
00902  * @v ibdev             Infiniband device
00903  * @v qp                Queue pair
00904  */
00905 static void linda_destroy_qp ( struct ib_device *ibdev,
00906                                struct ib_queue_pair *qp ) {
00907         struct linda *linda = ib_get_drvdata ( ibdev );
00908 
00909         linda_destroy_send_wq ( linda, qp );
00910         linda_destroy_recv_wq ( linda, qp );
00911 }
00912 
00913 /***************************************************************************
00914  *
00915  * Work request operations
00916  *
00917  ***************************************************************************
00918  */
00919 
00920 /**
00921  * Post send work queue entry
00922  *
00923  * @v ibdev             Infiniband device
00924  * @v qp                Queue pair
00925  * @v dest              Destination address vector
00926  * @v iobuf             I/O buffer
00927  * @ret rc              Return status code
00928  */
00929 static int linda_post_send ( struct ib_device *ibdev,
00930                              struct ib_queue_pair *qp,
00931                              struct ib_address_vector *dest,
00932                              struct io_buffer *iobuf ) {
00933         struct linda *linda = ib_get_drvdata ( ibdev );
00934         struct ib_work_queue *wq = &qp->send;
00935         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00936         struct QIB_7220_SendPbc sendpbc;
00937         uint8_t header_buf[IB_MAX_HEADER_SIZE];
00938         struct io_buffer headers;
00939         unsigned int send_buf;
00940         unsigned long start_offset;
00941         unsigned long offset;
00942         size_t len;
00943         ssize_t frag_len;
00944         uint32_t *data;
00945 
00946         /* Allocate send buffer and calculate offset */
00947         send_buf = linda_alloc_send_buf ( linda );
00948         start_offset = offset = linda_send_buffer_offset ( linda, send_buf );
00949 
00950         /* Store I/O buffer and send buffer index */
00951         assert ( wq->iobufs[linda_wq->prod] == NULL );
00952         wq->iobufs[linda_wq->prod] = iobuf;
00953         linda_wq->send_buf[linda_wq->prod] = send_buf;
00954 
00955         /* Construct headers */
00956         iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
00957         iob_reserve ( &headers, sizeof ( header_buf ) );
00958         ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
00959 
00960         /* Calculate packet length */
00961         len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
00962                   iob_len ( iobuf ) + 3 ) & ~3 );
00963 
00964         /* Construct send per-buffer control word */
00965         memset ( &sendpbc, 0, sizeof ( sendpbc ) );
00966         BIT_FILL_2 ( &sendpbc,
00967                      LengthP1_toibc, ( ( len >> 2 ) - 1 ),
00968                      VL15, 1 );
00969 
00970         /* Write SendPbc */
00971         DBG_DISABLE ( DBGLVL_IO );
00972         linda_writeq ( linda, &sendpbc, offset );
00973         offset += sizeof ( sendpbc );
00974 
00975         /* Write headers */
00976         for ( data = headers.data, frag_len = iob_len ( &headers ) ;
00977               frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
00978                 linda_writel ( linda, *data, offset );
00979         }
00980 
00981         /* Write data */
00982         for ( data = iobuf->data, frag_len = iob_len ( iobuf ) ;
00983               frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
00984                 linda_writel ( linda, *data, offset );
00985         }
00986         DBG_ENABLE ( DBGLVL_IO );
00987 
00988         assert ( ( start_offset + len ) == offset );
00989         DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) posted [%lx,%lx)\n",
00990                 linda, qp->qpn, send_buf, linda_wq->prod,
00991                 start_offset, offset );
00992 
00993         /* Increment producer counter */
00994         linda_wq->prod = ( ( linda_wq->prod + 1 ) & ( wq->num_wqes - 1 ) );
00995 
00996         return 0;
00997 }
00998 
00999 /**
01000  * Complete send work queue entry
01001  *
01002  * @v ibdev             Infiniband device
01003  * @v qp                Queue pair
01004  * @v wqe_idx           Work queue entry index
01005  */
01006 static void linda_complete_send ( struct ib_device *ibdev,
01007                                   struct ib_queue_pair *qp,
01008                                   unsigned int wqe_idx ) {
01009         struct linda *linda = ib_get_drvdata ( ibdev );
01010         struct ib_work_queue *wq = &qp->send;
01011         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01012         struct io_buffer *iobuf;
01013         unsigned int send_buf;
01014 
01015         /* Parse completion */
01016         send_buf = linda_wq->send_buf[wqe_idx];
01017         DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) complete\n",
01018                 linda, qp->qpn, send_buf, wqe_idx );
01019 
01020         /* Complete work queue entry */
01021         iobuf = wq->iobufs[wqe_idx];
01022         assert ( iobuf != NULL );
01023         ib_complete_send ( ibdev, qp, iobuf, 0 );
01024         wq->iobufs[wqe_idx] = NULL;
01025 
01026         /* Free send buffer */
01027         linda_free_send_buf ( linda, send_buf );
01028 }
01029 
01030 /**
01031  * Poll send work queue
01032  *
01033  * @v ibdev             Infiniband device
01034  * @v qp                Queue pair
01035  */
01036 static void linda_poll_send_wq ( struct ib_device *ibdev,
01037                                  struct ib_queue_pair *qp ) {
01038         struct linda *linda = ib_get_drvdata ( ibdev );
01039         struct ib_work_queue *wq = &qp->send;
01040         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01041         unsigned int send_buf;
01042 
01043         /* Look for completions */
01044         while ( wq->fill ) {
01045 
01046                 /* Check to see if send buffer has completed */
01047                 send_buf = linda_wq->send_buf[linda_wq->cons];
01048                 if ( linda_send_buf_in_use ( linda, send_buf ) )
01049                         break;
01050 
01051                 /* Complete this buffer */
01052                 linda_complete_send ( ibdev, qp, linda_wq->cons );
01053 
01054                 /* Increment consumer counter */
01055                 linda_wq->cons = ( ( linda_wq->cons + 1 ) &
01056                                    ( wq->num_wqes - 1 ) );
01057         }
01058 }
01059 
01060 /**
01061  * Post receive work queue entry
01062  *
01063  * @v ibdev             Infiniband device
01064  * @v qp                Queue pair
01065  * @v iobuf             I/O buffer
01066  * @ret rc              Return status code
01067  */
01068 static int linda_post_recv ( struct ib_device *ibdev,
01069                              struct ib_queue_pair *qp,
01070                              struct io_buffer *iobuf ) {
01071         struct linda *linda = ib_get_drvdata ( ibdev );
01072         struct ib_work_queue *wq = &qp->recv;
01073         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01074         struct QIB_7220_RcvEgr rcvegr;
01075         struct QIB_7220_scalar rcvegrindexhead;
01076         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
01077         physaddr_t addr;
01078         size_t len;
01079         unsigned int wqe_idx;
01080         unsigned int bufsize;
01081 
01082         /* Sanity checks */
01083         addr = virt_to_bus ( iobuf->data );
01084         len = iob_tailroom ( iobuf );
01085         if ( addr & ( LINDA_EAGER_BUFFER_ALIGN - 1 ) ) {
01086                 DBGC ( linda, "Linda %p QPN %ld misaligned RX buffer "
01087                        "(%08lx)\n", linda, qp->qpn, addr );
01088                 return -EINVAL;
01089         }
01090         if ( len != LINDA_RECV_PAYLOAD_SIZE ) {
01091                 DBGC ( linda, "Linda %p QPN %ld wrong RX buffer size (%zd)\n",
01092                        linda, qp->qpn, len );
01093                 return -EINVAL;
01094         }
01095 
01096         /* Calculate eager producer index and WQE index */
01097         wqe_idx = ( linda_wq->eager_prod & ( wq->num_wqes - 1 ) );
01098         assert ( wq->iobufs[wqe_idx] == NULL );
01099 
01100         /* Store I/O buffer */
01101         wq->iobufs[wqe_idx] = iobuf;
01102 
01103         /* Calculate buffer size */
01104         switch ( LINDA_RECV_PAYLOAD_SIZE ) {
01105         case 2048:  bufsize = LINDA_EAGER_BUFFER_2K;  break;
01106         case 4096:  bufsize = LINDA_EAGER_BUFFER_4K;  break;
01107         case 8192:  bufsize = LINDA_EAGER_BUFFER_8K;  break;
01108         case 16384: bufsize = LINDA_EAGER_BUFFER_16K; break;
01109         case 32768: bufsize = LINDA_EAGER_BUFFER_32K; break;
01110         case 65536: bufsize = LINDA_EAGER_BUFFER_64K; break;
01111         default:    linker_assert ( 0, invalid_rx_payload_size );
01112                     bufsize = LINDA_EAGER_BUFFER_NONE;
01113         }
01114 
01115         /* Post eager buffer */
01116         memset ( &rcvegr, 0, sizeof ( rcvegr ) );
01117         BIT_FILL_2 ( &rcvegr,
01118                      Addr, ( addr >> 11 ),
01119                      BufSize, bufsize );
01120         linda_writeq_array8b ( linda, &rcvegr,
01121                                linda_wq->eager_array, linda_wq->eager_prod );
01122         DBGC2 ( linda, "Linda %p QPN %ld RX egr %d(%d) posted [%lx,%lx)\n",
01123                 linda, qp->qpn, linda_wq->eager_prod, wqe_idx,
01124                 addr, ( addr + len ) );
01125 
01126         /* Increment producer index */
01127         linda_wq->eager_prod = ( ( linda_wq->eager_prod + 1 ) &
01128                                  ( linda_wq->eager_entries - 1 ) );
01129 
01130         /* Update head index */
01131         memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
01132         BIT_FILL_1 ( &rcvegrindexhead,
01133                      Value, ( ( linda_wq->eager_prod + 1 ) &
01134                               ( linda_wq->eager_entries - 1 ) ) );
01135         linda_writeq_array64k ( linda, &rcvegrindexhead,
01136                                 QIB_7220_RcvEgrIndexHead0_offset, ctx );
01137 
01138         return 0;
01139 }
01140 
01141 /**
01142  * Complete receive work queue entry
01143  *
01144  * @v ibdev             Infiniband device
01145  * @v qp                Queue pair
01146  * @v header_offs       Header offset
01147  */
01148 static void linda_complete_recv ( struct ib_device *ibdev,
01149                                   struct ib_queue_pair *qp,
01150                                   unsigned int header_offs ) {
01151         struct linda *linda = ib_get_drvdata ( ibdev );
01152         struct ib_work_queue *wq = &qp->recv;
01153         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01154         struct QIB_7220_RcvHdrFlags *rcvhdrflags;
01155         struct QIB_7220_RcvEgr rcvegr;
01156         struct io_buffer headers;
01157         struct io_buffer *iobuf;
01158         struct ib_queue_pair *intended_qp;
01159         struct ib_address_vector dest;
01160         struct ib_address_vector source;
01161         unsigned int rcvtype;
01162         unsigned int pktlen;
01163         unsigned int egrindex;
01164         unsigned int useegrbfr;
01165         unsigned int iberr, mkerr, tiderr, khdrerr, mtuerr;
01166         unsigned int lenerr, parityerr, vcrcerr, icrcerr;
01167         unsigned int err;
01168         unsigned int hdrqoffset;
01169         unsigned int header_len;
01170         unsigned int padded_payload_len;
01171         unsigned int wqe_idx;
01172         size_t payload_len;
01173         int qp0;
01174         int rc;
01175 
01176         /* RcvHdrFlags are at the end of the header entry */
01177         rcvhdrflags = ( linda_wq->header + header_offs +
01178                         LINDA_RECV_HEADER_SIZE - sizeof ( *rcvhdrflags ) );
01179         rcvtype = BIT_GET ( rcvhdrflags, RcvType );
01180         pktlen = ( BIT_GET ( rcvhdrflags, PktLen ) << 2 );
01181         egrindex = BIT_GET ( rcvhdrflags, EgrIndex );
01182         useegrbfr = BIT_GET ( rcvhdrflags, UseEgrBfr );
01183         hdrqoffset = ( BIT_GET ( rcvhdrflags, HdrqOffset ) << 2 );
01184         iberr = BIT_GET ( rcvhdrflags, IBErr );
01185         mkerr = BIT_GET ( rcvhdrflags, MKErr );
01186         tiderr = BIT_GET ( rcvhdrflags, TIDErr );
01187         khdrerr = BIT_GET ( rcvhdrflags, KHdrErr );
01188         mtuerr = BIT_GET ( rcvhdrflags, MTUErr );
01189         lenerr = BIT_GET ( rcvhdrflags, LenErr );
01190         parityerr = BIT_GET ( rcvhdrflags, ParityErr );
01191         vcrcerr = BIT_GET ( rcvhdrflags, VCRCErr );
01192         icrcerr = BIT_GET ( rcvhdrflags, ICRCErr );
01193         header_len = ( LINDA_RECV_HEADER_SIZE - hdrqoffset -
01194                        sizeof ( *rcvhdrflags ) );
01195         padded_payload_len = ( pktlen - header_len - 4 /* ICRC */ );
01196         err = ( iberr | mkerr | tiderr | khdrerr | mtuerr |
01197                 lenerr | parityerr | vcrcerr | icrcerr );
01198         /* IB header is placed immediately before RcvHdrFlags */
01199         iob_populate ( &headers, ( ( ( void * ) rcvhdrflags ) - header_len ),
01200                        header_len, header_len );
01201 
01202         /* Dump diagnostic information */
01203         if ( err || ( ! useegrbfr ) ) {
01204                 DBGC ( linda, "Linda %p QPN %ld RX egr %d%s hdr %d type %d "
01205                        "len %d(%d+%d+4)%s%s%s%s%s%s%s%s%s%s%s\n", linda,
01206                        qp->qpn, egrindex, ( useegrbfr ? "" : "(unused)" ),
01207                        ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
01208                        pktlen, header_len, padded_payload_len,
01209                        ( err ? " [Err" : "" ), ( iberr ? " IB" : "" ),
01210                        ( mkerr ? " MK" : "" ), ( tiderr ? " TID" : "" ),
01211                        ( khdrerr ? " KHdr" : "" ), ( mtuerr ? " MTU" : "" ),
01212                        ( lenerr ? " Len" : "" ), ( parityerr ? " Parity" : ""),
01213                        ( vcrcerr ? " VCRC" : "" ), ( icrcerr ? " ICRC" : "" ),
01214                        ( err ? "]" : "" ) );
01215         } else {
01216                 DBGC2 ( linda, "Linda %p QPN %ld RX egr %d hdr %d type %d "
01217                         "len %d(%d+%d+4)\n", linda, qp->qpn, egrindex,
01218                         ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
01219                         pktlen, header_len, padded_payload_len );
01220         }
01221         DBGCP_HDA ( linda, hdrqoffset, headers.data,
01222                     ( header_len + sizeof ( *rcvhdrflags ) ) );
01223 
01224         /* Parse header to generate address vector */
01225         qp0 = ( qp->qpn == 0 );
01226         intended_qp = NULL;
01227         if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
01228                               &payload_len, &dest, &source ) ) != 0 ) {
01229                 DBGC ( linda, "Linda %p could not parse headers: %s\n",
01230                        linda, strerror ( rc ) );
01231                 err = 1;
01232         }
01233         if ( ! intended_qp )
01234                 intended_qp = qp;
01235 
01236         /* Complete this buffer and any skipped buffers.  Note that
01237          * when the hardware runs out of buffers, it will repeatedly
01238          * report the same buffer (the tail) as a TID error, and that
01239          * it also has a habit of sometimes skipping over several
01240          * buffers at once.
01241          */
01242         while ( 1 ) {
01243 
01244                 /* If we have caught up to the producer counter, stop.
01245                  * This will happen when the hardware first runs out
01246                  * of buffers and starts reporting TID errors against
01247                  * the eager buffer it wants to use next.
01248                  */
01249                 if ( linda_wq->eager_cons == linda_wq->eager_prod )
01250                         break;
01251 
01252                 /* If we have caught up to where we should be after
01253                  * completing this egrindex, stop.  We phrase the test
01254                  * this way to avoid completing the entire ring when
01255                  * we receive the same egrindex twice in a row.
01256                  */
01257                 if ( ( linda_wq->eager_cons ==
01258                        ( ( egrindex + 1 ) & ( linda_wq->eager_entries - 1 ) )))
01259                         break;
01260 
01261                 /* Identify work queue entry and corresponding I/O
01262                  * buffer.
01263                  */
01264                 wqe_idx = ( linda_wq->eager_cons & ( wq->num_wqes - 1 ) );
01265                 iobuf = wq->iobufs[wqe_idx];
01266                 assert ( iobuf != NULL );
01267                 wq->iobufs[wqe_idx] = NULL;
01268 
01269                 /* Complete the eager buffer */
01270                 if ( linda_wq->eager_cons == egrindex ) {
01271                         /* Completing the eager buffer described in
01272                          * this header entry.
01273                          */
01274                         if ( payload_len <= iob_tailroom ( iobuf ) ) {
01275                                 iob_put ( iobuf, payload_len );
01276                                 rc = ( err ?
01277                                        -EIO : ( useegrbfr ? 0 : -ECANCELED ) );
01278                         } else {
01279                                 DBGC ( linda, "Linda %p bad payload len %zd\n",
01280                                        linda, payload_len );
01281                                 rc = -EPROTO;
01282                         }
01283                         /* Redirect to target QP if necessary */
01284                         if ( qp != intended_qp ) {
01285                                 DBGC ( linda, "Linda %p redirecting QPN %ld "
01286                                        "=> %ld\n",
01287                                        linda, qp->qpn, intended_qp->qpn );
01288                                 /* Compensate for incorrect fill levels */
01289                                 qp->recv.fill--;
01290                                 intended_qp->recv.fill++;
01291                         }
01292                         ib_complete_recv ( ibdev, intended_qp, &dest, &source,
01293                                            iobuf, rc );
01294                 } else {
01295                         /* Completing on a skipped-over eager buffer */
01296                         ib_complete_recv ( ibdev, qp, &dest, &source, iobuf,
01297                                            -ECANCELED );
01298                 }
01299 
01300                 /* Clear eager buffer */
01301                 memset ( &rcvegr, 0, sizeof ( rcvegr ) );
01302                 linda_writeq_array8b ( linda, &rcvegr, linda_wq->eager_array,
01303                                        linda_wq->eager_cons );
01304 
01305                 /* Increment consumer index */
01306                 linda_wq->eager_cons = ( ( linda_wq->eager_cons + 1 ) &
01307                                          ( linda_wq->eager_entries - 1 ) );
01308         }
01309 }
01310 
01311 /**
01312  * Poll receive work queue
01313  *
01314  * @v ibdev             Infiniband device
01315  * @v qp                Queue pair
01316  */
01317 static void linda_poll_recv_wq ( struct ib_device *ibdev,
01318                                  struct ib_queue_pair *qp ) {
01319         struct linda *linda = ib_get_drvdata ( ibdev );
01320         struct ib_work_queue *wq = &qp->recv;
01321         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01322         struct QIB_7220_RcvHdrHead0 rcvhdrhead;
01323         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
01324         unsigned int header_prod;
01325 
01326         /* Check for received packets */
01327         header_prod = ( BIT_GET ( &linda_wq->header_prod, Value ) << 2 );
01328         if ( header_prod == linda_wq->header_cons )
01329                 return;
01330 
01331         /* Process all received packets */
01332         while ( linda_wq->header_cons != header_prod ) {
01333 
01334                 /* Complete the receive */
01335                 linda_complete_recv ( ibdev, qp, linda_wq->header_cons );
01336 
01337                 /* Increment the consumer offset */
01338                 linda_wq->header_cons += LINDA_RECV_HEADER_SIZE;
01339                 linda_wq->header_cons %= LINDA_RECV_HEADERS_SIZE;
01340         }
01341 
01342         /* Update consumer offset */
01343         memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
01344         BIT_FILL_2 ( &rcvhdrhead,
01345                      RcvHeadPointer, ( linda_wq->header_cons >> 2 ),
01346                      counter, 1 );
01347         linda_writeq_array64k ( linda, &rcvhdrhead,
01348                                 QIB_7220_RcvHdrHead0_offset, ctx );
01349 }
01350 
01351 /**
01352  * Poll completion queue
01353  *
01354  * @v ibdev             Infiniband device
01355  * @v cq                Completion queue
01356  */
01357 static void linda_poll_cq ( struct ib_device *ibdev,
01358                             struct ib_completion_queue *cq ) {
01359         struct ib_work_queue *wq;
01360 
01361         /* Poll associated send and receive queues */
01362         list_for_each_entry ( wq, &cq->work_queues, list ) {
01363                 if ( wq->is_send ) {
01364                         linda_poll_send_wq ( ibdev, wq->qp );
01365                 } else {
01366                         linda_poll_recv_wq ( ibdev, wq->qp );
01367                 }
01368         }
01369 }
01370 
01371 /***************************************************************************
01372  *
01373  * Event queues
01374  *
01375  ***************************************************************************
01376  */
01377 
01378 /**
01379  * Poll event queue
01380  *
01381  * @v ibdev             Infiniband device
01382  */
01383 static void linda_poll_eq ( struct ib_device *ibdev ) {
01384         struct linda *linda = ib_get_drvdata ( ibdev );
01385         struct QIB_7220_ErrStatus errstatus;
01386         struct QIB_7220_ErrClear errclear;
01387 
01388         /* Check for link status changes */
01389         DBG_DISABLE ( DBGLVL_IO );
01390         linda_readq ( linda, &errstatus, QIB_7220_ErrStatus_offset );
01391         DBG_ENABLE ( DBGLVL_IO );
01392         if ( BIT_GET ( &errstatus, IBStatusChanged ) ) {
01393                 linda_link_state_changed ( ibdev );
01394                 memset ( &errclear, 0, sizeof ( errclear ) );
01395                 BIT_FILL_1 ( &errclear, IBStatusChangedClear, 1 );
01396                 linda_writeq ( linda, &errclear, QIB_7220_ErrClear_offset );
01397         }
01398 }
01399 
01400 /***************************************************************************
01401  *
01402  * Infiniband link-layer operations
01403  *
01404  ***************************************************************************
01405  */
01406 
01407 /**
01408  * Initialise Infiniband link
01409  *
01410  * @v ibdev             Infiniband device
01411  * @ret rc              Return status code
01412  */
01413 static int linda_open ( struct ib_device *ibdev ) {
01414         struct linda *linda = ib_get_drvdata ( ibdev );
01415         struct QIB_7220_Control control;
01416 
01417         /* Disable link */
01418         linda_readq ( linda, &control, QIB_7220_Control_offset );
01419         BIT_SET ( &control, LinkEn, 1 );
01420         linda_writeq ( linda, &control, QIB_7220_Control_offset );
01421         return 0;
01422 }
01423 
01424 /**
01425  * Close Infiniband link
01426  *
01427  * @v ibdev             Infiniband device
01428  */
01429 static void linda_close ( struct ib_device *ibdev ) {
01430         struct linda *linda = ib_get_drvdata ( ibdev );
01431         struct QIB_7220_Control control;
01432 
01433         /* Disable link */
01434         linda_readq ( linda, &control, QIB_7220_Control_offset );
01435         BIT_SET ( &control, LinkEn, 0 );
01436         linda_writeq ( linda, &control, QIB_7220_Control_offset );
01437 }
01438 
01439 /***************************************************************************
01440  *
01441  * Multicast group operations
01442  *
01443  ***************************************************************************
01444  */
01445 
01446 /**
01447  * Attach to multicast group
01448  *
01449  * @v ibdev             Infiniband device
01450  * @v qp                Queue pair
01451  * @v gid               Multicast GID
01452  * @ret rc              Return status code
01453  */
01454 static int linda_mcast_attach ( struct ib_device *ibdev,
01455                                 struct ib_queue_pair *qp,
01456                                 union ib_gid *gid ) {
01457         struct linda *linda = ib_get_drvdata ( ibdev );
01458 
01459         ( void ) linda;
01460         ( void ) qp;
01461         ( void ) gid;
01462         return 0;
01463 }
01464 
01465 /**
01466  * Detach from multicast group
01467  *
01468  * @v ibdev             Infiniband device
01469  * @v qp                Queue pair
01470  * @v gid               Multicast GID
01471  */
01472 static void linda_mcast_detach ( struct ib_device *ibdev,
01473                                  struct ib_queue_pair *qp,
01474                                  union ib_gid *gid ) {
01475         struct linda *linda = ib_get_drvdata ( ibdev );
01476 
01477         ( void ) linda;
01478         ( void ) qp;
01479         ( void ) gid;
01480 }
01481 
01482 /** Linda Infiniband operations */
01483 static struct ib_device_operations linda_ib_operations = {
01484         .create_cq      = linda_create_cq,
01485         .destroy_cq     = linda_destroy_cq,
01486         .create_qp      = linda_create_qp,
01487         .modify_qp      = linda_modify_qp,
01488         .destroy_qp     = linda_destroy_qp,
01489         .post_send      = linda_post_send,
01490         .post_recv      = linda_post_recv,
01491         .poll_cq        = linda_poll_cq,
01492         .poll_eq        = linda_poll_eq,
01493         .open           = linda_open,
01494         .close          = linda_close,
01495         .mcast_attach   = linda_mcast_attach,
01496         .mcast_detach   = linda_mcast_detach,
01497         .set_port_info  = linda_set_port_info,
01498         .set_pkey_table = linda_set_pkey_table,
01499 };
01500 
01501 /***************************************************************************
01502  *
01503  * I2C bus operations
01504  *
01505  ***************************************************************************
01506  */
01507 
01508 /** Linda I2C bit to GPIO mappings */
01509 static unsigned int linda_i2c_bits[] = {
01510         [I2C_BIT_SCL] = ( 1 << LINDA_GPIO_SCL ),
01511         [I2C_BIT_SDA] = ( 1 << LINDA_GPIO_SDA ),
01512 };
01513 
01514 /**
01515  * Read Linda I2C line status
01516  *
01517  * @v basher            Bit-bashing interface
01518  * @v bit_id            Bit number
01519  * @ret zero            Input is a logic 0
01520  * @ret non-zero        Input is a logic 1
01521  */
01522 static int linda_i2c_read_bit ( struct bit_basher *basher,
01523                                 unsigned int bit_id ) {
01524         struct linda *linda =
01525                 container_of ( basher, struct linda, i2c.basher );
01526         struct QIB_7220_EXTStatus extstatus;
01527         unsigned int status;
01528 
01529         DBG_DISABLE ( DBGLVL_IO );
01530 
01531         linda_readq ( linda, &extstatus, QIB_7220_EXTStatus_offset );
01532         status = ( BIT_GET ( &extstatus, GPIOIn ) & linda_i2c_bits[bit_id] );
01533 
01534         DBG_ENABLE ( DBGLVL_IO );
01535 
01536         return status;
01537 }
01538 
01539 /**
01540  * Write Linda I2C line status
01541  *
01542  * @v basher            Bit-bashing interface
01543  * @v bit_id            Bit number
01544  * @v data              Value to write
01545  */
01546 static void linda_i2c_write_bit ( struct bit_basher *basher,
01547                                   unsigned int bit_id, unsigned long data ) {
01548         struct linda *linda =
01549                 container_of ( basher, struct linda, i2c.basher );
01550         struct QIB_7220_EXTCtrl extctrl;
01551         struct QIB_7220_GPIO gpioout;
01552         unsigned int bit = linda_i2c_bits[bit_id];
01553         unsigned int outputs = 0;
01554         unsigned int output_enables = 0;
01555 
01556         DBG_DISABLE ( DBGLVL_IO );
01557 
01558         /* Read current GPIO mask and outputs */
01559         linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
01560         linda_readq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
01561 
01562         /* Update outputs and output enables.  I2C lines are tied
01563          * high, so we always set the output to 0 and use the output
01564          * enable to control the line.
01565          */
01566         output_enables = BIT_GET ( &extctrl, GPIOOe );
01567         output_enables = ( ( output_enables & ~bit ) | ( ~data & bit ) );
01568         outputs = BIT_GET ( &gpioout, GPIO );
01569         outputs = ( outputs & ~bit );
01570         BIT_SET ( &extctrl, GPIOOe, output_enables );
01571         BIT_SET ( &gpioout, GPIO, outputs );
01572 
01573         /* Write the output enable first; that way we avoid logic
01574          * hazards.
01575          */
01576         linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
01577         linda_writeq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
01578         mb();
01579 
01580         DBG_ENABLE ( DBGLVL_IO );
01581 }
01582 
01583 /** Linda I2C bit-bashing interface operations */
01584 static struct bit_basher_operations linda_i2c_basher_ops = {
01585         .read   = linda_i2c_read_bit,
01586         .write  = linda_i2c_write_bit,
01587 };
01588 
01589 /**
01590  * Initialise Linda I2C subsystem
01591  *
01592  * @v linda             Linda device
01593  * @ret rc              Return status code
01594  */
01595 static int linda_init_i2c ( struct linda *linda ) {
01596         static int try_eeprom_address[] = { 0x51, 0x50 };
01597         unsigned int i;
01598         int rc;
01599 
01600         /* Initialise bus */
01601         if ( ( rc = init_i2c_bit_basher ( &linda->i2c,
01602                                           &linda_i2c_basher_ops ) ) != 0 ) {
01603                 DBGC ( linda, "Linda %p could not initialise I2C bus: %s\n",
01604                        linda, strerror ( rc ) );
01605                 return rc;
01606         }
01607 
01608         /* Probe for devices */
01609         for ( i = 0 ; i < ( sizeof ( try_eeprom_address ) /
01610                             sizeof ( try_eeprom_address[0] ) ) ; i++ ) {
01611                 init_i2c_eeprom ( &linda->eeprom, try_eeprom_address[i] );
01612                 if ( ( rc = i2c_check_presence ( &linda->i2c.i2c,
01613                                                  &linda->eeprom ) ) == 0 ) {
01614                         DBGC2 ( linda, "Linda %p found EEPROM at %02x\n",
01615                                 linda, try_eeprom_address[i] );
01616                         return 0;
01617                 }
01618         }
01619 
01620         DBGC ( linda, "Linda %p could not find EEPROM\n", linda );
01621         return -ENODEV;
01622 }
01623 
01624 /**
01625  * Read EEPROM parameters
01626  *
01627  * @v linda             Linda device
01628  * @v guid              GUID to fill in
01629  * @ret rc              Return status code
01630  */
01631 static int linda_read_eeprom ( struct linda *linda, union ib_guid *guid ) {
01632         struct i2c_interface *i2c = &linda->i2c.i2c;
01633         int rc;
01634 
01635         /* Read GUID */
01636         if ( ( rc = i2c->read ( i2c, &linda->eeprom, LINDA_EEPROM_GUID_OFFSET,
01637                                 guid->bytes, sizeof ( *guid ) ) ) != 0 ) {
01638                 DBGC ( linda, "Linda %p could not read GUID: %s\n",
01639                        linda, strerror ( rc ) );
01640                 return rc;
01641         }
01642         DBGC2 ( linda, "Linda %p has GUID " IB_GUID_FMT "\n",
01643                 linda, IB_GUID_ARGS ( guid ) );
01644 
01645         /* Read serial number (debug only) */
01646         if ( DBG_LOG ) {
01647                 uint8_t serial[LINDA_EEPROM_SERIAL_SIZE + 1];
01648 
01649                 serial[ sizeof ( serial ) - 1 ] = '\0';
01650                 if ( ( rc = i2c->read ( i2c, &linda->eeprom,
01651                                         LINDA_EEPROM_SERIAL_OFFSET, serial,
01652                                         ( sizeof ( serial ) - 1 ) ) ) != 0 ) {
01653                         DBGC ( linda, "Linda %p could not read serial: %s\n",
01654                                linda, strerror ( rc ) );
01655                         return rc;
01656                 }
01657                 DBGC2 ( linda, "Linda %p has serial number \"%s\"\n",
01658                         linda, serial );
01659         }
01660 
01661         return 0;
01662 }
01663 
01664 /***************************************************************************
01665  *
01666  * External parallel bus access
01667  *
01668  ***************************************************************************
01669  */
01670 
01671 /**
01672  * Request ownership of the IB external parallel bus
01673  *
01674  * @v linda             Linda device
01675  * @ret rc              Return status code
01676  */
01677 static int linda_ib_epb_request ( struct linda *linda ) {
01678         struct QIB_7220_ibsd_epb_access_ctrl access;
01679         unsigned int i;
01680 
01681         /* Request ownership */
01682         memset ( &access, 0, sizeof ( access ) );
01683         BIT_FILL_1 ( &access, sw_ib_epb_req, 1 );
01684         linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
01685 
01686         /* Wait for ownership to be granted */
01687         for ( i = 0 ; i < LINDA_EPB_REQUEST_MAX_WAIT_US ; i++ ) {
01688                 linda_readq ( linda, &access,
01689                               QIB_7220_ibsd_epb_access_ctrl_offset );
01690                 if ( BIT_GET ( &access, sw_ib_epb_req_granted ) )
01691                         return 0;
01692                 udelay ( 1 );
01693         }
01694 
01695         DBGC ( linda, "Linda %p timed out waiting for IB EPB request\n",
01696                linda );
01697         return -ETIMEDOUT;
01698 }
01699 
01700 /**
01701  * Wait for IB external parallel bus transaction to complete
01702  *
01703  * @v linda             Linda device
01704  * @v xact              Buffer to hold transaction result
01705  * @ret rc              Return status code
01706  */
01707 static int linda_ib_epb_wait ( struct linda *linda,
01708                             struct QIB_7220_ibsd_epb_transaction_reg *xact ) {
01709         unsigned int i;
01710 
01711         /* Discard first read to allow for signals crossing clock domains */
01712         linda_readq ( linda, xact, QIB_7220_ibsd_epb_transaction_reg_offset );
01713 
01714         for ( i = 0 ; i < LINDA_EPB_XACT_MAX_WAIT_US ; i++ ) {
01715                 linda_readq ( linda, xact,
01716                               QIB_7220_ibsd_epb_transaction_reg_offset );
01717                 if ( BIT_GET ( xact, ib_epb_rdy ) ) {
01718                         if ( BIT_GET ( xact, ib_epb_req_error ) ) {
01719                                 DBGC ( linda, "Linda %p EPB transaction "
01720                                        "failed\n", linda );
01721                                 return -EIO;
01722                         } else {
01723                                 return 0;
01724                         }
01725                 }
01726                 udelay ( 1 );
01727         }
01728 
01729         DBGC ( linda, "Linda %p timed out waiting for IB EPB transaction\n",
01730                linda );
01731         return -ETIMEDOUT;
01732 }
01733 
01734 /**
01735  * Release ownership of the IB external parallel bus
01736  *
01737  * @v linda             Linda device
01738  */
01739 static void linda_ib_epb_release ( struct linda *linda ) {
01740         struct QIB_7220_ibsd_epb_access_ctrl access;
01741 
01742         memset ( &access, 0, sizeof ( access ) );
01743         BIT_FILL_1 ( &access, sw_ib_epb_req, 0 );
01744         linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
01745 }
01746 
01747 /**
01748  * Read data via IB external parallel bus
01749  *
01750  * @v linda             Linda device
01751  * @v location          EPB location
01752  * @ret data            Data read, or negative error
01753  *
01754  * You must have already acquired ownership of the IB external
01755  * parallel bus.
01756  */
01757 static int linda_ib_epb_read ( struct linda *linda, unsigned int location ) {
01758         struct QIB_7220_ibsd_epb_transaction_reg xact;
01759         unsigned int data;
01760         int rc;
01761 
01762         /* Ensure no transaction is currently in progress */
01763         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01764                 return rc;
01765 
01766         /* Process data */
01767         memset ( &xact, 0, sizeof ( xact ) );
01768         BIT_FILL_3 ( &xact,
01769                      ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
01770                      ib_epb_read_write, LINDA_EPB_READ,
01771                      ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
01772         linda_writeq ( linda, &xact,
01773                        QIB_7220_ibsd_epb_transaction_reg_offset );
01774 
01775         /* Wait for transaction to complete */
01776         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01777                 return rc;
01778 
01779         data = BIT_GET ( &xact, ib_epb_data );
01780         return data;
01781 }
01782 
01783 /**
01784  * Write data via IB external parallel bus
01785  *
01786  * @v linda             Linda device
01787  * @v location          EPB location
01788  * @v data              Data to write
01789  * @ret rc              Return status code
01790  *
01791  * You must have already acquired ownership of the IB external
01792  * parallel bus.
01793  */
01794 static int linda_ib_epb_write ( struct linda *linda, unsigned int location,
01795                                 unsigned int data ) {
01796         struct QIB_7220_ibsd_epb_transaction_reg xact;
01797         int rc;
01798 
01799         /* Ensure no transaction is currently in progress */
01800         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01801                 return rc;
01802 
01803         /* Process data */
01804         memset ( &xact, 0, sizeof ( xact ) );
01805         BIT_FILL_4 ( &xact,
01806                      ib_epb_data, data,
01807                      ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
01808                      ib_epb_read_write, LINDA_EPB_WRITE,
01809                      ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
01810         linda_writeq ( linda, &xact,
01811                        QIB_7220_ibsd_epb_transaction_reg_offset );
01812 
01813         /* Wait for transaction to complete */
01814         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01815                 return rc;
01816 
01817         return 0;
01818 }
01819 
01820 /**
01821  * Read/modify/write EPB register
01822  *
01823  * @v linda             Linda device
01824  * @v cs                Chip select
01825  * @v channel           Channel
01826  * @v element           Element
01827  * @v reg               Register
01828  * @v value             Value to set
01829  * @v mask              Mask to apply to old value
01830  * @ret rc              Return status code
01831  */
01832 static int linda_ib_epb_mod_reg ( struct linda *linda, unsigned int cs,
01833                                   unsigned int channel, unsigned int element,
01834                                   unsigned int reg, unsigned int value,
01835                                   unsigned int mask ) {
01836         unsigned int location;
01837         int old_value;
01838         int rc;
01839 
01840         DBG_DISABLE ( DBGLVL_IO );
01841 
01842         /* Sanity check */
01843         assert ( ( value & mask ) == value );
01844 
01845         /* Acquire bus ownership */
01846         if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
01847                 goto out;
01848 
01849         /* Read existing value, if necessary */
01850         location = LINDA_EPB_LOC ( cs, channel, element, reg );
01851         if ( (~mask) & 0xff ) {
01852                 old_value = linda_ib_epb_read ( linda, location );
01853                 if ( old_value < 0 ) {
01854                         rc = old_value;
01855                         goto out_release;
01856                 }
01857         } else {
01858                 old_value = 0;
01859         }
01860 
01861         /* Update value */
01862         value = ( ( old_value & ~mask ) | value );
01863         DBGCP ( linda, "Linda %p CS %d EPB(%d,%d,%#02x) %#02x => %#02x\n",
01864                 linda, cs, channel, element, reg, old_value, value );
01865         if ( ( rc = linda_ib_epb_write ( linda, location, value ) ) != 0 )
01866                 goto out_release;
01867 
01868  out_release:
01869         /* Release bus */
01870         linda_ib_epb_release ( linda );
01871  out:
01872         DBG_ENABLE ( DBGLVL_IO );
01873         return rc;
01874 }
01875 
01876 /**
01877  * Transfer data to/from microcontroller RAM
01878  *
01879  * @v linda             Linda device
01880  * @v address           Starting address
01881  * @v write             Data to write, or NULL
01882  * @v read              Data to read, or NULL
01883  * @v len               Length of data
01884  * @ret rc              Return status code
01885  */
01886 static int linda_ib_epb_ram_xfer ( struct linda *linda, unsigned int address,
01887                                    const void *write, void *read,
01888                                    size_t len ) {
01889         unsigned int control;
01890         unsigned int address_hi;
01891         unsigned int address_lo;
01892         int data;
01893         int rc;
01894 
01895         DBG_DISABLE ( DBGLVL_IO );
01896 
01897         assert ( ! ( write && read ) );
01898         assert ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
01899         assert ( ( len % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
01900 
01901         /* Acquire bus ownership */
01902         if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
01903                 goto out;
01904 
01905         /* Process data */
01906         while ( len ) {
01907 
01908                 /* Reset the address for each new chunk */
01909                 if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
01910 
01911                         /* Write the control register */
01912                         control = ( read ? LINDA_EPB_UC_CTL_READ :
01913                                     LINDA_EPB_UC_CTL_WRITE );
01914                         if ( ( rc = linda_ib_epb_write ( linda,
01915                                                          LINDA_EPB_UC_CTL,
01916                                                          control ) ) != 0 )
01917                                 break;
01918 
01919                         /* Write the address registers */
01920                         address_hi = ( address >> 8 );
01921                         if ( ( rc = linda_ib_epb_write ( linda,
01922                                                          LINDA_EPB_UC_ADDR_HI,
01923                                                          address_hi ) ) != 0 )
01924                                 break;
01925                         address_lo = ( address & 0xff );
01926                         if ( ( rc = linda_ib_epb_write ( linda,
01927                                                          LINDA_EPB_UC_ADDR_LO,
01928                                                          address_lo ) ) != 0 )
01929                                 break;
01930                 }
01931 
01932                 /* Read or write the data */
01933                 if ( read ) {
01934                         data = linda_ib_epb_read ( linda, LINDA_EPB_UC_DATA );
01935                         if ( data < 0 ) {
01936                                 rc = data;
01937                                 break;
01938                         }
01939                         *( ( uint8_t * ) read++ ) = data;
01940                 } else {
01941                         data = *( ( uint8_t * ) write++ );
01942                         if ( ( rc = linda_ib_epb_write ( linda,
01943                                                          LINDA_EPB_UC_DATA,
01944                                                          data ) ) != 0 )
01945                                 break;
01946                 }
01947                 address++;
01948                 len--;
01949 
01950                 /* Reset the control byte after each chunk */
01951                 if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
01952                         if ( ( rc = linda_ib_epb_write ( linda,
01953                                                          LINDA_EPB_UC_CTL,
01954                                                          0 ) ) != 0 )
01955                                 break;
01956                 }
01957         }
01958 
01959         /* Release bus */
01960         linda_ib_epb_release ( linda );
01961 
01962  out:
01963         DBG_ENABLE ( DBGLVL_IO );
01964         return rc;
01965 }
01966 
01967 /***************************************************************************
01968  *
01969  * Infiniband SerDes initialisation
01970  *
01971  ***************************************************************************
01972  */
01973 
01974 /** A Linda SerDes parameter */
01975 struct linda_serdes_param {
01976         /** EPB address as constructed by LINDA_EPB_ADDRESS() */
01977         uint16_t address;
01978         /** Value to set */
01979         uint8_t value;
01980         /** Mask to apply to old value */
01981         uint8_t mask;
01982 } __packed;
01983 
01984 /** Magic "all channels" channel number */
01985 #define LINDA_EPB_ALL_CHANNELS 31
01986 
01987 /** End of SerDes parameter list marker */
01988 #define LINDA_SERDES_PARAM_END { 0, 0, 0 }
01989 
01990 /**
01991  * Program IB SerDes register(s)
01992  *
01993  * @v linda             Linda device
01994  * @v param             SerDes parameter
01995  * @ret rc              Return status code
01996  */
01997 static int linda_set_serdes_param ( struct linda *linda,
01998                                     struct linda_serdes_param *param ) {
01999         unsigned int channel;
02000         unsigned int channel_start;
02001         unsigned int channel_end;
02002         unsigned int element;
02003         unsigned int reg;
02004         int rc;
02005 
02006         /* Break down the EPB address and determine channels */
02007         channel = LINDA_EPB_ADDRESS_CHANNEL ( param->address );
02008         element = LINDA_EPB_ADDRESS_ELEMENT ( param->address );
02009         reg = LINDA_EPB_ADDRESS_REG ( param->address );
02010         if ( channel == LINDA_EPB_ALL_CHANNELS ) {
02011                 channel_start = 0;
02012                 channel_end = 3;
02013         } else {
02014                 channel_start = channel_end = channel;
02015         }
02016 
02017         /* Modify register for each specified channel */
02018         for ( channel = channel_start ; channel <= channel_end ; channel++ ) {
02019                 if ( ( rc = linda_ib_epb_mod_reg ( linda, LINDA_EPB_CS_SERDES,
02020                                                    channel, element, reg,
02021                                                    param->value,
02022                                                    param->mask ) ) != 0 )
02023                         return rc;
02024         }
02025 
02026         return 0;
02027 }
02028 
02029 /**
02030  * Program IB SerDes registers
02031  *
02032  * @v linda             Linda device
02033  * @v param             SerDes parameters
02034  * @v count             Number of parameters
02035  * @ret rc              Return status code
02036  */
02037 static int linda_set_serdes_params ( struct linda *linda,
02038                                      struct linda_serdes_param *params ) {
02039         int rc;
02040 
02041         for ( ; params->mask != 0 ; params++ ){
02042                 if ( ( rc = linda_set_serdes_param ( linda,
02043                                                          params ) ) != 0 )
02044                         return rc;
02045         }
02046 
02047         return 0;
02048 }
02049 
02050 #define LINDA_DDS_VAL( amp_d, main_d, ipst_d, ipre_d,                   \
02051                        amp_s, main_s, ipst_s, ipre_s )                  \
02052         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x00 ),        \
02053           ( ( ( amp_d & 0x1f ) << 1 ) | 1 ), 0xff },                    \
02054         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x01 ),        \
02055           ( ( ( amp_s & 0x1f ) << 1 ) | 1 ), 0xff },                    \
02056         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x09 ),        \
02057           ( ( main_d << 3 ) | 4 | ( ipre_d >> 2 ) ), 0xff },            \
02058         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x0a ),        \
02059           ( ( main_s << 3 ) | 4 | ( ipre_s >> 2 ) ), 0xff },            \
02060         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x06 ),        \
02061           ( ( ( ipst_d & 0xf ) << 1 ) |                                 \
02062             ( ( ipre_d & 3 ) << 6 ) | 0x21 ), 0xff },                   \
02063         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x07 ),        \
02064           ( ( ( ipst_s & 0xf ) << 1 ) |                                 \
02065             ( ( ipre_s & 3 ) << 6) | 0x21 ), 0xff }
02066 
02067 /**
02068  * Linda SerDes default parameters
02069  *
02070  * These magic start-of-day values are taken from the Linux driver.
02071  */
02072 static struct linda_serdes_param linda_serdes_defaults1[] = {
02073         /* RXHSCTRL0 */
02074         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x00 ), 0xd4, 0xff },
02075         /* VCDL_DAC2 */
02076         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x05 ), 0x2d, 0xff },
02077         /* VCDL_CTRL2 */
02078         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x08 ), 0x03, 0x0f },
02079         /* START_EQ1 */
02080         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
02081         /* START_EQ2 */
02082         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x28 ), 0x30, 0xff },
02083         /* BACTRL */
02084         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0e ), 0x40, 0xff },
02085         /* LDOUTCTRL1 */
02086         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x04, 0xff },
02087         /* RXHSSTATUS */
02088         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0f ), 0x04, 0xff },
02089         /* End of this block */
02090         LINDA_SERDES_PARAM_END
02091 };
02092 static struct linda_serdes_param linda_serdes_defaults2[] = {
02093         /* LDOUTCTRL1 */
02094         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x00, 0xff },
02095         /* DDS values */
02096         LINDA_DDS_VAL ( 31, 19, 12, 0, 29, 22, 9, 0 ),
02097         /* Set Rcv Eq. to Preset node */
02098         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
02099         /* DFELTHFDR */
02100         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x08 ), 0x00, 0xff },
02101         /* DFELTHHDR */
02102         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x21 ), 0x00, 0xff },
02103         /* TLTHFDR */
02104         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x09 ), 0x02, 0xff },
02105         /* TLTHHDR */
02106         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x23 ), 0x02, 0xff },
02107         /* ZFR */
02108         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1b ), 0x0c, 0xff },
02109         /* ZCNT) */
02110         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1c ), 0x0c, 0xff },
02111         /* GFR */
02112         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1e ), 0x10, 0xff },
02113         /* GHR */
02114         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1f ), 0x10, 0xff },
02115         /* VCDL_CTRL0 toggle */
02116         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x20, 0xff },
02117         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x00, 0xff },
02118         /* CMUCTRL5 */
02119         { LINDA_EPB_ADDRESS (                      7, 0, 0x15 ), 0x80, 0xff },
02120         /* End of this block */
02121         LINDA_SERDES_PARAM_END
02122 };
02123 static struct linda_serdes_param linda_serdes_defaults3[] = {
02124         /* START_EQ1 */
02125         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x00, 0x38 },
02126         /* End of this block */
02127         LINDA_SERDES_PARAM_END
02128 };
02129 
02130 /**
02131  * Program the microcontroller RAM
02132  *
02133  * @v linda             Linda device
02134  * @ret rc              Return status code
02135  */
02136 static int linda_program_uc_ram ( struct linda *linda ) {
02137         int rc;
02138 
02139         if ( ( rc = linda_ib_epb_ram_xfer ( linda, 0, linda_ib_fw, NULL,
02140                                             sizeof ( linda_ib_fw ) ) ) != 0 ){
02141                 DBGC ( linda, "Linda %p could not load IB firmware: %s\n",
02142                        linda, strerror ( rc ) );
02143                 return rc;
02144         }
02145 
02146         return 0;
02147 }
02148 
02149 /**
02150  * Verify the microcontroller RAM
02151  *
02152  * @v linda             Linda device
02153  * @ret rc              Return status code
02154  */
02155 static int linda_verify_uc_ram ( struct linda *linda ) {
02156         uint8_t verify[LINDA_EPB_UC_CHUNK_SIZE];
02157         unsigned int offset;
02158         int rc;
02159 
02160         for ( offset = 0 ; offset < sizeof ( linda_ib_fw );
02161               offset += sizeof ( verify ) ) {
02162                 if ( ( rc = linda_ib_epb_ram_xfer ( linda, offset,
02163                                                     NULL, verify,
02164                                                     sizeof (verify) )) != 0 ){
02165                         DBGC ( linda, "Linda %p could not read back IB "
02166                                "firmware: %s\n", linda, strerror ( rc ) );
02167                         return rc;
02168                 }
02169                 if ( memcmp ( ( linda_ib_fw + offset ), verify,
02170                               sizeof ( verify ) ) != 0 ) {
02171                         DBGC ( linda, "Linda %p firmware verification failed "
02172                                "at offset %#x\n", linda, offset );
02173                         DBGC_HDA ( linda, offset, ( linda_ib_fw + offset ),
02174                                    sizeof ( verify ) );
02175                         DBGC_HDA ( linda, offset, verify, sizeof ( verify ) );
02176                         return -EIO;
02177                 }
02178         }
02179 
02180         DBGC2 ( linda, "Linda %p firmware verified ok\n", linda );
02181         return 0;
02182 }
02183 
02184 /**
02185  * Use the microcontroller to trim the IB link
02186  *
02187  * @v linda             Linda device
02188  * @ret rc              Return status code
02189  */
02190 static int linda_trim_ib ( struct linda *linda ) {
02191         struct QIB_7220_IBSerDesCtrl ctrl;
02192         struct QIB_7220_IntStatus intstatus;
02193         unsigned int i;
02194         int rc;
02195 
02196         /* Bring the microcontroller out of reset */
02197         linda_readq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
02198         BIT_SET ( &ctrl, ResetIB_uC_Core, 0 );
02199         linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
02200 
02201         /* Wait for the "trim done" signal */
02202         for ( i = 0 ; i < LINDA_TRIM_DONE_MAX_WAIT_MS ; i++ ) {
02203                 linda_readq ( linda, &intstatus, QIB_7220_IntStatus_offset );
02204                 if ( BIT_GET ( &intstatus, IBSerdesTrimDone ) ) {
02205                         rc = 0;
02206                         goto out_reset;
02207                 }
02208                 mdelay ( 1 );
02209         }
02210 
02211         DBGC ( linda, "Linda %p timed out waiting for trim done\n", linda );
02212         rc = -ETIMEDOUT;
02213  out_reset:
02214         /* Put the microcontroller back into reset */
02215         BIT_SET ( &ctrl, ResetIB_uC_Core, 1 );
02216         linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
02217 
02218         return rc;
02219 }
02220 
02221 /**
02222  * Initialise the IB SerDes
02223  *
02224  * @v linda             Linda device
02225  * @ret rc              Return status code
02226  */
02227 static int linda_init_ib_serdes ( struct linda *linda ) {
02228         struct QIB_7220_Control control;
02229         struct QIB_7220_IBCCtrl ibcctrl;
02230         struct QIB_7220_IBCDDRCtrl ibcddrctrl;
02231         struct QIB_7220_XGXSCfg xgxscfg;
02232         int rc;
02233 
02234         /* Disable link */
02235         linda_readq ( linda, &control, QIB_7220_Control_offset );
02236         BIT_SET ( &control, LinkEn, 0 );
02237         linda_writeq ( linda, &control, QIB_7220_Control_offset );
02238 
02239         /* Configure sensible defaults for IBC */
02240         memset ( &ibcctrl, 0, sizeof ( ibcctrl ) );
02241         BIT_FILL_6 ( &ibcctrl, /* Tuning values taken from Linux driver */
02242                      FlowCtrlPeriod, 0x03,
02243                      FlowCtrlWaterMark, 0x05,
02244                      MaxPktLen, ( ( LINDA_RECV_HEADER_SIZE +
02245                                     LINDA_RECV_PAYLOAD_SIZE +
02246                                     4 /* ICRC */ ) >> 2 ),
02247                      PhyerrThreshold, 0xf,
02248                      OverrunThreshold, 0xf,
02249                      CreditScale, 0x4 );
02250         linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
02251 
02252         /* Force SDR only to avoid needing all the DDR tuning,
02253          * Mellanox compatibility hacks etc.  SDR is plenty for
02254          * boot-time operation.
02255          */
02256         linda_readq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
02257         BIT_SET ( &ibcddrctrl, IB_ENHANCED_MODE, 0 );
02258         BIT_SET ( &ibcddrctrl, SD_SPEED_SDR, 1 );
02259         BIT_SET ( &ibcddrctrl, SD_SPEED_DDR, 0 );
02260         BIT_SET ( &ibcddrctrl, SD_SPEED_QDR, 0 );
02261         BIT_SET ( &ibcddrctrl, HRTBT_ENB, 0 );
02262         BIT_SET ( &ibcddrctrl, HRTBT_AUTO, 0 );
02263         linda_writeq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
02264 
02265         /* Set default SerDes parameters */
02266         if ( ( rc = linda_set_serdes_params ( linda,
02267                                               linda_serdes_defaults1 ) ) != 0 )
02268                 return rc;
02269         udelay ( 415 ); /* Magic delay while SerDes sorts itself out */
02270         if ( ( rc = linda_set_serdes_params ( linda,
02271                                               linda_serdes_defaults2 ) ) != 0 )
02272                 return rc;
02273 
02274         /* Program the microcontroller RAM */
02275         if ( ( rc = linda_program_uc_ram ( linda ) ) != 0 )
02276                 return rc;
02277 
02278         /* Verify the microcontroller RAM contents */
02279         if ( DBGLVL_LOG ) {
02280                 if ( ( rc = linda_verify_uc_ram ( linda ) ) != 0 )
02281                         return rc;
02282         }
02283 
02284         /* More SerDes tuning */
02285         if ( ( rc = linda_set_serdes_params ( linda,
02286                                               linda_serdes_defaults3 ) ) != 0 )
02287                 return rc;
02288 
02289         /* Use the microcontroller to trim the IB link */
02290         if ( ( rc = linda_trim_ib ( linda ) ) != 0 )
02291                 return rc;
02292 
02293         /* Bring XGXS out of reset */
02294         linda_readq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
02295         BIT_SET ( &xgxscfg, tx_rx_reset, 0 );
02296         BIT_SET ( &xgxscfg, xcv_reset, 0 );
02297         linda_writeq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
02298 
02299         return rc;
02300 }
02301 
02302 /***************************************************************************
02303  *
02304  * PCI layer interface
02305  *
02306  ***************************************************************************
02307  */
02308 
02309 /**
02310  * Probe PCI device
02311  *
02312  * @v pci               PCI device
02313  * @v id                PCI ID
02314  * @ret rc              Return status code
02315  */
02316 static int linda_probe ( struct pci_device *pci ) {
02317         struct ib_device *ibdev;
02318         struct linda *linda;
02319         struct QIB_7220_Revision revision;
02320         int rc;
02321 
02322         /* Allocate Infiniband device */
02323         ibdev = alloc_ibdev ( sizeof ( *linda ) );
02324         if ( ! ibdev ) {
02325                 rc = -ENOMEM;
02326                 goto err_alloc_ibdev;
02327         }
02328         pci_set_drvdata ( pci, ibdev );
02329         linda = ib_get_drvdata ( ibdev );
02330         ibdev->op = &linda_ib_operations;
02331         ibdev->dev = &pci->dev;
02332         ibdev->port = 1;
02333 
02334         /* Fix up PCI device */
02335         adjust_pci_device ( pci );
02336 
02337         /* Map PCI BARs */
02338         linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
02339         DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
02340 
02341         /* Print some general data */
02342         linda_readq ( linda, &revision, QIB_7220_Revision_offset );
02343         DBGC2 ( linda, "Linda %p board %02lx v%ld.%ld.%ld.%ld\n", linda,
02344                 BIT_GET ( &revision, BoardID ),
02345                 BIT_GET ( &revision, R_SW ),
02346                 BIT_GET ( &revision, R_Arch ),
02347                 BIT_GET ( &revision, R_ChipRevMajor ),
02348                 BIT_GET ( &revision, R_ChipRevMinor ) );
02349 
02350         /* Record link capabilities.  Note that we force SDR only to
02351          * avoid having to carry extra code for DDR tuning etc.
02352          */
02353         ibdev->link_width_enabled = ibdev->link_width_supported =
02354                 ( IB_LINK_WIDTH_4X | IB_LINK_WIDTH_1X );
02355         ibdev->link_speed_enabled = ibdev->link_speed_supported =
02356                 IB_LINK_SPEED_SDR;
02357 
02358         /* Initialise I2C subsystem */
02359         if ( ( rc = linda_init_i2c ( linda ) ) != 0 )
02360                 goto err_init_i2c;
02361 
02362         /* Read EEPROM parameters */
02363         if ( ( rc = linda_read_eeprom ( linda, &ibdev->node_guid ) ) != 0 )
02364                 goto err_read_eeprom;
02365         memcpy ( &ibdev->gid.s.guid, &ibdev->node_guid,
02366                  sizeof ( ibdev->gid.s.guid ) );
02367 
02368         /* Initialise send datapath */
02369         if ( ( rc = linda_init_send ( linda ) ) != 0 )
02370                 goto err_init_send;
02371 
02372         /* Initialise receive datapath */
02373         if ( ( rc = linda_init_recv ( linda ) ) != 0 )
02374                 goto err_init_recv;
02375 
02376         /* Initialise the IB SerDes */
02377         if ( ( rc = linda_init_ib_serdes ( linda ) ) != 0 )
02378                 goto err_init_ib_serdes;
02379 
02380         /* Register Infiniband device */
02381         if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
02382                 DBGC ( linda, "Linda %p could not register IB "
02383                        "device: %s\n", linda, strerror ( rc ) );
02384                 goto err_register_ibdev;
02385         }
02386 
02387         return 0;
02388 
02389         unregister_ibdev ( ibdev );
02390  err_register_ibdev:
02391         linda_fini_recv ( linda );
02392  err_init_recv:
02393         linda_fini_send ( linda );
02394  err_init_send:
02395  err_init_ib_serdes:
02396  err_read_eeprom:
02397  err_init_i2c:
02398         iounmap ( linda->regs );
02399         ibdev_put ( ibdev );
02400  err_alloc_ibdev:
02401         return rc;
02402 }
02403 
02404 /**
02405  * Remove PCI device
02406  *
02407  * @v pci               PCI device
02408  */
02409 static void linda_remove ( struct pci_device *pci ) {
02410         struct ib_device *ibdev = pci_get_drvdata ( pci );
02411         struct linda *linda = ib_get_drvdata ( ibdev );
02412 
02413         unregister_ibdev ( ibdev );
02414         linda_fini_recv ( linda );
02415         linda_fini_send ( linda );
02416         iounmap ( linda->regs );
02417         ibdev_put ( ibdev );
02418 }
02419 
02420 static struct pci_device_id linda_nics[] = {
02421         PCI_ROM ( 0x1077, 0x7220, "iba7220", "QLE7240/7280 HCA driver", 0 ),
02422 };
02423 
02424 struct pci_driver linda_driver __pci_driver = {
02425         .ids = linda_nics,
02426         .id_count = ( sizeof ( linda_nics ) / sizeof ( linda_nics[0] ) ),
02427         .probe = linda_probe,
02428         .remove = linda_remove,
02429 };