iPXE
mlx_nodnic_data_structures.h
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00001 #ifndef NODNIC_NODNICDATASTRUCTURES_H_
00002 #define NODNIC_NODNICDATASTRUCTURES_H_
00003 
00004 /*
00005  * Copyright (C) 2015 Mellanox Technologies Ltd.
00006  *
00007  * This program is free software; you can redistribute it and/or
00008  * modify it under the terms of the GNU General Public License as
00009  * published by the Free Software Foundation; either version 2 of the
00010  * License, or any later version.
00011  *
00012  * This program is distributed in the hope that it will be useful, but
00013  * WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00015  * General Public License for more details.
00016  *
00017  * You should have received a copy of the GNU General Public License
00018  * along with this program; if not, write to the Free Software
00019  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00020  * 02110-1301, USA.
00021  */
00022 
00023 FILE_LICENCE ( GPL2_OR_LATER );
00024 
00025 #include "../../mlx_utils/include/public/mlx_utils.h"
00026 
00027 /* todo: fix coding convention */
00028 #define NODNIC_MEMORY_ALIGN             0x1000
00029 
00030 #define NODNIC_MAX_MAC_FILTERS 5
00031 #define NODNIC_MAX_MGID_FILTERS 4
00032 
00033 typedef struct _nodnic_device_priv                              nodnic_device_priv;
00034 typedef struct _nodnic_port_priv                                nodnic_port_priv;
00035 typedef struct _nodnic_device_capabilites               nodnic_device_capabilites;
00036 typedef struct _nodnic_qp                                               nodnic_qp;
00037 typedef struct _nodnic_cq                                               nodnic_cq;
00038 typedef struct _nodnic_eq                                               nodnic_eq;
00039 typedef struct _nodnic_qp_db                                    nodnic_qp_db;
00040 typedef struct _nodnic_arm_cq_db                                nodnic_arm_cq_db;
00041 
00042 /* NODNIC Port states
00043  * Bit 0 - port open/close
00044  * Bit 1 - port is [not] in disabling DMA
00045  * 0 - closed and not disabling DMA
00046  * 1 - opened and not disabling DMA
00047  * 3 - opened and disabling DMA
00048  */
00049 #define NODNIC_PORT_OPENED                      0b00000001
00050 #define NODNIC_PORT_DISABLING_DMA       0b00000010
00051 
00052 typedef enum {
00053         ConnectX3 = 0,
00054         Connectx4
00055 }nodnic_hardware_format;
00056 
00057 
00058 typedef enum {
00059         NODNIC_QPT_SMI,
00060         NODNIC_QPT_GSI,
00061         NODNIC_QPT_UD,
00062         NODNIC_QPT_RC,
00063         NODNIC_QPT_ETH,
00064 }nodnic_queue_pair_type;
00065 typedef enum {
00066         NODNIC_PORT_TYPE_IB = 0,
00067         NODNIC_PORT_TYPE_ETH,
00068         NODNIC_PORT_TYPE_UNKNOWN,
00069 }nodnic_port_type;
00070 
00071 
00072 #define RECV_WQE_SIZE 16
00073 #define NODNIC_WQBB_SIZE 64
00074 /** A nodnic send wqbb */
00075 struct nodnic_send_wqbb {
00076         mlx_uint8 force_align[NODNIC_WQBB_SIZE];
00077 };
00078 
00079 struct nodnic_doorbell {
00080         mlx_physical_address doorbell_physical;
00081         mlx_void *map;
00082         nodnic_qp_db *qp_doorbell_record;
00083 };
00084 struct nodnic_ring {
00085         mlx_uint32 offset;
00086         /** Work queue entries */
00087         /* TODO: add to memory entity */
00088         mlx_physical_address wqe_physical;
00089         mlx_void *map;
00090         /** Size of work queue */
00091         mlx_size wq_size;
00092         /** Next work queue entry index
00093          *
00094          * This is the index of the next entry to be filled (i.e. the
00095          * first empty entry).  This value is not bounded by num_wqes;
00096          * users must logical-AND with (num_wqes-1) to generate an
00097          * array index.
00098          */
00099         mlx_uint32 num_wqes;
00100         mlx_uint32 qpn;
00101         mlx_uint32 next_idx;
00102         struct nodnic_doorbell recv_doorbell;
00103         struct nodnic_doorbell send_doorbell;
00104 };
00105 
00106 struct nodnic_send_ring{
00107         struct nodnic_ring nodnic_ring;
00108         struct nodnic_send_wqbb *wqe_virt;
00109 };
00110 
00111 
00112 struct nodnic_recv_ring{
00113         struct nodnic_ring nodnic_ring;
00114         void *wqe_virt;
00115 };
00116 struct _nodnic_qp{
00117         nodnic_queue_pair_type  type;
00118         struct nodnic_send_ring         send;
00119         struct nodnic_recv_ring         receive;
00120 };
00121 
00122 struct _nodnic_cq{
00123         /** cq entries */
00124         mlx_void *cq_virt;
00125         mlx_physical_address cq_physical;
00126         mlx_void *map;
00127         /** cq */
00128         mlx_size cq_size;
00129         struct nodnic_doorbell arm_cq_doorbell;
00130 };
00131 
00132 struct _nodnic_eq{
00133         mlx_void *eq_virt;
00134         mlx_physical_address eq_physical;
00135         mlx_void *map;
00136         mlx_size eq_size;
00137 };
00138 struct _nodnic_device_capabilites{
00139         mlx_boolean                                     support_mac_filters;
00140         mlx_boolean                                     support_promisc_filter;
00141         mlx_boolean                                     support_promisc_multicast_filter;
00142         mlx_uint8                                       log_working_buffer_size;
00143         mlx_uint8                                       log_pkey_table_size;
00144         mlx_boolean                                     num_ports; // 0 - single port, 1 - dual port
00145         mlx_uint8                                       log_max_ring_size;
00146 #ifdef DEVICE_CX3
00147         mlx_uint8                                       crspace_doorbells;
00148 #endif
00149         mlx_uint8                                       support_rx_pi_dma;
00150         mlx_uint8                                       support_uar_tx_db;
00151         mlx_uint8                                       support_bar_cq_ctrl;
00152         mlx_uint8                                       log_uar_page_size;
00153 };
00154 
00155 #ifdef DEVICE_CX3
00156 /* This is the structure of the data in the scratchpad
00157  * Read/Write data from/to its field using PCI accesses only */
00158 typedef struct _nodnic_port_data_flow_gw nodnic_port_data_flow_gw;
00159 struct _nodnic_port_data_flow_gw {
00160         mlx_uint32      send_doorbell;
00161         mlx_uint32      recv_doorbell;
00162         mlx_uint32      reserved2[2];
00163         mlx_uint32      armcq_cq_ci_dword;
00164         mlx_uint32      dma_en;
00165 } __attribute__ ((packed));
00166 #endif
00167 
00168 typedef struct _nodnic_uar_priv{
00169         mlx_uint8 inited;
00170         mlx_uint64      offset;
00171         void    *virt;
00172         unsigned long   phys;
00173 } nodnic_uar;
00174 
00175 struct _nodnic_device_priv{
00176         mlx_boolean                                     is_initiailzied;
00177         mlx_utils                                       *utils;
00178 
00179         //nodnic structure offset in init segment
00180         mlx_uint32                                      device_offset;
00181 
00182         nodnic_device_capabilites       device_cap;
00183 
00184         mlx_uint8                                       nodnic_revision;
00185         nodnic_hardware_format          hardware_format;
00186         mlx_uint32                                      pd;
00187         mlx_uint32                                      lkey;
00188         mlx_uint64                                      device_guid;
00189         nodnic_port_priv                        *ports;
00190 #ifdef DEVICE_CX3
00191         mlx_void                                        *crspace_clear_int;
00192 #endif
00193         nodnic_uar uar;
00194 };
00195 
00196 struct _nodnic_port_priv{
00197         nodnic_device_priv              *device;
00198         mlx_uint32                              port_offset;
00199         mlx_uint8                               port_state;
00200         mlx_boolean                             network_state;
00201         mlx_boolean                             dma_state;
00202         nodnic_port_type                port_type;
00203         mlx_uint8                               port_num;
00204         nodnic_eq                               eq;
00205         mlx_mac_address                 mac_filters[5];
00206         nodnic_arm_cq_db                *arm_cq_doorbell_record;
00207         mlx_status (*send_doorbell)(
00208                         IN nodnic_port_priv             *port_priv,
00209                         IN struct nodnic_ring   *ring,
00210                         IN mlx_uint16 index);
00211         mlx_status (*recv_doorbell)(
00212                         IN nodnic_port_priv             *port_priv,
00213                         IN struct nodnic_ring   *ring,
00214                         IN mlx_uint16 index);
00215         mlx_status (*set_dma)(
00216                         IN nodnic_port_priv             *port_priv,
00217                         IN mlx_boolean                  value);
00218 #ifdef DEVICE_CX3
00219         nodnic_port_data_flow_gw *data_flow_gw;
00220 #endif
00221 };
00222 
00223 struct _nodnic_qp_db {
00224         mlx_uint32      recv_db;
00225         mlx_uint32      send_db;
00226 } __attribute ( ( packed ) );
00227 
00228 struct _nodnic_arm_cq_db {
00229         mlx_uint32      dword[2];
00230 } __attribute ( ( packed ) );
00231 #endif /* STUB_NODNIC_NODNICDATASTRUCTURES_H_ */