iPXE
Functions
mlx_pci_priv.c File Reference
#include <ipxe/pci.h>
#include "../../mlx_utils/include/private/mlx_pci_priv.h"

Go to the source code of this file.

Functions

static mlx_status mlx_pci_config_byte (IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint8 *buffer)
 
static mlx_status mlx_pci_config_word (IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint16 *buffer)
 
static mlx_status mlx_pci_config_dword (IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint32 *buffer)
 
static mlx_status mlx_pci_config (IN mlx_utils *utils, IN mlx_boolean read, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, IN OUT mlx_void *buffer)
 
mlx_status mlx_pci_init_priv (IN mlx_utils *utils)
 
mlx_status mlx_pci_teardown_priv (IN mlx_utils *utils)
 
mlx_status mlx_pci_read_priv (IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, OUT mlx_void *buffer)
 
mlx_status mlx_pci_write_priv (IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, IN mlx_void *buffer)
 
mlx_status mlx_pci_mem_read_priv (IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint8 bar_index, IN mlx_uint64 offset, IN mlx_uintn count, OUT mlx_void *buffer)
 
mlx_status mlx_pci_mem_write_priv (IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint8 bar_index, IN mlx_uint64 offset, IN mlx_uintn count, IN mlx_void *buffer)
 

Function Documentation

◆ mlx_pci_config_byte()

static mlx_status mlx_pci_config_byte ( IN mlx_utils utils,
IN mlx_boolean  read,
IN mlx_uint32  offset,
IN OUT mlx_uint8 buffer 
)
static

Definition at line 15 of file mlx_pci_priv.c.

21 {
23  if (read) {
24  status = pci_read_config_byte(utils->pci, offset, buffer);
25  }else {
26  status = pci_write_config_byte(utils->pci, offset, *buffer);
27  }
28  return status;
29 }
struct option_descriptor read[1]
Definition: nvo_cmd.c:115
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint8_t status
Status.
Definition: ena.h:16
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
int mlx_status
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References buffer, MLX_SUCCESS, offset, pci_read_config_byte(), pci_write_config_byte(), read, and status.

Referenced by mlx_pci_config().

◆ mlx_pci_config_word()

static mlx_status mlx_pci_config_word ( IN mlx_utils utils,
IN mlx_boolean  read,
IN mlx_uint32  offset,
IN OUT mlx_uint16 buffer 
)
static

Definition at line 33 of file mlx_pci_priv.c.

39 {
41  if (read) {
42  status = pci_read_config_word(utils->pci, offset, buffer);
43  }else {
44  status = pci_write_config_word(utils->pci, offset, *buffer);
45  }
46  return status;
47 }
struct option_descriptor read[1]
Definition: nvo_cmd.c:115
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint8_t status
Status.
Definition: ena.h:16
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
int mlx_status

References buffer, MLX_SUCCESS, offset, pci_read_config_word(), pci_write_config_word(), read, and status.

Referenced by mlx_pci_config().

◆ mlx_pci_config_dword()

static mlx_status mlx_pci_config_dword ( IN mlx_utils utils,
IN mlx_boolean  read,
IN mlx_uint32  offset,
IN OUT mlx_uint32 buffer 
)
static

Definition at line 51 of file mlx_pci_priv.c.

57 {
59  if (read) {
60  status = pci_read_config_dword(utils->pci, offset, buffer);
61  }else {
62  status = pci_write_config_dword(utils->pci, offset, *buffer);
63  }
64  return status;
65 }
struct option_descriptor read[1]
Definition: nvo_cmd.c:115
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint8_t status
Status.
Definition: ena.h:16
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
int mlx_status

References buffer, MLX_SUCCESS, offset, pci_read_config_dword(), pci_write_config_dword(), read, and status.

Referenced by mlx_pci_config().

◆ mlx_pci_config()

static mlx_status mlx_pci_config ( IN mlx_utils utils,
IN mlx_boolean  read,
IN mlx_pci_width  width,
IN mlx_uint32  offset,
IN mlx_uintn  count,
IN OUT mlx_void buffer 
)
static

Definition at line 68 of file mlx_pci_priv.c.

76 {
79  mlx_uintn iteration = 0;
80  if( width == MlxPciWidthUint64) {
81  width = MlxPciWidthUint32;
82  count = count * 2;
83  }
84 
85  for(;iteration < count ; iteration++) {
86  switch (width){
87  case MlxPciWidthUint8:
88  status = mlx_pci_config_byte(utils, read , offset++, tmp++);
89  break;
90  case MlxPciWidthUint16:
92  tmp += 2;
93  offset += 2;
94  break;
95  case MlxPciWidthUint32:
97  tmp += 4;
98  offset += 4;
99  break;
100  default:
102  }
103  if(status != MLX_SUCCESS) {
104  goto config_error;
105  }
106  }
107 config_error:
108  return status;
109 }
struct option_descriptor read[1]
Definition: nvo_cmd.c:115
#define MLX_INVALID_PARAMETER
static mlx_status mlx_pci_config_word(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint16 *buffer)
Definition: mlx_pci_priv.c:33
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
unsigned long tmp
Definition: linux_pci.h:53
uint8_t status
Status.
Definition: ena.h:16
uint32_t mlx_uint32
static mlx_status mlx_pci_config_byte(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint8 *buffer)
Definition: mlx_pci_priv.c:15
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
static mlx_status mlx_pci_config_dword(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint32 *buffer)
Definition: mlx_pci_priv.c:51
uint16_t mlx_uint16
unsigned long mlx_uintn
uint8_t mlx_uint8
uint16_t count
Number of entries.
Definition: ena.h:22
int mlx_status

References buffer, count, MLX_INVALID_PARAMETER, mlx_pci_config_byte(), mlx_pci_config_dword(), mlx_pci_config_word(), MLX_SUCCESS, MlxPciWidthUint16, MlxPciWidthUint32, MlxPciWidthUint64, MlxPciWidthUint8, offset, read, status, and tmp.

Referenced by mlx_pci_read_priv(), and mlx_pci_write_priv().

◆ mlx_pci_init_priv()

mlx_status mlx_pci_init_priv ( IN mlx_utils utils)

Definition at line 111 of file mlx_pci_priv.c.

114 {
116  adjust_pci_device ( utils->pci );
117 #ifdef DEVICE_CX3
118  utils->config = pci_ioremap ( utils->pci, pci_bar_start ( utils->pci, PCI_BASE_ADDRESS_0),
119  0x100000 );
120 #endif
121  return status;
122 }
#define PCI_BASE_ADDRESS_0
Definition: pci.h:62
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:154
uint8_t status
Status.
Definition: ena.h:16
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition: pci.c:96
#define MLX_SUCCESS
int mlx_status
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.

References adjust_pci_device(), MLX_SUCCESS, pci_bar_start(), PCI_BASE_ADDRESS_0, pci_ioremap(), and status.

Referenced by mlx_pci_init().

◆ mlx_pci_teardown_priv()

mlx_status mlx_pci_teardown_priv ( IN mlx_utils utils)

Definition at line 125 of file mlx_pci_priv.c.

128 {
130 #ifdef DEVICE_CX3
131  iounmap( utils->config );
132 #endif
133  return status;
134 }
uint8_t status
Status.
Definition: ena.h:16
#define MLX_SUCCESS
void iounmap(volatile const void *io_addr)
Unmap I/O address.
int mlx_status

References iounmap(), MLX_SUCCESS, and status.

Referenced by mlx_pci_teardown().

◆ mlx_pci_read_priv()

mlx_status mlx_pci_read_priv ( IN mlx_utils utils,
IN mlx_pci_width  width,
IN mlx_uint32  offset,
IN mlx_uintn  count,
OUT mlx_void buffer 
)

Definition at line 137 of file mlx_pci_priv.c.

144 {
146  status = mlx_pci_config(utils, TRUE, width, offset, count, buffer);
147  return status;
148 }
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint8_t status
Status.
Definition: ena.h:16
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
static mlx_status mlx_pci_config(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, IN OUT mlx_void *buffer)
Definition: mlx_pci_priv.c:68
#define TRUE
Definition: tlan.h:46
uint16_t count
Number of entries.
Definition: ena.h:22
int mlx_status

References buffer, count, mlx_pci_config(), MLX_SUCCESS, offset, status, and TRUE.

Referenced by mlx_pci_read().

◆ mlx_pci_write_priv()

mlx_status mlx_pci_write_priv ( IN mlx_utils utils,
IN mlx_pci_width  width,
IN mlx_uint32  offset,
IN mlx_uintn  count,
IN mlx_void buffer 
)

Definition at line 151 of file mlx_pci_priv.c.

158 {
160  status = mlx_pci_config(utils, FALSE, width, offset, count, buffer);
161  return status;
162 }
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint8_t status
Status.
Definition: ena.h:16
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
static mlx_status mlx_pci_config(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, IN OUT mlx_void *buffer)
Definition: mlx_pci_priv.c:68
uint16_t count
Number of entries.
Definition: ena.h:22
#define FALSE
Definition: tlan.h:45
int mlx_status

References buffer, count, FALSE, mlx_pci_config(), MLX_SUCCESS, offset, and status.

Referenced by mlx_pci_write().

◆ mlx_pci_mem_read_priv()

mlx_status mlx_pci_mem_read_priv ( IN mlx_utils utils,
IN mlx_pci_width  width,
IN mlx_uint8  bar_index,
IN mlx_uint64  offset,
IN mlx_uintn  count,
OUT mlx_void buffer 
)

Definition at line 165 of file mlx_pci_priv.c.

173 {
174  if (buffer == NULL || width != MlxPciWidthUint32)
175  return MLX_INVALID_PARAMETER;
176  *((mlx_uint32 *)buffer) = readl(offset);
177  return MLX_SUCCESS;
178 }
#define MLX_INVALID_PARAMETER
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint32_t mlx_uint32
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321

References buffer, MLX_INVALID_PARAMETER, MLX_SUCCESS, MlxPciWidthUint32, NULL, offset, and readl().

Referenced by mlx_pci_mem_read().

◆ mlx_pci_mem_write_priv()

mlx_status mlx_pci_mem_write_priv ( IN mlx_utils utils,
IN mlx_pci_width  width,
IN mlx_uint8  bar_index,
IN mlx_uint64  offset,
IN mlx_uintn  count,
IN mlx_void buffer 
)

Definition at line 181 of file mlx_pci_priv.c.

189 {
190  if (buffer == NULL || width != MlxPciWidthUint32)
191  return MLX_INVALID_PARAMETER;
192  barrier();
193  writel(*((mlx_uint32 *)buffer), offset);
194  return MLX_SUCCESS;
195 }
#define MLX_INVALID_PARAMETER
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
uint32_t mlx_uint32
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
#define MLX_SUCCESS
#define barrier()
Optimisation barrier.
Definition: compiler.h:655
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321

References barrier, buffer, MLX_INVALID_PARAMETER, MLX_SUCCESS, MlxPciWidthUint32, NULL, offset, and writel().

Referenced by mlx_pci_mem_write().