iPXE
mlx_reg_access.h
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00001 /*
00002  * Copyright (C) 2015 Mellanox Technologies Ltd.
00003  *
00004  * This program is free software; you can redistribute it and/or
00005  * modify it under the terms of the GNU General Public License as
00006  * published by the Free Software Foundation; either version 2 of the
00007  * License, or any later version.
00008  *
00009  * This program is distributed in the hope that it will be useful, but
00010  * WITHOUT ANY WARRANTY; without even the implied warranty of
00011  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012  * General Public License for more details.
00013  *
00014  * You should have received a copy of the GNU General Public License
00015  * along with this program; if not, write to the Free Software
00016  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00017  * 02110-1301, USA.
00018  */
00019 
00020 FILE_LICENCE ( GPL2_OR_LATER );
00021 
00022 #ifndef MLX_REG_ACCESS_H_
00023 #define MLX_REG_ACCESS_H_
00024 
00025 #include "../../include/public/mlx_icmd.h"
00026 
00027 #define REG_ACCESS_MAX_REG_SIZE 236
00028 
00029 typedef enum {
00030   REG_ACCESS_READ = 1,
00031   REG_ACCESS_WRITE = 2,
00032 } REG_ACCESS_OPT;
00033 
00034 #define REG_ID_NVDA  0x9024
00035 #define REG_ID_NVDI  0x9025
00036 #define REG_ID_NVIA 0x9029
00037 #define REG_ID_MLCR  0x902b
00038 #define REG_ID_NVQC  0x9030
00039 #define REG_ID_MFRL 0x9028
00040 #define REG_ID_PTYS 0x5004
00041 #define REG_ID_PMTU 0x5003
00042 
00043 struct operation_tlv {
00044     mlx_uint32  reserved0       :8;    /* bit_offset:0 */    /* element_size: 8 */
00045     mlx_uint32  status          :7;    /* bit_offset:8 */    /* element_size: 7 */
00046     mlx_uint32  dr                      :1;    /* bit_offset:15 */    /* element_size: 1 */
00047     mlx_uint32  len                     :11;    /* bit_offset:16 */    /* element_size: 11 */
00048     mlx_uint32  Type            :5;    /* bit_offset:27 */    /* element_size: 5 */
00049     mlx_uint32  cls                     :8;    /* bit_offset:32 */    /* element_size: 8 */
00050     mlx_uint32  method          :7;    /* bit_offset:40 */    /* element_size: 7 */
00051     mlx_uint32  r                       :1;    /* bit_offset:47 */    /* element_size: 1 */
00052     mlx_uint32  register_id     :16;    /* bit_offset:48 */    /* element_size: 16 */
00053     mlx_uint64  tid                     ;    /* bit_offset:64 */    /* element_size: 64 */
00054 };
00055 
00056 struct reg_tlv {
00057         mlx_uint32      reserved0       :16;    /* bit_offset:0 */    /* element_size: 16 */
00058         mlx_uint32      len             :11;    /* bit_offset:16 */    /* element_size: 11 */
00059         mlx_uint32      Type            :5;    /* bit_offset:27 */    /* element_size: 5 */
00060         mlx_uint8       data[REG_ACCESS_MAX_REG_SIZE];
00061 };
00062 
00063 struct mail_box_tlv {
00064         struct operation_tlv operation_tlv;
00065         struct reg_tlv reg_tlv;
00066 };
00067 mlx_status
00068 mlx_reg_access(
00069                 IN mlx_utils *utils,
00070                 IN mlx_uint16  reg_id,
00071                 IN REG_ACCESS_OPT reg_opt,
00072                 IN OUT mlx_void *reg_data,
00073         IN mlx_size reg_size,
00074         OUT mlx_uint32 *reg_status
00075                 );
00076 
00077 #endif /* MLX_REG_ACCESS_H_ */