iPXE
nodnic_shomron_prm.h
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00001 /*
00002  * Copyright (C) 2015 Mellanox Technologies Ltd.
00003  *
00004  * This program is free software; you can redistribute it and/or
00005  * modify it under the terms of the GNU General Public License as
00006  * published by the Free Software Foundation; either version 2 of the
00007  * License, or any later version.
00008  *
00009  * This program is distributed in the hope that it will be useful, but
00010  * WITHOUT ANY WARRANTY; without even the implied warranty of
00011  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012  * General Public License for more details.
00013  *
00014  * You should have received a copy of the GNU General Public License
00015  * along with this program; if not, write to the Free Software
00016  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00017  * 02110-1301, USA.
00018  */
00019 
00020 FILE_LICENCE ( GPL2_OR_LATER );
00021 
00022 #ifndef SRC_DRIVERS_INFINIBAND_MLX_NODNIC_INCLUDE_PRM_NODNIC_SHOMRON_PRM_H_
00023 #define SRC_DRIVERS_INFINIBAND_MLX_NODNIC_INCLUDE_PRM_NODNIC_SHOMRON_PRM_H_
00024 
00025 
00026 
00027 #include "nodnic_prm.h"
00028 
00029 
00030 #define SHOMRON_MAX_GATHER 1
00031 
00032 /* Send wqe segment ctrl */
00033 
00034 struct shomronprm_wqe_segment_ctrl_send_st {    /* Little Endian */
00035     pseudo_bit_t        opcode[0x00008];
00036     pseudo_bit_t        wqe_index[0x00010];
00037     pseudo_bit_t        reserved1[0x00008];
00038 /* -------------- */
00039     pseudo_bit_t        ds[0x00006];           /* descriptor (wqe) size in 16bytes chunk */
00040     pseudo_bit_t        reserved2[0x00002];
00041     pseudo_bit_t        qpn[0x00018];
00042 /* -------------- */
00043         pseudo_bit_t    reserved3[0x00002];
00044         pseudo_bit_t    ce[0x00002];
00045         pseudo_bit_t    reserved4[0x0001c];
00046 /* -------------- */
00047         pseudo_bit_t    reserved5[0x00040];
00048 /* -------------- */
00049         pseudo_bit_t    mss[0x0000e];
00050         pseudo_bit_t    reserved6[0x0000e];
00051         pseudo_bit_t    cs13_inner[0x00001];
00052         pseudo_bit_t    cs14_inner[0x00001];
00053         pseudo_bit_t    cs13[0x00001];
00054         pseudo_bit_t    cs14[0x00001];
00055 /* -------------- */
00056         pseudo_bit_t    reserved7[0x00020];
00057 /* -------------- */
00058         pseudo_bit_t    inline_headers1[0x00010];
00059         pseudo_bit_t    inline_headers_size[0x0000a]; //sum size of inline_hdr1+inline_hdrs (0x10)
00060         pseudo_bit_t    reserved8[0x00006];
00061 /* -------------- */
00062         pseudo_bit_t    inline_headers2[0x00020];
00063 /* -------------- */
00064         pseudo_bit_t    inline_headers3[0x00020];
00065 /* -------------- */
00066         pseudo_bit_t    inline_headers4[0x00020];
00067 /* -------------- */
00068         pseudo_bit_t    inline_headers5[0x00020];
00069 };
00070 
00071 
00072 
00073 /* Completion Queue Entry Format        #### michal - fixed by gdror */
00074 
00075 struct shomronprm_completion_queue_entry_st {   /* Little Endian */
00076 
00077         pseudo_bit_t    reserved1[0x00080];
00078 /* -------------- */
00079         pseudo_bit_t    reserved2[0x00010];
00080         pseudo_bit_t    ml_path[0x00007];
00081         pseudo_bit_t    reserved3[0x00009];
00082 /* -------------- */
00083         pseudo_bit_t    slid[0x00010];
00084         pseudo_bit_t    reserved4[0x00010];
00085 /* -------------- */
00086         pseudo_bit_t    rqpn[0x00018];
00087         pseudo_bit_t    sl[0x00004];
00088         pseudo_bit_t    l3_hdr[0x00002];
00089         pseudo_bit_t    reserved5[0x00002];
00090 /* -------------- */
00091         pseudo_bit_t    reserved10[0x00020];
00092 /* -------------- */
00093         pseudo_bit_t    srqn[0x00018];
00094         pseudo_bit_t    reserved11[0x0008];
00095 /* -------------- */
00096         pseudo_bit_t    pkey_index[0x00020];
00097 /* -------------- */
00098         pseudo_bit_t    reserved6[0x00020];
00099 /* -------------- */
00100         pseudo_bit_t    byte_cnt[0x00020];
00101 /* -------------- */
00102         pseudo_bit_t    reserved7[0x00040];
00103 /* -------------- */
00104         pseudo_bit_t    qpn[0x00018];
00105         pseudo_bit_t    rx_drop_counter[0x00008];
00106 /* -------------- */
00107         pseudo_bit_t    owner[0x00001];
00108         pseudo_bit_t    reserved8[0x00003];
00109         pseudo_bit_t    opcode[0x00004];
00110         pseudo_bit_t    reserved9[0x00008];
00111         pseudo_bit_t    wqe_counter[0x00010];
00112 };
00113 
00114 
00115 /* Completion with Error CQE             #### michal - gdror fixed */
00116 
00117 struct shomronprm_completion_with_error_st {    /* Little Endian */
00118         pseudo_bit_t    reserved1[0x001a0];
00119         /* -------------- */
00120         pseudo_bit_t    syndrome[0x00008];
00121         pseudo_bit_t    vendor_error_syndrome[0x00008];
00122         pseudo_bit_t    reserved2[0x00010];
00123         /* -------------- */
00124         pseudo_bit_t    reserved3[0x00040];
00125 };
00126 
00127 
00128 struct MLX_DECLARE_STRUCT ( shomronprm_wqe_segment_ctrl_send );
00129 struct MLX_DECLARE_STRUCT ( shomronprm_completion_queue_entry );
00130 struct MLX_DECLARE_STRUCT ( shomronprm_completion_with_error );
00131 
00132 struct shomron_nodnic_eth_send_wqe {
00133         struct shomronprm_wqe_segment_ctrl_send ctrl;
00134         struct nodnic_wqe_segment_data_ptr data[SHOMRON_MAX_GATHER];
00135 } __attribute__ (( packed ));
00136 
00137 union shomronprm_completion_entry {
00138         struct shomronprm_completion_queue_entry normal;
00139         struct shomronprm_completion_with_error error;
00140 } __attribute__ (( packed ));
00141 
00142 
00143 #endif /* SRC_DRIVERS_INFINIBAND_MLX_NODNIC_INCLUDE_PRM_NODNIC_SHOMRON_PRM_H_ */