iPXE
pci.c
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00001 /*
00002  * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
00003  *
00004  * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
00005  * Munro, in turn based on the Linux kernel's PCI implementation.
00006  *
00007  * This program is free software; you can redistribute it and/or
00008  * modify it under the terms of the GNU General Public License as
00009  * published by the Free Software Foundation; either version 2 of the
00010  * License, or any later version.
00011  *
00012  * This program is distributed in the hope that it will be useful, but
00013  * WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00015  * General Public License for more details.
00016  *
00017  * You should have received a copy of the GNU General Public License
00018  * along with this program; if not, write to the Free Software
00019  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00020  * 02110-1301, USA.
00021  *
00022  * You can also choose to distribute this program under the terms of
00023  * the Unmodified Binary Distribution Licence (as given in the file
00024  * COPYING.UBDL), provided that you have satisfied its requirements.
00025  */
00026 
00027 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
00028 
00029 #include <stdint.h>
00030 #include <stdlib.h>
00031 #include <stdio.h>
00032 #include <string.h>
00033 #include <errno.h>
00034 #include <ipxe/tables.h>
00035 #include <ipxe/device.h>
00036 #include <ipxe/pci.h>
00037 
00038 /** @file
00039  *
00040  * PCI bus
00041  *
00042  */
00043 
00044 static void pcibus_remove ( struct root_device *rootdev );
00045 
00046 /**
00047  * Read PCI BAR
00048  *
00049  * @v pci               PCI device
00050  * @v reg               PCI register number
00051  * @ret bar             Base address register
00052  *
00053  * Reads the specified PCI base address register, including the flags
00054  * portion.  64-bit BARs will be handled automatically.  If the value
00055  * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
00056  * high dword is non-zero on a 32-bit platform), then the value
00057  * returned will be zero plus the flags for a 64-bit BAR.  Unreachable
00058  * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
00059  */
00060 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
00061         uint32_t low;
00062         uint32_t high;
00063 
00064         pci_read_config_dword ( pci, reg, &low );
00065         if ( ( low & (PCI_BASE_ADDRESS_SPACE_IO|PCI_BASE_ADDRESS_MEM_TYPE_MASK))
00066              == PCI_BASE_ADDRESS_MEM_TYPE_64 ) {
00067                 pci_read_config_dword ( pci, reg + 4, &high );
00068                 if ( high ) {
00069                         if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
00070                                 return ( ( ( uint64_t ) high << 32 ) | low );
00071                         } else {
00072                                 DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
00073                                        "%08x%08x\n",
00074                                        PCI_ARGS ( pci ), high, low );
00075                                 return PCI_BASE_ADDRESS_MEM_TYPE_64;
00076                         }
00077                 }
00078         }
00079         return low;
00080 }
00081 
00082 /**
00083  * Find the start of a PCI BAR
00084  *
00085  * @v pci               PCI device
00086  * @v reg               PCI register number
00087  * @ret start           BAR start address
00088  *
00089  * Reads the specified PCI base address register, and returns the
00090  * address portion of the BAR (i.e. without the flags).
00091  *
00092  * If the address exceeds the size of an unsigned long (i.e. if a
00093  * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
00094  * return value will be zero.
00095  */
00096 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
00097         unsigned long bar;
00098 
00099         bar = pci_bar ( pci, reg );
00100         if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
00101                 return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
00102         } else {
00103                 return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
00104         }
00105 }
00106 
00107 /**
00108  * Read membase and ioaddr for a PCI device
00109  *
00110  * @v pci               PCI device
00111  *
00112  * This scans through all PCI BARs on the specified device.  The first
00113  * valid memory BAR is recorded as pci_device::membase, and the first
00114  * valid IO BAR is recorded as pci_device::ioaddr.
00115  *
00116  * 64-bit BARs are handled automatically.  On a 32-bit platform, if a
00117  * 64-bit BAR has a non-zero high dword, it will be regarded as
00118  * invalid.
00119  */
00120 static void pci_read_bases ( struct pci_device *pci ) {
00121         unsigned long bar;
00122         int reg;
00123 
00124         for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
00125                 bar = pci_bar ( pci, reg );
00126                 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
00127                         if ( ! pci->ioaddr )
00128                                 pci->ioaddr = 
00129                                         ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
00130                 } else {
00131                         if ( ! pci->membase )
00132                                 pci->membase =
00133                                         ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
00134                         /* Skip next BAR if 64-bit */
00135                         if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
00136                                 reg += 4;
00137                 }
00138         }
00139 }
00140 
00141 /**
00142  * Enable PCI device
00143  *
00144  * @v pci               PCI device
00145  *
00146  * Set device to be a busmaster in case BIOS neglected to do so.  Also
00147  * adjust PCI latency timer to a reasonable value, 32.
00148  */
00149 void adjust_pci_device ( struct pci_device *pci ) {
00150         unsigned short new_command, pci_command;
00151         unsigned char pci_latency;
00152 
00153         pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
00154         new_command = ( pci_command | PCI_COMMAND_MASTER |
00155                         PCI_COMMAND_MEM | PCI_COMMAND_IO );
00156         if ( pci_command != new_command ) {
00157                 DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
00158                        "PCI command %04x->%04x\n",
00159                        PCI_ARGS ( pci ), pci_command, new_command );
00160                 pci_write_config_word ( pci, PCI_COMMAND, new_command );
00161         }
00162 
00163         pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
00164         if ( pci_latency < 32 ) {
00165                 DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
00166                        "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
00167                 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
00168         }
00169 }
00170 
00171 /**
00172  * Read PCI device configuration
00173  *
00174  * @v pci               PCI device
00175  * @ret rc              Return status code
00176  */
00177 int pci_read_config ( struct pci_device *pci ) {
00178         uint32_t busdevfn;
00179         uint8_t hdrtype;
00180         uint32_t tmp;
00181 
00182         /* Ignore all but the first function on non-multifunction devices */
00183         if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
00184                 busdevfn = pci->busdevfn;
00185                 pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
00186                 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
00187                 pci->busdevfn = busdevfn;
00188                 if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
00189                         return -ENODEV;
00190         }
00191 
00192         /* Check for physical device presence */
00193         pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
00194         if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
00195                 return -ENODEV;
00196 
00197         /* Populate struct pci_device */
00198         pci->vendor = ( tmp & 0xffff );
00199         pci->device = ( tmp >> 16 );
00200         pci_read_config_dword ( pci, PCI_REVISION, &tmp );
00201         pci->class = ( tmp >> 8 );
00202         pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, &pci->irq );
00203         pci_read_bases ( pci );
00204 
00205         /* Initialise generic device component */
00206         snprintf ( pci->dev.name, sizeof ( pci->dev.name ), "%04x:%02x:%02x.%x",
00207                    PCI_SEG ( pci->busdevfn ), PCI_BUS ( pci->busdevfn ),
00208                    PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
00209         pci->dev.desc.bus_type = BUS_TYPE_PCI;
00210         pci->dev.desc.location = pci->busdevfn;
00211         pci->dev.desc.vendor = pci->vendor;
00212         pci->dev.desc.device = pci->device;
00213         pci->dev.desc.class = pci->class;
00214         pci->dev.desc.ioaddr = pci->ioaddr;
00215         pci->dev.desc.irq = pci->irq;
00216         INIT_LIST_HEAD ( &pci->dev.siblings );
00217         INIT_LIST_HEAD ( &pci->dev.children );
00218 
00219         return 0;
00220 }
00221 
00222 /**
00223  * Find next device on PCI bus
00224  *
00225  * @v pci               PCI device to fill in
00226  * @v busdevfn          Starting bus:dev.fn address
00227  * @ret busdevfn        Bus:dev.fn address of next PCI device, or negative error
00228  */
00229 int pci_find_next ( struct pci_device *pci, unsigned int busdevfn ) {
00230         static unsigned int end;
00231         int rc;
00232 
00233         /* Determine number of PCI buses */
00234         if ( ! end )
00235                 end = PCI_BUSDEVFN ( 0, pci_num_bus(), 0, 0 );
00236 
00237         /* Find next PCI device, if any */
00238         for ( ; busdevfn < end ; busdevfn++ ) {
00239                 memset ( pci, 0, sizeof ( *pci ) );
00240                 pci_init ( pci, busdevfn );
00241                 if ( ( rc = pci_read_config ( pci ) ) == 0 )
00242                         return busdevfn;
00243         }
00244 
00245         return -ENODEV;
00246 }
00247 
00248 /**
00249  * Find driver for PCI device
00250  *
00251  * @v pci               PCI device
00252  * @ret rc              Return status code
00253  */
00254 int pci_find_driver ( struct pci_device *pci ) {
00255         struct pci_driver *driver;
00256         struct pci_device_id *id;
00257         unsigned int i;
00258 
00259         for_each_table_entry ( driver, PCI_DRIVERS ) {
00260                 if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
00261                         continue;
00262                 for ( i = 0 ; i < driver->id_count ; i++ ) {
00263                         id = &driver->ids[i];
00264                         if ( ( id->vendor != PCI_ANY_ID ) &&
00265                              ( id->vendor != pci->vendor ) )
00266                                 continue;
00267                         if ( ( id->device != PCI_ANY_ID ) &&
00268                              ( id->device != pci->device ) )
00269                                 continue;
00270                         pci_set_driver ( pci, driver, id );
00271                         return 0;
00272                 }
00273         }
00274         return -ENOENT;
00275 }
00276 
00277 /**
00278  * Probe a PCI device
00279  *
00280  * @v pci               PCI device
00281  * @ret rc              Return status code
00282  *
00283  * Searches for a driver for the PCI device.  If a driver is found,
00284  * its probe() routine is called.
00285  */
00286 int pci_probe ( struct pci_device *pci ) {
00287         int rc;
00288 
00289         DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
00290                PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
00291         DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
00292                PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
00293 
00294         if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
00295                 DBGC ( pci, PCI_FMT " probe failed: %s\n",
00296                        PCI_ARGS ( pci ), strerror ( rc ) );
00297                 return rc;
00298         }
00299 
00300         return 0;
00301 }
00302 
00303 /**
00304  * Remove a PCI device
00305  *
00306  * @v pci               PCI device
00307  */
00308 void pci_remove ( struct pci_device *pci ) {
00309         pci->driver->remove ( pci );
00310         DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
00311 }
00312 
00313 /**
00314  * Probe PCI root bus
00315  *
00316  * @v rootdev           PCI bus root device
00317  *
00318  * Scans the PCI bus for devices and registers all devices it can
00319  * find.
00320  */
00321 static int pcibus_probe ( struct root_device *rootdev ) {
00322         struct pci_device *pci = NULL;
00323         int busdevfn = 0;
00324         int rc;
00325 
00326         for ( busdevfn = 0 ; 1 ; busdevfn++ ) {
00327 
00328                 /* Allocate struct pci_device */
00329                 if ( ! pci )
00330                         pci = malloc ( sizeof ( *pci ) );
00331                 if ( ! pci ) {
00332                         rc = -ENOMEM;
00333                         goto err;
00334                 }
00335 
00336                 /* Find next PCI device, if any */
00337                 busdevfn = pci_find_next ( pci, busdevfn );
00338                 if ( busdevfn < 0 )
00339                         break;
00340 
00341                 /* Look for a driver */
00342                 if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
00343                         DBGC ( pci, PCI_FMT " (%04x:%04x class %06x) has no "
00344                                "driver\n", PCI_ARGS ( pci ), pci->vendor,
00345                                pci->device, pci->class );
00346                         continue;
00347                 }
00348 
00349                 /* Add to device hierarchy */
00350                 pci->dev.parent = &rootdev->dev;
00351                 list_add ( &pci->dev.siblings, &rootdev->dev.children );
00352 
00353                 /* Look for a driver */
00354                 if ( ( rc = pci_probe ( pci ) ) == 0 ) {
00355                         /* pcidev registered, we can drop our ref */
00356                         pci = NULL;
00357                 } else {
00358                         /* Not registered; re-use struct pci_device */
00359                         list_del ( &pci->dev.siblings );
00360                 }
00361         }
00362 
00363         free ( pci );
00364         return 0;
00365 
00366  err:
00367         free ( pci );
00368         pcibus_remove ( rootdev );
00369         return rc;
00370 }
00371 
00372 /**
00373  * Remove PCI root bus
00374  *
00375  * @v rootdev           PCI bus root device
00376  */
00377 static void pcibus_remove ( struct root_device *rootdev ) {
00378         struct pci_device *pci;
00379         struct pci_device *tmp;
00380 
00381         list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
00382                                    dev.siblings ) {
00383                 pci_remove ( pci );
00384                 list_del ( &pci->dev.siblings );
00385                 free ( pci );
00386         }
00387 }
00388 
00389 /** PCI bus root device driver */
00390 static struct root_driver pci_root_driver = {
00391         .probe = pcibus_probe,
00392         .remove = pcibus_remove,
00393 };
00394 
00395 /** PCI bus root device */
00396 struct root_device pci_root_device __root_device = {
00397         .dev = { .name = "PCI" },
00398         .driver = &pci_root_driver,
00399 };