iPXE
pcimsix.c
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00001 /*
00002  * Copyright (C) 2019 Michael Brown <mbrown@fensystems.co.uk>.
00003  *
00004  * This program is free software; you can redistribute it and/or
00005  * modify it under the terms of the GNU General Public License as
00006  * published by the Free Software Foundation; either version 2 of the
00007  * License, or (at your option) any later version.
00008  *
00009  * This program is distributed in the hope that it will be useful, but
00010  * WITHOUT ANY WARRANTY; without even the implied warranty of
00011  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012  * General Public License for more details.
00013  *
00014  * You should have received a copy of the GNU General Public License
00015  * along with this program; if not, write to the Free Software
00016  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00017  * 02110-1301, USA.
00018  *
00019  * You can also choose to distribute this program under the terms of
00020  * the Unmodified Binary Distribution Licence (as given in the file
00021  * COPYING.UBDL), provided that you have satisfied its requirements.
00022  */
00023 
00024 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
00025 
00026 #include <stdint.h>
00027 #include <errno.h>
00028 #include <assert.h>
00029 #include <ipxe/pci.h>
00030 #include <ipxe/pcimsix.h>
00031 
00032 /** @file
00033  *
00034  * PCI MSI-X interrupts
00035  *
00036  */
00037 
00038 /**
00039  * Get MSI-X descriptor name (for debugging)
00040  *
00041  * @v cfg               Configuration space offset
00042  * @ret name            Descriptor name
00043  */
00044 static const char * pci_msix_name ( unsigned int cfg ) {
00045 
00046         switch ( cfg ) {
00047         case PCI_MSIX_DESC_TABLE:       return "table";
00048         case PCI_MSIX_DESC_PBA:         return "PBA";
00049         default:                        return "<UNKNOWN>";
00050         }
00051 }
00052 
00053 /**
00054  * Map MSI-X BAR portion
00055  *
00056  * @v pci               PCI device
00057  * @v msix              MSI-X capability
00058  * @v cfg               Configuration space offset
00059  * @ret io              I/O address
00060  */
00061 static void * pci_msix_ioremap ( struct pci_device *pci, struct pci_msix *msix,
00062                                  unsigned int cfg ) {
00063         uint32_t desc;
00064         unsigned int bar;
00065         unsigned long start;
00066         unsigned long offset;
00067         unsigned long base;
00068         void *io;
00069 
00070         /* Read descriptor */
00071         pci_read_config_dword ( pci, ( msix->cap + cfg ), &desc );
00072 
00073         /* Get BAR */
00074         bar = PCI_MSIX_DESC_BIR ( desc );
00075         offset = PCI_MSIX_DESC_OFFSET ( desc );
00076         start = pci_bar_start ( pci, PCI_BASE_ADDRESS ( bar ) );
00077         if ( ! start ) {
00078                 DBGC ( msix, "MSI-X %p %s could not find BAR%d\n",
00079                        msix, pci_msix_name ( cfg ), bar );
00080                 return NULL;
00081         }
00082         base = ( start + offset );
00083         DBGC ( msix, "MSI-X %p %s at %#08lx (BAR%d+%#lx)\n",
00084                msix, pci_msix_name ( cfg ), base, bar, offset );
00085 
00086         /* Map BAR portion */
00087         io = ioremap ( ( start + offset ), PCI_MSIX_LEN );
00088         if ( ! io ) {
00089                 DBGC ( msix, "MSI-X %p %s could not map %#08lx\n",
00090                        msix, pci_msix_name ( cfg ), base );
00091                 return NULL;
00092         }
00093 
00094         return io;
00095 }
00096 
00097 /**
00098  * Enable MSI-X interrupts
00099  *
00100  * @v pci               PCI device
00101  * @v msix              MSI-X capability
00102  * @ret rc              Return status code
00103  */
00104 int pci_msix_enable ( struct pci_device *pci, struct pci_msix *msix ) {
00105         uint16_t ctrl;
00106         int rc;
00107 
00108         /* Locate capability */
00109         msix->cap = pci_find_capability ( pci, PCI_CAP_ID_MSIX );
00110         if ( ! msix->cap ) {
00111                 DBGC ( msix, "MSI-X %p found no MSI-X capability in "
00112                        PCI_FMT "\n", msix, PCI_ARGS ( pci ) );
00113                 rc = -ENOENT;
00114                 goto err_cap;
00115         }
00116 
00117         /* Extract interrupt count */
00118         pci_read_config_word ( pci, ( msix->cap + PCI_MSIX_CTRL ), &ctrl );
00119         msix->count = ( PCI_MSIX_CTRL_SIZE ( ctrl ) + 1 );
00120         DBGC ( msix, "MSI-X %p has %d vectors for " PCI_FMT "\n",
00121                msix, msix->count, PCI_ARGS ( pci ) );
00122 
00123         /* Map MSI-X table */
00124         msix->table = pci_msix_ioremap ( pci, msix, PCI_MSIX_DESC_TABLE );
00125         if ( ! msix->table ) {
00126                 rc = -ENOENT;
00127                 goto err_table;
00128         }
00129 
00130         /* Map pending bit array */
00131         msix->pba = pci_msix_ioremap ( pci, msix, PCI_MSIX_DESC_PBA );
00132         if ( ! msix->pba ) {
00133                 rc = -ENOENT;
00134                 goto err_pba;
00135         }
00136 
00137         /* Enable MSI-X */
00138         ctrl &= ~PCI_MSIX_CTRL_MASK;
00139         ctrl |= PCI_MSIX_CTRL_ENABLE;
00140         pci_write_config_word ( pci, ( msix->cap + PCI_MSIX_CTRL ), ctrl );
00141 
00142         return 0;
00143 
00144         iounmap ( msix->pba );
00145  err_pba:
00146         iounmap ( msix->table );
00147  err_table:
00148  err_cap:
00149         return rc;
00150 }
00151 
00152 /**
00153  * Disable MSI-X interrupts
00154  *
00155  * @v pci               PCI device
00156  * @v msix              MSI-X capability
00157  */
00158 void pci_msix_disable ( struct pci_device *pci, struct pci_msix *msix ) {
00159         uint16_t ctrl;
00160 
00161         /* Disable MSI-X */
00162         pci_read_config_word ( pci, ( msix->cap + PCI_MSIX_CTRL ), &ctrl );
00163         ctrl &= ~PCI_MSIX_CTRL_ENABLE;
00164         pci_write_config_word ( pci, ( msix->cap + PCI_MSIX_CTRL ), ctrl );
00165 
00166         /* Unmap pending bit array */
00167         iounmap ( msix->pba );
00168 
00169         /* Unmap MSI-X table */
00170         iounmap ( msix->table );
00171 }
00172 
00173 /**
00174  * Map MSI-X interrupt vector
00175  *
00176  * @v msix              MSI-X capability
00177  * @v vector            MSI-X vector
00178  * @v address           Message address
00179  * @v data              Message data
00180  */
00181 void pci_msix_map ( struct pci_msix *msix, unsigned int vector,
00182                     physaddr_t address, uint32_t data ) {
00183         void *base;
00184 
00185         /* Sanity check */
00186         assert ( vector < msix->count );
00187 
00188         /* Map interrupt vector */
00189         base = ( msix->table + PCI_MSIX_VECTOR ( vector ) );
00190         writel ( ( address & 0xffffffffUL ), ( base + PCI_MSIX_ADDRESS_LO ) );
00191         if ( sizeof ( address ) > sizeof ( uint32_t ) ) {
00192                 writel ( ( ( ( uint64_t ) address ) >> 32 ),
00193                          ( base + PCI_MSIX_ADDRESS_HI ) );
00194         } else {
00195                 writel ( 0, ( base + PCI_MSIX_ADDRESS_HI ) );
00196         }
00197         writel ( data, ( base + PCI_MSIX_DATA ) );
00198 }
00199 
00200 /**
00201  * Control MSI-X interrupt vector
00202  *
00203  * @v msix              MSI-X capability
00204  * @v vector            MSI-X vector
00205  * @v mask              Control mask
00206  */
00207 void pci_msix_control ( struct pci_msix *msix, unsigned int vector,
00208                         uint32_t mask ) {
00209         void *base;
00210         uint32_t ctrl;
00211 
00212         /* Mask/unmask interrupt vector */
00213         base = ( msix->table + PCI_MSIX_VECTOR ( vector ) );
00214         ctrl = readl ( base + PCI_MSIX_CONTROL );
00215         ctrl &= ~PCI_MSIX_CONTROL_MASK;
00216         ctrl |= mask;
00217         writel ( ctrl, ( base + PCI_MSIX_CONTROL ) );
00218 }
00219 
00220 /**
00221  * Dump MSI-X interrupt state (for debugging)
00222  *
00223  * @v msix              MSI-X capability
00224  * @v vector            MSI-X vector
00225  */
00226 void pci_msix_dump ( struct pci_msix *msix, unsigned int vector ) {
00227         void *base;
00228         uint32_t address_hi;
00229         uint32_t address_lo;
00230         physaddr_t address;
00231         uint32_t data;
00232         uint32_t ctrl;
00233         uint32_t pba;
00234 
00235         /* Do nothing in non-debug builds */
00236         if ( ! DBG_LOG )
00237                 return;
00238 
00239         /* Mask/unmask interrupt vector */
00240         base = ( msix->table + PCI_MSIX_VECTOR ( vector ) );
00241         address_hi = readl ( base + PCI_MSIX_ADDRESS_HI );
00242         address_lo = readl ( base + PCI_MSIX_ADDRESS_LO );
00243         data = readl ( base + PCI_MSIX_DATA );
00244         ctrl = readl ( base + PCI_MSIX_CONTROL );
00245         pba = readl ( msix->pba );
00246         address = ( ( ( ( uint64_t ) address_hi ) << 32 ) | address_lo );
00247         DBGC ( msix, "MSI-X %p vector %d %#08x => %#08lx%s%s\n",
00248                msix, vector, data, address,
00249                ( ( ctrl & PCI_MSIX_CONTROL_MASK ) ? " (masked)" : "" ),
00250                ( ( pba & ( 1 << vector ) ) ? " (pending)" : "" ) );
00251 }