iPXE
phantom.c
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00001 /*
00002  * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
00003  * Copyright (C) 2008 NetXen, Inc.
00004  *
00005  * This program is free software; you can redistribute it and/or
00006  * modify it under the terms of the GNU General Public License as
00007  * published by the Free Software Foundation; either version 2 of the
00008  * License, or any later version.
00009  *
00010  * This program is distributed in the hope that it will be useful, but
00011  * WITHOUT ANY WARRANTY; without even the implied warranty of
00012  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00013  * General Public License for more details.
00014  *
00015  * You should have received a copy of the GNU General Public License
00016  * along with this program; if not, write to the Free Software
00017  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00018  * 02110-1301, USA.
00019  *
00020  * You can also choose to distribute this program under the terms of
00021  * the Unmodified Binary Distribution Licence (as given in the file
00022  * COPYING.UBDL), provided that you have satisfied its requirements.
00023  */
00024 
00025 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
00026 
00027 #include <stdint.h>
00028 #include <stdlib.h>
00029 #include <string.h>
00030 #include <unistd.h>
00031 #include <errno.h>
00032 #include <assert.h>
00033 #include <byteswap.h>
00034 #include <ipxe/pci.h>
00035 #include <ipxe/io.h>
00036 #include <ipxe/malloc.h>
00037 #include <ipxe/iobuf.h>
00038 #include <ipxe/netdevice.h>
00039 #include <ipxe/if_ether.h>
00040 #include <ipxe/ethernet.h>
00041 #include <ipxe/spi.h>
00042 #include <ipxe/settings.h>
00043 #include "phantom.h"
00044 
00045 /**
00046  * @file
00047  *
00048  * NetXen Phantom NICs
00049  *
00050  */
00051 
00052 /** Maximum number of ports */
00053 #define PHN_MAX_NUM_PORTS 8
00054 
00055 /** Maximum time to wait for command PEG to initialise
00056  *
00057  * BUGxxxx
00058  *
00059  * The command PEG will currently report initialisation complete only
00060  * when at least one PHY has detected a link (so that the global PHY
00061  * clock can be set to 10G/1G as appropriate).  This can take a very,
00062  * very long time.
00063  *
00064  * A future firmware revision should decouple PHY initialisation from
00065  * firmware initialisation, at which point the command PEG will report
00066  * initialisation complete much earlier, and this timeout can be
00067  * reduced.
00068  */
00069 #define PHN_CMDPEG_INIT_TIMEOUT_SEC 50
00070 
00071 /** Maximum time to wait for receive PEG to initialise */
00072 #define PHN_RCVPEG_INIT_TIMEOUT_SEC 2
00073 
00074 /** Maximum time to wait for firmware to accept a command */
00075 #define PHN_ISSUE_CMD_TIMEOUT_MS 2000
00076 
00077 /** Maximum time to wait for test memory */
00078 #define PHN_TEST_MEM_TIMEOUT_MS 100
00079 
00080 /** Maximum time to wait for CLP command to be issued */
00081 #define PHN_CLP_CMD_TIMEOUT_MS 500
00082 
00083 /** Link state poll frequency
00084  *
00085  * The link state will be checked once in every N calls to poll().
00086  */
00087 #define PHN_LINK_POLL_FREQUENCY 4096
00088 
00089 /** Number of RX descriptors */
00090 #define PHN_NUM_RDS 32
00091 
00092 /** RX maximum fill level.  Must be strictly less than PHN_NUM_RDS. */
00093 #define PHN_RDS_MAX_FILL 16
00094 
00095 /** RX buffer size */
00096 #define PHN_RX_BUFSIZE ( 32 /* max LL padding added by card */ + \
00097                          ETH_FRAME_LEN )
00098 
00099 /** Number of RX status descriptors */
00100 #define PHN_NUM_SDS 32
00101 
00102 /** Number of TX descriptors */
00103 #define PHN_NUM_CDS 8
00104 
00105 /** A Phantom descriptor ring set */
00106 struct phantom_descriptor_rings {
00107         /** RX descriptors */
00108         struct phantom_rds rds[PHN_NUM_RDS];
00109         /** RX status descriptors */
00110         struct phantom_sds sds[PHN_NUM_SDS];
00111         /** TX descriptors */
00112         union phantom_cds cds[PHN_NUM_CDS];
00113         /** TX consumer index */
00114         volatile uint32_t cmd_cons;
00115 };
00116 
00117 /** RX context creation request and response buffers */
00118 struct phantom_create_rx_ctx_rqrsp {
00119         struct {
00120                 struct nx_hostrq_rx_ctx_s rx_ctx;
00121                 struct nx_hostrq_rds_ring_s rds;
00122                 struct nx_hostrq_sds_ring_s sds;
00123         } __unm_dma_aligned hostrq;
00124         struct {
00125                 struct nx_cardrsp_rx_ctx_s rx_ctx;
00126                 struct nx_cardrsp_rds_ring_s rds;
00127                 struct nx_cardrsp_sds_ring_s sds;
00128         } __unm_dma_aligned cardrsp;
00129 };
00130 
00131 /** TX context creation request and response buffers */
00132 struct phantom_create_tx_ctx_rqrsp {
00133         struct {
00134                 struct nx_hostrq_tx_ctx_s tx_ctx;
00135         } __unm_dma_aligned hostrq;
00136         struct {
00137                 struct nx_cardrsp_tx_ctx_s tx_ctx;
00138         } __unm_dma_aligned cardrsp;
00139 };
00140 
00141 /** A Phantom NIC */
00142 struct phantom_nic {
00143         /** BAR 0 */
00144         void *bar0;
00145         /** Current CRB window */
00146         unsigned long crb_window;
00147         /** CRB window access method */
00148         unsigned long ( *crb_access ) ( struct phantom_nic *phantom,
00149                                         unsigned long reg );
00150 
00151 
00152         /** Port number */
00153         unsigned int port;
00154 
00155 
00156         /** RX context ID */
00157         uint16_t rx_context_id;
00158         /** RX descriptor producer CRB offset */
00159         unsigned long rds_producer_crb;
00160         /** RX status descriptor consumer CRB offset */
00161         unsigned long sds_consumer_crb;
00162         /** RX interrupt mask CRB offset */
00163         unsigned long sds_irq_mask_crb;
00164         /** RX interrupts enabled */
00165         unsigned int sds_irq_enabled;
00166 
00167         /** RX producer index */
00168         unsigned int rds_producer_idx;
00169         /** RX consumer index */
00170         unsigned int rds_consumer_idx;
00171         /** RX status consumer index */
00172         unsigned int sds_consumer_idx;
00173         /** RX I/O buffers */
00174         struct io_buffer *rds_iobuf[PHN_RDS_MAX_FILL];
00175 
00176 
00177         /** TX context ID */
00178         uint16_t tx_context_id;
00179         /** TX descriptor producer CRB offset */
00180         unsigned long cds_producer_crb;
00181 
00182         /** TX producer index */
00183         unsigned int cds_producer_idx;
00184         /** TX consumer index */
00185         unsigned int cds_consumer_idx;
00186         /** TX I/O buffers */
00187         struct io_buffer *cds_iobuf[PHN_NUM_CDS];
00188 
00189 
00190         /** Descriptor rings */
00191         struct phantom_descriptor_rings *desc;
00192 
00193 
00194         /** Last known link state */
00195         uint32_t link_state;
00196         /** Link state poll timer */
00197         unsigned long link_poll_timer;
00198 
00199 
00200         /** Non-volatile settings */
00201         struct settings settings;
00202 };
00203 
00204 /** Interrupt mask registers */
00205 static const unsigned long phantom_irq_mask_reg[PHN_MAX_NUM_PORTS] = {
00206         UNM_PCIE_IRQ_MASK_F0,
00207         UNM_PCIE_IRQ_MASK_F1,
00208         UNM_PCIE_IRQ_MASK_F2,
00209         UNM_PCIE_IRQ_MASK_F3,
00210         UNM_PCIE_IRQ_MASK_F4,
00211         UNM_PCIE_IRQ_MASK_F5,
00212         UNM_PCIE_IRQ_MASK_F6,
00213         UNM_PCIE_IRQ_MASK_F7,
00214 };
00215 
00216 /** Interrupt status registers */
00217 static const unsigned long phantom_irq_status_reg[PHN_MAX_NUM_PORTS] = {
00218         UNM_PCIE_IRQ_STATUS_F0,
00219         UNM_PCIE_IRQ_STATUS_F1,
00220         UNM_PCIE_IRQ_STATUS_F2,
00221         UNM_PCIE_IRQ_STATUS_F3,
00222         UNM_PCIE_IRQ_STATUS_F4,
00223         UNM_PCIE_IRQ_STATUS_F5,
00224         UNM_PCIE_IRQ_STATUS_F6,
00225         UNM_PCIE_IRQ_STATUS_F7,
00226 };
00227 
00228 /***************************************************************************
00229  *
00230  * CRB register access
00231  *
00232  */
00233 
00234 /**
00235  * Prepare for access to CRB register via 128MB BAR
00236  *
00237  * @v phantom           Phantom NIC
00238  * @v reg               Register offset within abstract address space
00239  * @ret offset          Register offset within PCI BAR0
00240  */
00241 static unsigned long phantom_crb_access_128m ( struct phantom_nic *phantom,
00242                                                unsigned long reg ) {
00243         unsigned long offset = ( 0x6000000 + ( reg & 0x1ffffff ) );
00244         uint32_t window = ( reg & 0x2000000 );
00245         uint32_t verify_window;
00246 
00247         if ( phantom->crb_window != window ) {
00248 
00249                 /* Write to the CRB window register */
00250                 writel ( window, phantom->bar0 + UNM_128M_CRB_WINDOW );
00251 
00252                 /* Ensure that the write has reached the card */
00253                 verify_window = readl ( phantom->bar0 + UNM_128M_CRB_WINDOW );
00254                 assert ( verify_window == window );
00255 
00256                 /* Record new window */
00257                 phantom->crb_window = window;
00258         }
00259 
00260         return offset;
00261 }
00262 
00263 /**
00264  * Prepare for access to CRB register via 32MB BAR
00265  *
00266  * @v phantom           Phantom NIC
00267  * @v reg               Register offset within abstract address space
00268  * @ret offset          Register offset within PCI BAR0
00269  */
00270 static unsigned long phantom_crb_access_32m ( struct phantom_nic *phantom,
00271                                               unsigned long reg ) {
00272         unsigned long offset = ( reg & 0x1ffffff );
00273         uint32_t window = ( reg & 0x2000000 );
00274         uint32_t verify_window;
00275 
00276         if ( phantom->crb_window != window ) {
00277 
00278                 /* Write to the CRB window register */
00279                 writel ( window, phantom->bar0 + UNM_32M_CRB_WINDOW );
00280 
00281                 /* Ensure that the write has reached the card */
00282                 verify_window = readl ( phantom->bar0 + UNM_32M_CRB_WINDOW );
00283                 assert ( verify_window == window );
00284 
00285                 /* Record new window */
00286                 phantom->crb_window = window;
00287         }
00288 
00289         return offset;
00290 }
00291 
00292 /**
00293  * Prepare for access to CRB register via 2MB BAR
00294  *
00295  * @v phantom           Phantom NIC
00296  * @v reg               Register offset within abstract address space
00297  * @ret offset          Register offset within PCI BAR0
00298  */
00299 static unsigned long phantom_crb_access_2m ( struct phantom_nic *phantom,
00300                                              unsigned long reg ) {
00301         static const struct {
00302                 uint8_t block;
00303                 uint16_t window_hi;
00304         } reg_window_hi[] = {
00305                 { UNM_CRB_BLK_PCIE,     0x773 },
00306                 { UNM_CRB_BLK_CAM,      0x416 },
00307                 { UNM_CRB_BLK_ROMUSB,   0x421 },
00308                 { UNM_CRB_BLK_TEST,     0x295 },
00309                 { UNM_CRB_BLK_PEG_0,    0x340 },
00310                 { UNM_CRB_BLK_PEG_1,    0x341 },
00311                 { UNM_CRB_BLK_PEG_2,    0x342 },
00312                 { UNM_CRB_BLK_PEG_3,    0x343 },
00313                 { UNM_CRB_BLK_PEG_4,    0x34b },
00314         };
00315         unsigned int block = UNM_CRB_BLK ( reg );
00316         unsigned long offset = UNM_CRB_OFFSET ( reg );
00317         uint32_t window;
00318         uint32_t verify_window;
00319         unsigned int i;
00320 
00321         for ( i = 0 ; i < ( sizeof ( reg_window_hi ) /
00322                             sizeof ( reg_window_hi[0] ) ) ; i++ ) {
00323 
00324                 if ( reg_window_hi[i].block != block )
00325                         continue;
00326 
00327                 window = ( ( reg_window_hi[i].window_hi << 20 ) |
00328                            ( offset & 0x000f0000 ) );
00329 
00330                 if ( phantom->crb_window != window ) {
00331 
00332                         /* Write to the CRB window register */
00333                         writel ( window, phantom->bar0 + UNM_2M_CRB_WINDOW );
00334 
00335                         /* Ensure that the write has reached the card */
00336                         verify_window = readl ( phantom->bar0 +
00337                                                 UNM_2M_CRB_WINDOW );
00338                         assert ( verify_window == window );
00339 
00340                         /* Record new window */
00341                         phantom->crb_window = window;
00342                 }
00343 
00344                 return ( 0x1e0000 + ( offset & 0xffff ) );
00345         }
00346 
00347         assert ( 0 );
00348         return 0;
00349 }
00350 
00351 /**
00352  * Read from Phantom CRB register
00353  *
00354  * @v phantom           Phantom NIC
00355  * @v reg               Register offset within abstract address space
00356  * @ret value           Register value
00357  */
00358 static uint32_t phantom_readl ( struct phantom_nic *phantom,
00359                                 unsigned long reg ) {
00360         unsigned long offset;
00361 
00362         offset = phantom->crb_access ( phantom, reg );
00363         return readl ( phantom->bar0 + offset );
00364 }
00365 
00366 /**
00367  * Write to Phantom CRB register
00368  *
00369  * @v phantom           Phantom NIC
00370  * @v value             Register value
00371  * @v reg               Register offset within abstract address space
00372  */
00373 static void phantom_writel ( struct phantom_nic *phantom, uint32_t value,
00374                              unsigned long reg ) {
00375         unsigned long offset;
00376 
00377         offset = phantom->crb_access ( phantom, reg );
00378         writel ( value, phantom->bar0 + offset );
00379 }
00380 
00381 /**
00382  * Write to Phantom CRB HI/LO register pair
00383  *
00384  * @v phantom           Phantom NIC
00385  * @v value             Register value
00386  * @v lo_offset         LO register offset within CRB
00387  * @v hi_offset         HI register offset within CRB
00388  */
00389 static inline void phantom_write_hilo ( struct phantom_nic *phantom,
00390                                         uint64_t value,
00391                                         unsigned long lo_offset,
00392                                         unsigned long hi_offset ) {
00393         uint32_t lo = ( value & 0xffffffffUL );
00394         uint32_t hi = ( value >> 32 );
00395 
00396         phantom_writel ( phantom, lo, lo_offset );
00397         phantom_writel ( phantom, hi, hi_offset );
00398 }
00399 
00400 /***************************************************************************
00401  *
00402  * Firmware message buffer access (for debug)
00403  *
00404  */
00405 
00406 /**
00407  * Read from Phantom test memory
00408  *
00409  * @v phantom           Phantom NIC
00410  * @v offset            Offset within test memory
00411  * @v buf               8-byte buffer to fill
00412  * @ret rc              Return status code
00413  */
00414 static int phantom_read_test_mem_block ( struct phantom_nic *phantom,
00415                                          unsigned long offset,
00416                                          uint32_t buf[2] ) {
00417         unsigned int retries;
00418         uint32_t test_control;
00419 
00420         phantom_write_hilo ( phantom, offset, UNM_TEST_ADDR_LO,
00421                              UNM_TEST_ADDR_HI );
00422         phantom_writel ( phantom, UNM_TEST_CONTROL_ENABLE, UNM_TEST_CONTROL );
00423         phantom_writel ( phantom,
00424                          ( UNM_TEST_CONTROL_ENABLE | UNM_TEST_CONTROL_START ),
00425                          UNM_TEST_CONTROL );
00426         
00427         for ( retries = 0 ; retries < PHN_TEST_MEM_TIMEOUT_MS ; retries++ ) {
00428                 test_control = phantom_readl ( phantom, UNM_TEST_CONTROL );
00429                 if ( ( test_control & UNM_TEST_CONTROL_BUSY ) == 0 ) {
00430                         buf[0] = phantom_readl ( phantom, UNM_TEST_RDDATA_LO );
00431                         buf[1] = phantom_readl ( phantom, UNM_TEST_RDDATA_HI );
00432                         return 0;
00433                 }
00434                 mdelay ( 1 );
00435         }
00436 
00437         DBGC ( phantom, "Phantom %p timed out waiting for test memory\n",
00438                phantom );
00439         return -ETIMEDOUT;
00440 }
00441 
00442 /**
00443  * Read single byte from Phantom test memory
00444  *
00445  * @v phantom           Phantom NIC
00446  * @v offset            Offset within test memory
00447  * @ret byte            Byte read, or negative error
00448  */
00449 static int phantom_read_test_mem ( struct phantom_nic *phantom,
00450                                    unsigned long offset ) {
00451         static union {
00452                 uint8_t bytes[8];
00453                 uint32_t dwords[2];
00454         } cache;
00455         static unsigned long cache_offset = -1UL;
00456         unsigned long sub_offset;
00457         int rc;
00458 
00459         sub_offset = ( offset & ( sizeof ( cache ) - 1 ) );
00460         offset = ( offset & ~( sizeof ( cache ) - 1 ) );
00461 
00462         if ( cache_offset != offset ) {
00463                 if ( ( rc = phantom_read_test_mem_block ( phantom, offset,
00464                                                           cache.dwords )) !=0 )
00465                         return rc;
00466                 cache_offset = offset;
00467         }
00468 
00469         return cache.bytes[sub_offset];
00470 }
00471 
00472 /**
00473  * Dump Phantom firmware dmesg log
00474  *
00475  * @v phantom           Phantom NIC
00476  * @v log               Log number
00477  * @v max_lines         Maximum number of lines to show, or -1 to show all
00478  * @ret rc              Return status code
00479  */
00480 static int phantom_dmesg ( struct phantom_nic *phantom, unsigned int log,
00481                             unsigned int max_lines ) {
00482         uint32_t head;
00483         uint32_t tail;
00484         uint32_t sig;
00485         uint32_t offset;
00486         int byte;
00487 
00488         /* Optimise out for non-debug builds */
00489         if ( ! DBG_LOG )
00490                 return 0;
00491 
00492         /* Locate log */
00493         head = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_HEAD ( log ) );
00494         tail = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_TAIL ( log ) );
00495         sig = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_SIG ( log ) );
00496         DBGC ( phantom, "Phantom %p firmware dmesg buffer %d (%08x-%08x)\n",
00497                phantom, log, head, tail );
00498         assert ( ( head & 0x07 ) == 0 );
00499         if ( sig != UNM_CAM_RAM_DMESG_SIG_MAGIC ) {
00500                 DBGC ( phantom, "Warning: bad signature %08x (want %08lx)\n",
00501                        sig, UNM_CAM_RAM_DMESG_SIG_MAGIC );
00502         }
00503 
00504         /* Locate start of last (max_lines) lines */
00505         for ( offset = tail ; offset > head ; offset-- ) {
00506                 if ( ( byte = phantom_read_test_mem ( phantom,
00507                                                       ( offset - 1 ) ) ) < 0 )
00508                         return byte;
00509                 if ( ( byte == '\n' ) && ( max_lines-- == 0 ) )
00510                         break;
00511         }
00512 
00513         /* Print lines */
00514         for ( ; offset < tail ; offset++ ) {
00515                 if ( ( byte = phantom_read_test_mem ( phantom, offset ) ) < 0 )
00516                         return byte;
00517                 DBG ( "%c", byte );
00518         }
00519         DBG ( "\n" );
00520         return 0;
00521 }
00522 
00523 /**
00524  * Dump Phantom firmware dmesg logs
00525  *
00526  * @v phantom           Phantom NIC
00527  * @v max_lines         Maximum number of lines to show, or -1 to show all
00528  */
00529 static void __attribute__ (( unused ))
00530 phantom_dmesg_all ( struct phantom_nic *phantom, unsigned int max_lines ) {
00531         unsigned int i;
00532 
00533         for ( i = 0 ; i < UNM_CAM_RAM_NUM_DMESG_BUFFERS ; i++ )
00534                 phantom_dmesg ( phantom, i, max_lines );
00535 }
00536 
00537 /***************************************************************************
00538  *
00539  * Firmware interface
00540  *
00541  */
00542 
00543 /**
00544  * Wait for firmware to accept command
00545  *
00546  * @v phantom           Phantom NIC
00547  * @ret rc              Return status code
00548  */
00549 static int phantom_wait_for_cmd ( struct phantom_nic *phantom ) {
00550         unsigned int retries;
00551         uint32_t cdrp;
00552 
00553         for ( retries = 0 ; retries < PHN_ISSUE_CMD_TIMEOUT_MS ; retries++ ) {
00554                 mdelay ( 1 );
00555                 cdrp = phantom_readl ( phantom, UNM_NIC_REG_NX_CDRP );
00556                 if ( NX_CDRP_IS_RSP ( cdrp ) ) {
00557                         switch ( NX_CDRP_FORM_RSP ( cdrp ) ) {
00558                         case NX_CDRP_RSP_OK:
00559                                 return 0;
00560                         case NX_CDRP_RSP_FAIL:
00561                                 return -EIO;
00562                         case NX_CDRP_RSP_TIMEOUT:
00563                                 return -ETIMEDOUT;
00564                         default:
00565                                 return -EPROTO;
00566                         }
00567                 }
00568         }
00569 
00570         DBGC ( phantom, "Phantom %p timed out waiting for firmware to accept "
00571                "command\n", phantom );
00572         return -ETIMEDOUT;
00573 }
00574 
00575 /**
00576  * Issue command to firmware
00577  *
00578  * @v phantom           Phantom NIC
00579  * @v command           Firmware command
00580  * @v arg1              Argument 1
00581  * @v arg2              Argument 2
00582  * @v arg3              Argument 3
00583  * @ret rc              Return status code
00584  */
00585 static int phantom_issue_cmd ( struct phantom_nic *phantom,
00586                                uint32_t command, uint32_t arg1, uint32_t arg2,
00587                                uint32_t arg3 ) {
00588         uint32_t signature;
00589         int rc;
00590 
00591         /* Issue command */
00592         signature = NX_CDRP_SIGNATURE_MAKE ( phantom->port,
00593                                              NXHAL_VERSION );
00594         DBGC2 ( phantom, "Phantom %p issuing command %08x (%08x, %08x, "
00595                 "%08x)\n", phantom, command, arg1, arg2, arg3 );
00596         phantom_writel ( phantom, signature, UNM_NIC_REG_NX_SIGN );
00597         phantom_writel ( phantom, arg1, UNM_NIC_REG_NX_ARG1 );
00598         phantom_writel ( phantom, arg2, UNM_NIC_REG_NX_ARG2 );
00599         phantom_writel ( phantom, arg3, UNM_NIC_REG_NX_ARG3 );
00600         phantom_writel ( phantom, NX_CDRP_FORM_CMD ( command ),
00601                          UNM_NIC_REG_NX_CDRP );
00602 
00603         /* Wait for command to be accepted */
00604         if ( ( rc = phantom_wait_for_cmd ( phantom ) ) != 0 ) {
00605                 DBGC ( phantom, "Phantom %p could not issue command: %s\n",
00606                        phantom, strerror ( rc ) );
00607                 return rc;
00608         }
00609 
00610         return 0;
00611 }
00612 
00613 /**
00614  * Issue buffer-format command to firmware
00615  *
00616  * @v phantom           Phantom NIC
00617  * @v command           Firmware command
00618  * @v buffer            Buffer to pass to firmware
00619  * @v len               Length of buffer
00620  * @ret rc              Return status code
00621  */
00622 static int phantom_issue_buf_cmd ( struct phantom_nic *phantom,
00623                                    uint32_t command, void *buffer,
00624                                    size_t len ) {
00625         uint64_t physaddr;
00626 
00627         physaddr = virt_to_bus ( buffer );
00628         return phantom_issue_cmd ( phantom, command, ( physaddr >> 32 ),
00629                                    ( physaddr & 0xffffffffUL ), len );
00630 }
00631 
00632 /**
00633  * Create Phantom RX context
00634  *
00635  * @v phantom           Phantom NIC
00636  * @ret rc              Return status code
00637  */
00638 static int phantom_create_rx_ctx ( struct phantom_nic *phantom ) {
00639         struct phantom_create_rx_ctx_rqrsp *buf;
00640         int rc;
00641 
00642         /* Allocate context creation buffer */
00643         buf = malloc_dma ( sizeof ( *buf ), UNM_DMA_BUFFER_ALIGN );
00644         if ( ! buf ) {
00645                 rc = -ENOMEM;
00646                 goto out;
00647         }
00648         memset ( buf, 0, sizeof ( *buf ) );
00649         
00650         /* Prepare request */
00651         buf->hostrq.rx_ctx.host_rsp_dma_addr =
00652                 cpu_to_le64 ( virt_to_bus ( &buf->cardrsp ) );
00653         buf->hostrq.rx_ctx.capabilities[0] =
00654                 cpu_to_le32 ( NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN );
00655         buf->hostrq.rx_ctx.host_int_crb_mode =
00656                 cpu_to_le32 ( NX_HOST_INT_CRB_MODE_SHARED );
00657         buf->hostrq.rx_ctx.host_rds_crb_mode =
00658                 cpu_to_le32 ( NX_HOST_RDS_CRB_MODE_UNIQUE );
00659         buf->hostrq.rx_ctx.rds_ring_offset = cpu_to_le32 ( 0 );
00660         buf->hostrq.rx_ctx.sds_ring_offset =
00661                 cpu_to_le32 ( sizeof ( buf->hostrq.rds ) );
00662         buf->hostrq.rx_ctx.num_rds_rings = cpu_to_le16 ( 1 );
00663         buf->hostrq.rx_ctx.num_sds_rings = cpu_to_le16 ( 1 );
00664         buf->hostrq.rds.host_phys_addr =
00665                 cpu_to_le64 ( virt_to_bus ( phantom->desc->rds ) );
00666         buf->hostrq.rds.buff_size = cpu_to_le64 ( PHN_RX_BUFSIZE );
00667         buf->hostrq.rds.ring_size = cpu_to_le32 ( PHN_NUM_RDS );
00668         buf->hostrq.rds.ring_kind = cpu_to_le32 ( NX_RDS_RING_TYPE_NORMAL );
00669         buf->hostrq.sds.host_phys_addr =
00670                 cpu_to_le64 ( virt_to_bus ( phantom->desc->sds ) );
00671         buf->hostrq.sds.ring_size = cpu_to_le32 ( PHN_NUM_SDS );
00672 
00673         DBGC ( phantom, "Phantom %p creating RX context\n", phantom );
00674         DBGC2_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
00675                     &buf->hostrq, sizeof ( buf->hostrq ) );
00676 
00677         /* Issue request */
00678         if ( ( rc = phantom_issue_buf_cmd ( phantom,
00679                                             NX_CDRP_CMD_CREATE_RX_CTX,
00680                                             &buf->hostrq,
00681                                             sizeof ( buf->hostrq ) ) ) != 0 ) {
00682                 DBGC ( phantom, "Phantom %p could not create RX context: "
00683                        "%s\n", phantom, strerror ( rc ) );
00684                 DBGC ( phantom, "Request:\n" );
00685                 DBGC_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
00686                            &buf->hostrq, sizeof ( buf->hostrq ) );
00687                 DBGC ( phantom, "Response:\n" );
00688                 DBGC_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
00689                            &buf->cardrsp, sizeof ( buf->cardrsp ) );
00690                 goto out;
00691         }
00692 
00693         /* Retrieve context parameters */
00694         phantom->rx_context_id =
00695                 le16_to_cpu ( buf->cardrsp.rx_ctx.context_id );
00696         phantom->rds_producer_crb =
00697                 ( UNM_CAM_RAM +
00698                   le32_to_cpu ( buf->cardrsp.rds.host_producer_crb ) );
00699         phantom->sds_consumer_crb =
00700                 ( UNM_CAM_RAM +
00701                   le32_to_cpu ( buf->cardrsp.sds.host_consumer_crb ) );
00702         phantom->sds_irq_mask_crb =
00703                 ( UNM_CAM_RAM +
00704                   le32_to_cpu ( buf->cardrsp.sds.interrupt_crb ) );
00705 
00706         DBGC ( phantom, "Phantom %p created RX context (id %04x, port phys "
00707                "%02x virt %02x)\n", phantom, phantom->rx_context_id,
00708                buf->cardrsp.rx_ctx.phys_port, buf->cardrsp.rx_ctx.virt_port );
00709         DBGC2_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
00710                     &buf->cardrsp, sizeof ( buf->cardrsp ) );
00711         DBGC ( phantom, "Phantom %p RDS producer CRB is %08lx\n",
00712                phantom, phantom->rds_producer_crb );
00713         DBGC ( phantom, "Phantom %p SDS consumer CRB is %08lx\n",
00714                phantom, phantom->sds_consumer_crb );
00715         DBGC ( phantom, "Phantom %p SDS interrupt mask CRB is %08lx\n",
00716                phantom, phantom->sds_irq_mask_crb );
00717 
00718  out:
00719         free_dma ( buf, sizeof ( *buf ) );
00720         return rc;
00721 }
00722 
00723 /**
00724  * Destroy Phantom RX context
00725  *
00726  * @v phantom           Phantom NIC
00727  * @ret rc              Return status code
00728  */
00729 static void phantom_destroy_rx_ctx ( struct phantom_nic *phantom ) {
00730         int rc;
00731         
00732         DBGC ( phantom, "Phantom %p destroying RX context (id %04x)\n",
00733                phantom, phantom->rx_context_id );
00734 
00735         /* Issue request */
00736         if ( ( rc = phantom_issue_cmd ( phantom,
00737                                         NX_CDRP_CMD_DESTROY_RX_CTX,
00738                                         phantom->rx_context_id,
00739                                         NX_DESTROY_CTX_RESET, 0 ) ) != 0 ) {
00740                 DBGC ( phantom, "Phantom %p could not destroy RX context: "
00741                        "%s\n", phantom, strerror ( rc ) );
00742                 /* We're probably screwed */
00743                 return;
00744         }
00745 
00746         /* Clear context parameters */
00747         phantom->rx_context_id = 0;
00748         phantom->rds_producer_crb = 0;
00749         phantom->sds_consumer_crb = 0;
00750 
00751         /* Reset software counters */
00752         phantom->rds_producer_idx = 0;
00753         phantom->rds_consumer_idx = 0;
00754         phantom->sds_consumer_idx = 0;
00755 }
00756 
00757 /**
00758  * Create Phantom TX context
00759  *
00760  * @v phantom           Phantom NIC
00761  * @ret rc              Return status code
00762  */
00763 static int phantom_create_tx_ctx ( struct phantom_nic *phantom ) {
00764         struct phantom_create_tx_ctx_rqrsp *buf;
00765         int rc;
00766 
00767         /* Allocate context creation buffer */
00768         buf = malloc_dma ( sizeof ( *buf ), UNM_DMA_BUFFER_ALIGN );
00769         if ( ! buf ) {
00770                 rc = -ENOMEM;
00771                 goto out;
00772         }
00773         memset ( buf, 0, sizeof ( *buf ) );
00774 
00775         /* Prepare request */
00776         buf->hostrq.tx_ctx.host_rsp_dma_addr =
00777                 cpu_to_le64 ( virt_to_bus ( &buf->cardrsp ) );
00778         buf->hostrq.tx_ctx.cmd_cons_dma_addr =
00779                 cpu_to_le64 ( virt_to_bus ( &phantom->desc->cmd_cons ) );
00780         buf->hostrq.tx_ctx.capabilities[0] =
00781                 cpu_to_le32 ( NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN );
00782         buf->hostrq.tx_ctx.host_int_crb_mode =
00783                 cpu_to_le32 ( NX_HOST_INT_CRB_MODE_SHARED );
00784         buf->hostrq.tx_ctx.cds_ring.host_phys_addr =
00785                 cpu_to_le64 ( virt_to_bus ( phantom->desc->cds ) );
00786         buf->hostrq.tx_ctx.cds_ring.ring_size = cpu_to_le32 ( PHN_NUM_CDS );
00787 
00788         DBGC ( phantom, "Phantom %p creating TX context\n", phantom );
00789         DBGC2_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
00790                     &buf->hostrq, sizeof ( buf->hostrq ) );
00791 
00792         /* Issue request */
00793         if ( ( rc = phantom_issue_buf_cmd ( phantom,
00794                                             NX_CDRP_CMD_CREATE_TX_CTX,
00795                                             &buf->hostrq,
00796                                             sizeof ( buf->hostrq ) ) ) != 0 ) {
00797                 DBGC ( phantom, "Phantom %p could not create TX context: "
00798                        "%s\n", phantom, strerror ( rc ) );
00799                 DBGC ( phantom, "Request:\n" );
00800                 DBGC_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
00801                            &buf->hostrq, sizeof ( buf->hostrq ) );
00802                 DBGC ( phantom, "Response:\n" );
00803                 DBGC_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
00804                            &buf->cardrsp, sizeof ( buf->cardrsp ) );
00805                 goto out;
00806         }
00807 
00808         /* Retrieve context parameters */
00809         phantom->tx_context_id =
00810                 le16_to_cpu ( buf->cardrsp.tx_ctx.context_id );
00811         phantom->cds_producer_crb =
00812                 ( UNM_CAM_RAM +
00813                   le32_to_cpu(buf->cardrsp.tx_ctx.cds_ring.host_producer_crb));
00814 
00815         DBGC ( phantom, "Phantom %p created TX context (id %04x, port phys "
00816                "%02x virt %02x)\n", phantom, phantom->tx_context_id,
00817                buf->cardrsp.tx_ctx.phys_port, buf->cardrsp.tx_ctx.virt_port );
00818         DBGC2_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
00819                     &buf->cardrsp, sizeof ( buf->cardrsp ) );
00820         DBGC ( phantom, "Phantom %p CDS producer CRB is %08lx\n",
00821                phantom, phantom->cds_producer_crb );
00822 
00823  out:
00824         free_dma ( buf, sizeof ( *buf ) );
00825         return rc;
00826 }
00827 
00828 /**
00829  * Destroy Phantom TX context
00830  *
00831  * @v phantom           Phantom NIC
00832  * @ret rc              Return status code
00833  */
00834 static void phantom_destroy_tx_ctx ( struct phantom_nic *phantom ) {
00835         int rc;
00836         
00837         DBGC ( phantom, "Phantom %p destroying TX context (id %04x)\n",
00838                phantom, phantom->tx_context_id );
00839 
00840         /* Issue request */
00841         if ( ( rc = phantom_issue_cmd ( phantom,
00842                                         NX_CDRP_CMD_DESTROY_TX_CTX,
00843                                         phantom->tx_context_id,
00844                                         NX_DESTROY_CTX_RESET, 0 ) ) != 0 ) {
00845                 DBGC ( phantom, "Phantom %p could not destroy TX context: "
00846                        "%s\n", phantom, strerror ( rc ) );
00847                 /* We're probably screwed */
00848                 return;
00849         }
00850 
00851         /* Clear context parameters */
00852         phantom->tx_context_id = 0;
00853         phantom->cds_producer_crb = 0;
00854 
00855         /* Reset software counters */
00856         phantom->cds_producer_idx = 0;
00857         phantom->cds_consumer_idx = 0;
00858 }
00859 
00860 /***************************************************************************
00861  *
00862  * Descriptor ring management
00863  *
00864  */
00865 
00866 /**
00867  * Allocate Phantom RX descriptor
00868  *
00869  * @v phantom           Phantom NIC
00870  * @ret index           RX descriptor index, or negative error
00871  */
00872 static int phantom_alloc_rds ( struct phantom_nic *phantom ) {
00873         unsigned int rds_producer_idx;
00874         unsigned int next_rds_producer_idx;
00875 
00876         /* Check for space in the ring.  RX descriptors are consumed
00877          * out of order, but they are *read* by the hardware in strict
00878          * order.  We maintain a pessimistic consumer index, which is
00879          * guaranteed never to be an overestimate of the number of
00880          * descriptors read by the hardware.
00881          */
00882         rds_producer_idx = phantom->rds_producer_idx;
00883         next_rds_producer_idx = ( ( rds_producer_idx + 1 ) % PHN_NUM_RDS );
00884         if ( next_rds_producer_idx == phantom->rds_consumer_idx ) {
00885                 DBGC ( phantom, "Phantom %p RDS ring full (index %d not "
00886                        "consumed)\n", phantom, next_rds_producer_idx );
00887                 return -ENOBUFS;
00888         }
00889 
00890         return rds_producer_idx;
00891 }
00892 
00893 /**
00894  * Post Phantom RX descriptor
00895  *
00896  * @v phantom           Phantom NIC
00897  * @v rds               RX descriptor
00898  */
00899 static void phantom_post_rds ( struct phantom_nic *phantom,
00900                                struct phantom_rds *rds ) {
00901         unsigned int rds_producer_idx;
00902         unsigned int next_rds_producer_idx;
00903         struct phantom_rds *entry;
00904 
00905         /* Copy descriptor to ring */
00906         rds_producer_idx = phantom->rds_producer_idx;
00907         entry = &phantom->desc->rds[rds_producer_idx];
00908         memcpy ( entry, rds, sizeof ( *entry ) );
00909         DBGC2 ( phantom, "Phantom %p posting RDS %ld (slot %d):\n",
00910                 phantom, NX_GET ( rds, handle ), rds_producer_idx );
00911         DBGC2_HDA ( phantom, virt_to_bus ( entry ), entry, sizeof ( *entry ) );
00912 
00913         /* Update producer index */
00914         next_rds_producer_idx = ( ( rds_producer_idx + 1 ) % PHN_NUM_RDS );
00915         phantom->rds_producer_idx = next_rds_producer_idx;
00916         wmb();
00917         phantom_writel ( phantom, phantom->rds_producer_idx,
00918                          phantom->rds_producer_crb );
00919 }
00920 
00921 /**
00922  * Allocate Phantom TX descriptor
00923  *
00924  * @v phantom           Phantom NIC
00925  * @ret index           TX descriptor index, or negative error
00926  */
00927 static int phantom_alloc_cds ( struct phantom_nic *phantom ) {
00928         unsigned int cds_producer_idx;
00929         unsigned int next_cds_producer_idx;
00930 
00931         /* Check for space in the ring.  TX descriptors are consumed
00932          * in strict order, so we just check for a collision against
00933          * the consumer index.
00934          */
00935         cds_producer_idx = phantom->cds_producer_idx;
00936         next_cds_producer_idx = ( ( cds_producer_idx + 1 ) % PHN_NUM_CDS );
00937         if ( next_cds_producer_idx == phantom->cds_consumer_idx ) {
00938                 DBGC ( phantom, "Phantom %p CDS ring full (index %d not "
00939                        "consumed)\n", phantom, next_cds_producer_idx );
00940                 return -ENOBUFS;
00941         }
00942 
00943         return cds_producer_idx;
00944 }
00945 
00946 /**
00947  * Post Phantom TX descriptor
00948  *
00949  * @v phantom           Phantom NIC
00950  * @v cds               TX descriptor
00951  */
00952 static void phantom_post_cds ( struct phantom_nic *phantom,
00953                                union phantom_cds *cds ) {
00954         unsigned int cds_producer_idx;
00955         unsigned int next_cds_producer_idx;
00956         union phantom_cds *entry;
00957 
00958         /* Copy descriptor to ring */
00959         cds_producer_idx = phantom->cds_producer_idx;
00960         entry = &phantom->desc->cds[cds_producer_idx];
00961         memcpy ( entry, cds, sizeof ( *entry ) );
00962         DBGC2 ( phantom, "Phantom %p posting CDS %d:\n",
00963                 phantom, cds_producer_idx );
00964         DBGC2_HDA ( phantom, virt_to_bus ( entry ), entry, sizeof ( *entry ) );
00965 
00966         /* Update producer index */
00967         next_cds_producer_idx = ( ( cds_producer_idx + 1 ) % PHN_NUM_CDS );
00968         phantom->cds_producer_idx = next_cds_producer_idx;
00969         wmb();
00970         phantom_writel ( phantom, phantom->cds_producer_idx,
00971                          phantom->cds_producer_crb );
00972 }
00973 
00974 /***************************************************************************
00975  *
00976  * MAC address management
00977  *
00978  */
00979 
00980 /**
00981  * Add/remove MAC address
00982  *
00983  * @v phantom           Phantom NIC
00984  * @v ll_addr           MAC address to add or remove
00985  * @v opcode            MAC request opcode
00986  * @ret rc              Return status code
00987  */
00988 static int phantom_update_macaddr ( struct phantom_nic *phantom,
00989                                     const uint8_t *ll_addr,
00990                                     unsigned int opcode ) {
00991         union phantom_cds cds;
00992         int index;
00993 
00994         /* Get descriptor ring entry */
00995         index = phantom_alloc_cds ( phantom );
00996         if ( index < 0 )
00997                 return index;
00998 
00999         /* Fill descriptor ring entry */
01000         memset ( &cds, 0, sizeof ( cds ) );
01001         NX_FILL_1 ( &cds, 0,
01002                     nic_request.common.opcode, UNM_NIC_REQUEST );
01003         NX_FILL_2 ( &cds, 1,
01004                     nic_request.header.opcode, UNM_MAC_EVENT,
01005                     nic_request.header.context_id, phantom->port );
01006         NX_FILL_7 ( &cds, 2,
01007                     nic_request.body.mac_request.opcode, opcode,
01008                     nic_request.body.mac_request.mac_addr_0, ll_addr[0],
01009                     nic_request.body.mac_request.mac_addr_1, ll_addr[1],
01010                     nic_request.body.mac_request.mac_addr_2, ll_addr[2],
01011                     nic_request.body.mac_request.mac_addr_3, ll_addr[3],
01012                     nic_request.body.mac_request.mac_addr_4, ll_addr[4],
01013                     nic_request.body.mac_request.mac_addr_5, ll_addr[5] );
01014 
01015         /* Post descriptor */
01016         phantom_post_cds ( phantom, &cds );
01017 
01018         return 0;
01019 }
01020 
01021 /**
01022  * Add MAC address
01023  *
01024  * @v phantom           Phantom NIC
01025  * @v ll_addr           MAC address to add or remove
01026  * @ret rc              Return status code
01027  */
01028 static inline int phantom_add_macaddr ( struct phantom_nic *phantom,
01029                                         const uint8_t *ll_addr ) {
01030 
01031         DBGC ( phantom, "Phantom %p adding MAC address %s\n",
01032                phantom, eth_ntoa ( ll_addr ) );
01033 
01034         return phantom_update_macaddr ( phantom, ll_addr, UNM_MAC_ADD );
01035 }
01036 
01037 /**
01038  * Remove MAC address
01039  *
01040  * @v phantom           Phantom NIC
01041  * @v ll_addr           MAC address to add or remove
01042  * @ret rc              Return status code
01043  */
01044 static inline int phantom_del_macaddr ( struct phantom_nic *phantom,
01045                                         const uint8_t *ll_addr ) {
01046 
01047         DBGC ( phantom, "Phantom %p removing MAC address %s\n",
01048                phantom, eth_ntoa ( ll_addr ) );
01049 
01050         return phantom_update_macaddr ( phantom, ll_addr, UNM_MAC_DEL );
01051 }
01052 
01053 /***************************************************************************
01054  *
01055  * Link state detection
01056  *
01057  */
01058 
01059 /**
01060  * Poll link state
01061  *
01062  * @v netdev            Network device
01063  */
01064 static void phantom_poll_link_state ( struct net_device *netdev ) {
01065         struct phantom_nic *phantom = netdev_priv ( netdev );
01066         uint32_t xg_state_p3;
01067         unsigned int link;
01068 
01069         /* Read link state */
01070         xg_state_p3 = phantom_readl ( phantom, UNM_NIC_REG_XG_STATE_P3 );
01071 
01072         /* If there is no change, do nothing */
01073         if ( phantom->link_state == xg_state_p3 )
01074                 return;
01075 
01076         /* Record new link state */
01077         DBGC ( phantom, "Phantom %p new link state %08x (was %08x)\n",
01078                phantom, xg_state_p3, phantom->link_state );
01079         phantom->link_state = xg_state_p3;
01080 
01081         /* Indicate link state to iPXE */
01082         link = UNM_NIC_REG_XG_STATE_P3_LINK ( phantom->port,
01083                                               phantom->link_state );
01084         switch ( link ) {
01085         case UNM_NIC_REG_XG_STATE_P3_LINK_UP:
01086                 DBGC ( phantom, "Phantom %p link is up\n", phantom );
01087                 netdev_link_up ( netdev );
01088                 break;
01089         case UNM_NIC_REG_XG_STATE_P3_LINK_DOWN:
01090                 DBGC ( phantom, "Phantom %p link is down\n", phantom );
01091                 netdev_link_down ( netdev );
01092                 break;
01093         default:
01094                 DBGC ( phantom, "Phantom %p bad link state %d\n",
01095                        phantom, link );
01096                 break;
01097         }
01098 }
01099 
01100 /***************************************************************************
01101  *
01102  * Main driver body
01103  *
01104  */
01105 
01106 /**
01107  * Refill descriptor ring
01108  *
01109  * @v netdev            Net device
01110  */
01111 static void phantom_refill_rx_ring ( struct net_device *netdev ) {
01112         struct phantom_nic *phantom = netdev_priv ( netdev );
01113         struct io_buffer *iobuf;
01114         struct phantom_rds rds;
01115         unsigned int handle;
01116         int index;
01117 
01118         for ( handle = 0 ; handle < PHN_RDS_MAX_FILL ; handle++ ) {
01119 
01120                 /* Skip this index if the descriptor has not yet been
01121                  * consumed.
01122                  */
01123                 if ( phantom->rds_iobuf[handle] != NULL )
01124                         continue;
01125 
01126                 /* Allocate descriptor ring entry */
01127                 index = phantom_alloc_rds ( phantom );
01128                 assert ( PHN_RDS_MAX_FILL < PHN_NUM_RDS );
01129                 assert ( index >= 0 ); /* Guaranteed by MAX_FILL < NUM_RDS ) */
01130 
01131                 /* Try to allocate an I/O buffer */
01132                 iobuf = alloc_iob ( PHN_RX_BUFSIZE );
01133                 if ( ! iobuf ) {
01134                         /* Failure is non-fatal; we will retry later */
01135                         netdev_rx_err ( netdev, NULL, -ENOMEM );
01136                         break;
01137                 }
01138 
01139                 /* Fill descriptor ring entry */
01140                 memset ( &rds, 0, sizeof ( rds ) );
01141                 NX_FILL_2 ( &rds, 0,
01142                             handle, handle,
01143                             length, iob_len ( iobuf ) );
01144                 NX_FILL_1 ( &rds, 1,
01145                             dma_addr, virt_to_bus ( iobuf->data ) );
01146 
01147                 /* Record I/O buffer */
01148                 assert ( phantom->rds_iobuf[handle] == NULL );
01149                 phantom->rds_iobuf[handle] = iobuf;
01150 
01151                 /* Post descriptor */
01152                 phantom_post_rds ( phantom, &rds );
01153         }
01154 }
01155 
01156 /**
01157  * Open NIC
01158  *
01159  * @v netdev            Net device
01160  * @ret rc              Return status code
01161  */
01162 static int phantom_open ( struct net_device *netdev ) {
01163         struct phantom_nic *phantom = netdev_priv ( netdev );
01164         int rc;
01165 
01166         /* Allocate and zero descriptor rings */
01167         phantom->desc = malloc_dma ( sizeof ( *(phantom->desc) ),
01168                                           UNM_DMA_BUFFER_ALIGN );
01169         if ( ! phantom->desc ) {
01170                 rc = -ENOMEM;
01171                 goto err_alloc_desc;
01172         }
01173         memset ( phantom->desc, 0, sizeof ( *(phantom->desc) ) );
01174 
01175         /* Create RX context */
01176         if ( ( rc = phantom_create_rx_ctx ( phantom ) ) != 0 )
01177                 goto err_create_rx_ctx;
01178 
01179         /* Create TX context */
01180         if ( ( rc = phantom_create_tx_ctx ( phantom ) ) != 0 )
01181                 goto err_create_tx_ctx;
01182 
01183         /* Fill the RX descriptor ring */
01184         phantom_refill_rx_ring ( netdev );
01185 
01186         /* Add MAC addresses
01187          *
01188          * BUG5583
01189          *
01190          * We would like to be able to enable receiving all multicast
01191          * packets (or, failing that, promiscuous mode), but the
01192          * firmware doesn't currently support this.
01193          */
01194         if ( ( rc = phantom_add_macaddr ( phantom,
01195                                           netdev->ll_broadcast ) ) != 0 )
01196                 goto err_add_macaddr_broadcast;
01197         if ( ( rc = phantom_add_macaddr ( phantom,
01198                                           netdev->ll_addr ) ) != 0 )
01199                 goto err_add_macaddr_unicast;
01200 
01201         return 0;
01202 
01203         phantom_del_macaddr ( phantom, netdev->ll_addr );
01204  err_add_macaddr_unicast:
01205         phantom_del_macaddr ( phantom, netdev->ll_broadcast );
01206  err_add_macaddr_broadcast:
01207         phantom_destroy_tx_ctx ( phantom );
01208  err_create_tx_ctx:
01209         phantom_destroy_rx_ctx ( phantom );
01210  err_create_rx_ctx:
01211         free_dma ( phantom->desc, sizeof ( *(phantom->desc) ) );
01212         phantom->desc = NULL;
01213  err_alloc_desc:
01214         return rc;
01215 }
01216 
01217 /**
01218  * Close NIC
01219  *
01220  * @v netdev            Net device
01221  */
01222 static void phantom_close ( struct net_device *netdev ) {
01223         struct phantom_nic *phantom = netdev_priv ( netdev );
01224         struct io_buffer *iobuf;
01225         unsigned int i;
01226 
01227         /* Shut down the port */
01228         phantom_del_macaddr ( phantom, netdev->ll_addr );
01229         phantom_del_macaddr ( phantom, netdev->ll_broadcast );
01230         phantom_destroy_tx_ctx ( phantom );
01231         phantom_destroy_rx_ctx ( phantom );
01232         free_dma ( phantom->desc, sizeof ( *(phantom->desc) ) );
01233         phantom->desc = NULL;
01234 
01235         /* Flush any uncompleted descriptors */
01236         for ( i = 0 ; i < PHN_RDS_MAX_FILL ; i++ ) {
01237                 iobuf = phantom->rds_iobuf[i];
01238                 if ( iobuf ) {
01239                         free_iob ( iobuf );
01240                         phantom->rds_iobuf[i] = NULL;
01241                 }
01242         }
01243         for ( i = 0 ; i < PHN_NUM_CDS ; i++ ) {
01244                 iobuf = phantom->cds_iobuf[i];
01245                 if ( iobuf ) {
01246                         netdev_tx_complete_err ( netdev, iobuf, -ECANCELED );
01247                         phantom->cds_iobuf[i] = NULL;
01248                 }
01249         }
01250 }
01251 
01252 /** 
01253  * Transmit packet
01254  *
01255  * @v netdev    Network device
01256  * @v iobuf     I/O buffer
01257  * @ret rc      Return status code
01258  */
01259 static int phantom_transmit ( struct net_device *netdev,
01260                               struct io_buffer *iobuf ) {
01261         struct phantom_nic *phantom = netdev_priv ( netdev );
01262         union phantom_cds cds;
01263         int index;
01264 
01265         /* Get descriptor ring entry */
01266         index = phantom_alloc_cds ( phantom );
01267         if ( index < 0 )
01268                 return index;
01269 
01270         /* Fill descriptor ring entry */
01271         memset ( &cds, 0, sizeof ( cds ) );
01272         NX_FILL_3 ( &cds, 0,
01273                     tx.opcode, UNM_TX_ETHER_PKT,
01274                     tx.num_buffers, 1,
01275                     tx.length, iob_len ( iobuf ) );
01276         NX_FILL_2 ( &cds, 2,
01277                     tx.port, phantom->port,
01278                     tx.context_id, phantom->port );
01279         NX_FILL_1 ( &cds, 4,
01280                     tx.buffer1_dma_addr, virt_to_bus ( iobuf->data ) );
01281         NX_FILL_1 ( &cds, 5,
01282                     tx.buffer1_length, iob_len ( iobuf ) );
01283 
01284         /* Record I/O buffer */
01285         assert ( phantom->cds_iobuf[index] == NULL );
01286         phantom->cds_iobuf[index] = iobuf;
01287 
01288         /* Post descriptor */
01289         phantom_post_cds ( phantom, &cds );
01290 
01291         return 0;
01292 }
01293 
01294 /**
01295  * Poll for received packets
01296  *
01297  * @v netdev    Network device
01298  */
01299 static void phantom_poll ( struct net_device *netdev ) {
01300         struct phantom_nic *phantom = netdev_priv ( netdev );
01301         struct io_buffer *iobuf;
01302         unsigned int irq_vector;
01303         unsigned int irq_state;
01304         unsigned int cds_consumer_idx;
01305         unsigned int raw_new_cds_consumer_idx;
01306         unsigned int new_cds_consumer_idx;
01307         unsigned int rds_consumer_idx;
01308         unsigned int sds_consumer_idx;
01309         struct phantom_sds *sds;
01310         unsigned int sds_handle;
01311         unsigned int sds_opcode;
01312 
01313         /* Occasionally poll the link state */
01314         if ( phantom->link_poll_timer-- == 0 ) {
01315                 phantom_poll_link_state ( netdev );
01316                 /* Reset the link poll timer */
01317                 phantom->link_poll_timer = PHN_LINK_POLL_FREQUENCY;
01318         }
01319 
01320         /* Check for interrupts */
01321         if ( phantom->sds_irq_enabled ) {
01322 
01323                 /* Do nothing unless an interrupt is asserted */
01324                 irq_vector = phantom_readl ( phantom, UNM_PCIE_IRQ_VECTOR );
01325                 if ( ! ( irq_vector & UNM_PCIE_IRQ_VECTOR_BIT( phantom->port )))
01326                         return;
01327 
01328                 /* Do nothing unless interrupt state machine has stabilised */
01329                 irq_state = phantom_readl ( phantom, UNM_PCIE_IRQ_STATE );
01330                 if ( ! UNM_PCIE_IRQ_STATE_TRIGGERED ( irq_state ) )
01331                         return;
01332 
01333                 /* Acknowledge interrupt */
01334                 phantom_writel ( phantom, UNM_PCIE_IRQ_STATUS_MAGIC,
01335                                  phantom_irq_status_reg[phantom->port] );
01336                 phantom_readl ( phantom, UNM_PCIE_IRQ_VECTOR );
01337         }
01338 
01339         /* Check for TX completions */
01340         cds_consumer_idx = phantom->cds_consumer_idx;
01341         raw_new_cds_consumer_idx = phantom->desc->cmd_cons;
01342         new_cds_consumer_idx = le32_to_cpu ( raw_new_cds_consumer_idx );
01343         while ( cds_consumer_idx != new_cds_consumer_idx ) {
01344                 DBGC2 ( phantom, "Phantom %p CDS %d complete\n",
01345                         phantom, cds_consumer_idx );
01346                 /* Completions may be for commands other than TX, so
01347                  * there may not always be an associated I/O buffer.
01348                  */
01349                 if ( ( iobuf = phantom->cds_iobuf[cds_consumer_idx] ) ) {
01350                         netdev_tx_complete ( netdev, iobuf );
01351                         phantom->cds_iobuf[cds_consumer_idx] = NULL;
01352                 }
01353                 cds_consumer_idx = ( ( cds_consumer_idx + 1 ) % PHN_NUM_CDS );
01354                 phantom->cds_consumer_idx = cds_consumer_idx;
01355         }
01356 
01357         /* Check for received packets */
01358         rds_consumer_idx = phantom->rds_consumer_idx;
01359         sds_consumer_idx = phantom->sds_consumer_idx;
01360         while ( 1 ) {
01361                 sds = &phantom->desc->sds[sds_consumer_idx];
01362                 if ( NX_GET ( sds, owner ) == 0 )
01363                         break;
01364 
01365                 DBGC2 ( phantom, "Phantom %p SDS %d status:\n",
01366                         phantom, sds_consumer_idx );
01367                 DBGC2_HDA ( phantom, virt_to_bus ( sds ), sds, sizeof (*sds) );
01368 
01369                 /* Check received opcode */
01370                 sds_opcode = NX_GET ( sds, opcode );
01371                 if ( ( sds_opcode == UNM_RXPKT_DESC ) ||
01372                      ( sds_opcode == UNM_SYN_OFFLOAD ) ) {
01373 
01374                         /* Sanity check: ensure that all of the SDS
01375                          * descriptor has been written.
01376                          */
01377                         if ( NX_GET ( sds, total_length ) == 0 ) {
01378                                 DBGC ( phantom, "Phantom %p SDS %d "
01379                                        "incomplete; deferring\n",
01380                                        phantom, sds_consumer_idx );
01381                                 /* Leave for next poll() */
01382                                 break;
01383                         }
01384 
01385                         /* Process received packet */
01386                         sds_handle = NX_GET ( sds, handle );
01387                         iobuf = phantom->rds_iobuf[sds_handle];
01388                         assert ( iobuf != NULL );
01389                         iob_put ( iobuf, NX_GET ( sds, total_length ) );
01390                         iob_pull ( iobuf, NX_GET ( sds, pkt_offset ) );
01391                         DBGC2 ( phantom, "Phantom %p RDS %d complete\n",
01392                                 phantom, sds_handle );
01393                         netdev_rx ( netdev, iobuf );
01394                         phantom->rds_iobuf[sds_handle] = NULL;
01395 
01396                         /* Update RDS consumer counter.  This is a
01397                          * lower bound for the number of descriptors
01398                          * that have been read by the hardware, since
01399                          * the hardware must have read at least one
01400                          * descriptor for each completion that we
01401                          * receive.
01402                          */
01403                         rds_consumer_idx =
01404                                 ( ( rds_consumer_idx + 1 ) % PHN_NUM_RDS );
01405                         phantom->rds_consumer_idx = rds_consumer_idx;
01406 
01407                 } else {
01408 
01409                         DBGC ( phantom, "Phantom %p unexpected SDS opcode "
01410                                "%02x\n", phantom, sds_opcode );
01411                         DBGC_HDA ( phantom, virt_to_bus ( sds ),
01412                                    sds, sizeof ( *sds ) );
01413                 }
01414                         
01415                 /* Clear status descriptor */
01416                 memset ( sds, 0, sizeof ( *sds ) );
01417 
01418                 /* Update SDS consumer index */
01419                 sds_consumer_idx = ( ( sds_consumer_idx + 1 ) % PHN_NUM_SDS );
01420                 phantom->sds_consumer_idx = sds_consumer_idx;
01421                 wmb();
01422                 phantom_writel ( phantom, phantom->sds_consumer_idx,
01423                                  phantom->sds_consumer_crb );
01424         }
01425 
01426         /* Refill the RX descriptor ring */
01427         phantom_refill_rx_ring ( netdev );
01428 }
01429 
01430 /**
01431  * Enable/disable interrupts
01432  *
01433  * @v netdev    Network device
01434  * @v enable    Interrupts should be enabled
01435  */
01436 static void phantom_irq ( struct net_device *netdev, int enable ) {
01437         struct phantom_nic *phantom = netdev_priv ( netdev );
01438 
01439         phantom_writel ( phantom, ( enable ? 1 : 0 ),
01440                          phantom->sds_irq_mask_crb );
01441         phantom_writel ( phantom, UNM_PCIE_IRQ_MASK_MAGIC,
01442                          phantom_irq_mask_reg[phantom->port] );
01443         phantom->sds_irq_enabled = enable;
01444 }
01445 
01446 /** Phantom net device operations */
01447 static struct net_device_operations phantom_operations = {
01448         .open           = phantom_open,
01449         .close          = phantom_close,
01450         .transmit       = phantom_transmit,
01451         .poll           = phantom_poll,
01452         .irq            = phantom_irq,
01453 };
01454 
01455 /***************************************************************************
01456  *
01457  * CLP settings
01458  *
01459  */
01460 
01461 /** Phantom CLP settings scope */
01462 static const struct settings_scope phantom_settings_scope;
01463 
01464 /** Phantom CLP data
01465  *
01466  */
01467 union phantom_clp_data {
01468         /** Data bytes
01469          *
01470          * This field is right-aligned; if only N bytes are present
01471          * then bytes[0]..bytes[7-N] should be zero, and the data
01472          * should be in bytes[7-N+1] to bytes[7];
01473          */
01474         uint8_t bytes[8];
01475         /** Dwords for the CLP interface */
01476         struct {
01477                 /** High dword, in network byte order */
01478                 uint32_t hi;
01479                 /** Low dword, in network byte order */
01480                 uint32_t lo;
01481         } dwords;
01482 };
01483 #define PHN_CLP_BLKSIZE ( sizeof ( union phantom_clp_data ) )
01484 
01485 /**
01486  * Wait for Phantom CLP command to complete
01487  *
01488  * @v phantom           Phantom NIC
01489  * @ret rc              Return status code
01490  */
01491 static int phantom_clp_wait ( struct phantom_nic *phantom ) {
01492         unsigned int retries;
01493         uint32_t status;
01494 
01495         for ( retries = 0 ; retries < PHN_CLP_CMD_TIMEOUT_MS ; retries++ ) {
01496                 status = phantom_readl ( phantom, UNM_CAM_RAM_CLP_STATUS );
01497                 if ( status & UNM_CAM_RAM_CLP_STATUS_DONE )
01498                         return 0;
01499                 mdelay ( 1 );
01500         }
01501 
01502         DBGC ( phantom, "Phantom %p timed out waiting for CLP command\n",
01503                phantom );
01504         return -ETIMEDOUT;
01505 }
01506 
01507 /**
01508  * Issue Phantom CLP command
01509  *
01510  * @v phantom           Phantom NIC
01511  * @v port              Virtual port number
01512  * @v opcode            Opcode
01513  * @v data_in           Data in, or NULL
01514  * @v data_out          Data out, or NULL
01515  * @v offset            Offset within data
01516  * @v len               Data buffer length
01517  * @ret len             Total transfer length (for reads), or negative error
01518  */
01519 static int phantom_clp_cmd ( struct phantom_nic *phantom, unsigned int port,
01520                              unsigned int opcode, const void *data_in,
01521                              void *data_out, size_t offset, size_t len ) {
01522         union phantom_clp_data data;
01523         unsigned int index = ( offset / sizeof ( data ) );
01524         unsigned int last = 0;
01525         size_t in_frag_len;
01526         uint8_t *in_frag;
01527         uint32_t command;
01528         uint32_t status;
01529         size_t read_len;
01530         unsigned int error;
01531         size_t out_frag_len;
01532         uint8_t *out_frag;
01533         int rc;
01534 
01535         /* Sanity checks */
01536         assert ( ( offset % sizeof ( data ) ) == 0 );
01537         if ( len > 255 ) {
01538                 DBGC ( phantom, "Phantom %p invalid CLP length %zd\n",
01539                        phantom, len );
01540                 return -EINVAL;
01541         }
01542 
01543         /* Check that CLP interface is ready */
01544         if ( ( rc = phantom_clp_wait ( phantom ) ) != 0 )
01545                 return rc;
01546 
01547         /* Copy data in */
01548         memset ( &data, 0, sizeof ( data ) );
01549         if ( data_in ) {
01550                 assert ( offset < len );
01551                 in_frag_len = ( len - offset );
01552                 if ( in_frag_len > sizeof ( data ) ) {
01553                         in_frag_len = sizeof ( data );
01554                 } else {
01555                         last = 1;
01556                 }
01557                 in_frag = &data.bytes[ sizeof ( data ) - in_frag_len ];
01558                 memcpy ( in_frag, ( data_in + offset ), in_frag_len );
01559                 phantom_writel ( phantom, be32_to_cpu ( data.dwords.lo ),
01560                                  UNM_CAM_RAM_CLP_DATA_LO );
01561                 phantom_writel ( phantom, be32_to_cpu ( data.dwords.hi ),
01562                                  UNM_CAM_RAM_CLP_DATA_HI );
01563         }
01564 
01565         /* Issue CLP command */
01566         command = ( ( index << 24 ) | ( ( data_in ? len : 0 ) << 16 ) |
01567                     ( port << 8 ) | ( last << 7 ) | ( opcode << 0 ) );
01568         phantom_writel ( phantom, command, UNM_CAM_RAM_CLP_COMMAND );
01569         mb();
01570         phantom_writel ( phantom, UNM_CAM_RAM_CLP_STATUS_START,
01571                          UNM_CAM_RAM_CLP_STATUS );
01572 
01573         /* Wait for command to complete */
01574         if ( ( rc = phantom_clp_wait ( phantom ) ) != 0 )
01575                 return rc;
01576 
01577         /* Get command status */
01578         status = phantom_readl ( phantom, UNM_CAM_RAM_CLP_STATUS );
01579         read_len = ( ( status >> 16 ) & 0xff );
01580         error = ( ( status >> 8 ) & 0xff );
01581         if ( error ) {
01582                 DBGC ( phantom, "Phantom %p CLP command error %02x\n",
01583                        phantom, error );
01584                 return -EIO;
01585         }
01586 
01587         /* Copy data out */
01588         if ( data_out ) {
01589                 data.dwords.lo = cpu_to_be32 ( phantom_readl ( phantom,
01590                                                   UNM_CAM_RAM_CLP_DATA_LO ) );
01591                 data.dwords.hi = cpu_to_be32 ( phantom_readl ( phantom,
01592                                                   UNM_CAM_RAM_CLP_DATA_HI ) );
01593                 out_frag_len = ( read_len - offset );
01594                 if ( out_frag_len > sizeof ( data ) )
01595                         out_frag_len = sizeof ( data );
01596                 out_frag = &data.bytes[ sizeof ( data ) - out_frag_len ];
01597                 if ( out_frag_len > ( len - offset ) )
01598                         out_frag_len = ( len - offset );
01599                 memcpy ( ( data_out + offset ), out_frag, out_frag_len );
01600         }
01601 
01602         return read_len;
01603 }
01604 
01605 /**
01606  * Store Phantom CLP setting
01607  *
01608  * @v phantom           Phantom NIC
01609  * @v port              Virtual port number
01610  * @v setting           Setting number
01611  * @v data              Data buffer
01612  * @v len               Length of data buffer
01613  * @ret rc              Return status code
01614  */
01615 static int phantom_clp_store ( struct phantom_nic *phantom, unsigned int port,
01616                                unsigned int setting, const void *data,
01617                                size_t len ) {
01618         unsigned int opcode = setting;
01619         size_t offset;
01620         int rc;
01621 
01622         for ( offset = 0 ; offset < len ; offset += PHN_CLP_BLKSIZE ) {
01623                 if ( ( rc = phantom_clp_cmd ( phantom, port, opcode, data,
01624                                               NULL, offset, len ) ) < 0 )
01625                         return rc;
01626         }
01627         return 0;
01628 }
01629 
01630 /**
01631  * Fetch Phantom CLP setting
01632  *
01633  * @v phantom           Phantom NIC
01634  * @v port              Virtual port number
01635  * @v setting           Setting number
01636  * @v data              Data buffer
01637  * @v len               Length of data buffer
01638  * @ret len             Length of setting, or negative error
01639  */
01640 static int phantom_clp_fetch ( struct phantom_nic *phantom, unsigned int port,
01641                                unsigned int setting, void *data, size_t len ) {
01642         unsigned int opcode = ( setting + 1 );
01643         size_t offset = 0;
01644         int read_len;
01645 
01646         while ( 1 ) {
01647                 read_len = phantom_clp_cmd ( phantom, port, opcode, NULL,
01648                                              data, offset, len );
01649                 if ( read_len < 0 )
01650                         return read_len;
01651                 offset += PHN_CLP_BLKSIZE;
01652                 if ( offset >= ( unsigned ) read_len )
01653                         break;
01654                 if ( offset >= len )
01655                         break;
01656         }
01657         return read_len;
01658 }
01659 
01660 /** A Phantom CLP setting */
01661 struct phantom_clp_setting {
01662         /** iPXE setting */
01663         const struct setting *setting;
01664         /** Setting number */
01665         unsigned int clp_setting;
01666 };
01667 
01668 /** Phantom CLP settings */
01669 static struct phantom_clp_setting clp_settings[] = {
01670         { &mac_setting, 0x01 },
01671 };
01672 
01673 /**
01674  * Find Phantom CLP setting
01675  *
01676  * @v setting           iPXE setting
01677  * @v clp_setting       Setting number, or 0 if not found
01678  */
01679 static unsigned int
01680 phantom_clp_setting ( struct phantom_nic *phantom,
01681                       const struct setting *setting ) {
01682         struct phantom_clp_setting *clp_setting;
01683         unsigned int i;
01684 
01685         /* Search the list of explicitly-defined settings */
01686         for ( i = 0 ; i < ( sizeof ( clp_settings ) /
01687                             sizeof ( clp_settings[0] ) ) ; i++ ) {
01688                 clp_setting = &clp_settings[i];
01689                 if ( setting_cmp ( setting, clp_setting->setting ) == 0 )
01690                         return clp_setting->clp_setting;
01691         }
01692 
01693         /* Allow for use of numbered settings */
01694         if ( setting->scope == &phantom_settings_scope )
01695                 return setting->tag;
01696 
01697         DBGC2 ( phantom, "Phantom %p has no \"%s\" setting\n",
01698                 phantom, setting->name );
01699 
01700         return 0;
01701 }
01702 
01703 /**
01704  * Check applicability of Phantom CLP setting
01705  *
01706  * @v settings          Settings block
01707  * @v setting           Setting
01708  * @ret applies         Setting applies within this settings block
01709  */
01710 static int phantom_setting_applies ( struct settings *settings,
01711                                      const struct setting *setting ) {
01712         struct phantom_nic *phantom =
01713                 container_of ( settings, struct phantom_nic, settings );
01714         unsigned int clp_setting;
01715 
01716         /* Find Phantom setting equivalent to iPXE setting */
01717         clp_setting = phantom_clp_setting ( phantom, setting );
01718         return ( clp_setting != 0 );
01719 }
01720 
01721 /**
01722  * Store Phantom CLP setting
01723  *
01724  * @v settings          Settings block
01725  * @v setting           Setting to store
01726  * @v data              Setting data, or NULL to clear setting
01727  * @v len               Length of setting data
01728  * @ret rc              Return status code
01729  */
01730 static int phantom_store_setting ( struct settings *settings,
01731                                    const struct setting *setting,
01732                                    const void *data, size_t len ) {
01733         struct phantom_nic *phantom =
01734                 container_of ( settings, struct phantom_nic, settings );
01735         unsigned int clp_setting;
01736         int rc;
01737 
01738         /* Find Phantom setting equivalent to iPXE setting */
01739         clp_setting = phantom_clp_setting ( phantom, setting );
01740         assert ( clp_setting != 0 );
01741 
01742         /* Store setting */
01743         if ( ( rc = phantom_clp_store ( phantom, phantom->port,
01744                                         clp_setting, data, len ) ) != 0 ) {
01745                 DBGC ( phantom, "Phantom %p could not store setting \"%s\": "
01746                        "%s\n", phantom, setting->name, strerror ( rc ) );
01747                 return rc;
01748         }
01749 
01750         return 0;
01751 }
01752 
01753 /**
01754  * Fetch Phantom CLP setting
01755  *
01756  * @v settings          Settings block
01757  * @v setting           Setting to fetch
01758  * @v data              Buffer to fill with setting data
01759  * @v len               Length of buffer
01760  * @ret len             Length of setting data, or negative error
01761  */
01762 static int phantom_fetch_setting ( struct settings *settings,
01763                                    struct setting *setting,
01764                                    void *data, size_t len ) {
01765         struct phantom_nic *phantom =
01766                 container_of ( settings, struct phantom_nic, settings );
01767         unsigned int clp_setting;
01768         int read_len;
01769         int rc;
01770 
01771         /* Find Phantom setting equivalent to iPXE setting */
01772         clp_setting = phantom_clp_setting ( phantom, setting );
01773         assert ( clp_setting != 0 );
01774 
01775         /* Fetch setting */
01776         if ( ( read_len = phantom_clp_fetch ( phantom, phantom->port,
01777                                               clp_setting, data, len ) ) < 0 ){
01778                 rc = read_len;
01779                 DBGC ( phantom, "Phantom %p could not fetch setting \"%s\": "
01780                        "%s\n", phantom, setting->name, strerror ( rc ) );
01781                 return rc;
01782         }
01783 
01784         return read_len;
01785 }
01786 
01787 /** Phantom CLP settings operations */
01788 static struct settings_operations phantom_settings_operations = {
01789         .applies        = phantom_setting_applies,
01790         .store          = phantom_store_setting,
01791         .fetch          = phantom_fetch_setting,
01792 };
01793 
01794 /***************************************************************************
01795  *
01796  * Initialisation
01797  *
01798  */
01799 
01800 /**
01801  * Map Phantom CRB window
01802  *
01803  * @v phantom           Phantom NIC
01804  * @ret rc              Return status code
01805  */
01806 static int phantom_map_crb ( struct phantom_nic *phantom,
01807                              struct pci_device *pci ) {
01808         unsigned long bar0_start;
01809         unsigned long bar0_size;
01810 
01811         bar0_start = pci_bar_start ( pci, PCI_BASE_ADDRESS_0 );
01812         bar0_size = pci_bar_size ( pci, PCI_BASE_ADDRESS_0 );
01813         DBGC ( phantom, "Phantom %p is " PCI_FMT " with BAR0 at %08lx+%lx\n",
01814                phantom, PCI_ARGS ( pci ), bar0_start, bar0_size );
01815 
01816         if ( ! bar0_start ) {
01817                 DBGC ( phantom, "Phantom %p BAR not assigned; ignoring\n",
01818                        phantom );
01819                 return -EINVAL;
01820         }
01821 
01822         switch ( bar0_size ) {
01823         case ( 128 * 1024 * 1024 ) :
01824                 DBGC ( phantom, "Phantom %p has 128MB BAR\n", phantom );
01825                 phantom->crb_access = phantom_crb_access_128m;
01826                 break;
01827         case ( 32 * 1024 * 1024 ) :
01828                 DBGC ( phantom, "Phantom %p has 32MB BAR\n", phantom );
01829                 phantom->crb_access = phantom_crb_access_32m;
01830                 break;
01831         case ( 2 * 1024 * 1024 ) :
01832                 DBGC ( phantom, "Phantom %p has 2MB BAR\n", phantom );
01833                 phantom->crb_access = phantom_crb_access_2m;
01834                 break;
01835         default:
01836                 DBGC ( phantom, "Phantom %p has bad BAR size\n", phantom );
01837                 return -EINVAL;
01838         }
01839 
01840         phantom->bar0 = ioremap ( bar0_start, bar0_size );
01841         if ( ! phantom->bar0 ) {
01842                 DBGC ( phantom, "Phantom %p could not map BAR0\n", phantom );
01843                 return -EIO;
01844         }
01845 
01846         /* Mark current CRB window as invalid, so that the first
01847          * read/write will set the current window.
01848          */
01849         phantom->crb_window = -1UL;
01850 
01851         return 0;
01852 }
01853 
01854 /**
01855  * Unhalt all PEGs
01856  *
01857  * @v phantom           Phantom NIC
01858  */
01859 static void phantom_unhalt_pegs ( struct phantom_nic *phantom ) {
01860         uint32_t halt_status;
01861 
01862         halt_status = phantom_readl ( phantom, UNM_PEG_0_HALT_STATUS );
01863         phantom_writel ( phantom, halt_status, UNM_PEG_0_HALT_STATUS );
01864         halt_status = phantom_readl ( phantom, UNM_PEG_1_HALT_STATUS );
01865         phantom_writel ( phantom, halt_status, UNM_PEG_1_HALT_STATUS );
01866         halt_status = phantom_readl ( phantom, UNM_PEG_2_HALT_STATUS );
01867         phantom_writel ( phantom, halt_status, UNM_PEG_2_HALT_STATUS );
01868         halt_status = phantom_readl ( phantom, UNM_PEG_3_HALT_STATUS );
01869         phantom_writel ( phantom, halt_status, UNM_PEG_3_HALT_STATUS );
01870         halt_status = phantom_readl ( phantom, UNM_PEG_4_HALT_STATUS );
01871         phantom_writel ( phantom, halt_status, UNM_PEG_4_HALT_STATUS );
01872 }
01873 
01874 /**
01875  * Initialise the Phantom command PEG
01876  *
01877  * @v phantom           Phantom NIC
01878  * @ret rc              Return status code
01879  */
01880 static int phantom_init_cmdpeg ( struct phantom_nic *phantom ) {
01881         uint32_t cold_boot;
01882         uint32_t sw_reset;
01883         unsigned int retries;
01884         uint32_t cmdpeg_state;
01885         uint32_t last_cmdpeg_state = 0;
01886 
01887         /* Check for a previous initialisation.  This could have
01888          * happened if, for example, the BIOS used the UNDI API to
01889          * drive the NIC prior to a full PXE boot.
01890          */
01891         cmdpeg_state = phantom_readl ( phantom, UNM_NIC_REG_CMDPEG_STATE );
01892         if ( cmdpeg_state == UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK ) {
01893                 DBGC ( phantom, "Phantom %p command PEG already initialized\n",
01894                        phantom );
01895                 /* Unhalt the PEGs.  Previous firmware (e.g. BOFM) may
01896                  * have halted the PEGs to prevent internal bus
01897                  * collisions when the BIOS re-reads the expansion ROM.
01898                  */
01899                 phantom_unhalt_pegs ( phantom );
01900                 return 0;
01901         }
01902 
01903         /* If this was a cold boot, check that the hardware came up ok */
01904         cold_boot = phantom_readl ( phantom, UNM_CAM_RAM_COLD_BOOT );
01905         if ( cold_boot == UNM_CAM_RAM_COLD_BOOT_MAGIC ) {
01906                 DBGC ( phantom, "Phantom %p coming up from cold boot\n",
01907                        phantom );
01908                 sw_reset = phantom_readl ( phantom, UNM_ROMUSB_GLB_SW_RESET );
01909                 if ( sw_reset != UNM_ROMUSB_GLB_SW_RESET_MAGIC ) {
01910                         DBGC ( phantom, "Phantom %p reset failed: %08x\n",
01911                                phantom, sw_reset );
01912                         return -EIO;
01913                 }
01914         } else {
01915                 DBGC ( phantom, "Phantom %p coming up from warm boot "
01916                        "(%08x)\n", phantom, cold_boot );
01917         }
01918         /* Clear cold-boot flag */
01919         phantom_writel ( phantom, 0, UNM_CAM_RAM_COLD_BOOT );
01920 
01921         /* Set port modes */
01922         phantom_writel ( phantom, UNM_CAM_RAM_PORT_MODE_AUTO_NEG_1G,
01923                          UNM_CAM_RAM_WOL_PORT_MODE );
01924 
01925         /* Pass dummy DMA area to card */
01926         phantom_write_hilo ( phantom, 0,
01927                              UNM_NIC_REG_DUMMY_BUF_ADDR_LO,
01928                              UNM_NIC_REG_DUMMY_BUF_ADDR_HI );
01929         phantom_writel ( phantom, UNM_NIC_REG_DUMMY_BUF_INIT,
01930                          UNM_NIC_REG_DUMMY_BUF );
01931 
01932         /* Tell the hardware that tuning is complete */
01933         phantom_writel ( phantom, UNM_ROMUSB_GLB_PEGTUNE_DONE_MAGIC,
01934                          UNM_ROMUSB_GLB_PEGTUNE_DONE );
01935 
01936         /* Wait for command PEG to finish initialising */
01937         DBGC ( phantom, "Phantom %p initialising command PEG (will take up to "
01938                "%d seconds)...\n", phantom, PHN_CMDPEG_INIT_TIMEOUT_SEC );
01939         for ( retries = 0; retries < PHN_CMDPEG_INIT_TIMEOUT_SEC; retries++ ) {
01940                 cmdpeg_state = phantom_readl ( phantom,
01941                                                UNM_NIC_REG_CMDPEG_STATE );
01942                 if ( cmdpeg_state != last_cmdpeg_state ) {
01943                         DBGC ( phantom, "Phantom %p command PEG state is "
01944                                "%08x after %d seconds...\n",
01945                                phantom, cmdpeg_state, retries );
01946                         last_cmdpeg_state = cmdpeg_state;
01947                 }
01948                 if ( cmdpeg_state == UNM_NIC_REG_CMDPEG_STATE_INITIALIZED ) {
01949                         /* Acknowledge the PEG initialisation */
01950                         phantom_writel ( phantom,
01951                                        UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK,
01952                                        UNM_NIC_REG_CMDPEG_STATE );
01953                         return 0;
01954                 }
01955                 mdelay ( 1000 );
01956         }
01957 
01958         DBGC ( phantom, "Phantom %p timed out waiting for command PEG to "
01959                "initialise (status %08x)\n", phantom, cmdpeg_state );
01960         return -ETIMEDOUT;
01961 }
01962 
01963 /**
01964  * Read Phantom MAC address
01965  *
01966  * @v phanton_port      Phantom NIC
01967  * @v hw_addr           Buffer to fill with MAC address
01968  */
01969 static void phantom_get_macaddr ( struct phantom_nic *phantom,
01970                                   uint8_t *hw_addr ) {
01971         union {
01972                 uint8_t mac_addr[2][ETH_ALEN];
01973                 uint32_t dwords[3];
01974         } u;
01975         unsigned long offset;
01976         int i;
01977 
01978         /* Read the three dwords that include this MAC address and one other */
01979         offset = ( UNM_CAM_RAM_MAC_ADDRS +
01980                    ( 12 * ( phantom->port / 2 ) ) );
01981         for ( i = 0 ; i < 3 ; i++, offset += 4 ) {
01982                 u.dwords[i] = phantom_readl ( phantom, offset );
01983         }
01984 
01985         /* Copy out the relevant MAC address */
01986         for ( i = 0 ; i < ETH_ALEN ; i++ ) {
01987                 hw_addr[ ETH_ALEN - i - 1 ] =
01988                         u.mac_addr[ phantom->port & 1 ][i];
01989         }
01990         DBGC ( phantom, "Phantom %p MAC address is %s\n",
01991                phantom, eth_ntoa ( hw_addr ) );
01992 }
01993 
01994 /**
01995  * Check Phantom is enabled for boot
01996  *
01997  * @v phanton_port      Phantom NIC
01998  * @ret rc              Return status code
01999  *
02000  * This is something of an ugly hack to accommodate an OEM
02001  * requirement.  The NIC has only one expansion ROM BAR, rather than
02002  * one per port.  To allow individual ports to be selectively
02003  * enabled/disabled for PXE boot (as required), we must therefore
02004  * leave the expansion ROM always enabled, and place the per-port
02005  * enable/disable logic within the iPXE driver.
02006  */
02007 static int phantom_check_boot_enable ( struct phantom_nic *phantom ) {
02008         unsigned long boot_enable;
02009 
02010         boot_enable = phantom_readl ( phantom, UNM_CAM_RAM_BOOT_ENABLE );
02011         if ( ! ( boot_enable & ( 1 << phantom->port ) ) ) {
02012                 DBGC ( phantom, "Phantom %p PXE boot is disabled\n",
02013                        phantom );
02014                 return -ENOTSUP;
02015         }
02016 
02017         return 0;
02018 }
02019 
02020 /**
02021  * Initialise Phantom receive PEG
02022  *
02023  * @v phantom           Phantom NIC
02024  * @ret rc              Return status code
02025  */
02026 static int phantom_init_rcvpeg ( struct phantom_nic *phantom ) {
02027         unsigned int retries;
02028         uint32_t rcvpeg_state;
02029         uint32_t last_rcvpeg_state = 0;
02030 
02031         DBGC ( phantom, "Phantom %p initialising receive PEG (will take up to "
02032                "%d seconds)...\n", phantom, PHN_RCVPEG_INIT_TIMEOUT_SEC );
02033         for ( retries = 0; retries < PHN_RCVPEG_INIT_TIMEOUT_SEC; retries++ ) {
02034                 rcvpeg_state = phantom_readl ( phantom,
02035                                                UNM_NIC_REG_RCVPEG_STATE );
02036                 if ( rcvpeg_state != last_rcvpeg_state ) {
02037                         DBGC ( phantom, "Phantom %p receive PEG state is "
02038                                "%08x after %d seconds...\n",
02039                                phantom, rcvpeg_state, retries );
02040                         last_rcvpeg_state = rcvpeg_state;
02041                 }
02042                 if ( rcvpeg_state == UNM_NIC_REG_RCVPEG_STATE_INITIALIZED )
02043                         return 0;
02044                 mdelay ( 1000 );
02045         }
02046 
02047         DBGC ( phantom, "Phantom %p timed out waiting for receive PEG to "
02048                "initialise (status %08x)\n", phantom, rcvpeg_state );
02049         return -ETIMEDOUT;
02050 }
02051 
02052 /**
02053  * Probe PCI device
02054  *
02055  * @v pci               PCI device
02056  * @v id                PCI ID
02057  * @ret rc              Return status code
02058  */
02059 static int phantom_probe ( struct pci_device *pci ) {
02060         struct net_device *netdev;
02061         struct phantom_nic *phantom;
02062         struct settings *parent_settings;
02063         unsigned int busdevfn;
02064         int rc;
02065 
02066         /* Allocate Phantom device */
02067         netdev = alloc_etherdev ( sizeof ( *phantom ) );
02068         if ( ! netdev ) {
02069                 rc = -ENOMEM;
02070                 goto err_alloc_etherdev;
02071         }
02072         netdev_init ( netdev, &phantom_operations );
02073         phantom = netdev_priv ( netdev );
02074         pci_set_drvdata ( pci, netdev );
02075         netdev->dev = &pci->dev;
02076         memset ( phantom, 0, sizeof ( *phantom ) );
02077         phantom->port = PCI_FUNC ( pci->busdevfn );
02078         assert ( phantom->port < PHN_MAX_NUM_PORTS );
02079         settings_init ( &phantom->settings,
02080                         &phantom_settings_operations,
02081                         &netdev->refcnt, &phantom_settings_scope );
02082 
02083         /* Fix up PCI device */
02084         adjust_pci_device ( pci );
02085 
02086         /* Map CRB */
02087         if ( ( rc = phantom_map_crb ( phantom, pci ) ) != 0 )
02088                 goto err_map_crb;
02089 
02090         /* BUG5945 - need to hack PCI config space on P3 B1 silicon.
02091          * B2 will have this fixed; remove this hack when B1 is no
02092          * longer in use.
02093          */
02094         busdevfn = pci->busdevfn;
02095         if ( PCI_FUNC ( busdevfn ) == 0 ) {
02096                 unsigned int i;
02097                 for ( i = 0 ; i < 8 ; i++ ) {
02098                         uint32_t temp;
02099                         pci->busdevfn =
02100                                 PCI_BUSDEVFN ( PCI_SEG ( busdevfn ),
02101                                                PCI_BUS ( busdevfn ),
02102                                                PCI_SLOT ( busdevfn ), i );
02103                         pci_read_config_dword ( pci, 0xc8, &temp );
02104                         pci_read_config_dword ( pci, 0xc8, &temp );
02105                         pci_write_config_dword ( pci, 0xc8, 0xf1000 );
02106                 }
02107                 pci->busdevfn = busdevfn;
02108         }
02109 
02110         /* Initialise the command PEG */
02111         if ( ( rc = phantom_init_cmdpeg ( phantom ) ) != 0 )
02112                 goto err_init_cmdpeg;
02113 
02114         /* Initialise the receive PEG */
02115         if ( ( rc = phantom_init_rcvpeg ( phantom ) ) != 0 )
02116                 goto err_init_rcvpeg;
02117 
02118         /* Read MAC addresses */
02119         phantom_get_macaddr ( phantom, netdev->hw_addr );
02120 
02121         /* Skip if boot disabled on NIC */
02122         if ( ( rc = phantom_check_boot_enable ( phantom ) ) != 0 )
02123                 goto err_check_boot_enable;
02124 
02125         /* Register network devices */
02126         if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
02127                 DBGC ( phantom, "Phantom %p could not register net device: "
02128                        "%s\n", phantom, strerror ( rc ) );
02129                 goto err_register_netdev;
02130         }
02131 
02132         /* Register settings blocks */
02133         parent_settings = netdev_settings ( netdev );
02134         if ( ( rc = register_settings ( &phantom->settings,
02135                                         parent_settings, "clp" ) ) != 0 ) {
02136                 DBGC ( phantom, "Phantom %p could not register settings: "
02137                        "%s\n", phantom, strerror ( rc ) );
02138                 goto err_register_settings;
02139         }
02140 
02141         return 0;
02142 
02143         unregister_settings ( &phantom->settings );
02144  err_register_settings:
02145         unregister_netdev ( netdev );
02146  err_register_netdev:
02147  err_check_boot_enable:
02148  err_init_rcvpeg:
02149  err_init_cmdpeg:
02150  err_map_crb:
02151         netdev_nullify ( netdev );
02152         netdev_put ( netdev );
02153  err_alloc_etherdev:
02154         return rc;
02155 }
02156 
02157 /**
02158  * Remove PCI device
02159  *
02160  * @v pci               PCI device
02161  */
02162 static void phantom_remove ( struct pci_device *pci ) {
02163         struct net_device *netdev = pci_get_drvdata ( pci );
02164         struct phantom_nic *phantom = netdev_priv ( netdev );
02165 
02166         unregister_settings ( &phantom->settings );
02167         unregister_netdev ( netdev );
02168         netdev_nullify ( netdev );
02169         netdev_put ( netdev );
02170 }
02171 
02172 /** Phantom PCI IDs */
02173 static struct pci_device_id phantom_nics[] = {
02174         PCI_ROM ( 0x4040, 0x0100, "nx", "NX", 0 ),
02175 };
02176 
02177 /** Phantom PCI driver */
02178 struct pci_driver phantom_driver __pci_driver = {
02179         .ids = phantom_nics,
02180         .id_count = ( sizeof ( phantom_nics ) / sizeof ( phantom_nics[0] ) ),
02181         .probe = phantom_probe,
02182         .remove = phantom_remove,
02183 };