iPXE
phy.h
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00001 /*
00002  * Copyright (c) 2008-2011 Atheros Communications Inc.
00003  *
00004  * Permission to use, copy, modify, and/or distribute this software for any
00005  * purpose with or without fee is hereby granted, provided that the above
00006  * copyright notice and this permission notice appear in all copies.
00007  *
00008  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
00009  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
00010  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
00011  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
00012  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
00013  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
00014  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
00015  */
00016 
00017 #ifndef PHY_H
00018 #define PHY_H
00019 
00020 FILE_LICENCE ( BSD2 );
00021 
00022 #define CHANSEL_DIV             15
00023 #define CHANSEL_2G(_freq)       (((_freq) * 0x10000) / CHANSEL_DIV)
00024 #define CHANSEL_5G(_freq)       (((_freq) * 0x8000) / CHANSEL_DIV)
00025 
00026 #define AR_PHY_BASE     0x9800
00027 #define AR_PHY(_n)      (AR_PHY_BASE + ((_n)<<2))
00028 
00029 #define AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX   0x0007E000
00030 #define AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX_S 13
00031 #define AR_PHY_TX_GAIN_CLC       0x0000001E
00032 #define AR_PHY_TX_GAIN_CLC_S     1
00033 #define AR_PHY_TX_GAIN           0x0007F000
00034 #define AR_PHY_TX_GAIN_S         12
00035 
00036 #define AR_PHY_CLC_TBL1      0xa35c
00037 #define AR_PHY_CLC_I0        0x07ff0000
00038 #define AR_PHY_CLC_I0_S      16
00039 #define AR_PHY_CLC_Q0        0x0000ffd0
00040 #define AR_PHY_CLC_Q0_S      5
00041 
00042 #define ANTSWAP_AB 0x0001
00043 #define REDUCE_CHAIN_0 0x00000050
00044 #define REDUCE_CHAIN_1 0x00000051
00045 #define AR_PHY_CHIP_ID 0x9818
00046 
00047 #define AR_PHY_TIMING11_SPUR_FREQ_SD            0x3FF00000
00048 #define AR_PHY_TIMING11_SPUR_FREQ_SD_S          20
00049 
00050 #define AR_PHY_PLL_CONTROL 0x16180
00051 #define AR_PHY_PLL_MODE 0x16184
00052 
00053 #endif