iPXE
Data Fields
PCI_BRIDGE_CONTROL_REGISTER Struct Reference

PCI-PCI Bridge header region in PCI Configuration Space Section 3.2, PCI-PCI Bridge Architecture, Version 1.2. More...

#include <Pci22.h>

Data Fields

UINT32 Bar [2]
UINT8 PrimaryBus
UINT8 SecondaryBus
UINT8 SubordinateBus
UINT8 SecondaryLatencyTimer
UINT8 IoBase
UINT8 IoLimit
UINT16 SecondaryStatus
UINT16 MemoryBase
UINT16 MemoryLimit
UINT16 PrefetchableMemoryBase
UINT16 PrefetchableMemoryLimit
UINT32 PrefetchableBaseUpper32
UINT32 PrefetchableLimitUpper32
UINT16 IoBaseUpper16
UINT16 IoLimitUpper16
UINT8 CapabilityPtr
UINT8 Reserved [3]
UINT32 ExpansionRomBAR
UINT8 InterruptLine
UINT8 InterruptPin
UINT16 BridgeControl

Detailed Description

PCI-PCI Bridge header region in PCI Configuration Space Section 3.2, PCI-PCI Bridge Architecture, Version 1.2.

Definition at line 82 of file Pci22.h.


Field Documentation

Definition at line 83 of file Pci22.h.

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Definition at line 104 of file Pci22.h.


The documentation for this struct was generated from the following file: