iPXE
Data Fields
PCI_CARDBUS_CONTROL_REGISTER Struct Reference

CardBus Conroller Configuration Space, Section 4.5.1, PC Card Standard. More...

#include <Pci22.h>

Data Fields

UINT32 CardBusSocketReg
 Cardus Socket/ExCA Base.
UINT8 Cap_Ptr
UINT8 Reserved
UINT16 SecondaryStatus
 Secondary Status.
UINT8 PciBusNumber
 PCI Bus Number.
UINT8 CardBusBusNumber
 CardBus Bus Number.
UINT8 SubordinateBusNumber
 Subordinate Bus Number.
UINT8 CardBusLatencyTimer
 CardBus Latency Timer.
UINT32 MemoryBase0
 Memory Base Register 0.
UINT32 MemoryLimit0
 Memory Limit Register 0.
UINT32 MemoryBase1
UINT32 MemoryLimit1
UINT32 IoBase0
UINT32 IoLimit0
 I/O Base Register 0.
UINT32 IoBase1
 I/O Limit Register 0.
UINT32 IoLimit1
UINT8 InterruptLine
 Interrupt Line.
UINT8 InterruptPin
 Interrupt Pin.
UINT16 BridgeControl
 Bridge Control.

Detailed Description

CardBus Conroller Configuration Space, Section 4.5.1, PC Card Standard.

8.0

Definition at line 125 of file Pci22.h.


Field Documentation

Cardus Socket/ExCA Base.

Definition at line 126 of file Pci22.h.

Definition at line 127 of file Pci22.h.

Definition at line 128 of file Pci22.h.

Secondary Status.

Definition at line 129 of file Pci22.h.

PCI Bus Number.

Definition at line 130 of file Pci22.h.

CardBus Bus Number.

Definition at line 131 of file Pci22.h.

Subordinate Bus Number.

Definition at line 132 of file Pci22.h.

CardBus Latency Timer.

Definition at line 133 of file Pci22.h.

Memory Base Register 0.

Definition at line 134 of file Pci22.h.

Memory Limit Register 0.

Definition at line 135 of file Pci22.h.

Definition at line 136 of file Pci22.h.

Definition at line 137 of file Pci22.h.

Definition at line 138 of file Pci22.h.

I/O Base Register 0.

Definition at line 139 of file Pci22.h.

I/O Limit Register 0.

Definition at line 140 of file Pci22.h.

Definition at line 141 of file Pci22.h.

Interrupt Line.

Definition at line 142 of file Pci22.h.

Interrupt Pin.

Definition at line 143 of file Pci22.h.

Bridge Control.

Definition at line 144 of file Pci22.h.


The documentation for this struct was generated from the following file: