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◆ ATL2_GLB_RST_CTRL2
#define ATL2_GLB_RST_CTRL2 0x3040 |
◆ ATL2_HOST_FINISHED_WRITE
#define ATL2_HOST_FINISHED_WRITE 0xE00 |
◆ ATL2_MCP_BUSY_WRITE
#define ATL2_MCP_BUSY_WRITE 0xE04 |
◆ ATL2_HOST_ITR_REQ
#define ATL2_HOST_ITR_REQ 0xF00 |
◆ ATL2_RESET_STATUS_REQ_GSR
#define ATL2_RESET_STATUS_REQ_GSR ( 1U << 0x0 ) |
◆ ATL2_RESET_STATUS_REQ_HOST_BOOT
#define ATL2_RESET_STATUS_REQ_HOST_BOOT ( 1U << 0x8 ) |
◆ ATL2_RESET_STATUS_REQ_MAC_FAST_BOOT
#define ATL2_RESET_STATUS_REQ_MAC_FAST_BOOT ( 1U << 0xA ) |
◆ ATL2_RESET_STATUS_REQ_PHY_FAST_BOOT
#define ATL2_RESET_STATUS_REQ_PHY_FAST_BOOT ( 1U << 0xB ) |
◆ ATL2_RESET_STATUS_HOST_LOAD_COMPLETED
#define ATL2_RESET_STATUS_HOST_LOAD_COMPLETED ( 1U << 0x10 ) |
◆ ATL2_RESET_STATUS_REQUIRE_HOST_LOAD
#define ATL2_RESET_STATUS_REQUIRE_HOST_LOAD ( 1U << 0x11 ) |
◆ ATL2_RESET_STATUS_BC_STARTED
#define ATL2_RESET_STATUS_BC_STARTED ( 1U << 0x18 ) |
◆ ATL2_RESET_STATUS_CRASH_DURING_INIT
#define ATL2_RESET_STATUS_CRASH_DURING_INIT ( 1U << 0x1B ) |
◆ ATL2_RESET_STATUS_BC_FAILED
#define ATL2_RESET_STATUS_BC_FAILED ( 1U << 0x1C ) |
◆ ATL2_RESET_STATUS_FW_FAILED
#define ATL2_RESET_STATUS_FW_FAILED ( 1U << 0x1D ) |
◆ ATL2_RESET_STATUS_FW_SUCCEED
#define ATL2_RESET_STATUS_FW_SUCCEED ( 1U << 0x1F ) |
◆ ATL2_RESET_STATUS_BOOT_FAILED_MASK
◆ ATL2_RESET_STATUS_BOOT_COMPLETED_MASK
◆ ATL2_FW_HOST_INTERRUPT_REQUEST_READY
#define ATL2_FW_HOST_INTERRUPT_REQUEST_READY 0x0001 |
◆ ATL2_FW_HOST_INTERRUPT_MAC_READY
#define ATL2_FW_HOST_INTERRUPT_MAC_READY 0x0004 |
◆ ATL2_FW_HOST_INTERRUPT_DATA_HANDLED
#define ATL2_FW_HOST_INTERRUPT_DATA_HANDLED 0x0100 |
◆ ATL2_FW_HOST_INTERRUPT_LINK_UP
#define ATL2_FW_HOST_INTERRUPT_LINK_UP 0x0200 |
◆ ATL2_FW_HOST_INTERRUPT_LINK_DOWN
#define ATL2_FW_HOST_INTERRUPT_LINK_DOWN 0x0400 |
◆ ATL2_FW_HOST_INTERRUPT_PHY_FAULT
#define ATL2_FW_HOST_INTERRUPT_PHY_FAULT 0x0800 |
◆ ATL2_FW_HOST_INTERRUPT_MAC_FAULT
#define ATL2_FW_HOST_INTERRUPT_MAC_FAULT 0x1000 |
◆ ATL2_FW_HOST_INTERRUPT_TEMPERATURE_WARNING
#define ATL2_FW_HOST_INTERRUPT_TEMPERATURE_WARNING 0x2000 |
◆ ATL2_FW_HOST_INTERRUPT_HEARTBEAT
#define ATL2_FW_HOST_INTERRUPT_HEARTBEAT 0x4000 |
◆ ATL2_FW_LINK_RATE_INVALID
#define ATL2_FW_LINK_RATE_INVALID 0 |
◆ ATL2_FW_LINK_RATE_10M
#define ATL2_FW_LINK_RATE_10M 1 |
◆ ATL2_FW_LINK_RATE_100M
#define ATL2_FW_LINK_RATE_100M 2 |
◆ ATL2_FW_LINK_RATE_1G
#define ATL2_FW_LINK_RATE_1G 3 |
◆ ATL2_FW_LINK_RATE_2G5
#define ATL2_FW_LINK_RATE_2G5 4 |
◆ ATL2_FW_LINK_RATE_5G
#define ATL2_FW_LINK_RATE_5G 5 |
◆ ATL2_FW_LINK_RATE_10G
#define ATL2_FW_LINK_RATE_10G 6 |
◆ ATL2_HOST_MODE_INVALID
#define ATL2_HOST_MODE_INVALID 0U |
◆ ATL2_HOST_MODE_ACTIVE
#define ATL2_HOST_MODE_ACTIVE 1U |
◆ ATL2_HOST_MODE_SLEEP_PROXY
#define ATL2_HOST_MODE_SLEEP_PROXY 2U |
◆ ATL2_HOST_MODE_LOW_POWER
#define ATL2_HOST_MODE_LOW_POWER 3U |
◆ ATL2_HOST_MODE_SHUTDOWN
#define ATL2_HOST_MODE_SHUTDOWN 4U |
◆ ATL2_MIF_SHARED_BUF_IN
#define ATL2_MIF_SHARED_BUF_IN 0x12000 |
◆ ATL2_MIF_SHARED_BUF_OUT
#define ATL2_MIF_SHARED_BUF_OUT 0x13000 |
◆ ATL2_MTU_IN_OFF
#define ATL2_MTU_IN_OFF 0x0 |
◆ ATL2_MAC_ADDR_IN_OFF
#define ATL2_MAC_ADDR_IN_OFF 0x8 |
◆ ATL2_LINK_CTRL_IN_OFF
#define ATL2_LINK_CTRL_IN_OFF 0x10 |
◆ ATL2_LINK_OPTS_IN_OFF
#define ATL2_LINK_OPTS_IN_OFF 0x18 |
◆ ATL2_FW_OUT_OFF
#define ATL2_FW_OUT_OFF 0x8 |
◆ ATL2_LINK_STS_OUT_OFF
#define ATL2_LINK_STS_OUT_OFF 0x14 |
◆ ATL2_DELAY_10
◆ ATL2_DELAY_100
#define ATL2_DELAY_100 100 |
◆ FILE_LICENCE()