|
iPXE
|
Cadence Gigabit Ethernet MAC (GEM) network driver. More...
Go to the source code of this file.
Data Structures | |
| struct | cgem_descriptor |
| A Cadence GEM descriptor. More... | |
| union | cgem_mac |
| A Cadence GEM MAC address. More... | |
| struct | cgem_ring |
| A Cadence GEM descriptor ring. More... | |
| struct | cgem_nic |
| A Cadence GEM network card. More... | |
Macros | |
| #define | CGEM_REG_IDX 0 |
| I/O region index. More... | |
| #define | CGEM_REG_LEN 0x800 |
| I/O region length. More... | |
| #define | CGEM_NWCTRL 0x000 |
| Network control register. More... | |
| #define | CGEM_NWCTRL_STARTTX 0x00000200 |
| Start transmission. More... | |
| #define | CGEM_NWCTRL_STATCLR 0x00000020 |
| Clear statistics. More... | |
| #define | CGEM_NWCTRL_MDEN 0x00000010 |
| MII interface enable. More... | |
| #define | CGEM_NWCTRL_TXEN 0x00000008 |
| Transmit enable. More... | |
| #define | CGEM_NWCTRL_RXEN 0x00000004 |
| Receive enable. More... | |
| #define | CGEM_NWCTRL_NORMAL ( CGEM_NWCTRL_MDEN | CGEM_NWCTRL_TXEN | CGEM_NWCTRL_RXEN ) |
| Normal value for network control register while up and running. More... | |
| #define | CGEM_NWCFG 0x004 |
| Network configuration register. More... | |
| #define | CGEM_NWSR 0x008 |
| Network status register. More... | |
| #define | CGEM_NWSR_MII_IDLE 0x00000004 |
| MII interface is idle. More... | |
| #define | CGEM_DMACR 0x010 |
| DMA configuration register. More... | |
| #define | CGEM_DMACR_RXBUF(x) ( ( (x) / 64 ) << 16 ) |
| RX buffer size. More... | |
| #define | CGEM_DMACR_TXSIZE(x) ( (x) << 10 ) |
| TX memory size. More... | |
| #define | CGEM_DMACR_TXSIZE_MAX CGEM_DMACR_TXSIZE ( 0x1 ) |
| Max TX memory size. More... | |
| #define | CGEM_DMACR_RXSIZE(x) ( (x) << 8 ) |
| RX memory size. More... | |
| #define | CGEM_DMACR_RXSIZE_MAX CGEM_DMACR_RXSIZE ( 0x3 ) |
| Max RX memory size. More... | |
| #define | CGEM_DMACR_BLENGTH(x) ( (x) << 0 ) |
| DMA burst length. More... | |
| #define | CGEM_DMACR_BLENGTH_MAX CGEM_DMACR_BLENGTH ( 0x10 ) |
| Max DMA burst length. More... | |
| #define | CGEM_RXQBASE 0x018 |
| RX queue base address register. More... | |
| #define | CGEM_TXQBASE 0x01c |
| TX queue base address register. More... | |
| #define | CGEM_IDR 0x02c |
| Interrupt disable register. More... | |
| #define | CGEM_IDR_ALL 0xffffffff |
| Disable all interrupts. More... | |
| #define | CGEM_PHYMNTNC 0x034 |
| PHY maintenance register. More... | |
| #define | CGEM_PHYMNTNC_CLAUSE22 0x40000000 |
| Clause 22 operation. More... | |
| #define | CGEM_PHYMNTNC_OP_WRITE 0x10000000 |
| Write to PHY register. More... | |
| #define | CGEM_PHYMNTNC_OP_READ 0x20000000 |
| Read from PHY register. More... | |
| #define | CGEM_PHYMNTNC_ADDR(x) ( (x) << 23 ) |
| PHY address. More... | |
| #define | CGEM_PHYMNTNC_REG(x) ( (x) << 18 ) |
| Register address. More... | |
| #define | CGEM_PHYMNTNC_FIXED 0x00020000 |
| Fixed value to write. More... | |
| #define | CGEM_PHYMNTNC_DATA_MASK 0x0000ffff |
| Data mask. More... | |
| #define | CGEM_MII_MAX_WAIT_US 500 |
| Maximum time to wait for PHY access, in microseconds. More... | |
| #define | CGEM_LINK_INTERVAL ( 2 * TICKS_PER_SEC ) |
| Link state check interval. More... | |
| #define | CGEM_LADDRL 0x088 |
| Local MAC address (low half) register. More... | |
| #define | CGEM_LADDRH 0x08c |
| Local MAC address (high half) register. More... | |
| #define | CGEM_TX_FL_OWNED 0x80000000 |
| Transmit flags. More... | |
| #define | CGEM_TX_FL_WRAP 0x40000000 |
| End of descriptor ring. More... | |
| #define | CGEM_TX_FL_LAST 0x00008000 |
| Last buffer in frame. More... | |
| #define | CGEM_NUM_TX_DESC 8 |
| Transmit ring length. More... | |
| #define | CGEM_RX_ADDR_OWNED 0x00000001 |
| Receive flags (in buffer address) More... | |
| #define | CGEM_RX_ADDR_WRAP 0x00000002 |
| End of descriptor ring. More... | |
| #define | CGEM_RX_FL_LEN(x) ( (x) & 0x1fff ) |
| Receive flags. More... | |
| #define | CGEM_NUM_RX_DESC 8 |
| Receive ring length. More... | |
| #define | CGEM_RX_LEN 1536 |
| Length of receive buffers. More... | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
| static void | cgem_init_ring (struct cgem_ring *ring, unsigned int count, unsigned int qbase) |
| Initialise descriptor ring. More... | |
Cadence Gigabit Ethernet MAC (GEM) network driver.
Definition in file cgem.h.
| #define CGEM_NWCTRL_NORMAL ( CGEM_NWCTRL_MDEN | CGEM_NWCTRL_TXEN | CGEM_NWCTRL_RXEN ) |
| #define CGEM_DMACR_TXSIZE_MAX CGEM_DMACR_TXSIZE ( 0x1 ) |
| #define CGEM_DMACR_RXSIZE_MAX CGEM_DMACR_RXSIZE ( 0x3 ) |
| #define CGEM_DMACR_BLENGTH_MAX CGEM_DMACR_BLENGTH ( 0x10 ) |
| #define CGEM_PHYMNTNC_CLAUSE22 0x40000000 |
| #define CGEM_PHYMNTNC_OP_WRITE 0x10000000 |
| #define CGEM_PHYMNTNC_OP_READ 0x20000000 |
| #define CGEM_MII_MAX_WAIT_US 500 |
| #define CGEM_LINK_INTERVAL ( 2 * TICKS_PER_SEC ) |
| #define CGEM_LADDRL 0x088 |
| #define CGEM_LADDRH 0x08c |
| #define CGEM_TX_FL_OWNED 0x80000000 |
| #define CGEM_RX_ADDR_OWNED 0x00000001 |
| #define CGEM_RX_LEN 1536 |
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
|
inlinestatic |
Initialise descriptor ring.
| ring | Descriptor ring |
| count | Number of descriptors |
| qbase | Queue base address register |
Definition at line 155 of file cgem.h.
References cgem_ring::count, count, cgem_ring::desc, cgem_ring::len, cgem_ring::qbase, and qbase.
Referenced by cgem_probe().
1.8.15