Synopsys DesignWare GPIO driver.
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Synopsys DesignWare GPIO driver.
Definition in file dwgpio.h.
◆ DWGPIO_MAX_COUNT
| #define DWGPIO_MAX_COUNT 32 |
Maximum number of GPIOs per port.
Definition at line 13 of file dwgpio.h.
◆ DWGPIO_SWPORT
| #define DWGPIO_SWPORT |
( |
|
x | ) |
( 0x00 + ( (x) * 0x0c ) ) |
Software port.
This is the register bank containing the DR, DDR, and CTL bits.
Definition at line 19 of file dwgpio.h.
◆ DWGPIO_SWPORT_DR
| #define DWGPIO_SWPORT_DR 0x00 |
Data register.
Bits written to this register are output if the corresponding DDR bit is set to 1 (output) and the corresponding CTL bit is set to 0 (software control).
Bits read from this register reflect the most recently written value, and do not reflect the actual status of the GPIO pin.
Definition at line 30 of file dwgpio.h.
◆ DWGPIO_SWPORT_DDR
| #define DWGPIO_SWPORT_DDR 0x04 |
Data direction register.
The GPIO is an output if the corresponding bit in this register is set to 1.
Definition at line 37 of file dwgpio.h.
◆ DWGPIO_SWPORT_CTL
| #define DWGPIO_SWPORT_CTL 0x08 |
Control register.
The GPIO is under software control (i.e. is functioning as a GPIO, rather than being controlled by a separate functional block) if the corresponding bit in this register is set to 0.
Definition at line 45 of file dwgpio.h.
◆ DWGPIO_EXT_PORT
| #define DWGPIO_EXT_PORT |
( |
|
x | ) |
( 0x50 + ( (x) * 0x04 ) ) |
External port.
Bits read from this register reflect the current status of the GPIO pin.
Definition at line 52 of file dwgpio.h.
◆ FILE_LICENCE()
| FILE_LICENCE |
( |
GPL2_OR_LATER_OR_UBDL |
| ) |
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