14 #ifndef SFC_MCDI_PCOL_H 15 #define SFC_MCDI_PCOL_H 29 #define MCDI_PCOL_VERSION 2 31 #define MCDI_PCOL_VERSION 1 67 #define MCDI_HEADER_OFST 0 68 #define MCDI_HEADER_CODE_LBN 0 69 #define MCDI_HEADER_CODE_WIDTH 7 70 #define MCDI_HEADER_RESYNC_LBN 7 71 #define MCDI_HEADER_RESYNC_WIDTH 1 72 #define MCDI_HEADER_DATALEN_LBN 8 73 #define MCDI_HEADER_DATALEN_WIDTH 8 74 #define MCDI_HEADER_SEQ_LBN 16 75 #define MCDI_HEADER_SEQ_WIDTH 4 76 #define MCDI_HEADER_RSVD_LBN 20 77 #define MCDI_HEADER_RSVD_WIDTH 1 78 #define MCDI_HEADER_NOT_EPOCH_LBN 21 79 #define MCDI_HEADER_NOT_EPOCH_WIDTH 1 80 #define MCDI_HEADER_ERROR_LBN 22 81 #define MCDI_HEADER_ERROR_WIDTH 1 82 #define MCDI_HEADER_RESPONSE_LBN 23 83 #define MCDI_HEADER_RESPONSE_WIDTH 1 84 #define MCDI_HEADER_XFLAGS_LBN 24 85 #define MCDI_HEADER_XFLAGS_WIDTH 8 87 #define MCDI_HEADER_XFLAGS_EVREQ 0x01 89 #define MCDI_HEADER_XFLAGS_DBRET 0x02 92 #define MCDI_CTL_SDU_LEN_MAX_V1 0xfc 93 #define MCDI_CTL_SDU_LEN_MAX_V2 0x400 96 #define MCDI_CTL_SDU_LEN_MAX MCDI_CTL_SDU_LEN_MAX_V2 98 #define MCDI_CTL_SDU_LEN_MAX MCDI_CTL_SDU_LEN_MAX_V1 142 #define FSE_AZ_EV_CODE_MCDI_EVRESPONSE 0xc 146 #define MC_CMD_ERR_EPERM 1 148 #define MC_CMD_ERR_ENOENT 2 150 #define MC_CMD_ERR_EINTR 4 152 #define MC_CMD_ERR_EIO 5 154 #define MC_CMD_ERR_EEXIST 6 156 #define MC_CMD_ERR_EAGAIN 11 158 #define MC_CMD_ERR_ENOMEM 12 160 #define MC_CMD_ERR_EACCES 13 162 #define MC_CMD_ERR_EBUSY 16 164 #define MC_CMD_ERR_ENODEV 19 166 #define MC_CMD_ERR_EINVAL 22 168 #define MC_CMD_ERR_EPIPE 32 170 #define MC_CMD_ERR_EROFS 30 172 #define MC_CMD_ERR_ERANGE 34 174 #define MC_CMD_ERR_EDEADLK 35 176 #define MC_CMD_ERR_ENOSYS 38 178 #define MC_CMD_ERR_ETIME 62 180 #define MC_CMD_ERR_ENOLINK 67 182 #define MC_CMD_ERR_EPROTO 71 184 #define MC_CMD_ERR_ENOTSUP 95 186 #define MC_CMD_ERR_EADDRNOTAVAIL 99 188 #define MC_CMD_ERR_ENOTCONN 107 190 #define MC_CMD_ERR_EALREADY 114 193 #define MC_CMD_ERR_ALLOC_FAIL 0x1000 195 #define MC_CMD_ERR_NO_VADAPTOR 0x1001 197 #define MC_CMD_ERR_NO_EVB_PORT 0x1002 199 #define MC_CMD_ERR_NO_VSWITCH 0x1003 201 #define MC_CMD_ERR_VLAN_LIMIT 0x1004 203 #define MC_CMD_ERR_BAD_PCI_FUNC 0x1005 205 #define MC_CMD_ERR_BAD_VLAN_MODE 0x1006 207 #define MC_CMD_ERR_BAD_VSWITCH_TYPE 0x1007 209 #define MC_CMD_ERR_BAD_VPORT_TYPE 0x1008 211 #define MC_CMD_ERR_MAC_EXIST 0x1009 213 #define MC_CMD_ERR_SLAVE_NOT_PRESENT 0x100a 215 #define MC_CMD_ERR_DATAPATH_DISABLED 0x100b 217 #define MC_CMD_ERR_CLIENT_NOT_FN 0x100c 223 #define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d 225 #define MC_CMD_ERR_VLAN_EXIST 0x100e 227 #define MC_CMD_ERR_NO_MAC_ADDR 0x100f 234 #define MC_CMD_ERR_PROXY_PENDING 0x1010 235 #define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4 240 #define MC_CMD_ERR_PROXY_INPROGRESS 0x1011 245 #define MC_CMD_ERR_PROXY_UNEXPECTED 0x1012 253 #define MC_CMD_ERR_NO_PRIVILEGE 0x1013 258 #define MC_CMD_ERR_FILTERS_PRESENT 0x1014 262 #define MC_CMD_ERR_NO_CLOCK 0x1015 266 #define MC_CMD_ERR_UNREACHABLE 0x1016 270 #define MC_CMD_ERR_QUEUE_FULL 0x1017 272 #define MC_CMD_ERR_CODE_OFST 0 281 #define MC_CMD_ERR_ARG_OFST 4 284 #define MC_CMD_ERR_ENOSPC 28 289 #define MCDI_EVENT_LEN 8 290 #define MCDI_EVENT_CONT_LBN 32 291 #define MCDI_EVENT_CONT_WIDTH 1 292 #define MCDI_EVENT_LEVEL_LBN 33 293 #define MCDI_EVENT_LEVEL_WIDTH 3 295 #define MCDI_EVENT_LEVEL_INFO 0x0 297 #define MCDI_EVENT_LEVEL_WARN 0x1 299 #define MCDI_EVENT_LEVEL_ERR 0x2 301 #define MCDI_EVENT_LEVEL_FATAL 0x3 302 #define MCDI_EVENT_DATA_OFST 0 303 #define MCDI_EVENT_CMDDONE_SEQ_LBN 0 304 #define MCDI_EVENT_CMDDONE_SEQ_WIDTH 8 305 #define MCDI_EVENT_CMDDONE_DATALEN_LBN 8 306 #define MCDI_EVENT_CMDDONE_DATALEN_WIDTH 8 307 #define MCDI_EVENT_CMDDONE_ERRNO_LBN 16 308 #define MCDI_EVENT_CMDDONE_ERRNO_WIDTH 8 309 #define MCDI_EVENT_LINKCHANGE_LP_CAP_LBN 0 310 #define MCDI_EVENT_LINKCHANGE_LP_CAP_WIDTH 16 311 #define MCDI_EVENT_LINKCHANGE_SPEED_LBN 16 312 #define MCDI_EVENT_LINKCHANGE_SPEED_WIDTH 4 314 #define MCDI_EVENT_LINKCHANGE_SPEED_100M 0x1 316 #define MCDI_EVENT_LINKCHANGE_SPEED_1G 0x2 318 #define MCDI_EVENT_LINKCHANGE_SPEED_10G 0x3 320 #define MCDI_EVENT_LINKCHANGE_SPEED_40G 0x4 321 #define MCDI_EVENT_LINKCHANGE_FCNTL_LBN 20 322 #define MCDI_EVENT_LINKCHANGE_FCNTL_WIDTH 4 323 #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24 324 #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_WIDTH 8 325 #define MCDI_EVENT_SENSOREVT_MONITOR_LBN 0 326 #define MCDI_EVENT_SENSOREVT_MONITOR_WIDTH 8 327 #define MCDI_EVENT_SENSOREVT_STATE_LBN 8 328 #define MCDI_EVENT_SENSOREVT_STATE_WIDTH 8 329 #define MCDI_EVENT_SENSOREVT_VALUE_LBN 16 330 #define MCDI_EVENT_SENSOREVT_VALUE_WIDTH 16 331 #define MCDI_EVENT_FWALERT_DATA_LBN 8 332 #define MCDI_EVENT_FWALERT_DATA_WIDTH 24 333 #define MCDI_EVENT_FWALERT_REASON_LBN 0 334 #define MCDI_EVENT_FWALERT_REASON_WIDTH 8 336 #define MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS 0x1 337 #define MCDI_EVENT_FLR_VF_LBN 0 338 #define MCDI_EVENT_FLR_VF_WIDTH 8 339 #define MCDI_EVENT_TX_ERR_TXQ_LBN 0 340 #define MCDI_EVENT_TX_ERR_TXQ_WIDTH 12 341 #define MCDI_EVENT_TX_ERR_TYPE_LBN 12 342 #define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4 344 #define MCDI_EVENT_TX_ERR_DL_FAIL 0x1 346 #define MCDI_EVENT_TX_ERR_NO_EOP 0x2 348 #define MCDI_EVENT_TX_ERR_2BIG 0x3 350 #define MCDI_EVENT_TX_BAD_OPTDESC 0x5 352 #define MCDI_EVENT_TX_OPT_IN_PKT 0x8 354 #define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9 355 #define MCDI_EVENT_TX_ERR_INFO_LBN 16 356 #define MCDI_EVENT_TX_ERR_INFO_WIDTH 16 357 #define MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN 12 358 #define MCDI_EVENT_TX_FLUSH_TO_DRIVER_WIDTH 1 359 #define MCDI_EVENT_TX_FLUSH_TXQ_LBN 0 360 #define MCDI_EVENT_TX_FLUSH_TXQ_WIDTH 12 361 #define MCDI_EVENT_PTP_ERR_TYPE_LBN 0 362 #define MCDI_EVENT_PTP_ERR_TYPE_WIDTH 8 364 #define MCDI_EVENT_PTP_ERR_PLL_LOST 0x1 366 #define MCDI_EVENT_PTP_ERR_FILTER 0x2 368 #define MCDI_EVENT_PTP_ERR_FIFO 0x3 370 #define MCDI_EVENT_PTP_ERR_QUEUE 0x4 371 #define MCDI_EVENT_AOE_ERR_TYPE_LBN 0 372 #define MCDI_EVENT_AOE_ERR_TYPE_WIDTH 8 374 #define MCDI_EVENT_AOE_NO_LOAD 0x1 376 #define MCDI_EVENT_AOE_FC_ASSERT 0x2 378 #define MCDI_EVENT_AOE_FC_WATCHDOG 0x3 380 #define MCDI_EVENT_AOE_FC_NO_START 0x4 384 #define MCDI_EVENT_AOE_FAULT 0x5 386 #define MCDI_EVENT_AOE_CPLD_REPROGRAMMED 0x6 388 #define MCDI_EVENT_AOE_LOAD 0x7 390 #define MCDI_EVENT_AOE_DMA 0x8 394 #define MCDI_EVENT_AOE_BYTEBLASTER 0x9 396 #define MCDI_EVENT_AOE_DDR_ECC_STATUS 0xa 398 #define MCDI_EVENT_AOE_PTP_STATUS 0xb 400 #define MCDI_EVENT_AOE_FPGA_LOAD_HEADER_ERR 0xc 402 #define MCDI_EVENT_AOE_FPGA_POWER_OFF 0xd 404 #define MCDI_EVENT_AOE_FPGA_LOAD_FAILED 0xe 406 #define MCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE 0xf 408 #define MCDI_EVENT_AOE_FC_RUN_TIMEDOUT 0x10 410 #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID 0x11 412 #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_HDR_INVALID 0x12 414 #define MCDI_EVENT_AOE_FPGA_CLOCKS_PROGRAM_FAILED 0x13 416 #define MCDI_EVENT_AOE_FC_RUNNING 0x14 417 #define MCDI_EVENT_AOE_ERR_DATA_LBN 8 418 #define MCDI_EVENT_AOE_ERR_DATA_WIDTH 8 419 #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_LBN 8 420 #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH 8 422 #define MCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN 0x0 425 #define MCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY 0x1 426 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_LBN 8 427 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_WIDTH 8 429 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_NV_READ_FAIL 0x0 431 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_MAGIC_FAIL 0x1 433 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_SILICON_TYPE 0x2 435 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_VRATIO 0x3 437 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_TYPE 0x4 439 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_VOLTAGE 0x5 441 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_SPEED 0x6 443 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_SIZE 0x7 445 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_RANK 0x8 446 #define MCDI_EVENT_AOE_ERR_CODE_INVALID_FPGA_FLASH_TYPE_INFO_LBN 8 447 #define MCDI_EVENT_AOE_ERR_CODE_INVALID_FPGA_FLASH_TYPE_INFO_WIDTH 8 449 #define MCDI_EVENT_AOE_FLASH_TYPE_BOOT_PRIMARY 0x0 451 #define MCDI_EVENT_AOE_FLASH_TYPE_BOOT_SECONDARY 0x1 452 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_POWER_OFF_LBN 8 453 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_POWER_OFF_WIDTH 8 454 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_LOAD_FAILED_LBN 8 455 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_LOAD_FAILED_WIDTH 8 456 #define MCDI_EVENT_RX_ERR_RXQ_LBN 0 457 #define MCDI_EVENT_RX_ERR_RXQ_WIDTH 12 458 #define MCDI_EVENT_RX_ERR_TYPE_LBN 12 459 #define MCDI_EVENT_RX_ERR_TYPE_WIDTH 4 460 #define MCDI_EVENT_RX_ERR_INFO_LBN 16 461 #define MCDI_EVENT_RX_ERR_INFO_WIDTH 16 462 #define MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN 12 463 #define MCDI_EVENT_RX_FLUSH_TO_DRIVER_WIDTH 1 464 #define MCDI_EVENT_RX_FLUSH_RXQ_LBN 0 465 #define MCDI_EVENT_RX_FLUSH_RXQ_WIDTH 12 466 #define MCDI_EVENT_MC_REBOOT_COUNT_LBN 0 467 #define MCDI_EVENT_MC_REBOOT_COUNT_WIDTH 16 468 #define MCDI_EVENT_MUM_ERR_TYPE_LBN 0 469 #define MCDI_EVENT_MUM_ERR_TYPE_WIDTH 8 471 #define MCDI_EVENT_MUM_NO_LOAD 0x1 473 #define MCDI_EVENT_MUM_ASSERT 0x2 475 #define MCDI_EVENT_MUM_WATCHDOG 0x3 476 #define MCDI_EVENT_MUM_ERR_DATA_LBN 8 477 #define MCDI_EVENT_MUM_ERR_DATA_WIDTH 8 478 #define MCDI_EVENT_DATA_LBN 0 479 #define MCDI_EVENT_DATA_WIDTH 32 480 #define MCDI_EVENT_SRC_LBN 36 481 #define MCDI_EVENT_SRC_WIDTH 8 482 #define MCDI_EVENT_EV_CODE_LBN 60 483 #define MCDI_EVENT_EV_CODE_WIDTH 4 484 #define MCDI_EVENT_CODE_LBN 44 485 #define MCDI_EVENT_CODE_WIDTH 8 487 #define MCDI_EVENT_SW_EVENT 0x0 489 #define MCDI_EVENT_CODE_BADSSERT 0x1 491 #define MCDI_EVENT_CODE_PMNOTICE 0x2 493 #define MCDI_EVENT_CODE_CMDDONE 0x3 495 #define MCDI_EVENT_CODE_LINKCHANGE 0x4 497 #define MCDI_EVENT_CODE_SENSOREVT 0x5 499 #define MCDI_EVENT_CODE_SCHEDERR 0x6 501 #define MCDI_EVENT_CODE_REBOOT 0x7 503 #define MCDI_EVENT_CODE_MAC_STATS_DMA 0x8 505 #define MCDI_EVENT_CODE_FWALERT 0x9 507 #define MCDI_EVENT_CODE_FLR 0xa 509 #define MCDI_EVENT_CODE_TX_ERR 0xb 511 #define MCDI_EVENT_CODE_TX_FLUSH 0xc 513 #define MCDI_EVENT_CODE_PTP_RX 0xd 515 #define MCDI_EVENT_CODE_PTP_FAULT 0xe 517 #define MCDI_EVENT_CODE_PTP_PPS 0xf 519 #define MCDI_EVENT_CODE_RX_FLUSH 0x10 521 #define MCDI_EVENT_CODE_RX_ERR 0x11 523 #define MCDI_EVENT_CODE_AOE 0x12 525 #define MCDI_EVENT_CODE_VCAL_FAIL 0x13 527 #define MCDI_EVENT_CODE_HW_PPS 0x14 531 #define MCDI_EVENT_CODE_MC_REBOOT 0x15 533 #define MCDI_EVENT_CODE_PAR_ERR 0x16 535 #define MCDI_EVENT_CODE_ECC_CORR_ERR 0x17 537 #define MCDI_EVENT_CODE_ECC_FATAL_ERR 0x18 539 #define MCDI_EVENT_CODE_MC_BIST 0x19 541 #define MCDI_EVENT_CODE_PTP_TIME 0x1a 543 #define MCDI_EVENT_CODE_MUM 0x1b 545 #define MCDI_EVENT_CODE_PROXY_REQUEST 0x1c 549 #define MCDI_EVENT_CODE_PROXY_RESPONSE 0x1d 553 #define MCDI_EVENT_CODE_TESTGEN 0xfa 554 #define MCDI_EVENT_CMDDONE_DATA_OFST 0 555 #define MCDI_EVENT_CMDDONE_DATA_LBN 0 556 #define MCDI_EVENT_CMDDONE_DATA_WIDTH 32 557 #define MCDI_EVENT_LINKCHANGE_DATA_OFST 0 558 #define MCDI_EVENT_LINKCHANGE_DATA_LBN 0 559 #define MCDI_EVENT_LINKCHANGE_DATA_WIDTH 32 560 #define MCDI_EVENT_SENSOREVT_DATA_OFST 0 561 #define MCDI_EVENT_SENSOREVT_DATA_LBN 0 562 #define MCDI_EVENT_SENSOREVT_DATA_WIDTH 32 563 #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_OFST 0 564 #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_LBN 0 565 #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_WIDTH 32 566 #define MCDI_EVENT_TX_ERR_DATA_OFST 0 567 #define MCDI_EVENT_TX_ERR_DATA_LBN 0 568 #define MCDI_EVENT_TX_ERR_DATA_WIDTH 32 572 #define MCDI_EVENT_PTP_SECONDS_OFST 0 573 #define MCDI_EVENT_PTP_SECONDS_LBN 0 574 #define MCDI_EVENT_PTP_SECONDS_WIDTH 32 578 #define MCDI_EVENT_PTP_MAJOR_OFST 0 579 #define MCDI_EVENT_PTP_MAJOR_LBN 0 580 #define MCDI_EVENT_PTP_MAJOR_WIDTH 32 584 #define MCDI_EVENT_PTP_NANOSECONDS_OFST 0 585 #define MCDI_EVENT_PTP_NANOSECONDS_LBN 0 586 #define MCDI_EVENT_PTP_NANOSECONDS_WIDTH 32 590 #define MCDI_EVENT_PTP_MINOR_OFST 0 591 #define MCDI_EVENT_PTP_MINOR_LBN 0 592 #define MCDI_EVENT_PTP_MINOR_WIDTH 32 595 #define MCDI_EVENT_PTP_UUID_OFST 0 596 #define MCDI_EVENT_PTP_UUID_LBN 0 597 #define MCDI_EVENT_PTP_UUID_WIDTH 32 598 #define MCDI_EVENT_RX_ERR_DATA_OFST 0 599 #define MCDI_EVENT_RX_ERR_DATA_LBN 0 600 #define MCDI_EVENT_RX_ERR_DATA_WIDTH 32 601 #define MCDI_EVENT_PAR_ERR_DATA_OFST 0 602 #define MCDI_EVENT_PAR_ERR_DATA_LBN 0 603 #define MCDI_EVENT_PAR_ERR_DATA_WIDTH 32 604 #define MCDI_EVENT_ECC_CORR_ERR_DATA_OFST 0 605 #define MCDI_EVENT_ECC_CORR_ERR_DATA_LBN 0 606 #define MCDI_EVENT_ECC_CORR_ERR_DATA_WIDTH 32 607 #define MCDI_EVENT_ECC_FATAL_ERR_DATA_OFST 0 608 #define MCDI_EVENT_ECC_FATAL_ERR_DATA_LBN 0 609 #define MCDI_EVENT_ECC_FATAL_ERR_DATA_WIDTH 32 611 #define MCDI_EVENT_PTP_TIME_MAJOR_OFST 0 612 #define MCDI_EVENT_PTP_TIME_MAJOR_LBN 0 613 #define MCDI_EVENT_PTP_TIME_MAJOR_WIDTH 32 615 #define MCDI_EVENT_PTP_TIME_MINOR_26_19_LBN 36 616 #define MCDI_EVENT_PTP_TIME_MINOR_26_19_WIDTH 8 620 #define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_LBN 36 621 #define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_WIDTH 1 625 #define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_LBN 37 626 #define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_WIDTH 1 630 #define MCDI_EVENT_PTP_TIME_MINOR_26_21_LBN 38 631 #define MCDI_EVENT_PTP_TIME_MINOR_26_21_WIDTH 6 632 #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_OFST 0 633 #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_LBN 0 634 #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_WIDTH 32 635 #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_OFST 0 636 #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_LBN 0 637 #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_WIDTH 32 642 #define MCDI_EVENT_PROXY_RESPONSE_RC_LBN 36 643 #define MCDI_EVENT_PROXY_RESPONSE_RC_WIDTH 8 646 #define EVB_PORT_ID_LEN 4 647 #define EVB_PORT_ID_PORT_ID_OFST 0 649 #define EVB_PORT_ID_NULL 0x0 651 #define EVB_PORT_ID_ASSIGNED 0x1000000 653 #define EVB_PORT_ID_MAC0 0x2000000 655 #define EVB_PORT_ID_MAC1 0x2000001 657 #define EVB_PORT_ID_MAC2 0x2000002 659 #define EVB_PORT_ID_MAC3 0x2000003 660 #define EVB_PORT_ID_PORT_ID_LBN 0 661 #define EVB_PORT_ID_PORT_ID_WIDTH 32 673 #define MC_CMD_DRV_ATTACH 0x1c 674 #undef MC_CMD_0x1c_PRIVILEGE_CTG 676 #define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL 679 #define MC_CMD_DRV_ATTACH_IN_LEN 12 681 #define MC_CMD_DRV_ATTACH_IN_NEW_STATE_OFST 0 682 #define MC_CMD_DRV_ATTACH_LBN 0 683 #define MC_CMD_DRV_ATTACH_WIDTH 1 684 #define MC_CMD_DRV_PREBOOT_LBN 1 685 #define MC_CMD_DRV_PREBOOT_WIDTH 1 687 #define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4 689 #define MC_CMD_DRV_ATTACH_IN_FIRMWARE_ID_OFST 8 691 #define MC_CMD_FW_FULL_FEATURED 0x0 693 #define MC_CMD_FW_LOW_LATENCY 0x1 695 #define MC_CMD_FW_PACKED_STREAM 0x2 699 #define MC_CMD_FW_HIGH_TX_RATE 0x3 701 #define MC_CMD_FW_PACKED_STREAM_HASH_MODE_1 0x4 705 #define MC_CMD_FW_RULES_ENGINE 0x5 707 #define MC_CMD_FW_DONT_CARE 0xffffffff 710 #define MC_CMD_DRV_ATTACH_OUT_LEN 4 712 #define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_OFST 0 715 #define MC_CMD_DRV_ATTACH_EXT_OUT_LEN 8 717 #define MC_CMD_DRV_ATTACH_EXT_OUT_OLD_STATE_OFST 0 719 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4 721 #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0 725 #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL 0x1 727 #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED 0x2 731 #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_NO_ACTIVE_PORT 0x3 740 #define MC_CMD_ENTITY_RESET 0x20 744 #define MC_CMD_ENTITY_RESET_IN_LEN 4 748 #define MC_CMD_ENTITY_RESET_IN_FLAG_OFST 0 749 #define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_LBN 0 750 #define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_WIDTH 1 753 #define MC_CMD_ENTITY_RESET_OUT_LEN 0 761 #define MC_CMD_GET_PHY_CFG 0x24 762 #undef MC_CMD_0x24_PRIVILEGE_CTG 764 #define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL 767 #define MC_CMD_GET_PHY_CFG_IN_LEN 0 770 #define MC_CMD_GET_PHY_CFG_OUT_LEN 72 772 #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_OFST 0 773 #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_LBN 0 774 #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_WIDTH 1 775 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN 1 776 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_WIDTH 1 777 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN 2 778 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_WIDTH 1 779 #define MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN 3 780 #define MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_WIDTH 1 781 #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN 4 782 #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_WIDTH 1 783 #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN 5 784 #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_WIDTH 1 785 #define MC_CMD_GET_PHY_CFG_OUT_BIST_LBN 6 786 #define MC_CMD_GET_PHY_CFG_OUT_BIST_WIDTH 1 788 #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4 790 #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_OFST 8 791 #define MC_CMD_PHY_CAP_10HDX_LBN 1 792 #define MC_CMD_PHY_CAP_10HDX_WIDTH 1 793 #define MC_CMD_PHY_CAP_10FDX_LBN 2 794 #define MC_CMD_PHY_CAP_10FDX_WIDTH 1 795 #define MC_CMD_PHY_CAP_100HDX_LBN 3 796 #define MC_CMD_PHY_CAP_100HDX_WIDTH 1 797 #define MC_CMD_PHY_CAP_100FDX_LBN 4 798 #define MC_CMD_PHY_CAP_100FDX_WIDTH 1 799 #define MC_CMD_PHY_CAP_1000HDX_LBN 5 800 #define MC_CMD_PHY_CAP_1000HDX_WIDTH 1 801 #define MC_CMD_PHY_CAP_1000FDX_LBN 6 802 #define MC_CMD_PHY_CAP_1000FDX_WIDTH 1 803 #define MC_CMD_PHY_CAP_10000FDX_LBN 7 804 #define MC_CMD_PHY_CAP_10000FDX_WIDTH 1 805 #define MC_CMD_PHY_CAP_PAUSE_LBN 8 806 #define MC_CMD_PHY_CAP_PAUSE_WIDTH 1 807 #define MC_CMD_PHY_CAP_ASYM_LBN 9 808 #define MC_CMD_PHY_CAP_ASYM_WIDTH 1 809 #define MC_CMD_PHY_CAP_AN_LBN 10 810 #define MC_CMD_PHY_CAP_AN_WIDTH 1 811 #define MC_CMD_PHY_CAP_40000FDX_LBN 11 812 #define MC_CMD_PHY_CAP_40000FDX_WIDTH 1 813 #define MC_CMD_PHY_CAP_DDM_LBN 12 814 #define MC_CMD_PHY_CAP_DDM_WIDTH 1 815 #define MC_CMD_PHY_CAP_100000FDX_LBN 13 816 #define MC_CMD_PHY_CAP_100000FDX_WIDTH 1 817 #define MC_CMD_PHY_CAP_25000FDX_LBN 14 818 #define MC_CMD_PHY_CAP_25000FDX_WIDTH 1 819 #define MC_CMD_PHY_CAP_50000FDX_LBN 15 820 #define MC_CMD_PHY_CAP_50000FDX_WIDTH 1 821 #define MC_CMD_PHY_CAP_BASER_FEC_LBN 16 822 #define MC_CMD_PHY_CAP_BASER_FEC_WIDTH 1 823 #define MC_CMD_PHY_CAP_BASER_FEC_REQ_LBN 17 824 #define MC_CMD_PHY_CAP_BASER_FEC_REQ_WIDTH 1 825 #define MC_CMD_PHY_CAP_RS_FEC_LBN 17 826 #define MC_CMD_PHY_CAP_RS_FEC_WIDTH 1 827 #define MC_CMD_PHY_CAP_RS_FEC_REQ_LBN 18 828 #define MC_CMD_PHY_CAP_RS_FEC_REQ_WIDTH 1 830 #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12 832 #define MC_CMD_GET_PHY_CFG_OUT_PRT_OFST 16 834 #define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_OFST 20 836 #define MC_CMD_GET_PHY_CFG_OUT_NAME_OFST 24 837 #define MC_CMD_GET_PHY_CFG_OUT_NAME_LEN 20 839 #define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_OFST 44 841 #define MC_CMD_MEDIA_XAUI 0x1 843 #define MC_CMD_MEDIA_CX4 0x2 845 #define MC_CMD_MEDIA_KX4 0x3 847 #define MC_CMD_MEDIA_XFP 0x4 849 #define MC_CMD_MEDIA_SFP_PLUS 0x5 851 #define MC_CMD_MEDIA_BASE_T 0x6 853 #define MC_CMD_MEDIA_QSFP_PLUS 0x7 854 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48 856 #define MC_CMD_MMD_CLAUSE22 0x0 857 #define MC_CMD_MMD_CLAUSE45_PMAPMD 0x1 858 #define MC_CMD_MMD_CLAUSE45_WIS 0x2 859 #define MC_CMD_MMD_CLAUSE45_PCS 0x3 860 #define MC_CMD_MMD_CLAUSE45_PHYXS 0x4 861 #define MC_CMD_MMD_CLAUSE45_DTEXS 0x5 862 #define MC_CMD_MMD_CLAUSE45_TC 0x6 863 #define MC_CMD_MMD_CLAUSE45_AN 0x7 865 #define MC_CMD_MMD_CLAUSE45_C22EXT 0x1d 866 #define MC_CMD_MMD_CLAUSE45_VEND1 0x1e 867 #define MC_CMD_MMD_CLAUSE45_VEND2 0x1f 868 #define MC_CMD_GET_PHY_CFG_OUT_REVISION_OFST 52 869 #define MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN 20 877 #define MC_CMD_GET_LINK 0x29 878 #undef MC_CMD_0x29_PRIVILEGE_CTG 880 #define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL 883 #define MC_CMD_GET_LINK_IN_LEN 0 886 #define MC_CMD_GET_LINK_OUT_LEN 28 888 #define MC_CMD_GET_LINK_OUT_CAP_OFST 0 890 #define MC_CMD_GET_LINK_OUT_LP_CAP_OFST 4 894 #define MC_CMD_GET_LINK_OUT_LINK_SPEED_OFST 8 896 #define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_OFST 12 899 #define MC_CMD_GET_LINK_OUT_FLAGS_OFST 16 900 #define MC_CMD_GET_LINK_OUT_LINK_UP_LBN 0 901 #define MC_CMD_GET_LINK_OUT_LINK_UP_WIDTH 1 902 #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN 1 903 #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_WIDTH 1 904 #define MC_CMD_GET_LINK_OUT_BPX_LINK_LBN 2 905 #define MC_CMD_GET_LINK_OUT_BPX_LINK_WIDTH 1 906 #define MC_CMD_GET_LINK_OUT_PHY_LINK_LBN 3 907 #define MC_CMD_GET_LINK_OUT_PHY_LINK_WIDTH 1 908 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_LBN 6 909 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_WIDTH 1 910 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_LBN 7 911 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_WIDTH 1 913 #define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20 916 #define MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST 24 917 #define MC_CMD_MAC_FAULT_XGMII_LOCAL_LBN 0 918 #define MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH 1 919 #define MC_CMD_MAC_FAULT_XGMII_REMOTE_LBN 1 920 #define MC_CMD_MAC_FAULT_XGMII_REMOTE_WIDTH 1 921 #define MC_CMD_MAC_FAULT_SGMII_REMOTE_LBN 2 922 #define MC_CMD_MAC_FAULT_SGMII_REMOTE_WIDTH 1 923 #define MC_CMD_MAC_FAULT_PENDING_RECONFIG_LBN 3 924 #define MC_CMD_MAC_FAULT_PENDING_RECONFIG_WIDTH 1 931 #define MC_CMD_SET_MAC 0x2c 932 #undef MC_CMD_0x2c_PRIVILEGE_CTG 934 #define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL 937 #define MC_CMD_SET_MAC_IN_LEN 28 941 #define MC_CMD_SET_MAC_IN_MTU_OFST 0 942 #define MC_CMD_SET_MAC_IN_DRAIN_OFST 4 943 #define MC_CMD_SET_MAC_IN_ADDR_OFST 8 944 #define MC_CMD_SET_MAC_IN_ADDR_LEN 8 945 #define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8 946 #define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12 947 #define MC_CMD_SET_MAC_IN_REJECT_OFST 16 948 #define MC_CMD_SET_MAC_IN_REJECT_UNCST_LBN 0 949 #define MC_CMD_SET_MAC_IN_REJECT_UNCST_WIDTH 1 950 #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_LBN 1 951 #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_WIDTH 1 952 #define MC_CMD_SET_MAC_IN_FCNTL_OFST 20 954 #define MC_CMD_FCNTL_OFF 0x0 956 #define MC_CMD_FCNTL_RESPOND 0x1 958 #define MC_CMD_FCNTL_BIDIR 0x2 960 #define MC_CMD_FCNTL_AUTO 0x3 962 #define MC_CMD_FCNTL_QBB 0x4 964 #define MC_CMD_FCNTL_GENERATE 0x5 965 #define MC_CMD_SET_MAC_IN_FLAGS_OFST 24 966 #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_LBN 0 967 #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_WIDTH 1 970 #define MC_CMD_SET_MAC_EXT_IN_LEN 32 974 #define MC_CMD_SET_MAC_EXT_IN_MTU_OFST 0 975 #define MC_CMD_SET_MAC_EXT_IN_DRAIN_OFST 4 976 #define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8 977 #define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8 978 #define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8 979 #define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12 980 #define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16 981 #define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_LBN 0 982 #define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_WIDTH 1 983 #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_LBN 1 984 #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_WIDTH 1 985 #define MC_CMD_SET_MAC_EXT_IN_FCNTL_OFST 20 998 #define MC_CMD_SET_MAC_EXT_IN_FLAGS_OFST 24 999 #define MC_CMD_SET_MAC_EXT_IN_FLAG_INCLUDE_FCS_LBN 0 1000 #define MC_CMD_SET_MAC_EXT_IN_FLAG_INCLUDE_FCS_WIDTH 1 1006 #define MC_CMD_SET_MAC_EXT_IN_CONTROL_OFST 28 1007 #define MC_CMD_SET_MAC_EXT_IN_CFG_MTU_LBN 0 1008 #define MC_CMD_SET_MAC_EXT_IN_CFG_MTU_WIDTH 1 1009 #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_LBN 1 1010 #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_WIDTH 1 1011 #define MC_CMD_SET_MAC_EXT_IN_CFG_REJECT_LBN 2 1012 #define MC_CMD_SET_MAC_EXT_IN_CFG_REJECT_WIDTH 1 1013 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCNTL_LBN 3 1014 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCNTL_WIDTH 1 1015 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4 1016 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1 1019 #define MC_CMD_SET_MAC_OUT_LEN 0 1022 #define MC_CMD_SET_MAC_V2_OUT_LEN 4 1027 #define MC_CMD_SET_MAC_V2_OUT_MTU_OFST 0 1048 #define MC_CMD_REBOOT 0x3d 1049 #undef MC_CMD_0x3d_PRIVILEGE_CTG 1051 #define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN 1054 #define MC_CMD_REBOOT_IN_LEN 4 1055 #define MC_CMD_REBOOT_IN_FLAGS_OFST 0 1056 #define MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION 0x1 1059 #define MC_CMD_REBOOT_OUT_LEN 0 1067 #define MC_CMD_REBOOT_MODE 0x3f 1068 #undef MC_CMD_0x3f_PRIVILEGE_CTG 1070 #define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_ADMIN 1073 #define MC_CMD_REBOOT_MODE_IN_LEN 4 1074 #define MC_CMD_REBOOT_MODE_IN_VALUE_OFST 0 1076 #define MC_CMD_REBOOT_MODE_NORMAL 0x0 1078 #define MC_CMD_REBOOT_MODE_POR 0x2 1080 #define MC_CMD_REBOOT_MODE_SNAPPER 0x3 1082 #define MC_CMD_REBOOT_MODE_SNAPPER_POR 0x4 1083 #define MC_CMD_REBOOT_MODE_IN_FAKE_LBN 7 1084 #define MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH 1 1087 #define MC_CMD_REBOOT_MODE_OUT_LEN 4 1088 #define MC_CMD_REBOOT_MODE_OUT_VALUE_OFST 0 1099 #define MC_CMD_WORKAROUND 0x4a 1100 #undef MC_CMD_0x4a_PRIVILEGE_CTG 1102 #define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN 1105 #define MC_CMD_WORKAROUND_IN_LEN 8 1107 #define MC_CMD_WORKAROUND_IN_TYPE_OFST 0 1109 #define MC_CMD_WORKAROUND_BUG17230 0x1 1111 #define MC_CMD_WORKAROUND_BUG35388 0x2 1113 #define MC_CMD_WORKAROUND_BUG35017 0x3 1115 #define MC_CMD_WORKAROUND_BUG41750 0x4 1121 #define MC_CMD_WORKAROUND_BUG42008 0x5 1129 #define MC_CMD_WORKAROUND_BUG26807 0x6 1131 #define MC_CMD_WORKAROUND_BUG61265 0x7 1135 #define MC_CMD_WORKAROUND_IN_ENABLED_OFST 4 1138 #define MC_CMD_WORKAROUND_OUT_LEN 0 1143 #define MC_CMD_WORKAROUND_EXT_OUT_LEN 4 1144 #define MC_CMD_WORKAROUND_EXT_OUT_FLAGS_OFST 0 1145 #define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN 0 1146 #define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_WIDTH 1 1153 #define MC_CMD_GET_MAC_ADDRESSES 0x55 1154 #undef MC_CMD_0x55_PRIVILEGE_CTG 1156 #define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1159 #define MC_CMD_GET_MAC_ADDRESSES_IN_LEN 0 1162 #define MC_CMD_GET_MAC_ADDRESSES_OUT_LEN 16 1164 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE_OFST 0 1165 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE_LEN 6 1167 #define MC_CMD_GET_MAC_ADDRESSES_OUT_RESERVED_OFST 6 1168 #define MC_CMD_GET_MAC_ADDRESSES_OUT_RESERVED_LEN 2 1170 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_COUNT_OFST 8 1172 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_OFST 12 1180 #define MC_CMD_GET_WORKAROUNDS 0x59 1181 #undef MC_CMD_0x59_PRIVILEGE_CTG 1183 #define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1186 #define MC_CMD_GET_WORKAROUNDS_OUT_LEN 8 1189 #define MC_CMD_GET_WORKAROUNDS_OUT_IMPLEMENTED_OFST 0 1190 #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_OFST 4 1192 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG17230 0x2 1194 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG35388 0x4 1196 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG35017 0x8 1198 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG41750 0x10 1204 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG42008 0x20 1206 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG26807 0x40 1208 #define MC_CMD_GET_WORKAROUNDS_OUT_BUG61265 0x80 1215 #define MC_CMD_V2_EXTN 0x7f 1218 #define MC_CMD_V2_EXTN_IN_LEN 4 1220 #define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN 0 1221 #define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH 15 1222 #define MC_CMD_V2_EXTN_IN_UNUSED_LBN 15 1223 #define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1 1227 #define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN 16 1228 #define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH 10 1229 #define MC_CMD_V2_EXTN_IN_UNUSED2_LBN 26 1230 #define MC_CMD_V2_EXTN_IN_UNUSED2_WIDTH 2 1232 #define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_LBN 28 1233 #define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4 1235 #define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_MC 0x0 1239 #define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1 1247 #define MC_CMD_INIT_EVQ 0x80 1248 #undef MC_CMD_0x80_PRIVILEGE_CTG 1250 #define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1253 #define MC_CMD_INIT_EVQ_IN_LENMIN 44 1254 #define MC_CMD_INIT_EVQ_IN_LENMAX 548 1255 #define MC_CMD_INIT_EVQ_IN_LEN(num) (36+8*(num)) 1257 #define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0 1261 #define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4 1264 #define MC_CMD_INIT_EVQ_IN_TMR_LOAD_OFST 8 1266 #define MC_CMD_INIT_EVQ_IN_TMR_RELOAD_OFST 12 1268 #define MC_CMD_INIT_EVQ_IN_FLAGS_OFST 16 1269 #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_LBN 0 1270 #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_WIDTH 1 1271 #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_LBN 1 1272 #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_WIDTH 1 1273 #define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_LBN 2 1274 #define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_WIDTH 1 1275 #define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_LBN 3 1276 #define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_WIDTH 1 1277 #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_LBN 4 1278 #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_WIDTH 1 1279 #define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_LBN 5 1280 #define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_WIDTH 1 1281 #define MC_CMD_INIT_EVQ_IN_FLAG_USE_TIMER_LBN 6 1282 #define MC_CMD_INIT_EVQ_IN_FLAG_USE_TIMER_WIDTH 1 1283 #define MC_CMD_INIT_EVQ_IN_TMR_MODE_OFST 20 1285 #define MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS 0x0 1287 #define MC_CMD_INIT_EVQ_IN_TMR_IMMED_START 0x1 1289 #define MC_CMD_INIT_EVQ_IN_TMR_TRIG_START 0x2 1291 #define MC_CMD_INIT_EVQ_IN_TMR_INT_HLDOFF 0x3 1293 #define MC_CMD_INIT_EVQ_IN_TARGET_EVQ_OFST 24 1298 #define MC_CMD_INIT_EVQ_IN_IRQ_NUM_OFST 24 1300 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_OFST 28 1302 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_DIS 0x0 1304 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_RX 0x1 1306 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_TX 0x2 1308 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_RXTX 0x3 1310 #define MC_CMD_INIT_EVQ_IN_COUNT_THRSHLD_OFST 32 1312 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36 1313 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8 1314 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36 1315 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40 1316 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1 1317 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64 1320 #define MC_CMD_INIT_EVQ_OUT_LEN 4 1322 #define MC_CMD_INIT_EVQ_OUT_IRQ_OFST 0 1325 #define MC_CMD_INIT_EVQ_V2_IN_LENMIN 44 1326 #define MC_CMD_INIT_EVQ_V2_IN_LENMAX 548 1327 #define MC_CMD_INIT_EVQ_V2_IN_LEN(num) (36+8*(num)) 1329 #define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0 1333 #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4 1336 #define MC_CMD_INIT_EVQ_V2_IN_TMR_LOAD_OFST 8 1338 #define MC_CMD_INIT_EVQ_V2_IN_TMR_RELOAD_OFST 12 1340 #define MC_CMD_INIT_EVQ_V2_IN_FLAGS_OFST 16 1341 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INTERRUPTING_LBN 0 1342 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INTERRUPTING_WIDTH 1 1343 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_LBN 1 1344 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_WIDTH 1 1345 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INT_ARMD_LBN 2 1346 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INT_ARMD_WIDTH 1 1347 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_CUT_THRU_LBN 3 1348 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_CUT_THRU_WIDTH 1 1349 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_LBN 4 1350 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_WIDTH 1 1351 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TX_MERGE_LBN 5 1352 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TX_MERGE_WIDTH 1 1353 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_USE_TIMER_LBN 6 1354 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_USE_TIMER_WIDTH 1 1355 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_LBN 7 1356 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_WIDTH 4 1358 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_MANUAL 0x0 1364 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_LOW_LATENCY 0x1 1370 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_THROUGHPUT 0x2 1375 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_AUTO 0x3 1376 #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_OFST 20 1378 #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_DIS 0x0 1380 #define MC_CMD_INIT_EVQ_V2_IN_TMR_IMMED_START 0x1 1382 #define MC_CMD_INIT_EVQ_V2_IN_TMR_TRIG_START 0x2 1384 #define MC_CMD_INIT_EVQ_V2_IN_TMR_INT_HLDOFF 0x3 1386 #define MC_CMD_INIT_EVQ_V2_IN_TARGET_EVQ_OFST 24 1391 #define MC_CMD_INIT_EVQ_V2_IN_IRQ_NUM_OFST 24 1393 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_OFST 28 1395 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_DIS 0x0 1397 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_RX 0x1 1399 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_TX 0x2 1401 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_RXTX 0x3 1403 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_THRSHLD_OFST 32 1405 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36 1406 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8 1407 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36 1408 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40 1409 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1 1410 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64 1413 #define MC_CMD_INIT_EVQ_V2_OUT_LEN 8 1415 #define MC_CMD_INIT_EVQ_V2_OUT_IRQ_OFST 0 1417 #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_OFST 4 1418 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_LBN 0 1419 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_WIDTH 1 1420 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_LBN 1 1421 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_WIDTH 1 1422 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_LBN 2 1423 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_WIDTH 1 1424 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_LBN 3 1425 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_WIDTH 1 1428 #define QUEUE_CRC_MODE_LEN 1 1429 #define QUEUE_CRC_MODE_MODE_LBN 0 1430 #define QUEUE_CRC_MODE_MODE_WIDTH 4 1432 #define QUEUE_CRC_MODE_NONE 0x0 1434 #define QUEUE_CRC_MODE_FCOE 0x1 1436 #define QUEUE_CRC_MODE_ISCSI_HDR 0x2 1438 #define QUEUE_CRC_MODE_ISCSI 0x3 1440 #define QUEUE_CRC_MODE_FCOIPOE 0x4 1442 #define QUEUE_CRC_MODE_MPA 0x5 1443 #define QUEUE_CRC_MODE_SPARE_LBN 4 1444 #define QUEUE_CRC_MODE_SPARE_WIDTH 4 1453 #define MC_CMD_INIT_RXQ 0x81 1454 #undef MC_CMD_0x81_PRIVILEGE_CTG 1456 #define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1461 #define MC_CMD_INIT_RXQ_IN_LENMIN 36 1462 #define MC_CMD_INIT_RXQ_IN_LENMAX 252 1463 #define MC_CMD_INIT_RXQ_IN_LEN(num) (28+8*(num)) 1465 #define MC_CMD_INIT_RXQ_IN_SIZE_OFST 0 1468 #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_OFST 4 1470 #define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8 1474 #define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12 1476 #define MC_CMD_INIT_RXQ_IN_FLAGS_OFST 16 1477 #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_LBN 0 1478 #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_WIDTH 1 1479 #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_LBN 1 1480 #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_WIDTH 1 1481 #define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_LBN 2 1482 #define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_WIDTH 1 1483 #define MC_CMD_INIT_RXQ_IN_CRC_MODE_LBN 3 1484 #define MC_CMD_INIT_RXQ_IN_CRC_MODE_WIDTH 4 1485 #define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_LBN 7 1486 #define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_WIDTH 1 1487 #define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_LBN 8 1488 #define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_WIDTH 1 1489 #define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_LBN 9 1490 #define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_WIDTH 1 1491 #define MC_CMD_INIT_RXQ_IN_UNUSED_LBN 10 1492 #define MC_CMD_INIT_RXQ_IN_UNUSED_WIDTH 1 1494 #define MC_CMD_INIT_RXQ_IN_OWNER_ID_OFST 20 1496 #define MC_CMD_INIT_RXQ_IN_PORT_ID_OFST 24 1498 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28 1499 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8 1500 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28 1501 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32 1502 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1 1503 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28 1508 #define MC_CMD_INIT_RXQ_EXT_IN_LEN 544 1510 #define MC_CMD_INIT_RXQ_EXT_IN_SIZE_OFST 0 1513 #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_OFST 4 1515 #define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8 1519 #define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12 1521 #define MC_CMD_INIT_RXQ_EXT_IN_FLAGS_OFST 16 1522 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_LBN 0 1523 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH 1 1524 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_LBN 1 1525 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_WIDTH 1 1526 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_LBN 2 1527 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH 1 1528 #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_LBN 3 1529 #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_WIDTH 4 1530 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_LBN 7 1531 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_WIDTH 1 1532 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_LBN 8 1533 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_WIDTH 1 1534 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_LBN 9 1535 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_WIDTH 1 1536 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_LBN 10 1537 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_WIDTH 4 1539 #define MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET 0x0 1541 #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM 0x1 1542 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_LBN 14 1543 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_WIDTH 1 1544 #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_LBN 15 1545 #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_WIDTH 3 1546 #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M 0x0 1547 #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K 0x1 1548 #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K 0x2 1549 #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K 0x3 1550 #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K 0x4 1551 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_LBN 18 1552 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1 1553 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_LBN 19 1554 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_WIDTH 1 1556 #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST 20 1558 #define MC_CMD_INIT_RXQ_EXT_IN_PORT_ID_OFST 24 1560 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28 1561 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8 1562 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28 1563 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32 1564 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64 1566 #define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540 1569 #define MC_CMD_INIT_RXQ_OUT_LEN 0 1572 #define MC_CMD_INIT_RXQ_EXT_OUT_LEN 0 1578 #define MC_CMD_INIT_TXQ 0x82 1579 #undef MC_CMD_0x82_PRIVILEGE_CTG 1581 #define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1586 #define MC_CMD_INIT_TXQ_IN_LENMIN 36 1587 #define MC_CMD_INIT_TXQ_IN_LENMAX 252 1588 #define MC_CMD_INIT_TXQ_IN_LEN(num) (28+8*(num)) 1590 #define MC_CMD_INIT_TXQ_IN_SIZE_OFST 0 1594 #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_OFST 4 1596 #define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8 1600 #define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12 1602 #define MC_CMD_INIT_TXQ_IN_FLAGS_OFST 16 1603 #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_LBN 0 1604 #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_WIDTH 1 1605 #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_LBN 1 1606 #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_WIDTH 1 1607 #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_CSUM_DIS_LBN 2 1608 #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_CSUM_DIS_WIDTH 1 1609 #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_LBN 3 1610 #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_WIDTH 1 1611 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_LBN 4 1612 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_WIDTH 4 1613 #define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_LBN 8 1614 #define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_WIDTH 1 1615 #define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_LBN 9 1616 #define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_WIDTH 1 1617 #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_LBN 10 1618 #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_WIDTH 1 1619 #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_LBN 11 1620 #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH 1 1622 #define MC_CMD_INIT_TXQ_IN_OWNER_ID_OFST 20 1624 #define MC_CMD_INIT_TXQ_IN_PORT_ID_OFST 24 1626 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28 1627 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8 1628 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28 1629 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32 1630 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1 1631 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28 1636 #define MC_CMD_INIT_TXQ_EXT_IN_LEN 544 1638 #define MC_CMD_INIT_TXQ_EXT_IN_SIZE_OFST 0 1642 #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_OFST 4 1644 #define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8 1648 #define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12 1650 #define MC_CMD_INIT_TXQ_EXT_IN_FLAGS_OFST 16 1651 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_LBN 0 1652 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH 1 1653 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_LBN 1 1654 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_WIDTH 1 1655 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_LBN 2 1656 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_WIDTH 1 1657 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_LBN 3 1658 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_WIDTH 1 1659 #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_LBN 4 1660 #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_WIDTH 4 1661 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_LBN 8 1662 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH 1 1663 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_LBN 9 1664 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_WIDTH 1 1665 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_LBN 10 1666 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_WIDTH 1 1667 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_LBN 11 1668 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH 1 1669 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_LBN 12 1670 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_WIDTH 1 1671 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_LBN 13 1672 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_WIDTH 1 1674 #define MC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_OFST 20 1676 #define MC_CMD_INIT_TXQ_EXT_IN_PORT_ID_OFST 24 1678 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28 1679 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8 1680 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28 1681 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32 1682 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1 1683 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64 1685 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_OFST 540 1686 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_LBN 0 1687 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_WIDTH 1 1688 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_LBN 1 1689 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_WIDTH 3 1692 #define MC_CMD_INIT_TXQ_OUT_LEN 0 1702 #define MC_CMD_FINI_EVQ 0x83 1703 #undef MC_CMD_0x83_PRIVILEGE_CTG 1705 #define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1708 #define MC_CMD_FINI_EVQ_IN_LEN 4 1712 #define MC_CMD_FINI_EVQ_IN_INSTANCE_OFST 0 1715 #define MC_CMD_FINI_EVQ_OUT_LEN 0 1722 #define MC_CMD_FINI_RXQ 0x84 1723 #undef MC_CMD_0x84_PRIVILEGE_CTG 1725 #define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1728 #define MC_CMD_FINI_RXQ_IN_LEN 4 1730 #define MC_CMD_FINI_RXQ_IN_INSTANCE_OFST 0 1733 #define MC_CMD_FINI_RXQ_OUT_LEN 0 1740 #define MC_CMD_FINI_TXQ 0x85 1741 #undef MC_CMD_0x85_PRIVILEGE_CTG 1743 #define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1746 #define MC_CMD_FINI_TXQ_IN_LEN 4 1748 #define MC_CMD_FINI_TXQ_IN_INSTANCE_OFST 0 1751 #define MC_CMD_FINI_TXQ_OUT_LEN 0 1758 #define MC_CMD_FILTER_OP 0x8a 1759 #undef MC_CMD_0x8a_PRIVILEGE_CTG 1761 #define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL 1764 #define MC_CMD_FILTER_OP_IN_LEN 108 1766 #define MC_CMD_FILTER_OP_IN_OP_OFST 0 1768 #define MC_CMD_FILTER_OP_IN_OP_INSERT 0x0 1770 #define MC_CMD_FILTER_OP_IN_OP_REMOVE 0x1 1772 #define MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE 0x2 1774 #define MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE 0x3 1778 #define MC_CMD_FILTER_OP_IN_OP_REPLACE 0x4 1780 #define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4 1781 #define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8 1782 #define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4 1783 #define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8 1786 #define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12 1788 #define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_OFST 16 1789 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_LBN 0 1790 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_WIDTH 1 1791 #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_LBN 1 1792 #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_WIDTH 1 1793 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC_LBN 2 1794 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC_WIDTH 1 1795 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT_LBN 3 1796 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT_WIDTH 1 1797 #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_LBN 4 1798 #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_WIDTH 1 1799 #define MC_CMD_FILTER_OP_IN_MATCH_DST_PORT_LBN 5 1800 #define MC_CMD_FILTER_OP_IN_MATCH_DST_PORT_WIDTH 1 1801 #define MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE_LBN 6 1802 #define MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE_WIDTH 1 1803 #define MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN_LBN 7 1804 #define MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN_WIDTH 1 1805 #define MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN_LBN 8 1806 #define MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN_WIDTH 1 1807 #define MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO_LBN 9 1808 #define MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO_WIDTH 1 1809 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_LBN 10 1810 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_WIDTH 1 1811 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_LBN 11 1812 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_WIDTH 1 1813 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 1814 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 1815 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_LBN 31 1816 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1 1818 #define MC_CMD_FILTER_OP_IN_RX_DEST_OFST 20 1820 #define MC_CMD_FILTER_OP_IN_RX_DEST_DROP 0x0 1822 #define MC_CMD_FILTER_OP_IN_RX_DEST_HOST 0x1 1824 #define MC_CMD_FILTER_OP_IN_RX_DEST_MC 0x2 1826 #define MC_CMD_FILTER_OP_IN_RX_DEST_TX0 0x3 1828 #define MC_CMD_FILTER_OP_IN_RX_DEST_TX1 0x4 1830 #define MC_CMD_FILTER_OP_IN_RX_QUEUE_OFST 24 1832 #define MC_CMD_FILTER_OP_IN_RX_MODE_OFST 28 1834 #define MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE 0x0 1836 #define MC_CMD_FILTER_OP_IN_RX_MODE_RSS 0x1 1838 #define MC_CMD_FILTER_OP_IN_RX_MODE_DOT1P_MAPPING 0x2 1841 #define MC_CMD_FILTER_OP_IN_RX_MODE_TEST_NEVER_MATCH 0x80000000 1846 #define MC_CMD_FILTER_OP_IN_RX_CONTEXT_OFST 32 1848 #define MC_CMD_FILTER_OP_IN_TX_DOMAIN_OFST 36 1853 #define MC_CMD_FILTER_OP_IN_TX_DEST_OFST 40 1855 #define MC_CMD_FILTER_OP_IN_TX_DEST_DEFAULT 0xffffffff 1856 #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_LBN 0 1857 #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_WIDTH 1 1858 #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_LBN 1 1859 #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_WIDTH 1 1861 #define MC_CMD_FILTER_OP_IN_SRC_MAC_OFST 44 1862 #define MC_CMD_FILTER_OP_IN_SRC_MAC_LEN 6 1864 #define MC_CMD_FILTER_OP_IN_SRC_PORT_OFST 50 1865 #define MC_CMD_FILTER_OP_IN_SRC_PORT_LEN 2 1867 #define MC_CMD_FILTER_OP_IN_DST_MAC_OFST 52 1868 #define MC_CMD_FILTER_OP_IN_DST_MAC_LEN 6 1870 #define MC_CMD_FILTER_OP_IN_DST_PORT_OFST 58 1871 #define MC_CMD_FILTER_OP_IN_DST_PORT_LEN 2 1873 #define MC_CMD_FILTER_OP_IN_ETHER_TYPE_OFST 60 1874 #define MC_CMD_FILTER_OP_IN_ETHER_TYPE_LEN 2 1876 #define MC_CMD_FILTER_OP_IN_INNER_VLAN_OFST 62 1877 #define MC_CMD_FILTER_OP_IN_INNER_VLAN_LEN 2 1879 #define MC_CMD_FILTER_OP_IN_OUTER_VLAN_OFST 64 1880 #define MC_CMD_FILTER_OP_IN_OUTER_VLAN_LEN 2 1882 #define MC_CMD_FILTER_OP_IN_IP_PROTO_OFST 66 1883 #define MC_CMD_FILTER_OP_IN_IP_PROTO_LEN 2 1885 #define MC_CMD_FILTER_OP_IN_FWDEF0_OFST 68 1887 #define MC_CMD_FILTER_OP_IN_FWDEF1_OFST 72 1891 #define MC_CMD_FILTER_OP_IN_SRC_IP_OFST 76 1892 #define MC_CMD_FILTER_OP_IN_SRC_IP_LEN 16 1896 #define MC_CMD_FILTER_OP_IN_DST_IP_OFST 92 1897 #define MC_CMD_FILTER_OP_IN_DST_IP_LEN 16 1903 #define MC_CMD_FILTER_OP_EXT_IN_LEN 172 1905 #define MC_CMD_FILTER_OP_EXT_IN_OP_OFST 0 1909 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4 1910 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8 1911 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4 1912 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8 1915 #define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12 1917 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FIELDS_OFST 16 1918 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_LBN 0 1919 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_WIDTH 1 1920 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_LBN 1 1921 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_WIDTH 1 1922 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_LBN 2 1923 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_WIDTH 1 1924 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_LBN 3 1925 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_WIDTH 1 1926 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_LBN 4 1927 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_WIDTH 1 1928 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_LBN 5 1929 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_WIDTH 1 1930 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_LBN 6 1931 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_WIDTH 1 1932 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_LBN 7 1933 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_WIDTH 1 1934 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_LBN 8 1935 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_WIDTH 1 1936 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_LBN 9 1937 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_WIDTH 1 1938 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_LBN 10 1939 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_WIDTH 1 1940 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_LBN 11 1941 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_WIDTH 1 1942 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_LBN 12 1943 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_WIDTH 1 1944 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_LBN 13 1945 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_WIDTH 1 1946 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_LBN 14 1947 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_WIDTH 1 1948 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_LBN 15 1949 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_WIDTH 1 1950 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_LBN 16 1951 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_WIDTH 1 1952 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_LBN 17 1953 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_WIDTH 1 1954 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_LBN 18 1955 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_WIDTH 1 1956 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_LBN 19 1957 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_WIDTH 1 1958 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_LBN 20 1959 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_WIDTH 1 1960 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_LBN 21 1961 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_WIDTH 1 1962 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_LBN 22 1963 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_WIDTH 1 1964 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_LBN 23 1965 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_WIDTH 1 1966 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_LBN 24 1967 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_WIDTH 1 1968 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN 25 1969 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1 1970 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 1971 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 1972 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_LBN 31 1973 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1 1975 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_OFST 20 1977 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_DROP 0x0 1979 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_HOST 0x1 1981 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_MC 0x2 1983 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_TX0 0x3 1985 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_TX1 0x4 1987 #define MC_CMD_FILTER_OP_EXT_IN_RX_QUEUE_OFST 24 1989 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_OFST 28 1991 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_SIMPLE 0x0 1993 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_RSS 0x1 1995 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_DOT1P_MAPPING 0x2 1998 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_TEST_NEVER_MATCH 0x80000000 2003 #define MC_CMD_FILTER_OP_EXT_IN_RX_CONTEXT_OFST 32 2005 #define MC_CMD_FILTER_OP_EXT_IN_TX_DOMAIN_OFST 36 2010 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_OFST 40 2012 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_DEFAULT 0xffffffff 2013 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_LBN 0 2014 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_WIDTH 1 2015 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_LBN 1 2016 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_WIDTH 1 2018 #define MC_CMD_FILTER_OP_EXT_IN_SRC_MAC_OFST 44 2019 #define MC_CMD_FILTER_OP_EXT_IN_SRC_MAC_LEN 6 2021 #define MC_CMD_FILTER_OP_EXT_IN_SRC_PORT_OFST 50 2022 #define MC_CMD_FILTER_OP_EXT_IN_SRC_PORT_LEN 2 2024 #define MC_CMD_FILTER_OP_EXT_IN_DST_MAC_OFST 52 2025 #define MC_CMD_FILTER_OP_EXT_IN_DST_MAC_LEN 6 2027 #define MC_CMD_FILTER_OP_EXT_IN_DST_PORT_OFST 58 2028 #define MC_CMD_FILTER_OP_EXT_IN_DST_PORT_LEN 2 2030 #define MC_CMD_FILTER_OP_EXT_IN_ETHER_TYPE_OFST 60 2031 #define MC_CMD_FILTER_OP_EXT_IN_ETHER_TYPE_LEN 2 2033 #define MC_CMD_FILTER_OP_EXT_IN_INNER_VLAN_OFST 62 2034 #define MC_CMD_FILTER_OP_EXT_IN_INNER_VLAN_LEN 2 2036 #define MC_CMD_FILTER_OP_EXT_IN_OUTER_VLAN_OFST 64 2037 #define MC_CMD_FILTER_OP_EXT_IN_OUTER_VLAN_LEN 2 2039 #define MC_CMD_FILTER_OP_EXT_IN_IP_PROTO_OFST 66 2040 #define MC_CMD_FILTER_OP_EXT_IN_IP_PROTO_LEN 2 2042 #define MC_CMD_FILTER_OP_EXT_IN_FWDEF0_OFST 68 2047 #define MC_CMD_FILTER_OP_EXT_IN_VNI_OR_VSID_OFST 72 2048 #define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_LBN 0 2049 #define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_WIDTH 24 2050 #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_LBN 24 2051 #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_WIDTH 8 2053 #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_VXLAN 0x0 2055 #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_GENEVE 0x1 2057 #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_EXPERIMENTAL 0xfe 2058 #define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_LBN 0 2059 #define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_WIDTH 24 2060 #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_LBN 24 2061 #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_WIDTH 8 2063 #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_NVGRE 0x0 2067 #define MC_CMD_FILTER_OP_EXT_IN_SRC_IP_OFST 76 2068 #define MC_CMD_FILTER_OP_EXT_IN_SRC_IP_LEN 16 2072 #define MC_CMD_FILTER_OP_EXT_IN_DST_IP_OFST 92 2073 #define MC_CMD_FILTER_OP_EXT_IN_DST_IP_LEN 16 2077 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_MAC_OFST 108 2078 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_MAC_LEN 6 2080 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_PORT_OFST 114 2081 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_PORT_LEN 2 2085 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_MAC_OFST 116 2086 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_MAC_LEN 6 2090 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_PORT_OFST 122 2091 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_PORT_LEN 2 2094 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_ETHER_TYPE_OFST 124 2095 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_ETHER_TYPE_LEN 2 2098 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_INNER_VLAN_OFST 126 2099 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_INNER_VLAN_LEN 2 2102 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_OUTER_VLAN_OFST 128 2103 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_OUTER_VLAN_LEN 2 2107 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_IP_PROTO_OFST 130 2108 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_IP_PROTO_LEN 2 2112 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF0_OFST 132 2116 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF1_OFST 136 2120 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_IP_OFST 140 2121 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_IP_LEN 16 2125 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_IP_OFST 156 2126 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_IP_LEN 16 2129 #define MC_CMD_FILTER_OP_OUT_LEN 12 2131 #define MC_CMD_FILTER_OP_OUT_OP_OFST 0 2138 #define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4 2139 #define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8 2140 #define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4 2141 #define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8 2143 #define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff 2145 #define MC_CMD_FILTER_OP_OUT_HANDLE_HI_INVALID 0xffffffff 2148 #define MC_CMD_FILTER_OP_EXT_OUT_LEN 12 2150 #define MC_CMD_FILTER_OP_EXT_OUT_OP_OFST 0 2157 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4 2158 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8 2159 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4 2160 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8 2169 #define MC_CMD_ALLOC_VIS 0x8b 2170 #undef MC_CMD_0x8b_PRIVILEGE_CTG 2172 #define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL 2175 #define MC_CMD_ALLOC_VIS_IN_LEN 8 2177 #define MC_CMD_ALLOC_VIS_IN_MIN_VI_COUNT_OFST 0 2179 #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_OFST 4 2184 #define MC_CMD_ALLOC_VIS_OUT_LEN 8 2186 #define MC_CMD_ALLOC_VIS_OUT_VI_COUNT_OFST 0 2190 #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_OFST 4 2193 #define MC_CMD_ALLOC_VIS_EXT_OUT_LEN 12 2195 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_COUNT_OFST 0 2199 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_OFST 4 2201 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_SHIFT_OFST 8 2209 #define MC_CMD_FREE_VIS 0x8c 2210 #undef MC_CMD_0x8c_PRIVILEGE_CTG 2212 #define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL 2215 #define MC_CMD_FREE_VIS_IN_LEN 0 2218 #define MC_CMD_FREE_VIS_OUT_LEN 0 2225 #define MC_CMD_GET_PORT_ASSIGNMENT 0xb8 2226 #undef MC_CMD_0xb8_PRIVILEGE_CTG 2228 #define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL 2231 #define MC_CMD_GET_PORT_ASSIGNMENT_IN_LEN 0 2234 #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN 4 2236 #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_PORT_OFST 0 2247 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117 2248 #undef MC_CMD_0x117_PRIVILEGE_CTG 2250 #define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN 2253 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMIN 4 2254 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX 68 2255 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LEN(num) (4+4*(num)) 2257 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_OFST 0 2258 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_LEN 2 2259 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_UNLOADING_LBN 0 2260 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_UNLOADING_WIDTH 1 2262 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_NUM_ENTRIES_OFST 2 2263 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_NUM_ENTRIES_LEN 2 2267 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_OFST 4 2268 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_LEN 4 2269 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MINNUM 0 2270 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MAXNUM 16 2273 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_LEN 2 2275 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_FLAGS_OFST 0 2276 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_FLAGS_LEN 2 2277 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_LBN 0 2278 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_WIDTH 1 FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)