#include <rtl818x.h>
Definition at line 26 of file rtl818x.h.
◆ MAC
◆ reserved_0
u8 rtl818x_csr::reserved_0[2] |
◆ MAR
◆ RX_FIFO_COUNT
u8 rtl818x_csr::RX_FIFO_COUNT |
◆ reserved_1
u8 rtl818x_csr::reserved_1 |
◆ TX_FIFO_COUNT
u8 rtl818x_csr::TX_FIFO_COUNT |
◆ BQREQ
◆ reserved_2
u8 rtl818x_csr::reserved_2[4] |
◆ TSFT
◆ TLPDA
◆ TNPDA
◆ THPDA
◆ BRSR
◆ BSSID
◆ RESP_RATE
u8 rtl818x_csr::RESP_RATE |
◆ EIFS
◆ reserved_3
u8 rtl818x_csr::reserved_3[1] |
◆ CMD
◆ reserved_4
u8 rtl818x_csr::reserved_4[4] |
◆ INT_MASK
u16 rtl818x_csr::INT_MASK |
◆ INT_STATUS
u16 rtl818x_csr::INT_STATUS |
◆ TX_CONF
◆ RX_CONF
◆ INT_TIMEOUT
u32 rtl818x_csr::INT_TIMEOUT |
◆ TBDA
◆ EEPROM_CMD
u8 rtl818x_csr::EEPROM_CMD |
◆ CONFIG0
◆ CONFIG1
◆ CONFIG2
◆ ANAPARAM
u32 rtl818x_csr::ANAPARAM |
◆ MSR
◆ CONFIG3
◆ CONFIG4
◆ TESTR
◆ reserved_9
u8 rtl818x_csr::reserved_9[2] |
◆ PGSELECT
◆ SECURITY
◆ ANAPARAM2
u32 rtl818x_csr::ANAPARAM2 |
◆ reserved_10
u8 rtl818x_csr::reserved_10[12] |
◆ BEACON_INTERVAL
u16 rtl818x_csr::BEACON_INTERVAL |
◆ ATIM_WND
u16 rtl818x_csr::ATIM_WND |
◆ BEACON_INTERVAL_TIME
u16 rtl818x_csr::BEACON_INTERVAL_TIME |
◆ ATIMTR_INTERVAL
u16 rtl818x_csr::ATIMTR_INTERVAL |
◆ PHY_DELAY
u8 rtl818x_csr::PHY_DELAY |
◆ CARRIER_SENSE_COUNTER
u8 rtl818x_csr::CARRIER_SENSE_COUNTER |
◆ reserved_11
u8 rtl818x_csr::reserved_11[2] |
◆ PHY
◆ RFPinsOutput
u16 rtl818x_csr::RFPinsOutput |
◆ RFPinsEnable
u16 rtl818x_csr::RFPinsEnable |
◆ RFPinsSelect
u16 rtl818x_csr::RFPinsSelect |
◆ RFPinsInput
u16 rtl818x_csr::RFPinsInput |
◆ RF_PARA
◆ RF_TIMING
u32 rtl818x_csr::RF_TIMING |
◆ GP_ENABLE
u8 rtl818x_csr::GP_ENABLE |
◆ GPIO
◆ reserved_12
u8 rtl818x_csr::reserved_12[2] |
◆ HSSI_PARA
u32 rtl818x_csr::HSSI_PARA |
◆ reserved_13
u8 rtl818x_csr::reserved_13[4] |
◆ TX_AGC_CTL
u8 rtl818x_csr::TX_AGC_CTL |
◆ TX_GAIN_CCK
u8 rtl818x_csr::TX_GAIN_CCK |
◆ TX_GAIN_OFDM
u8 rtl818x_csr::TX_GAIN_OFDM |
◆ TX_ANTENNA
u8 rtl818x_csr::TX_ANTENNA |
◆ reserved_14
u8 rtl818x_csr::reserved_14[16] |
◆ WPA_CONF
◆ reserved_15
u8 rtl818x_csr::reserved_15[3] |
◆ SIFS
◆ DIFS
◆ SLOT
◆ reserved_16
u8 rtl818x_csr::reserved_16[5] |
◆ CW_CONF
◆ CW_VAL
◆ RATE_FALLBACK
u8 rtl818x_csr::RATE_FALLBACK |
◆ ACM_CONTROL
u8 rtl818x_csr::ACM_CONTROL |
◆ reserved_17
u8 rtl818x_csr::reserved_17[24] |
◆ CONFIG5
◆ TX_DMA_POLLING
u8 rtl818x_csr::TX_DMA_POLLING |
◆ reserved_18
u8 rtl818x_csr::reserved_18[2] |
◆ CWR
◆ RETRY_CTR
u8 rtl818x_csr::RETRY_CTR |
◆ reserved_19
u8 rtl818x_csr::reserved_19[3] |
◆ INT_MIG
◆ RDSAR
◆ TID_AC_MAP
u16 rtl818x_csr::TID_AC_MAP |
◆ reserved_20
u8 rtl818x_csr::reserved_20[4] |
◆ ANAPARAM3
u8 rtl818x_csr::ANAPARAM3 |
◆ reserved_21
u8 rtl818x_csr::reserved_21[5] |
◆ FEMR
◆ reserved_22
u8 rtl818x_csr::reserved_22[4] |
◆ TALLY_CNT
u16 rtl818x_csr::TALLY_CNT |
◆ TALLY_SEL
u8 rtl818x_csr::TALLY_SEL |
The documentation for this struct was generated from the following file: