38 #define QIB_7322_Revision_offset 0x00000000UL 54 #define QIB_7322_Control_offset 0x00000008UL 70 #define QIB_7322_PageAlign_offset 0x00000010UL 73 #define QIB_7322_ContextCnt_offset 0x00000018UL 76 #define QIB_7322_Scratch_offset 0x00000020UL 79 #define QIB_7322_CntrRegBase_offset 0x00000028UL 82 #define QIB_7322_SendRegBase_offset 0x00000030UL 85 #define QIB_7322_UserRegBase_offset 0x00000038UL 88 #define QIB_7322_DebugPortSel_offset 0x00000040UL 105 #define QIB_7322_DebugPortNibbleSel_offset 0x00000048UL 129 #define QIB_7322_DebugSigsIntSel_offset 0x00000050UL 156 #define QIB_7322_DebugPortValueReg_offset 0x00000058UL 158 #define QIB_7322_IntBlocked_offset 0x00000060UL 220 #define QIB_7322_IntMask_offset 0x00000068UL 282 #define QIB_7322_IntStatus_offset 0x00000070UL 344 #define QIB_7322_IntClear_offset 0x00000078UL 406 #define QIB_7322_ErrMask_offset 0x00000080UL 434 #define QIB_7322_ErrStatus_offset 0x00000088UL 462 #define QIB_7322_ErrClear_offset 0x00000090UL 490 #define QIB_7322_HwErrMask_offset 0x00000098UL 520 #define QIB_7322_HwErrStatus_offset 0x000000a0UL 550 #define QIB_7322_HwErrClear_offset 0x000000a8UL 580 #define QIB_7322_HwDiagCtrl_offset 0x000000b0UL 600 #define QIB_7322_EXTStatus_offset 0x000000c0UL 613 #define QIB_7322_EXTCtrl_offset 0x000000c8UL 628 #define QIB_7322_GPIODebugSelReg_offset 0x000000d8UL 639 #define QIB_7322_GPIOOut_offset 0x000000e0UL 642 #define QIB_7322_GPIOMask_offset 0x000000e8UL 645 #define QIB_7322_GPIOStatus_offset 0x000000f0UL 648 #define QIB_7322_GPIOClear_offset 0x000000f8UL 651 #define QIB_7322_RcvCtrl_offset 0x00000100UL 668 #define QIB_7322_RcvHdrSize_offset 0x00000110UL 671 #define QIB_7322_RcvHdrCnt_offset 0x00000118UL 674 #define QIB_7322_RcvHdrEntSize_offset 0x00000120UL 677 #define QIB_7322_RcvTIDBase_offset 0x00000128UL 680 #define QIB_7322_RcvTIDCnt_offset 0x00000130UL 683 #define QIB_7322_RcvEgrBase_offset 0x00000138UL 686 #define QIB_7322_RcvEgrCnt_offset 0x00000140UL 689 #define QIB_7322_RcvBufBase_offset 0x00000148UL 692 #define QIB_7322_RcvBufSize_offset 0x00000150UL 695 #define QIB_7322_RxIntMemBase_offset 0x00000158UL 698 #define QIB_7322_RxIntMemSize_offset 0x00000160UL 701 #define QIB_7322_encryption_key_low_offset 0x00000180UL 704 #define QIB_7322_encryption_key_high_offset 0x00000188UL 707 #define QIB_7322_feature_mask_offset 0x00000190UL 710 #define QIB_7322_active_feature_mask_offset 0x00000198UL 725 #define QIB_7322_SendCtrl_offset 0x000001c0UL 745 #define QIB_7322_SendBufBase_offset 0x000001c8UL 757 #define QIB_7322_SendBufSize_offset 0x000001d0UL 769 #define QIB_7322_SendBufCnt_offset 0x000001d8UL 781 #define QIB_7322_SendBufAvailAddr_offset 0x000001e0UL 792 #define QIB_7322_TxIntMemBase_offset 0x000001e8UL 795 #define QIB_7322_TxIntMemSize_offset 0x000001f0UL 798 #define QIB_7322_SendBufErr0_offset 0x00000240UL 807 #define QIB_7322_AvailUpdCount_offset 0x00000268UL 817 #define QIB_7322_RcvHdrAddr0_offset 0x00000280UL 828 #define QIB_7322_RcvHdrTailAddr0_offset 0x00000340UL 839 #define QIB_7322_EEPCtlStat_offset 0x000003e8UL 856 #define QIB_7322_EEPAddrCmd_offset 0x000003f0UL 867 #define QIB_7322_EEPData_offset 0x000003f8UL 870 #define QIB_7322_efuse_control_reg_offset 0x00000410UL 887 #define QIB_7322_efuse_data_reg_offset 0x00000418UL 890 #define QIB_7322_voltage_margin_reg_offset 0x00000428UL 901 #define QIB_7322_VTSense_reg_offset 0x00000430UL 920 #define QIB_7322_procmon_reg_offset 0x00000438UL 935 #define QIB_7322_PcieRbufTestReg0_offset 0x00000440UL 938 #define QIB_7322_ahb_access_ctrl_offset 0x00000460UL 949 #define QIB_7322_ahb_transaction_reg_offset 0x00000468UL 964 #define QIB_7322_SPC_JTAG_ACCESS_REG_offset 0x00000470UL 979 #define QIB_7322_LAControlReg_offset 0x00000478UL 995 #define QIB_7322_PcieRhdrTestReg0_offset 0x00000480UL 998 #define QIB_7322_SendCheckMask0_offset 0x000004c0UL 1007 #define QIB_7322_SendGRHCheckMask0_offset 0x000004e0UL 1016 #define QIB_7322_SendIBPacketMask0_offset 0x00000500UL 1025 #define QIB_7322_IntRedirect0_offset 0x00000540UL 1046 #define QIB_7322_Int_Granted_offset 0x00000570UL 1049 #define QIB_7322_vec_clr_without_int_offset 0x00000578UL 1052 #define QIB_7322_DCACtrlA_offset 0x00000580UL 1066 #define QIB_7322_DCACtrlB_offset 0x00000588UL 1084 #define QIB_7322_DCACtrlC_offset 0x00000590UL 1102 #define QIB_7322_DCACtrlD_offset 0x00000598UL 1120 #define QIB_7322_DCACtrlE_offset 0x000005a0UL 1138 #define QIB_7322_DCACtrlF_offset 0x000005a8UL 1154 #define QIB_7322_MemErrCtrlA_offset 0x00000600UL 1211 #define QIB_7322_MemErrCtrlB_offset 0x00000608UL 1264 #define QIB_7322_MemMultiUnCorErrMask_offset 0x00000610UL 1317 #define QIB_7322_MemMultiUnCorErrStatus_offset 0x00000618UL 1370 #define QIB_7322_MemMultiUnCorErrClear_offset 0x00000620UL 1423 #define QIB_7322_MemUnCorErrMask_offset 0x00000628UL 1476 #define QIB_7322_MemUnCorErrStatus_offset 0x00000630UL 1529 #define QIB_7322_MemUnCorErrClear_offset 0x00000638UL 1582 #define QIB_7322_MemMultiCorErrMask_offset 0x00000640UL 1635 #define QIB_7322_MemMultiCorErrStatus_offset 0x00000648UL 1688 #define QIB_7322_MemMultiCorErrClear_offset 0x00000650UL 1741 #define QIB_7322_MemCorErrMask_offset 0x00000658UL 1794 #define QIB_7322_MemCorErrStatus_offset 0x00000660UL 1847 #define QIB_7322_MemCorErrClear_offset 0x00000668UL 1900 #define QIB_7322_MsixTableUnCorErrLogA_offset 0x00000680UL 1909 #define QIB_7322_MsixTableUnCorErrLogB_offset 0x00000688UL 1922 #define QIB_7322_MsixTableUnCorErrLogC_offset 0x00000690UL 1934 #define QIB_7322_MsixEntryWithUncorErr_offset 0x00000698UL 1937 #define QIB_7322_MsixTableCorErrLogA_offset 0x000006a0UL 1946 #define QIB_7322_MsixTableCorErrLogB_offset 0x000006a8UL 1959 #define QIB_7322_MsixTableCorErrLogC_offset 0x000006b0UL 1971 #define QIB_7322_PcieCplDataBufrUnCorErrLogA_offset 0x00000700UL 1980 #define QIB_7322_PcieCplDataBufrUnCorErrLogB_offset 0x00000708UL 1989 #define QIB_7322_PcieCplDataBufrUnCorErrLogC_offset 0x00000710UL 2001 #define QIB_7322_PcieCplHdrBufrUnCorErrLogA_offset 0x00000720UL 2010 #define QIB_7322_PcieCplHdrBufrUnCorErrLogB_offset 0x00000728UL 2020 #define QIB_7322_PcieCplHdrBufrUnCorErrLogC_offset 0x00000730UL 2031 #define QIB_7322_PciePDataBufrUnCorErrLogA_offset 0x00000740UL 2040 #define QIB_7322_PciePDataBufrUnCorErrLogB_offset 0x00000748UL 2049 #define QIB_7322_PciePDataBufrUnCorErrLogC_offset 0x00000750UL 2061 #define QIB_7322_PciePHdrBufrUnCorErrLogA_offset 0x00000760UL 2070 #define QIB_7322_PciePHdrBufrUnCorErrLogB_offset 0x00000768UL 2080 #define QIB_7322_PciePHdrBufrUnCorErrLogC_offset 0x00000770UL 2091 #define QIB_7322_PcieRetryBufrUnCorErrLogA_offset 0x00000780UL 2100 #define QIB_7322_PcieRetryBufrUnCorErrLogB_offset 0x00000788UL 2109 #define QIB_7322_PcieRetryBufrUnCorErrLogC_offset 0x00000790UL 2121 #define QIB_7322_RxTIDArrayUnCorErrLogA_offset 0x00000800UL 2132 #define QIB_7322_RxTIDArrayUnCorErrLogB_offset 0x00000808UL 2142 #define QIB_7322_RxEagerArrayUnCorErrLogA_offset 0x00000810UL 2153 #define QIB_7322_RxEagerArrayUnCorErrLogB_offset 0x00000818UL 2163 #define QIB_7322_SBufMainArrayUnCorErrLogA_offset 0x00000880UL 2172 #define QIB_7322_SBufMainArrayUnCorErrLogB_offset 0x00000888UL 2181 #define QIB_7322_SBufMainArrayUnCorErrLogC_offset 0x00000890UL 2193 #define QIB_7322_SBufExtraArrayUnCorErrLogA_offset 0x00000898UL 2202 #define QIB_7322_SBufExtraArrayUnCorErrLogB_offset 0x000008a0UL 2211 #define QIB_7322_SBufExtraArrayUnCorErrLogC_offset 0x000008a8UL 2223 #define QIB_7322_SendPbcArrayUnCorErrLog_offset 0x000008b0UL 2235 #define QIB_7322_SBufVL15ArrayUnCorErrLogA_offset 0x000008c0UL 2244 #define QIB_7322_PcieCplDataBufrCorErrLogA_offset 0x00000900UL 2253 #define QIB_7322_PcieCplDataBufrCorErrLogB_offset 0x00000908UL 2262 #define QIB_7322_PcieCplDataBufrCorErrLogC_offset 0x00000910UL 2274 #define QIB_7322_PcieCplHdrBufrCorErrLogA_offset 0x00000920UL 2283 #define QIB_7322_PcieCplHdrBufrCorErrLogB_offset 0x00000928UL 2293 #define QIB_7322_PcieCplHdrBufrCorErrLogC_offset 0x00000930UL 2304 #define QIB_7322_PciePDataBufrCorErrLogA_offset 0x00000940UL 2313 #define QIB_7322_PciePDataBufrCorErrLogB_offset 0x00000948UL 2322 #define QIB_7322_PciePDataBufrCorErrLogC_offset 0x00000950UL 2334 #define QIB_7322_PciePHdrBufrCorErrLogA_offset 0x00000960UL 2343 #define QIB_7322_PciePHdrBufrCorErrLogB_offset 0x00000968UL 2353 #define QIB_7322_PciePHdrBufrCorErrLogC_offset 0x00000970UL 2364 #define QIB_7322_PcieRetryBufrCorErrLogA_offset 0x00000980UL 2373 #define QIB_7322_PcieRetryBufrCorErrLogB_offset 0x00000988UL 2382 #define QIB_7322_PcieRetryBufrCorErrLogC_offset 0x00000990UL 2394 #define QIB_7322_RxTIDArrayCorErrLogA_offset 0x00000a00UL 2405 #define QIB_7322_RxTIDArrayCorErrLogB_offset 0x00000a08UL 2415 #define QIB_7322_RxEagerArrayCorErrLogA_offset 0x00000a10UL 2426 #define QIB_7322_RxEagerArrayCorErrLogB_offset 0x00000a18UL 2436 #define QIB_7322_SBufMainArrayCorErrLogA_offset 0x00000a80UL 2445 #define QIB_7322_SBufMainArrayCorErrLogB_offset 0x00000a88UL 2454 #define QIB_7322_SBufMainArrayCorErrLogC_offset 0x00000a90UL 2466 #define QIB_7322_SBufExtraArrayCorErrLogA_offset 0x00000a98UL 2475 #define QIB_7322_SBufExtraArrayCorErrLogB_offset 0x00000aa0UL 2484 #define QIB_7322_SBufExtraArrayCorErrLogC_offset 0x00000aa8UL 2496 #define QIB_7322_SendPbcArrayCorErrLog_offset 0x00000ab0UL 2508 #define QIB_7322_SBufVL15ArrayCorErrLogA_offset 0x00000ac0UL 2517 #define QIB_7322_RcvAvailTimeOut0_offset 0x00000c00UL 2528 #define QIB_7322_CntrRegBase_0_offset 0x00001028UL 2531 #define QIB_7322_ErrMask_0_offset 0x00001080UL 2584 #define QIB_7322_ErrStatus_0_offset 0x00001088UL 2637 #define QIB_7322_ErrClear_0_offset 0x00001090UL 2690 #define QIB_7322_TXEStatus_0_offset 0x000010b8UL 2712 #define QIB_7322_RcvCtrl_0_offset 0x00001100UL 2729 #define QIB_7322_RcvBTHQP_0_offset 0x00001108UL 2739 #define QIB_7322_RcvQPMapTableA_0_offset 0x00001110UL 2754 #define QIB_7322_RcvQPMapTableB_0_offset 0x00001118UL 2769 #define QIB_7322_RcvQPMapTableC_0_offset 0x00001120UL 2784 #define QIB_7322_RcvQPMapTableD_0_offset 0x00001128UL 2799 #define QIB_7322_RcvQPMapTableE_0_offset 0x00001130UL 2814 #define QIB_7322_RcvQPMapTableF_0_offset 0x00001138UL 2825 #define QIB_7322_PSStat_0_offset 0x00001140UL 2828 #define QIB_7322_PSStart_0_offset 0x00001148UL 2831 #define QIB_7322_PSInterval_0_offset 0x00001150UL 2834 #define QIB_7322_RcvStatus_0_offset 0x00001160UL 2845 #define QIB_7322_RcvPartitionKey_0_offset 0x00001168UL 2848 #define QIB_7322_RcvQPMulticastContext_0_offset 0x00001170UL 2858 #define QIB_7322_RcvPktLEDCnt_0_offset 0x00001178UL 2868 #define QIB_7322_SendDmaIdleCnt_0_offset 0x00001180UL 2878 #define QIB_7322_SendDmaReloadCnt_0_offset 0x00001188UL 2888 #define QIB_7322_SendDmaDescCnt_0_offset 0x00001190UL 2898 #define QIB_7322_SendCtrl_0_offset 0x000011c0UL 2921 #define QIB_7322_SendDmaBase_0_offset 0x000011f8UL 2931 #define QIB_7322_SendDmaLenGen_0_offset 0x00001200UL 2942 #define QIB_7322_SendDmaTail_0_offset 0x00001208UL 2952 #define QIB_7322_SendDmaHead_0_offset 0x00001210UL 2964 #define QIB_7322_SendDmaHeadAddr_0_offset 0x00001218UL 2974 #define QIB_7322_SendDmaBufMask0_0_offset 0x00001220UL 2983 #define QIB_7322_SendDmaStatus_0_offset 0x00001238UL 3007 #define QIB_7322_SendDmaPriorityThld_0_offset 0x00001258UL 3017 #define QIB_7322_SendHdrErrSymptom_0_offset 0x00001260UL 3033 #define QIB_7322_RxCreditVL0_0_offset 0x00001280UL 3045 #define QIB_7322_SendDmaBufUsed0_0_offset 0x00001480UL 3054 #define QIB_7322_SendDmaReqTagUsed_0_offset 0x00001498UL 3064 #define QIB_7322_SendCheckControl_0_offset 0x000014a8UL 3078 #define QIB_7322_SendIBSLIDMask_0_offset 0x000014b0UL 3088 #define QIB_7322_SendIBSLIDAssign_0_offset 0x000014b8UL 3098 #define QIB_7322_IBCStatusA_0_offset 0x00001540UL 3129 #define QIB_7322_IBCStatusB_0_offset 0x00001548UL 3146 #define QIB_7322_IBCCtrlA_0_offset 0x00001560UL 3168 #define QIB_7322_IBCCtrlB_0_offset 0x00001568UL 3196 #define QIB_7322_IBCCtrlC_0_offset 0x00001570UL 3207 #define QIB_7322_HRTBT_GUID_0_offset 0x00001588UL 3210 #define QIB_7322_IB_SDTEST_IF_TX_0_offset 0x00001590UL 3228 #define QIB_7322_IB_SDTEST_IF_RX_0_offset 0x00001598UL 3243 #define QIB_7322_IBNCModeCtrl_0_offset 0x000015b8UL 3262 #define QIB_7322_IBSerdesStatus_0_offset 0x000015d0UL 3265 #define QIB_7322_IBPCSConfig_0_offset 0x000015d8UL 3279 #define QIB_7322_IBSerdesCtrl_0_offset 0x000015e0UL 3303 #define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_offset 0x00001600UL 3320 #define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_offset 0x00001640UL 3341 #define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_offset 0x00001648UL 3362 #define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_offset 0x00001650UL 3383 #define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_offset 0x00001658UL 3404 #define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_offset 0x00001660UL 3425 #define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_offset 0x00001668UL 3446 #define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_0_offset 0x00001670UL 3449 #define QIB_7322_RxBufrUnCorErrLogA_0_offset 0x00001800UL 3458 #define QIB_7322_RxBufrUnCorErrLogB_0_offset 0x00001808UL 3467 #define QIB_7322_RxBufrUnCorErrLogC_0_offset 0x00001810UL 3476 #define QIB_7322_RxBufrUnCorErrLogD_0_offset 0x00001818UL 3485 #define QIB_7322_RxBufrUnCorErrLogE_0_offset 0x00001820UL 3497 #define QIB_7322_RxFlagUnCorErrLogA_0_offset 0x00001828UL 3506 #define QIB_7322_RxFlagUnCorErrLogB_0_offset 0x00001830UL 3517 #define QIB_7322_RxLkupiqUnCorErrLogA_0_offset 0x00001840UL 3528 #define QIB_7322_RxLkupiqUnCorErrLogB_0_offset 0x00001848UL 3538 #define QIB_7322_RxHdrFifoUnCorErrLogA_0_offset 0x00001850UL 3547 #define QIB_7322_RxHdrFifoUnCorErrLogB_0_offset 0x00001858UL 3556 #define QIB_7322_RxHdrFifoUnCorErrLogC_0_offset 0x00001860UL 3567 #define QIB_7322_RxDataFifoUnCorErrLogA_0_offset 0x00001868UL 3576 #define QIB_7322_RxDataFifoUnCorErrLogB_0_offset 0x00001870UL 3585 #define QIB_7322_RxDataFifoUnCorErrLogC_0_offset 0x00001878UL 3596 #define QIB_7322_LaFifoArray0UnCorErrLog_0_offset 0x00001880UL 3608 #define QIB_7322_RmFifoArrayUnCorErrLogA_0_offset 0x000018c0UL 3617 #define QIB_7322_RmFifoArrayUnCorErrLogB_0_offset 0x000018c8UL 3626 #define QIB_7322_RmFifoArrayUnCorErrLogC_0_offset 0x000018d0UL 3638 #define QIB_7322_RxBufrCorErrLogA_0_offset 0x00001900UL 3647 #define QIB_7322_RxBufrCorErrLogB_0_offset 0x00001908UL 3656 #define QIB_7322_RxBufrCorErrLogC_0_offset 0x00001910UL 3665 #define QIB_7322_RxBufrCorErrLogD_0_offset 0x00001918UL 3674 #define QIB_7322_RxBufrCorErrLogE_0_offset 0x00001920UL 3686 #define QIB_7322_RxFlagCorErrLogA_0_offset 0x00001928UL 3695 #define QIB_7322_RxFlagCorErrLogB_0_offset 0x00001930UL 3706 #define QIB_7322_RxLkupiqCorErrLogA_0_offset 0x00001940UL 3717 #define QIB_7322_RxLkupiqCorErrLogB_0_offset 0x00001948UL 3727 #define QIB_7322_RxHdrFifoCorErrLogA_0_offset 0x00001950UL 3736 #define QIB_7322_RxHdrFifoCorErrLogB_0_offset 0x00001958UL 3745 #define QIB_7322_RxHdrFifoCorErrLogC_0_offset 0x00001960UL 3756 #define QIB_7322_RxDataFifoCorErrLogA_0_offset 0x00001968UL 3765 #define QIB_7322_RxDataFifoCorErrLogB_0_offset 0x00001970UL 3774 #define QIB_7322_RxDataFifoCorErrLogC_0_offset 0x00001978UL 3785 #define QIB_7322_LaFifoArray0CorErrLog_0_offset 0x00001980UL 3797 #define QIB_7322_RmFifoArrayCorErrLogA_0_offset 0x000019c0UL 3806 #define QIB_7322_RmFifoArrayCorErrLogB_0_offset 0x000019c8UL 3815 #define QIB_7322_RmFifoArrayCorErrLogC_0_offset 0x000019d0UL 3827 #define QIB_7322_HighPriorityLimit_0_offset 0x00001bc0UL 3837 #define QIB_7322_LowPriority0_0_offset 0x00001c00UL 3849 #define QIB_7322_HighPriority0_0_offset 0x00001e00UL 3861 #define QIB_7322_CntrRegBase_1_offset 0x00002028UL 3864 #define QIB_7322_ErrMask_1_offset 0x00002080UL 3917 #define QIB_7322_ErrStatus_1_offset 0x00002088UL 3970 #define QIB_7322_ErrClear_1_offset 0x00002090UL 4023 #define QIB_7322_TXEStatus_1_offset 0x000020b8UL 4045 #define QIB_7322_RcvCtrl_1_offset 0x00002100UL 4062 #define QIB_7322_RcvBTHQP_1_offset 0x00002108UL 4072 #define QIB_7322_RcvQPMapTableA_1_offset 0x00002110UL 4087 #define QIB_7322_RcvQPMapTableB_1_offset 0x00002118UL 4102 #define QIB_7322_RcvQPMapTableC_1_offset 0x00002120UL 4117 #define QIB_7322_RcvQPMapTableD_1_offset 0x00002128UL 4132 #define QIB_7322_RcvQPMapTableE_1_offset 0x00002130UL 4147 #define QIB_7322_RcvQPMapTableF_1_offset 0x00002138UL 4158 #define QIB_7322_PSStat_1_offset 0x00002140UL 4161 #define QIB_7322_PSStart_1_offset 0x00002148UL 4164 #define QIB_7322_PSInterval_1_offset 0x00002150UL 4167 #define QIB_7322_RcvStatus_1_offset 0x00002160UL 4178 #define QIB_7322_RcvPartitionKey_1_offset 0x00002168UL 4181 #define QIB_7322_RcvQPMulticastContext_1_offset 0x00002170UL 4191 #define QIB_7322_RcvPktLEDCnt_1_offset 0x00002178UL 4201 #define QIB_7322_SendDmaIdleCnt_1_offset 0x00002180UL 4211 #define QIB_7322_SendDmaReloadCnt_1_offset 0x00002188UL 4221 #define QIB_7322_SendDmaDescCnt_1_offset 0x00002190UL 4231 #define QIB_7322_SendCtrl_1_offset 0x000021c0UL 4254 #define QIB_7322_SendDmaBase_1_offset 0x000021f8UL 4264 #define QIB_7322_SendDmaLenGen_1_offset 0x00002200UL 4275 #define QIB_7322_SendDmaTail_1_offset 0x00002208UL 4285 #define QIB_7322_SendDmaHead_1_offset 0x00002210UL 4297 #define QIB_7322_SendDmaHeadAddr_1_offset 0x00002218UL 4307 #define QIB_7322_SendDmaBufMask0_1_offset 0x00002220UL 4316 #define QIB_7322_SendDmaStatus_1_offset 0x00002238UL 4340 #define QIB_7322_SendDmaPriorityThld_1_offset 0x00002258UL 4350 #define QIB_7322_SendHdrErrSymptom_1_offset 0x00002260UL 4366 #define QIB_7322_RxCreditVL0_1_offset 0x00002280UL 4378 #define QIB_7322_SendDmaBufUsed0_1_offset 0x00002480UL 4387 #define QIB_7322_SendDmaReqTagUsed_1_offset 0x00002498UL 4397 #define QIB_7322_SendCheckControl_1_offset 0x000024a8UL 4411 #define QIB_7322_SendIBSLIDMask_1_offset 0x000024b0UL 4421 #define QIB_7322_SendIBSLIDAssign_1_offset 0x000024b8UL 4431 #define QIB_7322_IBCStatusA_1_offset 0x00002540UL 4462 #define QIB_7322_IBCStatusB_1_offset 0x00002548UL 4476 #define QIB_7322_IBCCtrlA_1_offset 0x00002560UL 4498 #define QIB_7322_IBCCtrlB_1_offset 0x00002568UL 4526 #define QIB_7322_IBCCtrlC_1_offset 0x00002570UL 4537 #define QIB_7322_HRTBT_GUID_1_offset 0x00002588UL 4540 #define QIB_7322_IB_SDTEST_IF_TX_1_offset 0x00002590UL 4558 #define QIB_7322_IB_SDTEST_IF_RX_1_offset 0x00002598UL 4573 #define QIB_7322_IBNCModeCtrl_1_offset 0x000025b8UL 4592 #define QIB_7322_IBSerdesStatus_1_offset 0x000025d0UL 4595 #define QIB_7322_IBPCSConfig_1_offset 0x000025d8UL 4609 #define QIB_7322_IBSerdesCtrl_1_offset 0x000025e0UL 4633 #define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_offset 0x00002600UL 4650 #define QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_offset 0x00002640UL 4671 #define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_offset 0x00002648UL 4692 #define QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_offset 0x00002650UL 4713 #define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_offset 0x00002658UL 4734 #define QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_offset 0x00002660UL 4755 #define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_offset 0x00002668UL 4776 #define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_1_offset 0x00002670UL 4779 #define QIB_7322_RxBufrUnCorErrLogA_1_offset 0x00002800UL 4788 #define QIB_7322_RxBufrUnCorErrLogB_1_offset 0x00002808UL 4797 #define QIB_7322_RxBufrUnCorErrLogC_1_offset 0x00002810UL 4806 #define QIB_7322_RxBufrUnCorErrLogD_1_offset 0x00002818UL 4815 #define QIB_7322_RxBufrUnCorErrLogE_1_offset 0x00002820UL 4827 #define QIB_7322_RxFlagUnCorErrLogA_1_offset 0x00002828UL 4836 #define QIB_7322_RxFlagUnCorErrLogB_1_offset 0x00002830UL 4847 #define QIB_7322_RxLkupiqUnCorErrLogA_1_offset 0x00002840UL 4858 #define QIB_7322_RxLkupiqUnCorErrLogB_1_offset 0x00002848UL 4868 #define QIB_7322_RxHdrFifoUnCorErrLogA_1_offset 0x00002850UL 4877 #define QIB_7322_RxHdrFifoUnCorErrLogB_1_offset 0x00002858UL 4886 #define QIB_7322_RxHdrFifoUnCorErrLogC_1_offset 0x00002860UL 4897 #define QIB_7322_RxDataFifoUnCorErrLogA_1_offset 0x00002868UL 4906 #define QIB_7322_RxDataFifoUnCorErrLogB_1_offset 0x00002870UL 4915 #define QIB_7322_RxDataFifoUnCorErrLogC_1_offset 0x00002878UL 4926 #define QIB_7322_LaFifoArray0UnCorErrLog_1_offset 0x00002880UL 4938 #define QIB_7322_RmFifoArrayUnCorErrLogA_1_offset 0x000028c0UL 4947 #define QIB_7322_RmFifoArrayUnCorErrLogB_1_offset 0x000028c8UL 4956 #define QIB_7322_RmFifoArrayUnCorErrLogC_1_offset 0x000028d0UL 4968 #define QIB_7322_RxBufrCorErrLogA_1_offset 0x00002900UL 4977 #define QIB_7322_RxBufrCorErrLogB_1_offset 0x00002908UL 4986 #define QIB_7322_RxBufrCorErrLogC_1_offset 0x00002910UL 4995 #define QIB_7322_RxBufrCorErrLogD_1_offset 0x00002918UL 5004 #define QIB_7322_RxBufrCorErrLogE_1_offset 0x00002920UL 5016 #define QIB_7322_RxFlagCorErrLogA_1_offset 0x00002928UL 5025 #define QIB_7322_RxFlagCorErrLogB_1_offset 0x00002930UL 5036 #define QIB_7322_RxLkupiqCorErrLogA_1_offset 0x00002940UL 5047 #define QIB_7322_RxLkupiqCorErrLogB_1_offset 0x00002948UL 5057 #define QIB_7322_RxHdrFifoCorErrLogA_1_offset 0x00002950UL 5066 #define QIB_7322_RxHdrFifoCorErrLogB_1_offset 0x00002958UL 5075 #define QIB_7322_RxHdrFifoCorErrLogC_1_offset 0x00002960UL 5086 #define QIB_7322_RxDataFifoCorErrLogA_1_offset 0x00002968UL 5095 #define QIB_7322_RxDataFifoCorErrLogB_1_offset 0x00002970UL 5104 #define QIB_7322_RxDataFifoCorErrLogC_1_offset 0x00002978UL 5115 #define QIB_7322_LaFifoArray0CorErrLog_1_offset 0x00002980UL 5127 #define QIB_7322_RmFifoArrayCorErrLogA_1_offset 0x000029c0UL 5136 #define QIB_7322_RmFifoArrayCorErrLogB_1_offset 0x000029c8UL 5145 #define QIB_7322_RmFifoArrayCorErrLogC_1_offset 0x000029d0UL 5157 #define QIB_7322_HighPriorityLimit_1_offset 0x00002bc0UL 5167 #define QIB_7322_LowPriority0_1_offset 0x00002c00UL 5179 #define QIB_7322_HighPriority0_1_offset 0x00002e00UL 5191 #define QIB_7322_SendBufAvail0_offset 0x00003000UL 5200 #define QIB_7322_MsixTable_offset 0x00008000UL 5203 #define QIB_7322_MsixPba_offset 0x00009000UL 5206 #define QIB_7322_LAMemory_offset 0x0000a000UL 5209 #define QIB_7322_LBIntCnt_offset 0x00011000UL 5212 #define QIB_7322_LBFlowStallCnt_offset 0x00011008UL 5215 #define QIB_7322_RxTIDFullErrCnt_offset 0x000110d0UL 5218 #define QIB_7322_RxTIDValidErrCnt_offset 0x000110d8UL 5221 #define QIB_7322_RxP0HdrEgrOvflCnt_offset 0x000110e8UL 5224 #define QIB_7322_PcieRetryBufDiagQwordCnt_offset 0x000111a0UL 5227 #define QIB_7322_RxTidFlowDropCnt_offset 0x000111e0UL 5230 #define QIB_7322_LBIntCnt_0_offset 0x00012000UL 5233 #define QIB_7322_TxCreditUpToDateTimeOut_0_offset 0x00012008UL 5236 #define QIB_7322_TxSDmaDescCnt_0_offset 0x00012010UL 5239 #define QIB_7322_TxUnsupVLErrCnt_0_offset 0x00012018UL 5242 #define QIB_7322_TxDataPktCnt_0_offset 0x00012020UL 5245 #define QIB_7322_TxFlowPktCnt_0_offset 0x00012028UL 5248 #define QIB_7322_TxDwordCnt_0_offset 0x00012030UL 5251 #define QIB_7322_TxLenErrCnt_0_offset 0x00012038UL 5254 #define QIB_7322_TxMaxMinLenErrCnt_0_offset 0x00012040UL 5257 #define QIB_7322_TxUnderrunCnt_0_offset 0x00012048UL 5260 #define QIB_7322_TxFlowStallCnt_0_offset 0x00012050UL 5263 #define QIB_7322_TxDroppedPktCnt_0_offset 0x00012058UL 5266 #define QIB_7322_RxDroppedPktCnt_0_offset 0x00012060UL 5269 #define QIB_7322_RxDataPktCnt_0_offset 0x00012068UL 5272 #define QIB_7322_RxFlowPktCnt_0_offset 0x00012070UL 5275 #define QIB_7322_RxDwordCnt_0_offset 0x00012078UL 5278 #define QIB_7322_RxLenErrCnt_0_offset 0x00012080UL 5281 #define QIB_7322_RxMaxMinLenErrCnt_0_offset 0x00012088UL 5284 #define QIB_7322_RxICRCErrCnt_0_offset 0x00012090UL 5287 #define QIB_7322_RxVCRCErrCnt_0_offset 0x00012098UL 5290 #define QIB_7322_RxFlowCtrlViolCnt_0_offset 0x000120a0UL 5293 #define QIB_7322_RxVersionErrCnt_0_offset 0x000120a8UL 5296 #define QIB_7322_RxLinkMalformCnt_0_offset 0x000120b0UL 5299 #define QIB_7322_RxEBPCnt_0_offset 0x000120b8UL 5302 #define QIB_7322_RxLPCRCErrCnt_0_offset 0x000120c0UL 5305 #define QIB_7322_RxBufOvflCnt_0_offset 0x000120c8UL 5308 #define QIB_7322_RxLenTruncateCnt_0_offset 0x000120d0UL 5311 #define QIB_7322_RxPKeyMismatchCnt_0_offset 0x000120e0UL 5314 #define QIB_7322_IBLinkDownedCnt_0_offset 0x00012180UL 5317 #define QIB_7322_IBSymbolErrCnt_0_offset 0x00012188UL 5320 #define QIB_7322_IBStatusChangeCnt_0_offset 0x00012190UL 5323 #define QIB_7322_IBLinkErrRecoveryCnt_0_offset 0x00012198UL 5326 #define QIB_7322_ExcessBufferOvflCnt_0_offset 0x000121a8UL 5329 #define QIB_7322_LocalLinkIntegrityErrCnt_0_offset 0x000121b0UL 5332 #define QIB_7322_RxVlErrCnt_0_offset 0x000121b8UL 5335 #define QIB_7322_RxDlidFltrCnt_0_offset 0x000121c0UL 5338 #define QIB_7322_RxVL15DroppedPktCnt_0_offset 0x000121c8UL 5341 #define QIB_7322_RxOtherLocalPhyErrCnt_0_offset 0x000121d0UL 5344 #define QIB_7322_RxQPInvalidContextCnt_0_offset 0x000121d8UL 5347 #define QIB_7322_TxHeadersErrCnt_0_offset 0x000121f8UL 5350 #define QIB_7322_PSRcvDataCount_0_offset 0x00012218UL 5353 #define QIB_7322_PSRcvPktsCount_0_offset 0x00012220UL 5356 #define QIB_7322_PSXmitDataCount_0_offset 0x00012228UL 5359 #define QIB_7322_PSXmitPktsCount_0_offset 0x00012230UL 5362 #define QIB_7322_PSXmitWaitCount_0_offset 0x00012238UL 5365 #define QIB_7322_LBIntCnt_1_offset 0x00013000UL 5368 #define QIB_7322_TxCreditUpToDateTimeOut_1_offset 0x00013008UL 5371 #define QIB_7322_TxSDmaDescCnt_1_offset 0x00013010UL 5374 #define QIB_7322_TxUnsupVLErrCnt_1_offset 0x00013018UL 5377 #define QIB_7322_TxDataPktCnt_1_offset 0x00013020UL 5380 #define QIB_7322_TxFlowPktCnt_1_offset 0x00013028UL 5383 #define QIB_7322_TxDwordCnt_1_offset 0x00013030UL 5386 #define QIB_7322_TxLenErrCnt_1_offset 0x00013038UL 5389 #define QIB_7322_TxMaxMinLenErrCnt_1_offset 0x00013040UL 5392 #define QIB_7322_TxUnderrunCnt_1_offset 0x00013048UL 5395 #define QIB_7322_TxFlowStallCnt_1_offset 0x00013050UL 5398 #define QIB_7322_TxDroppedPktCnt_1_offset 0x00013058UL 5401 #define QIB_7322_RxDroppedPktCnt_1_offset 0x00013060UL 5404 #define QIB_7322_RxDataPktCnt_1_offset 0x00013068UL 5407 #define QIB_7322_RxFlowPktCnt_1_offset 0x00013070UL 5410 #define QIB_7322_RxDwordCnt_1_offset 0x00013078UL 5413 #define QIB_7322_RxLenErrCnt_1_offset 0x00013080UL 5416 #define QIB_7322_RxMaxMinLenErrCnt_1_offset 0x00013088UL 5419 #define QIB_7322_RxICRCErrCnt_1_offset 0x00013090UL 5422 #define QIB_7322_RxVCRCErrCnt_1_offset 0x00013098UL 5425 #define QIB_7322_RxFlowCtrlViolCnt_1_offset 0x000130a0UL 5428 #define QIB_7322_RxVersionErrCnt_1_offset 0x000130a8UL 5431 #define QIB_7322_RxLinkMalformCnt_1_offset 0x000130b0UL 5434 #define QIB_7322_RxEBPCnt_1_offset 0x000130b8UL 5437 #define QIB_7322_RxLPCRCErrCnt_1_offset 0x000130c0UL 5440 #define QIB_7322_RxBufOvflCnt_1_offset 0x000130c8UL 5443 #define QIB_7322_RxLenTruncateCnt_1_offset 0x000130d0UL 5446 #define QIB_7322_RxPKeyMismatchCnt_1_offset 0x000130e0UL 5449 #define QIB_7322_IBLinkDownedCnt_1_offset 0x00013180UL 5452 #define QIB_7322_IBSymbolErrCnt_1_offset 0x00013188UL 5455 #define QIB_7322_IBStatusChangeCnt_1_offset 0x00013190UL 5458 #define QIB_7322_IBLinkErrRecoveryCnt_1_offset 0x00013198UL 5461 #define QIB_7322_ExcessBufferOvflCnt_1_offset 0x000131a8UL 5464 #define QIB_7322_LocalLinkIntegrityErrCnt_1_offset 0x000131b0UL 5467 #define QIB_7322_RxVlErrCnt_1_offset 0x000131b8UL 5470 #define QIB_7322_RxDlidFltrCnt_1_offset 0x000131c0UL 5473 #define QIB_7322_RxVL15DroppedPktCnt_1_offset 0x000131c8UL 5476 #define QIB_7322_RxOtherLocalPhyErrCnt_1_offset 0x000131d0UL 5479 #define QIB_7322_RxQPInvalidContextCnt_1_offset 0x000131d8UL 5482 #define QIB_7322_TxHeadersErrCnt_1_offset 0x000131f8UL 5485 #define QIB_7322_PSRcvDataCount_1_offset 0x00013218UL 5488 #define QIB_7322_PSRcvPktsCount_1_offset 0x00013220UL 5491 #define QIB_7322_PSXmitDataCount_1_offset 0x00013228UL 5494 #define QIB_7322_PSXmitPktsCount_1_offset 0x00013230UL 5497 #define QIB_7322_PSXmitWaitCount_1_offset 0x00013238UL 5500 #define QIB_7322_RcvEgrArray_offset 0x00014000UL 5511 #define QIB_7322_RcvTIDArray0_offset 0x00050000UL 5522 #define QIB_7322_SendPbcCache_offset 0x00070000UL 5525 #define QIB_7322_LaunchFIFO_v0p0_offset 0x00072000UL 5528 #define QIB_7322_LaunchElement_v15p0_offset 0x00076000UL 5531 #define QIB_7322_PreLaunchFIFO_0_offset 0x00076100UL 5534 #define QIB_7322_ScoreBoard_0_offset 0x00076200UL 5537 #define QIB_7322_DescriptorFIFO_0_offset 0x00076300UL 5540 #define QIB_7322_LaunchFIFO_v0p1_offset 0x00078000UL 5543 #define QIB_7322_LaunchElement_v15p1_offset 0x0007c000UL 5546 #define QIB_7322_PreLaunchFIFO_1_offset 0x0007c100UL 5549 #define QIB_7322_ScoreBoard_1_offset 0x0007c200UL 5552 #define QIB_7322_DescriptorFIFO_1_offset 0x0007c300UL 5555 #define QIB_7322_RcvBufA_0_offset 0x00080000UL 5558 #define QIB_7322_RcvBufB_0_offset 0x00088000UL 5561 #define QIB_7322_RcvFlags_0_offset 0x0008a000UL 5564 #define QIB_7322_RcvLookupiqBuf_0_offset 0x0008c000UL 5567 #define QIB_7322_RcvDMADatBuf_0_offset 0x0008e000UL 5570 #define QIB_7322_RcvDMAHdrBuf_0_offset 0x0008e800UL 5573 #define QIB_7322_RcvBufA_1_offset 0x00090000UL 5576 #define QIB_7322_RcvBufB_1_offset 0x00098000UL 5579 #define QIB_7322_RcvFlags_1_offset 0x0009a000UL 5582 #define QIB_7322_RcvLookupiqBuf_1_offset 0x0009c000UL 5585 #define QIB_7322_RcvDMADatBuf_1_offset 0x0009e000UL 5588 #define QIB_7322_RcvDMAHdrBuf_1_offset 0x0009e800UL 5591 #define QIB_7322_PCIERcvBuf_offset 0x000a0000UL 5594 #define QIB_7322_PCIERetryBuf_offset 0x000a4000UL 5597 #define QIB_7322_PCIERcvBufRdToWrAddr_offset 0x000a8000UL 5600 #define QIB_7322_PCIERcvHdrRdToWrAddr_offset 0x000b0000UL 5603 #define QIB_7322_PCIECplBuf_offset 0x000b8000UL 5606 #define QIB_7322_PCIECplHdr_offset 0x000bc000UL 5609 #define QIB_7322_PCIERcvHdr_offset 0x000bc200UL 5612 #define QIB_7322_IBSD_DDS_MAP_TABLE_0_offset 0x000d0000UL 5615 #define QIB_7322_SendBufMA_0_offset 0x00100000UL 5618 #define QIB_7322_SendBufEA_0_offset 0x00100800UL 5621 #define QIB_7322_SendBufMA_1_offset 0x00101000UL 5624 #define QIB_7322_SendBufEA_1_offset 0x00101800UL 5627 #define QIB_7322_SendBufMA_2_offset 0x00102000UL 5630 #define QIB_7322_SendBufEA_2_offset 0x00102800UL 5633 #define QIB_7322_SendBufMA_3_offset 0x00103000UL 5636 #define QIB_7322_SendBufEA_3_offset 0x00103800UL 5639 #define QIB_7322_SendBufMA_4_offset 0x00104000UL 5642 #define QIB_7322_SendBufEA_4_offset 0x00104800UL 5645 #define QIB_7322_SendBufMA_5_offset 0x00105000UL 5648 #define QIB_7322_SendBufEA_5_offset 0x00105800UL 5651 #define QIB_7322_SendBufMA_6_offset 0x00106000UL 5654 #define QIB_7322_SendBufEA_6_offset 0x00106800UL 5657 #define QIB_7322_SendBufMA_7_offset 0x00107000UL 5660 #define QIB_7322_SendBufEA_7_offset 0x00107800UL 5663 #define QIB_7322_SendBufMA_8_offset 0x00108000UL 5666 #define QIB_7322_SendBufEA_8_offset 0x00108800UL 5669 #define QIB_7322_SendBufMA_9_offset 0x00109000UL 5672 #define QIB_7322_SendBufEA_9_offset 0x00109800UL 5675 #define QIB_7322_SendBufMA_10_offset 0x0010a000UL 5678 #define QIB_7322_SendBufEA_10_offset 0x0010a800UL 5681 #define QIB_7322_SendBufMA_11_offset 0x0010b000UL 5684 #define QIB_7322_SendBufEA_11_offset 0x0010b800UL 5687 #define QIB_7322_SendBufMA_12_offset 0x0010c000UL 5690 #define QIB_7322_SendBufEA_12_offset 0x0010c800UL 5693 #define QIB_7322_SendBufMA_13_offset 0x0010d000UL 5696 #define QIB_7322_SendBufEA_13_offset 0x0010d800UL 5699 #define QIB_7322_SendBufMA_14_offset 0x0010e000UL 5702 #define QIB_7322_SendBufEA_14_offset 0x0010e800UL 5705 #define QIB_7322_SendBufMA_15_offset 0x0010f000UL 5708 #define QIB_7322_SendBufEA_15_offset 0x0010f800UL 5711 #define QIB_7322_SendBufMA_16_offset 0x00110000UL 5714 #define QIB_7322_SendBufEA_16_offset 0x00110800UL 5717 #define QIB_7322_SendBufMA_17_offset 0x00111000UL 5720 #define QIB_7322_SendBufEA_17_offset 0x00111800UL 5723 #define QIB_7322_SendBufMA_18_offset 0x00112000UL 5726 #define QIB_7322_SendBufEA_18_offset 0x00112800UL 5729 #define QIB_7322_SendBufMA_19_offset 0x00113000UL 5732 #define QIB_7322_SendBufEA_19_offset 0x00113800UL 5735 #define QIB_7322_SendBufMA_20_offset 0x00114000UL 5738 #define QIB_7322_SendBufEA_20_offset 0x00114800UL 5741 #define QIB_7322_SendBufMA_21_offset 0x00115000UL 5744 #define QIB_7322_SendBufEA_21_offset 0x00115800UL 5747 #define QIB_7322_SendBufMA_22_offset 0x00116000UL 5750 #define QIB_7322_SendBufEA_22_offset 0x00116800UL 5753 #define QIB_7322_SendBufMA_23_offset 0x00117000UL 5756 #define QIB_7322_SendBufEA_23_offset 0x00117800UL 5759 #define QIB_7322_SendBufMA_24_offset 0x00118000UL 5762 #define QIB_7322_SendBufEA_24_offset 0x00118800UL 5765 #define QIB_7322_SendBufMA_25_offset 0x00119000UL 5768 #define QIB_7322_SendBufEA_25_offset 0x00119800UL 5771 #define QIB_7322_SendBufMA_26_offset 0x0011a000UL 5774 #define QIB_7322_SendBufEA_26_offset 0x0011a800UL 5777 #define QIB_7322_SendBufMA_27_offset 0x0011b000UL 5780 #define QIB_7322_SendBufEA_27_offset 0x0011b800UL 5783 #define QIB_7322_SendBufMA_28_offset 0x0011c000UL 5786 #define QIB_7322_SendBufEA_28_offset 0x0011c800UL 5789 #define QIB_7322_SendBufMA_29_offset 0x0011d000UL 5792 #define QIB_7322_SendBufEA_29_offset 0x0011d800UL 5795 #define QIB_7322_SendBufMA_30_offset 0x0011e000UL 5798 #define QIB_7322_SendBufEA_30_offset 0x0011e800UL 5801 #define QIB_7322_SendBufMA_31_offset 0x0011f000UL 5804 #define QIB_7322_SendBufEA_31_offset 0x0011f800UL 5807 #define QIB_7322_SendBufMA_32_offset 0x00120000UL 5810 #define QIB_7322_SendBufEA_32_offset 0x00120800UL 5813 #define QIB_7322_SendBufMA_33_offset 0x00121000UL 5816 #define QIB_7322_SendBufEA_33_offset 0x00121800UL 5819 #define QIB_7322_SendBufMA_34_offset 0x00122000UL 5822 #define QIB_7322_SendBufEA_34_offset 0x00122800UL 5825 #define QIB_7322_SendBufMA_35_offset 0x00123000UL 5828 #define QIB_7322_SendBufEA_35_offset 0x00123800UL 5831 #define QIB_7322_SendBufMA_36_offset 0x00124000UL 5834 #define QIB_7322_SendBufEA_36_offset 0x00124800UL 5837 #define QIB_7322_SendBufMA_37_offset 0x00125000UL 5840 #define QIB_7322_SendBufEA_37_offset 0x00125800UL 5843 #define QIB_7322_SendBufMA_38_offset 0x00126000UL 5846 #define QIB_7322_SendBufEA_38_offset 0x00126800UL 5849 #define QIB_7322_SendBufMA_39_offset 0x00127000UL 5852 #define QIB_7322_SendBufEA_39_offset 0x00127800UL 5855 #define QIB_7322_SendBufMA_40_offset 0x00128000UL 5858 #define QIB_7322_SendBufEA_40_offset 0x00128800UL 5861 #define QIB_7322_SendBufMA_41_offset 0x00129000UL 5864 #define QIB_7322_SendBufEA_41_offset 0x00129800UL 5867 #define QIB_7322_SendBufMA_42_offset 0x0012a000UL 5870 #define QIB_7322_SendBufEA_42_offset 0x0012a800UL 5873 #define QIB_7322_SendBufMA_43_offset 0x0012b000UL 5876 #define QIB_7322_SendBufEA_43_offset 0x0012b800UL 5879 #define QIB_7322_SendBufMA_44_offset 0x0012c000UL 5882 #define QIB_7322_SendBufEA_44_offset 0x0012c800UL 5885 #define QIB_7322_SendBufMA_45_offset 0x0012d000UL 5888 #define QIB_7322_SendBufEA_45_offset 0x0012d800UL 5891 #define QIB_7322_SendBufMA_46_offset 0x0012e000UL 5894 #define QIB_7322_SendBufEA_46_offset 0x0012e800UL 5897 #define QIB_7322_SendBufMA_47_offset 0x0012f000UL 5900 #define QIB_7322_SendBufEA_47_offset 0x0012f800UL 5903 #define QIB_7322_SendBufMA_48_offset 0x00130000UL 5906 #define QIB_7322_SendBufEA_48_offset 0x00130800UL 5909 #define QIB_7322_SendBufMA_49_offset 0x00131000UL 5912 #define QIB_7322_SendBufEA_49_offset 0x00131800UL 5915 #define QIB_7322_SendBufMA_50_offset 0x00132000UL 5918 #define QIB_7322_SendBufEA_50_offset 0x00132800UL 5921 #define QIB_7322_SendBufMA_51_offset 0x00133000UL 5924 #define QIB_7322_SendBufEA_51_offset 0x00133800UL 5927 #define QIB_7322_SendBufMA_52_offset 0x00134000UL 5930 #define QIB_7322_SendBufEA_52_offset 0x00134800UL 5933 #define QIB_7322_SendBufMA_53_offset 0x00135000UL 5936 #define QIB_7322_SendBufEA_53_offset 0x00135800UL 5939 #define QIB_7322_SendBufMA_54_offset 0x00136000UL 5942 #define QIB_7322_SendBufEA_54_offset 0x00136800UL 5945 #define QIB_7322_SendBufMA_55_offset 0x00137000UL 5948 #define QIB_7322_SendBufEA_55_offset 0x00137800UL 5951 #define QIB_7322_SendBufMA_56_offset 0x00138000UL 5954 #define QIB_7322_SendBufEA_56_offset 0x00138800UL 5957 #define QIB_7322_SendBufMA_57_offset 0x00139000UL 5960 #define QIB_7322_SendBufEA_57_offset 0x00139800UL 5963 #define QIB_7322_SendBufMA_58_offset 0x0013a000UL 5966 #define QIB_7322_SendBufEA_58_offset 0x0013a800UL 5969 #define QIB_7322_SendBufMA_59_offset 0x0013b000UL 5972 #define QIB_7322_SendBufEA_59_offset 0x0013b800UL 5975 #define QIB_7322_SendBufMA_60_offset 0x0013c000UL 5978 #define QIB_7322_SendBufEA_60_offset 0x0013c800UL 5981 #define QIB_7322_SendBufMA_61_offset 0x0013d000UL 5984 #define QIB_7322_SendBufEA_61_offset 0x0013d800UL 5987 #define QIB_7322_SendBufMA_62_offset 0x0013e000UL 5990 #define QIB_7322_SendBufEA_62_offset 0x0013e800UL 5993 #define QIB_7322_SendBufMA_63_offset 0x0013f000UL 5996 #define QIB_7322_SendBufEA_63_offset 0x0013f800UL 5999 #define QIB_7322_SendBufMA_64_offset 0x00140000UL 6002 #define QIB_7322_SendBufEA_64_offset 0x00140800UL 6005 #define QIB_7322_SendBufMA_65_offset 0x00141000UL 6008 #define QIB_7322_SendBufEA_65_offset 0x00141800UL 6011 #define QIB_7322_SendBufMA_66_offset 0x00142000UL 6014 #define QIB_7322_SendBufEA_66_offset 0x00142800UL 6017 #define QIB_7322_SendBufMA_67_offset 0x00143000UL 6020 #define QIB_7322_SendBufEA_67_offset 0x00143800UL 6023 #define QIB_7322_SendBufMA_68_offset 0x00144000UL 6026 #define QIB_7322_SendBufEA_68_offset 0x00144800UL 6029 #define QIB_7322_SendBufMA_69_offset 0x00145000UL 6032 #define QIB_7322_SendBufEA_69_offset 0x00145800UL 6035 #define QIB_7322_SendBufMA_70_offset 0x00146000UL 6038 #define QIB_7322_SendBufEA_70_offset 0x00146800UL 6041 #define QIB_7322_SendBufMA_71_offset 0x00147000UL 6044 #define QIB_7322_SendBufEA_71_offset 0x00147800UL 6047 #define QIB_7322_SendBufMA_72_offset 0x00148000UL 6050 #define QIB_7322_SendBufEA_72_offset 0x00148800UL 6053 #define QIB_7322_SendBufMA_73_offset 0x00149000UL 6056 #define QIB_7322_SendBufEA_73_offset 0x00149800UL 6059 #define QIB_7322_SendBufMA_74_offset 0x0014a000UL 6062 #define QIB_7322_SendBufEA_74_offset 0x0014a800UL 6065 #define QIB_7322_SendBufMA_75_offset 0x0014b000UL 6068 #define QIB_7322_SendBufEA_75_offset 0x0014b800UL 6071 #define QIB_7322_SendBufMA_76_offset 0x0014c000UL 6074 #define QIB_7322_SendBufEA_76_offset 0x0014c800UL 6077 #define QIB_7322_SendBufMA_77_offset 0x0014d000UL 6080 #define QIB_7322_SendBufEA_77_offset 0x0014d800UL 6083 #define QIB_7322_SendBufMA_78_offset 0x0014e000UL 6086 #define QIB_7322_SendBufEA_78_offset 0x0014e800UL 6089 #define QIB_7322_SendBufMA_79_offset 0x0014f000UL 6092 #define QIB_7322_SendBufEA_79_offset 0x0014f800UL 6095 #define QIB_7322_SendBufMA_80_offset 0x00150000UL 6098 #define QIB_7322_SendBufEA_80_offset 0x00150800UL 6101 #define QIB_7322_SendBufMA_81_offset 0x00151000UL 6104 #define QIB_7322_SendBufEA_81_offset 0x00151800UL 6107 #define QIB_7322_SendBufMA_82_offset 0x00152000UL 6110 #define QIB_7322_SendBufEA_82_offset 0x00152800UL 6113 #define QIB_7322_SendBufMA_83_offset 0x00153000UL 6116 #define QIB_7322_SendBufEA_83_offset 0x00153800UL 6119 #define QIB_7322_SendBufMA_84_offset 0x00154000UL 6122 #define QIB_7322_SendBufEA_84_offset 0x00154800UL 6125 #define QIB_7322_SendBufMA_85_offset 0x00155000UL 6128 #define QIB_7322_SendBufEA_85_offset 0x00155800UL 6131 #define QIB_7322_SendBufMA_86_offset 0x00156000UL 6134 #define QIB_7322_SendBufEA_86_offset 0x00156800UL 6137 #define QIB_7322_SendBufMA_87_offset 0x00157000UL 6140 #define QIB_7322_SendBufEA_87_offset 0x00157800UL 6143 #define QIB_7322_SendBufMA_88_offset 0x00158000UL 6146 #define QIB_7322_SendBufEA_88_offset 0x00158800UL 6149 #define QIB_7322_SendBufMA_89_offset 0x00159000UL 6152 #define QIB_7322_SendBufEA_89_offset 0x00159800UL 6155 #define QIB_7322_SendBufMA_90_offset 0x0015a000UL 6158 #define QIB_7322_SendBufEA_90_offset 0x0015a800UL 6161 #define QIB_7322_SendBufMA_91_offset 0x0015b000UL 6164 #define QIB_7322_SendBufEA_91_offset 0x0015b800UL 6167 #define QIB_7322_SendBufMA_92_offset 0x0015c000UL 6170 #define QIB_7322_SendBufEA_92_offset 0x0015c800UL 6173 #define QIB_7322_SendBufMA_93_offset 0x0015d000UL 6176 #define QIB_7322_SendBufEA_93_offset 0x0015d800UL 6179 #define QIB_7322_SendBufMA_94_offset 0x0015e000UL 6182 #define QIB_7322_SendBufEA_94_offset 0x0015e800UL 6185 #define QIB_7322_SendBufMA_95_offset 0x0015f000UL 6188 #define QIB_7322_SendBufEA_95_offset 0x0015f800UL 6191 #define QIB_7322_SendBufMA_96_offset 0x00160000UL 6194 #define QIB_7322_SendBufEA_96_offset 0x00160800UL 6197 #define QIB_7322_SendBufMA_97_offset 0x00161000UL 6200 #define QIB_7322_SendBufEA_97_offset 0x00161800UL 6203 #define QIB_7322_SendBufMA_98_offset 0x00162000UL 6206 #define QIB_7322_SendBufEA_98_offset 0x00162800UL 6209 #define QIB_7322_SendBufMA_99_offset 0x00163000UL 6212 #define QIB_7322_SendBufEA_99_offset 0x00163800UL 6215 #define QIB_7322_SendBufMA_100_offset 0x00164000UL 6218 #define QIB_7322_SendBufEA_100_offset 0x00164800UL 6221 #define QIB_7322_SendBufMA_101_offset 0x00165000UL 6224 #define QIB_7322_SendBufEA_101_offset 0x00165800UL 6227 #define QIB_7322_SendBufMA_102_offset 0x00166000UL 6230 #define QIB_7322_SendBufEA_102_offset 0x00166800UL 6233 #define QIB_7322_SendBufMA_103_offset 0x00167000UL 6236 #define QIB_7322_SendBufEA_103_offset 0x00167800UL 6239 #define QIB_7322_SendBufMA_104_offset 0x00168000UL 6242 #define QIB_7322_SendBufEA_104_offset 0x00168800UL 6245 #define QIB_7322_SendBufMA_105_offset 0x00169000UL 6248 #define QIB_7322_SendBufEA_105_offset 0x00169800UL 6251 #define QIB_7322_SendBufMA_106_offset 0x0016a000UL 6254 #define QIB_7322_SendBufEA_106_offset 0x0016a800UL 6257 #define QIB_7322_SendBufMA_107_offset 0x0016b000UL 6260 #define QIB_7322_SendBufEA_107_offset 0x0016b800UL 6263 #define QIB_7322_SendBufMA_108_offset 0x0016c000UL 6266 #define QIB_7322_SendBufEA_108_offset 0x0016c800UL 6269 #define QIB_7322_SendBufMA_109_offset 0x0016d000UL 6272 #define QIB_7322_SendBufEA_109_offset 0x0016d800UL 6275 #define QIB_7322_SendBufMA_110_offset 0x0016e000UL 6278 #define QIB_7322_SendBufEA_110_offset 0x0016e800UL 6281 #define QIB_7322_SendBufMA_111_offset 0x0016f000UL 6284 #define QIB_7322_SendBufEA_111_offset 0x0016f800UL 6287 #define QIB_7322_SendBufMA_112_offset 0x00170000UL 6290 #define QIB_7322_SendBufEA_112_offset 0x00170800UL 6293 #define QIB_7322_SendBufMA_113_offset 0x00171000UL 6296 #define QIB_7322_SendBufEA_113_offset 0x00171800UL 6299 #define QIB_7322_SendBufMA_114_offset 0x00172000UL 6302 #define QIB_7322_SendBufEA_114_offset 0x00172800UL 6305 #define QIB_7322_SendBufMA_115_offset 0x00173000UL 6308 #define QIB_7322_SendBufEA_115_offset 0x00173800UL 6311 #define QIB_7322_SendBufMA_116_offset 0x00174000UL 6314 #define QIB_7322_SendBufEA_116_offset 0x00174800UL 6317 #define QIB_7322_SendBufMA_117_offset 0x00175000UL 6320 #define QIB_7322_SendBufEA_117_offset 0x00175800UL 6323 #define QIB_7322_SendBufMA_118_offset 0x00176000UL 6326 #define QIB_7322_SendBufEA_118_offset 0x00176800UL 6329 #define QIB_7322_SendBufMA_119_offset 0x00177000UL 6332 #define QIB_7322_SendBufEA_119_offset 0x00177800UL 6335 #define QIB_7322_SendBufMA_120_offset 0x00178000UL 6338 #define QIB_7322_SendBufEA_120_offset 0x00178800UL 6341 #define QIB_7322_SendBufMA_121_offset 0x00179000UL 6344 #define QIB_7322_SendBufEA_121_offset 0x00179800UL 6347 #define QIB_7322_SendBufMA_122_offset 0x0017a000UL 6350 #define QIB_7322_SendBufEA_122_offset 0x0017a800UL 6353 #define QIB_7322_SendBufMA_123_offset 0x0017b000UL 6356 #define QIB_7322_SendBufEA_123_offset 0x0017b800UL 6359 #define QIB_7322_SendBufMA_124_offset 0x0017c000UL 6362 #define QIB_7322_SendBufEA_124_offset 0x0017c800UL 6365 #define QIB_7322_SendBufMA_125_offset 0x0017d000UL 6368 #define QIB_7322_SendBufEA_125_offset 0x0017d800UL 6371 #define QIB_7322_SendBufMA_126_offset 0x0017e000UL 6374 #define QIB_7322_SendBufEA_126_offset 0x0017e800UL 6377 #define QIB_7322_SendBufMA_127_offset 0x0017f000UL 6380 #define QIB_7322_SendBufEA_127_offset 0x0017f800UL 6383 #define QIB_7322_SendBufMA_128_offset 0x00180000UL 6386 #define QIB_7322_SendBufEA_128_offset 0x00181000UL 6389 #define QIB_7322_SendBufMA_129_offset 0x00182000UL 6392 #define QIB_7322_SendBufEA_129_offset 0x00183000UL 6395 #define QIB_7322_SendBufMA_130_offset 0x00184000UL 6398 #define QIB_7322_SendBufEA_130_offset 0x00185000UL 6401 #define QIB_7322_SendBufMA_131_offset 0x00186000UL 6404 #define QIB_7322_SendBufEA_131_offset 0x00187000UL 6407 #define QIB_7322_SendBufMA_132_offset 0x00188000UL 6410 #define QIB_7322_SendBufEA_132_offset 0x00189000UL 6413 #define QIB_7322_SendBufMA_133_offset 0x0018a000UL 6416 #define QIB_7322_SendBufEA_133_offset 0x0018b000UL 6419 #define QIB_7322_SendBufMA_134_offset 0x0018c000UL 6422 #define QIB_7322_SendBufEA_134_offset 0x0018d000UL 6425 #define QIB_7322_SendBufMA_135_offset 0x0018e000UL 6428 #define QIB_7322_SendBufEA_135_offset 0x0018f000UL 6431 #define QIB_7322_SendBufMA_136_offset 0x00190000UL 6434 #define QIB_7322_SendBufEA_136_offset 0x00191000UL 6437 #define QIB_7322_SendBufMA_137_offset 0x00192000UL 6440 #define QIB_7322_SendBufEA_137_offset 0x00193000UL 6443 #define QIB_7322_SendBufMA_138_offset 0x00194000UL 6446 #define QIB_7322_SendBufEA_138_offset 0x00195000UL 6449 #define QIB_7322_SendBufMA_139_offset 0x00196000UL 6452 #define QIB_7322_SendBufEA_139_offset 0x00197000UL 6455 #define QIB_7322_SendBufMA_140_offset 0x00198000UL 6458 #define QIB_7322_SendBufEA_140_offset 0x00199000UL 6461 #define QIB_7322_SendBufMA_141_offset 0x0019a000UL 6464 #define QIB_7322_SendBufEA_141_offset 0x0019b000UL 6467 #define QIB_7322_SendBufMA_142_offset 0x0019c000UL 6470 #define QIB_7322_SendBufEA_142_offset 0x0019d000UL 6473 #define QIB_7322_SendBufMA_143_offset 0x0019e000UL 6476 #define QIB_7322_SendBufEA_143_offset 0x0019f000UL 6479 #define QIB_7322_SendBufMA_144_offset 0x001a0000UL 6482 #define QIB_7322_SendBufEA_144_offset 0x001a1000UL 6485 #define QIB_7322_SendBufMA_145_offset 0x001a2000UL 6488 #define QIB_7322_SendBufEA_145_offset 0x001a3000UL 6491 #define QIB_7322_SendBufMA_146_offset 0x001a4000UL 6494 #define QIB_7322_SendBufEA_146_offset 0x001a5000UL 6497 #define QIB_7322_SendBufMA_147_offset 0x001a6000UL 6500 #define QIB_7322_SendBufEA_147_offset 0x001a7000UL 6503 #define QIB_7322_SendBufMA_148_offset 0x001a8000UL 6506 #define QIB_7322_SendBufEA_148_offset 0x001a9000UL 6509 #define QIB_7322_SendBufMA_149_offset 0x001aa000UL 6512 #define QIB_7322_SendBufEA_149_offset 0x001ab000UL 6515 #define QIB_7322_SendBufMA_150_offset 0x001ac000UL 6518 #define QIB_7322_SendBufEA_150_offset 0x001ad000UL 6521 #define QIB_7322_SendBufMA_151_offset 0x001ae000UL 6524 #define QIB_7322_SendBufEA_151_offset 0x001af000UL 6527 #define QIB_7322_SendBufMA_152_offset 0x001b0000UL 6530 #define QIB_7322_SendBufEA_152_offset 0x001b1000UL 6533 #define QIB_7322_SendBufMA_153_offset 0x001b2000UL 6536 #define QIB_7322_SendBufEA_153_offset 0x001b3000UL 6539 #define QIB_7322_SendBufMA_154_offset 0x001b4000UL 6542 #define QIB_7322_SendBufEA_154_offset 0x001b5000UL 6545 #define QIB_7322_SendBufMA_155_offset 0x001b6000UL 6548 #define QIB_7322_SendBufEA_155_offset 0x001b7000UL 6551 #define QIB_7322_SendBufMA_156_offset 0x001b8000UL 6554 #define QIB_7322_SendBufEA_156_offset 0x001b9000UL 6557 #define QIB_7322_SendBufMA_157_offset 0x001ba000UL 6560 #define QIB_7322_SendBufEA_157_offset 0x001bb000UL 6563 #define QIB_7322_SendBufMA_158_offset 0x001bc000UL 6566 #define QIB_7322_SendBufEA_158_offset 0x001bd000UL 6569 #define QIB_7322_SendBufMA_159_offset 0x001be000UL 6572 #define QIB_7322_SendBufEA_159_offset 0x001bf000UL 6575 #define QIB_7322_SendBufVL15_0_offset 0x001c0000UL 6578 #define QIB_7322_RcvHdrTail0_offset 0x00200000UL 6581 #define QIB_7322_RcvHdrHead0_offset 0x00200008UL 6592 #define QIB_7322_RcvEgrIndexTail0_offset 0x00200010UL 6595 #define QIB_7322_RcvEgrIndexHead0_offset 0x00200018UL 6598 #define QIB_7322_RcvTIDFlowTable0_offset 0x00201000UL 6616 #define QIB_7322_RcvHdrTail1_offset 0x00210000UL 6619 #define QIB_7322_RcvHdrHead1_offset 0x00210008UL 6630 #define QIB_7322_RcvEgrIndexTail1_offset 0x00210010UL 6633 #define QIB_7322_RcvEgrIndexHead1_offset 0x00210018UL 6636 #define QIB_7322_RcvTIDFlowTable1_offset 0x00211000UL 6654 #define QIB_7322_RcvHdrTail2_offset 0x00220000UL 6657 #define QIB_7322_RcvHdrHead2_offset 0x00220008UL 6668 #define QIB_7322_RcvEgrIndexTail2_offset 0x00220010UL 6671 #define QIB_7322_RcvEgrIndexHead2_offset 0x00220018UL 6674 #define QIB_7322_RcvTIDFlowTable2_offset 0x00221000UL 6692 #define QIB_7322_RcvHdrTail3_offset 0x00230000UL 6695 #define QIB_7322_RcvHdrHead3_offset 0x00230008UL 6706 #define QIB_7322_RcvEgrIndexTail3_offset 0x00230010UL 6709 #define QIB_7322_RcvEgrIndexHead3_offset 0x00230018UL 6712 #define QIB_7322_RcvTIDFlowTable3_offset 0x00231000UL 6730 #define QIB_7322_RcvHdrTail4_offset 0x00240000UL 6733 #define QIB_7322_RcvHdrHead4_offset 0x00240008UL 6744 #define QIB_7322_RcvEgrIndexTail4_offset 0x00240010UL 6747 #define QIB_7322_RcvEgrIndexHead4_offset 0x00240018UL 6750 #define QIB_7322_RcvTIDFlowTable4_offset 0x00241000UL 6768 #define QIB_7322_RcvHdrTail5_offset 0x00250000UL 6771 #define QIB_7322_RcvHdrHead5_offset 0x00250008UL 6782 #define QIB_7322_RcvEgrIndexTail5_offset 0x00250010UL 6785 #define QIB_7322_RcvEgrIndexHead5_offset 0x00250018UL 6788 #define QIB_7322_RcvTIDFlowTable5_offset 0x00251000UL 6806 #define QIB_7322_RcvHdrTail6_offset 0x00260000UL 6809 #define QIB_7322_RcvHdrHead6_offset 0x00260008UL 6820 #define QIB_7322_RcvEgrIndexTail6_offset 0x00260010UL 6823 #define QIB_7322_RcvEgrIndexHead6_offset 0x00260018UL 6826 #define QIB_7322_RcvTIDFlowTable6_offset 0x00261000UL 6844 #define QIB_7322_RcvHdrTail7_offset 0x00270000UL 6847 #define QIB_7322_RcvHdrHead7_offset 0x00270008UL 6858 #define QIB_7322_RcvEgrIndexTail7_offset 0x00270010UL 6861 #define QIB_7322_RcvEgrIndexHead7_offset 0x00270018UL 6864 #define QIB_7322_RcvTIDFlowTable7_offset 0x00271000UL 6882 #define QIB_7322_RcvHdrTail8_offset 0x00280000UL 6885 #define QIB_7322_RcvHdrHead8_offset 0x00280008UL 6896 #define QIB_7322_RcvEgrIndexTail8_offset 0x00280010UL 6899 #define QIB_7322_RcvEgrIndexHead8_offset 0x00280018UL 6902 #define QIB_7322_RcvTIDFlowTable8_offset 0x00281000UL 6920 #define QIB_7322_RcvHdrTail9_offset 0x00290000UL 6923 #define QIB_7322_RcvHdrHead9_offset 0x00290008UL 6934 #define QIB_7322_RcvEgrIndexTail9_offset 0x00290010UL 6937 #define QIB_7322_RcvEgrIndexHead9_offset 0x00290018UL 6940 #define QIB_7322_RcvTIDFlowTable9_offset 0x00291000UL 6958 #define QIB_7322_RcvHdrTail10_offset 0x002a0000UL 6961 #define QIB_7322_RcvHdrHead10_offset 0x002a0008UL 6972 #define QIB_7322_RcvEgrIndexTail10_offset 0x002a0010UL 6975 #define QIB_7322_RcvEgrIndexHead10_offset 0x002a0018UL 6978 #define QIB_7322_RcvTIDFlowTable10_offset 0x002a1000UL 6996 #define QIB_7322_RcvHdrTail11_offset 0x002b0000UL 6999 #define QIB_7322_RcvHdrHead11_offset 0x002b0008UL 7010 #define QIB_7322_RcvEgrIndexTail11_offset 0x002b0010UL 7013 #define QIB_7322_RcvEgrIndexHead11_offset 0x002b0018UL 7016 #define QIB_7322_RcvTIDFlowTable11_offset 0x002b1000UL 7034 #define QIB_7322_RcvHdrTail12_offset 0x002c0000UL 7037 #define QIB_7322_RcvHdrHead12_offset 0x002c0008UL 7048 #define QIB_7322_RcvEgrIndexTail12_offset 0x002c0010UL 7051 #define QIB_7322_RcvEgrIndexHead12_offset 0x002c0018UL 7054 #define QIB_7322_RcvTIDFlowTable12_offset 0x002c1000UL 7072 #define QIB_7322_RcvHdrTail13_offset 0x002d0000UL 7075 #define QIB_7322_RcvHdrHead13_offset 0x002d0008UL 7086 #define QIB_7322_RcvEgrIndexTail13_offset 0x002d0010UL 7089 #define QIB_7322_RcvEgrIndexHead13_offset 0x002d0018UL 7092 #define QIB_7322_RcvTIDFlowTable13_offset 0x002d1000UL 7110 #define QIB_7322_RcvHdrTail14_offset 0x002e0000UL 7113 #define QIB_7322_RcvHdrHead14_offset 0x002e0008UL 7124 #define QIB_7322_RcvEgrIndexTail14_offset 0x002e0010UL 7127 #define QIB_7322_RcvEgrIndexHead14_offset 0x002e0018UL 7130 #define QIB_7322_RcvTIDFlowTable14_offset 0x002e1000UL 7148 #define QIB_7322_RcvHdrTail15_offset 0x002f0000UL 7151 #define QIB_7322_RcvHdrHead15_offset 0x002f0008UL 7162 #define QIB_7322_RcvEgrIndexTail15_offset 0x002f0010UL 7165 #define QIB_7322_RcvEgrIndexHead15_offset 0x002f0018UL 7168 #define QIB_7322_RcvTIDFlowTable15_offset 0x002f1000UL 7186 #define QIB_7322_RcvHdrTail16_offset 0x00300000UL 7189 #define QIB_7322_RcvHdrHead16_offset 0x00300008UL 7200 #define QIB_7322_RcvEgrIndexTail16_offset 0x00300010UL 7203 #define QIB_7322_RcvEgrIndexHead16_offset 0x00300018UL 7206 #define QIB_7322_RcvTIDFlowTable16_offset 0x00301000UL 7224 #define QIB_7322_RcvHdrTail17_offset 0x00310000UL 7227 #define QIB_7322_RcvHdrHead17_offset 0x00310008UL 7238 #define QIB_7322_RcvEgrIndexTail17_offset 0x00310010UL 7241 #define QIB_7322_RcvEgrIndexHead17_offset 0x00310018UL 7244 #define QIB_7322_RcvTIDFlowTable17_offset 0x00311000UL pseudo_bit_t SHeadersErr[1]
pseudo_bit_t _unused_3[4]
pseudo_bit_t UncErrMskSendLaFIFO4_1[1]
pseudo_bit_t CorErrClearSendLaFIFO7_0[1]
pseudo_bit_t UncErrClearSendLaFIFO3_0[1]
pseudo_bit_t MulCorErrMskRcvDMADataBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemCorErrStatus_pb)
pseudo_bit_t CorErrMskLookupiqBuf_1[1]
pseudo_bit_t SendSpecialTriggerErrMask[1]
pseudo_bit_t SendDmaReloadCnt[16]
pseudo_bit_t _unused_0[34]
pseudo_bit_t dyn_disable_rxenale_qdr_ch2[1]
pseudo_bit_t LinkState[3]
pseudo_bit_t _unused_0[43]
pseudo_bit_t MulUncErrClearRcvDMADataBuf_0[1]
pseudo_bit_t ReqDDSLocalFromRmt[4]
pseudo_bit_t SendPktLenErrMask[1]
pseudo_bit_t NibbleSel6[4]
pseudo_bit_t RcvAvail0IntMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogA_0_pb)
pseudo_bit_t SDmaOutOfBoundErr[1]
pseudo_bit_t RcvAvail11IntClear[1]
pseudo_bit_t RcvAvail3IntBlocked[1]
pseudo_bit_t SDmaDescAddrMisalignErrMask[1]
pseudo_bit_t SendDroppedDataPktErrClear[1]
pseudo_bit_t RcvMaxPktLenErrClear[1]
pseudo_bit_t RcvQPMapContext5[5]
pseudo_bit_t RxBufrUnCorErrData_127_64[64]
pseudo_bit_t RcvUrg5IntBlocked[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO6_1[1]
pseudo_bit_t PCIEPostQDiagEn[1]
pseudo_bit_t _unused_0[43]
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableCorErrLogC_pb)
pseudo_bit_t _unused_2[6]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead0_pb)
pseudo_bit_t BufUsed_63_0[64]
pseudo_bit_t FSSCorErrPCIeRetryBuf[1]
pseudo_bit_t SendPbcArrayCorErrCheckBit_6_0[7]
pseudo_bit_t HRTBT_REQ[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable11_pb)
pseudo_bit_t _unused_0[6]
pseudo_bit_t _unused_2[7]
pseudo_bit_t RcvAvail8[1]
pseudo_bit_t start_busy[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrClear_pb)
pseudo_bit_t FSSCorErrPCIeCompDataBuf[1]
pseudo_bit_t RcvAvail15IntBlocked[1]
pseudo_bit_t RcvUrg3IntBlocked[1]
pseudo_bit_t SDmaCleanupDoneBlocked_1[1]
pseudo_bit_t _unused_3[4]
pseudo_bit_t RcvHdrLenErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriority0_0_pb)
pseudo_bit_t _unused_4[32]
pseudo_bit_t RxBufrUnCorErrData_258_256[3]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch3[8]
pseudo_bit_t CorErrMskRcvFlags_0[1]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch0[8]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t Size_LargePIO[13]
pseudo_bit_t RcvQPMapContext12[5]
pseudo_bit_t static_disable_rxenagain_ddr_ch0[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t _unused_0[34]
pseudo_bit_t FSSCorErrPCIePostDataBuf[1]
pseudo_bit_t TS_T_RX_VALID[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBPacketMask0_pb)
pseudo_bit_t RcvAvail1IntMask[1]
pseudo_bit_t IBCBusFromSPCParityErrClear_0[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO3_0[1]
pseudo_bit_t MulUncErrClearRcvFlags_0[1]
pseudo_bit_t Generation[3]
pseudo_bit_t TSMCode_TS2[9]
pseudo_bit_t _unused_0[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t CorErrMskSendLaFIFO2_1[1]
pseudo_bit_t SDmaBufMaskDuplicateErrClear[1]
pseudo_bit_t RxHdrFifoCorErrCheckBit_15_0[16]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t static_disable_rxenagain_ddr_ch0[1]
pseudo_bit_t CorErrMskPCIeCompHdrBuf[1]
pseudo_bit_t _unused_0[39]
pseudo_bit_t SDmaCleanupDoneClear_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiUnCorErrStatus_pb)
pseudo_bit_t LEDPort0YellowOn[1]
pseudo_bit_t RxHdrFifoUnCorErrCheckBit_15_0[16]
pseudo_bit_t _unused_2[29]
pseudo_bit_t _unused_1[2]
pseudo_bit_t NibbleSel10[4]
pseudo_bit_t LaFifoEmpty_VL5[1]
pseudo_bit_t EnableSDma_SelfDrain[1]
pseudo_bit_t _unused_1[24]
pseudo_bit_t MulUncErrClearSendLaFIFO1_0[1]
pseudo_bit_t UncErrStatusSendLaFIFO1_0[1]
pseudo_bit_t TxeDrainLaFifo[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO7_1[1]
pseudo_bit_t CorErrClearPCIeRetryBuf[1]
pseudo_bit_t CorErrClearSendLaFIFO2_1[1]
pseudo_bit_t CorErrStatusSendBufExtra[1]
pseudo_bit_t _unused_0[51]
pseudo_bit_t _unused_0[48]
pseudo_bit_t IBCBusFromSPCParityErrMask_1[1]
pseudo_bit_t _unused_1[45]
pseudo_bit_t FSSUncErrSendLaFIFO4_1[1]
pseudo_bit_t SendDoneIntClear_1[1]
pseudo_bit_t CorErrMskSendBufVL15[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaTail_0_pb)
pseudo_bit_t SendDroppedDataPktErrClear[1]
pseudo_bit_t MulCorErrClearRcvBuf_1[1]
pseudo_bit_t RcvUrg17IntBlocked[1]
pseudo_bit_t MulCorErrClearMsixTable0[1]
pseudo_bit_t SDmaDwEnErrMask[1]
pseudo_bit_t FSSUncErrSendLaFIFO0_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0CorErrLog_1_pb)
pseudo_bit_t DISABLE_RXLATOFF_QDR[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogC_0_pb)
pseudo_bit_t ContextEnableUser[16]
pseudo_bit_t RcvAvail5IntBlocked[1]
pseudo_bit_t DISABLE_RXLATOFF_SDR[1]
pseudo_bit_t BaseAddr_SmallPIO[21]
pseudo_bit_t _unused_0[8]
pseudo_bit_t RxHdrFifoUnCorErrAddr_10_0[11]
pseudo_bit_t RcvHdrq15DCAXfrCnt[6]
PSEUDO_BIT_STRUCT(struct QIB_7322_IntClear_pb)
pseudo_bit_t ErrIntClear_1[1]
pseudo_bit_t OFFperiod[32]
pseudo_bit_t PciePHdrBufrCorErrData_63_0[64]
pseudo_bit_t SD_RX_EQUAL_ENABLE[1]
pseudo_bit_t PcieRetryBufrCorErrData_133_128[6]
pseudo_bit_t HaltInProg[1]
pseudo_bit_t RcvAvail17IntMask[1]
pseudo_bit_t UncErrMskRcvFlags_0[1]
pseudo_bit_t MulCorErrMskRcvBuf_1[1]
pseudo_bit_t RxLkupiqUnCorErrData_45_0[46]
pseudo_bit_t _unused_0[58]
pseudo_bit_t PciePHdrBufrCorErrData_107_64[44]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrCorErrLogB_pb)
pseudo_bit_t _unused_0[56]
pseudo_bit_t TxCreditOk_VL6[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t static_disable_rxenagain_ddr_ch1[1]
pseudo_bit_t HRTBT_AUTO[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t SDmaBaseErr[1]
pseudo_bit_t LaFifoEmpty_VL4[1]
pseudo_bit_t _unused_0[34]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t MulUncErrMskSendPbcArray[1]
pseudo_bit_t _unused_2[13]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch0[8]
pseudo_bit_t UncErrClearRcvTIDArray[1]
pseudo_bit_t MulCorErrMskPCIeRetryBuf[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogB_1_pb)
pseudo_bit_t SendUnsupportedVLErrMask[1]
pseudo_bit_t MulUncErrMskSendRmFIFO_0[1]
pseudo_bit_t _unused_5[5]
pseudo_bit_t _unused_2[6]
pseudo_bit_t MulCorErrStatusRcvDMADataBuf_0[1]
pseudo_bit_t MulUncErrClearSendLaFIFO4_0[1]
pseudo_bit_t CorErrClearRcvDMADataBuf_0[1]
pseudo_bit_t ErrIntMask_1[1]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch0[1]
pseudo_bit_t CorErrStatusMsixTable1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable14_pb)
pseudo_bit_t PhyerrThreshold[4]
pseudo_bit_t RcvQPMapContext3[5]
pseudo_bit_t CorErrMskSendLaFIFO0_1[1]
pseudo_bit_t static_disable_rxenale_qdr_ch3[1]
pseudo_bit_t MulCorErrMskSendBufMain[1]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch1[8]
pseudo_bit_t _unused_0[34]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvEgrArray_pb)
pseudo_bit_t _unused_0[14]
pseudo_bit_t PcieCplTimeoutMask[1]
pseudo_bit_t SendPbcArrayCorErrData_21_0[22]
pseudo_bit_t _unused_0[24]
pseudo_bit_t _unused_5[4]
pseudo_bit_t KeepAfterSeqErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable17_pb)
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t FSSCorErrSendLaFIFO6_0[1]
pseudo_bit_t CorErrClearMsixTable0[1]
pseudo_bit_t MulCorErrClearLookupiqBuf_0[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t dyn_disable_rxenale_sdr_ch0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrStatus_1_pb)
pseudo_bit_t FSSCorErrRcvTIDArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusA_0_pb)
pseudo_bit_t SDmaUnexpDataErrMask[1]
pseudo_bit_t _unused_2[21]
pseudo_bit_t _unused_2[8]
pseudo_bit_t SDmaMemReadErrClear_0[1]
pseudo_bit_t MulCorErrStatusRcvTIDArray[1]
pseudo_bit_t PcieCplHdrBufrCorErrCheckBit_15_0[16]
pseudo_bit_t RxBufrUnCorErrData_255_192[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_procmon_reg_pb)
pseudo_bit_t MulCorErrStatusSendLaFIFO2_1[1]
pseudo_bit_t RxFlagUnCorErrCheckBit_7_0[8]
pseudo_bit_t CorErrMskSendLaFIFO5_1[1]
pseudo_bit_t SendBufMisuseErr[1]
pseudo_bit_t _unused_0[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_HwErrMask_pb)
pseudo_bit_t RcvUrg7IntMask[1]
pseudo_bit_t LaFifoArray0UnCorErrCheckBit_10_0[11]
pseudo_bit_t _unused_1[11]
pseudo_bit_t SDmaIdleIntClear_1[1]
pseudo_bit_t SDmaHaltErr[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t CorErrStatusRcvDMAHdrBuf_0[1]
pseudo_bit_t MulUncErrClearRcvFlags_1[1]
pseudo_bit_t ResetNegatedClear[1]
pseudo_bit_t threshold_limbit[1]
pseudo_bit_t RcvQPMapEnable[1]
pseudo_bit_t MulUncErrClearSendBufExtra[1]
pseudo_bit_t UncErrClearSendLaFIFO4_1[1]
pseudo_bit_t RxDataFifoUnCorErrData_127_64[64]
pseudo_bit_t tx_rx_reset[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogA_1_pb)
pseudo_bit_t heartbeat_timed_out[1]
pseudo_bit_t ScbDescIndex_13_0[14]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrCorErrLogC_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead17_pb)
pseudo_bit_t SDmaVL15Err[1]
pseudo_bit_t UncErrClearLookupiqBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReqTagUsed_1_pb)
pseudo_bit_t _unused_1[9]
pseudo_bit_t RmFifoArrayCorErrData_63_0[64]
pseudo_bit_t RcvHdrLenErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrCorErrLogB_pb)
pseudo_bit_t UncErrClearSendLaFIFO4_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBase_0_pb)
pseudo_bit_t FSSUncErrSendLaFIFO0_1[1]
pseudo_bit_t TxCreditOk_VL1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvCtrl_0_pb)
pseudo_bit_t MulCorErrMskMsixTable0[1]
pseudo_bit_t FSSUncErrSendLaFIFO3_0[1]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch3[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t SD_SPEED_DDR[1]
pseudo_bit_t RcvLongPktLenErr[1]
pseudo_bit_t LinkSpeedQDR[1]
pseudo_bit_t CorErrStatusLookupiqBuf_1[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO2_1[1]
pseudo_bit_t _unused_4[6]
pseudo_bit_t static_disable_rxenadfe_sdr_ch2[8]
pseudo_bit_t MulCorErrClearSendLaFIFO5_0[1]
pseudo_bit_t MulCorErrClearSendLaFIFO5_1[1]
pseudo_bit_t MulCorErrClearPCIePostHdrBuf[1]
pseudo_bit_t _unused_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogB_0_pb)
pseudo_bit_t _unused_0[2]
pseudo_bit_t static_disable_rxenadfe_ddr_ch3[8]
pseudo_bit_t FSSCorErrRcvFlags_0[1]
pseudo_bit_t _unused_1[2]
pseudo_bit_t SDmaIdleIntMask_1[1]
pseudo_bit_t RcvAvail9IntBlocked[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t _unused_0[24]
pseudo_bit_t UncErrStatusSendLaFIFO0_0[1]
pseudo_bit_t CorErrClearSendLaFIFO1_1[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t RcvQPMapContext4[5]
pseudo_bit_t RmFifoArrayUnCorErrAddr_13_0[14]
pseudo_bit_t PcieCplDataBufrCorErrData_63_0[64]
pseudo_bit_t _unused_0[39]
pseudo_bit_t RcvIBFlowErrMask[1]
pseudo_bit_t PcieRetryBufrCorErrData_127_64[64]
pseudo_bit_t _unused_1[4]
pseudo_bit_t MulUncErrMskRcvFlags_0[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO5_1[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t _unused_0[43]
pseudo_bit_t _unused_0[37]
pseudo_bit_t dyn_disable_rxenale_ddr_ch0[1]
pseudo_bit_t RcvEBPErrClear[1]
pseudo_bit_t _unused_1[19]
pseudo_bit_t _unused_1[24]
pseudo_bit_t RcvQPMapContext18[5]
pseudo_bit_t CorErrStatusSendLaFIFO7_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBNCModeCtrl_0_pb)
pseudo_bit_t _unused_0[1]
pseudo_bit_t _unused_1[36]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t MsixTable_2_CorErrAddr[7]
pseudo_bit_t debug_port_sel_tx_sdma[1]
pseudo_bit_t RcvMinPktLenErrMask[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO1_1[1]
pseudo_bit_t SendDmaDescCnt[16]
pseudo_bit_t MulCorErrStatusSendBufExtra[1]
pseudo_bit_t SDmaDescAddrMisalignErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogB_1_pb)
pseudo_bit_t SBufMainArrayUnCorErrAddr_18_0[19]
pseudo_bit_t _unused_3[4]
pseudo_bit_t RcvHdrq10DCAXfrCnt[6]
pseudo_bit_t RcvMinPktLenErrClear[1]
pseudo_bit_t SendBufMisuseErrMask[1]
pseudo_bit_t PciePDataBufrCorErrData_136_128[9]
pseudo_bit_t UncErrClearPCIeCompHdrBuf[1]
pseudo_bit_t RcvHdrqDCAEnable[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t MsixTable_2_UnCorErrCheckBits[7]
pseudo_bit_t _unused_0[7]
pseudo_bit_t _unused_0[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t _unused_1[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogE_0_pb)
pseudo_bit_t RcvBadTidErrClear[1]
pseudo_bit_t _unused_1[13]
pseudo_bit_t GenMismatch[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogA_1_pb)
pseudo_bit_t RcvFormatErrClear[1]
pseudo_bit_t RcvAvail11IntBlocked[1]
pseudo_bit_t SendDmaBase[48]
pseudo_bit_t TS_RX_RX_CFG[16]
pseudo_bit_t MulUncErrStatusSendLaFIFO0_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufAvailAddr_pb)
pseudo_bit_t UncErrClearSendLaFIFO1_1[1]
pseudo_bit_t MulCorErrStatusRcvDMAHdrBuf_0[1]
pseudo_bit_t TxCreditOk_VL5[1]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch3[8]
pseudo_bit_t static_disable_rxenagain_ddr_ch2[1]
pseudo_bit_t PcieCplHdrBufrCorErrHdr_63_0[64]
pseudo_bit_t EagerDCAEnable[1]
pseudo_bit_t KeepOnGenErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrCorErrLogA_pb)
pseudo_bit_t _unused_0[60]
pseudo_bit_t SDmaOutOfBoundErrMask[1]
pseudo_bit_t MulUncErrClearPCIePostHdrBuf[1]
pseudo_bit_t static_disable_rxenagain_sdr_ch2[1]
pseudo_bit_t _unused_0[7]
pseudo_bit_t dontDropRHQFull[18]
pseudo_bit_t MsixTable_1_CorErrAddr[7]
pseudo_bit_t MsixTable_0_UnCorErrAddr[7]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t static_disable_rxenagain_qdr_ch1[1]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch2[1]
pseudo_bit_t NibbleSel12[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrUnCorErrLogB_pb)
pseudo_bit_t MulCorErrMskSendLaFIFO2_0[1]
pseudo_bit_t RcvAvail10[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch1[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufCnt_pb)
pseudo_bit_t FlowValid[1]
pseudo_bit_t SendDmaDescCnt[16]
pseudo_bit_t _unused_0[43]
pseudo_bit_t txcn1_xtra_emph0[2]
pseudo_bit_t SendDroppedDataPktErrMask[1]
pseudo_bit_t SendMinPktLenErrClear[1]
pseudo_bit_t CorErrStatusSendLaFIFO4_0[1]
pseudo_bit_t RcvAvail17IntClear[1]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch1[8]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t UncErrMskSendBufMain[1]
pseudo_bit_t _unused_4[6]
pseudo_bit_t UncErrMskSendLaFIFO7_0[1]
pseudo_bit_t HdrSuppEnabled[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogE_1_pb)
pseudo_bit_t _unused_0[1]
pseudo_bit_t MulUncErrClearLookupiqBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaDescCnt_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrCorErrLogB_pb)
pseudo_bit_t UncErrStatusMsixTable1[1]
pseudo_bit_t LaFifoArray0CorErrData_34_0[35]
pseudo_bit_t _unused_1[4]
pseudo_bit_t UncErrClearSendLaFIFO7_1[1]
pseudo_bit_t MulUncErrClearSendLaFIFO6_1[1]
pseudo_bit_t RcvQPMapContext23[5]
pseudo_bit_t RcvICRCErr[1]
pseudo_bit_t RcvQPMapContext2[5]
pseudo_bit_t RxHdrFifoUnCorErrCheckBit_15_0[16]
pseudo_bit_t _unused_1[35]
pseudo_bit_t MulUncErrStatusSendLaFIFO7_0[1]
pseudo_bit_t MulCorErrMskSendLaFIFO5_0[1]
pseudo_bit_t _unused_3[15]
pseudo_bit_t PciePHdrBufrUnCorErrAddr_8_0[9]
pseudo_bit_t SendPktLenErr[1]
pseudo_bit_t MulCorErrClearRcvBuf_0[1]
pseudo_bit_t IB_NUM_CHANNELS[2]
pseudo_bit_t RcvUrg4IntMask[1]
pseudo_bit_t dyn_disable_rxenale_sdr_ch1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb)
pseudo_bit_t _unused_0[4]
pseudo_bit_t PciePDataBufrUnCorErrData_136_128[9]
pseudo_bit_t NibbleSel1[4]
pseudo_bit_t RxHdrFifoUnCorErrAddr_10_0[11]
pseudo_bit_t IBRxLaneReversed[1]
pseudo_bit_t _unused_3[1]
pseudo_bit_t LaFifoArray0UnCorErrAddr_10_0[11]
pseudo_bit_t _unused_2[48]
pseudo_bit_t SyncReset[1]
pseudo_bit_t _unused_2[37]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t SendDmaHeadAddr[48]
pseudo_bit_t CorErrClearSendLaFIFO5_1[1]
pseudo_bit_t VirtualLane[3]
pseudo_bit_t RcvICRCErrClear[1]
pseudo_bit_t MulCorErrStatusMsixTable2[1]
pseudo_bit_t RcvIBFlowErrClear[1]
pseudo_bit_t RcvAvail16IntMask[1]
pseudo_bit_t RcvAvail9IntMask[1]
pseudo_bit_t UncErrMskSendLaFIFO3_0[1]
pseudo_bit_t UncErrMskRcvBuf_1[1]
pseudo_bit_t PciePDataBufrCorErrData_63_0[64]
pseudo_bit_t _unused_1[35]
pseudo_bit_t TxCreditOk_VL3[1]
pseudo_bit_t SDmaIntMask_1[1]
pseudo_bit_t _unused_1[32]
pseudo_bit_t _unused_0[61]
pseudo_bit_t CorErrMskRcvDMADataBuf_0[1]
pseudo_bit_t ibsd_adaptation_timer_debug[1]
pseudo_bit_t MulCorErrMskSendLaFIFO5_1[1]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch3[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogA_0_pb)
pseudo_bit_t voltage_margin_settings_enable[1]
pseudo_bit_t MulCorErrClearSendLaFIFO7_1[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t SDmaBaseErrMask[1]
pseudo_bit_t SD_SPEED_SDR[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch0[8]
pseudo_bit_t MulCorErrMskRcvDMAHdrBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable5_pb)
pseudo_bit_t SendDmaHead[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiUnCorErrMask_pb)
pseudo_bit_t FlowValid[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead7_pb)
pseudo_bit_t MulCorErrStatusSendPbcArray[1]
pseudo_bit_t RcvICRCErrMask[1]
pseudo_bit_t SBufMainArrayUnCorErrData_63_0[64]
pseudo_bit_t FSSUncErrSendLaFIFO1_1[1]
pseudo_bit_t SendDmaTail[16]
pseudo_bit_t _unused_0[2]
pseudo_bit_t _unused_1[32]
pseudo_bit_t SendMaxPktLenErrClear[1]
pseudo_bit_t RcvHdrErr[1]
pseudo_bit_t SHeadersErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDArray0_pb)
pseudo_bit_t _unused_0[4]
pseudo_bit_t UncErrStatusSendBufVL15[1]
pseudo_bit_t PacketTooSmall[1]
pseudo_bit_t TxCreditOk_VL7[1]
pseudo_bit_t static_disable_rxenale_ddr_ch3[1]
pseudo_bit_t link_sync_mask[10]
pseudo_bit_t RxBufrCorErrData_255_192[64]
pseudo_bit_t RmFifoArrayCorErrCheckBit_27_0[28]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb)
pseudo_bit_t CorErrClearRcvBuf_0[1]
pseudo_bit_t MsixTable_1_UnCorErrCheckBits[7]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogC_1_pb)
pseudo_bit_t RmFifoArrayCorErrData_63_0[64]
pseudo_bit_t RmFifoArrayUnCorErrCheckBit_27_0[28]
pseudo_bit_t _unused_1[11]
pseudo_bit_t MulCorErrClearRcvFlags_0[1]
pseudo_bit_t SendBufAvailIntMask[1]
pseudo_bit_t _unused_0[59]
pseudo_bit_t _unused_0[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_Revision_pb)
pseudo_bit_t PciePDataBufrUnCorErrCheckBit_21_0[22]
pseudo_bit_t _unused_0[12]
pseudo_bit_t PcieCplDataBufrCorErrAddr_13_0[14]
pseudo_bit_t _unused_2[8]
pseudo_bit_t _unused_0[16]
pseudo_bit_t IntrAvail[18]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogB_1_pb)
pseudo_bit_t _unused_1[32]
pseudo_bit_t RcvEgrFullErr[1]
pseudo_bit_t MulCorErrMskRcvEgrArray[1]
pseudo_bit_t RcvAvail12IntClear[1]
pseudo_bit_t PCIeBusParityErrMask[3]
pseudo_bit_t _unused_0[4]
pseudo_bit_t _unused_0[12]
pseudo_bit_t _unused_0[4]
pseudo_bit_t CorErrMskSendLaFIFO7_1[1]
pseudo_bit_t FreezeMode[1]
pseudo_bit_t RxEqLocalDevice[2]
pseudo_bit_t RxDataFifoCorErrAddr_10_0[11]
pseudo_bit_t SendDone_1[1]
pseudo_bit_t SendBufAvailPad64Byte[1]
pseudo_bit_t SDmaUnexpDataErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusB_1_pb)
pseudo_bit_t _unused_0[19]
pseudo_bit_t MulUncErrStatusLookupiqBuf_1[1]
pseudo_bit_t Diagnostic[1]
pseudo_bit_t NonKeyPacket[1]
pseudo_bit_t SDmaBufMaskDuplicateErr[1]
pseudo_bit_t RcvBadTidErrClear[1]
pseudo_bit_t SDmaTailOutOfBoundErr[1]
pseudo_bit_t RcvAvail2IntClear[1]
pseudo_bit_t SendDmaIdleCnt[16]
pseudo_bit_t FSSCorErrRcvDMADataBuf_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableF_0_pb)
pseudo_bit_t UncErrClearRcvDMADataBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogB_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxCreditVL0_0_pb)
pseudo_bit_t Port1_QDR_Enabled[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHeadAddr_0_pb)
pseudo_bit_t SendArmLaunchErrClear[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t MulCorErrClearSendLaFIFO7_0[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO5_1[1]
pseudo_bit_t statusValidNoEopMask_1[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t SendDroppedSmpPktErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableA_0_pb)
pseudo_bit_t _unused_0[57]
pseudo_bit_t MulCorErrClearSendLaFIFO6_1[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO6_0[1]
pseudo_bit_t SBufVL15ArrayUnCorErrData_63_0[64]
pseudo_bit_t EnhMode_SrcMuxSelIndex[10]
pseudo_bit_t CorErrClearRcvBuf_1[1]
pseudo_bit_t FSSUncErrPCIePostDataBuf[1]
pseudo_bit_t TxCreditOk_VL1[1]
pseudo_bit_t UncErrStatusSendLaFIFO5_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable6_pb)
pseudo_bit_t RxHdrFifoUnCorErrData_127_64[64]
pseudo_bit_t MulUncErrClearLookupiqBuf_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayCorErrLogB_pb)
pseudo_bit_t UncErrStatusRcvDMAHdrBuf_0[1]
pseudo_bit_t MulUncErrMskSendLaFIFO1_0[1]
pseudo_bit_t FSSUncErrRcvDMAHdrBuf_0[1]
pseudo_bit_t RcvQPMapContext18[5]
pseudo_bit_t RcvUnexpectedCharErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusB_0_pb)
pseudo_bit_t UncErrMskSendLaFIFO5_0[1]
pseudo_bit_t MulUncErrClearRcvBuf_0[1]
pseudo_bit_t TxCreditOk_VL6[1]
pseudo_bit_t RcvHdrErrClear[1]
pseudo_bit_t RxLkupiqCorErrAddr_12_0[13]
pseudo_bit_t RcvHdrq0DCAOPH[8]
pseudo_bit_t MulCorErrMskMsixTable1[1]
pseudo_bit_t DebugOutMuxSel[2]
pseudo_bit_t MulCorErrMskSendLaFIFO3_1[1]
pseudo_bit_t SplFifoDisarmed[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogB_0_pb)
pseudo_bit_t _unused_0[16]
pseudo_bit_t IB_LANE_REV_SUPPORTED[1]
pseudo_bit_t SendBufAvailAddr[34]
pseudo_bit_t RxPktInProgress[1]
pseudo_bit_t dyn_disable_rxenale_ddr_ch2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_VTSense_reg_pb)
pseudo_bit_t InvalidEEPCmdErr[1]
pseudo_bit_t RcvBadVersionErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDAssign_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendHdrErrSymptom_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufUsed0_1_pb)
pseudo_bit_t IB_BACK_PORCH[5]
pseudo_bit_t SendMinPktLenErrClear[1]
pseudo_bit_t DISABLE_RXLATOFF_DDR[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t _unused_0[24]
pseudo_bit_t RcvMinPktLenErr[1]
pseudo_bit_t FSSCorErrSendPbcArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead4_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableE_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendHdrErrSymptom_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvCtrl_1_pb)
pseudo_bit_t RcvIBLostLinkErrMask[1]
pseudo_bit_t dyn_disable_rxenale_ddr_ch2[1]
pseudo_bit_t pcie_phy_txParityErr[1]
pseudo_bit_t _unused_0[19]
pseudo_bit_t CorErrClearRcvDMAHdrBuf_1[1]
pseudo_bit_t MulUncErrMskMsixTable2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlA_1_pb)
pseudo_bit_t FSSCorErrSendLaFIFO5_0[1]
pseudo_bit_t MulCorErrStatusRcvDMADataBuf_1[1]
pseudo_bit_t _unused_2[8]
pseudo_bit_t PcieRetryBufrUnCorErrAddr_13_0[14]
pseudo_bit_t SpecialTriggerEn[1]
pseudo_bit_t RxBufrUnCorErrData_258_256[3]
pseudo_bit_t MulUncErrClearSendRmFIFO_0[1]
pseudo_bit_t RcvHeadPointer[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogC_1_pb)
pseudo_bit_t RcvContextShareErrMask[1]
pseudo_bit_t _unused_0[40]
pseudo_bit_t LEDPort1GreenOn[1]
pseudo_bit_t TS_T_TX_VALID[1]
pseudo_bit_t _unused_3[4]
pseudo_bit_t FlowValid[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch1[8]
pseudo_bit_t _unused_0[18]
pseudo_bit_t MulUncErrClearPCIeRetryBuf[1]
pseudo_bit_t UncErrMskSendLaFIFO7_1[1]
pseudo_bit_t _unused_0[51]
pseudo_bit_t CorErrClearSendLaFIFO7_1[1]
pseudo_bit_t MulCorErrMskSendLaFIFO4_1[1]
pseudo_bit_t CorErrMskSendLaFIFO6_0[1]
pseudo_bit_t TSMCode_TS1[9]
pseudo_bit_t procmon_count_valid[1]
pseudo_bit_t LaFifoEmpty_VL7[1]
pseudo_bit_t _unused_0[2]
pseudo_bit_t RcvVCRCErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogA_0_pb)
pseudo_bit_t FSSUncErrSendPbcArray[1]
pseudo_bit_t RcvResetCredit[1]
pseudo_bit_t UncErrClearSendLaFIFO7_0[1]
pseudo_bit_t RcvQPMapContext19[5]
pseudo_bit_t MulCorErrStatusRcvBuf_1[1]
pseudo_bit_t static_disable_rxenale_ddr_ch3[1]
pseudo_bit_t RcvQPMapContext11[5]
pseudo_bit_t MulUncErrMskSendLaFIFO3_1[1]
pseudo_bit_t ScrambleCapLocal[1]
pseudo_bit_t MulUncErrMskSendLaFIFO2_0[1]
pseudo_bit_t CorErrMskRcvTIDArray[1]
pseudo_bit_t SendUnsupportedVLErrClear[1]
pseudo_bit_t SendDmaBase[48]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogC_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead15_pb)
pseudo_bit_t RcvLongPktLenErrClear[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t SendUnsupportedVLErr[1]
pseudo_bit_t CorErrClearSendRmFIFO_1[1]
pseudo_bit_t CorErrClearRcvEgrArray[1]
pseudo_bit_t SHeadersErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMulticastContext_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogB_0_pb)
pseudo_bit_t SwapEccDataMsixBits[1]
pseudo_bit_t MulUncErrClearSendRmFIFO_1[1]
pseudo_bit_t RcvUrg16IntBlocked[1]
pseudo_bit_t DISABLE_RXLATOFF_QDR[1]
pseudo_bit_t CorErrStatusSendPbcArray[1]
pseudo_bit_t SDmaCleanupDoneMask_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriority0_1_pb)
pseudo_bit_t CorErrStatusSendLaFIFO0_0[1]
pseudo_bit_t PcieCplDataBufrUnCorErrData_63_0[64]
pseudo_bit_t CorErrMskRcvDMADataBuf_1[1]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch0[8]
pseudo_bit_t PriorityThreshold[4]
pseudo_bit_t UncErrMskPCIeRetryBuf[1]
pseudo_bit_t RcvQPMapContext26[5]
pseudo_bit_t _unused_0[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogB_0_pb)
pseudo_bit_t RcvHdrq17DCAXfrCnt[6]
pseudo_bit_t LaFifoEmpty_VL2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable2_pb)
pseudo_bit_t UncErrMskSendLaFIFO0_1[1]
pseudo_bit_t TS_RX_TX_CFG[16]
pseudo_bit_t MemBISTEndTest[1]
pseudo_bit_t _unused_0[12]
pseudo_bit_t CorErrMskSendLaFIFO1_1[1]
pseudo_bit_t xcv_treset[1]
pseudo_bit_t MulCorErrMskSendBufVL15[1]
pseudo_bit_t MulUncErrStatusSendRmFIFO_0[1]
pseudo_bit_t SendUnderRunErrMask[1]
pseudo_bit_t CorErrClearMsixTable1[1]
pseudo_bit_t SBufMainArrayCorErrData_63_0[64]
pseudo_bit_t CorErrMskPCIeRetryBuf[1]
pseudo_bit_t _unused_0[11]
pseudo_bit_t PciePDataBufrUnCorErrData_127_64[64]
pseudo_bit_t _unused_0[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxCreditVL0_1_pb)
pseudo_bit_t LaFifoEmpty_VL3[1]
pseudo_bit_t MulCorErrStatusSendBufVL15[1]
pseudo_bit_t MulUncErrClearPCIeCompDataBuf[1]
pseudo_bit_t _unused_0[5]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t _unused_0[3]
pseudo_bit_t MulUncErrClearSendLaFIFO5_0[1]
pseudo_bit_t RcvUrg15IntMask[1]
pseudo_bit_t MulCorErrClearPCIeRetryBuf[1]
pseudo_bit_t RcvQPMapContext5[5]
pseudo_bit_t forcePCIeBusParity[4]
pseudo_bit_t SendDroppedDataPktErr[1]
pseudo_bit_t CorErrClearSendLaFIFO3_1[1]
pseudo_bit_t PcieCplDataBufrCorErrData_127_64[64]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch3[8]
pseudo_bit_t MulCorErrStatusSendLaFIFO4_0[1]
pseudo_bit_t GPIOInvert[16]
pseudo_bit_t UncErrMskRcvDMADataBuf_0[1]
pseudo_bit_t RcvUrg9IntMask[1]
pseudo_bit_t RcvUnsupportedVLErrMask[1]
pseudo_bit_t TxCreditOk_VL0[1]
pseudo_bit_t LaFifoEmpty_VL0[1]
pseudo_bit_t CorErrClearSendRmFIFO_0[1]
pseudo_bit_t RxDataFifoUnCorErrData_63_0[64]
pseudo_bit_t _unused_0[11]
pseudo_bit_t _unused_0[2]
pseudo_bit_t _unused_1[2]
pseudo_bit_t IB_LAT_MODE[1]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch1[1]
pseudo_bit_t RcvQPMapContext26[5]
pseudo_bit_t RcvBadTidErr[1]
pseudo_bit_t MulUncErrMskRcvDMAHdrBuf_1[1]
pseudo_bit_t MulCorErrMskSendLaFIFO0_1[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t _unused_0[1]
pseudo_bit_t _unused_1[45]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogA_0_pb)
pseudo_bit_t MemoryErrMask[1]
pseudo_bit_t RxMaxCreditVL[12]
pseudo_bit_t FSSCorErrRcvDMADataBuf_0[1]
pseudo_bit_t RcvQPMapContext14[5]
pseudo_bit_t SeqMismatch[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrClear_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb)
pseudo_bit_t _unused_0[25]
pseudo_bit_t MulCorErrMskRcvBuf_0[1]
pseudo_bit_t HardwareErr[1]
pseudo_bit_t MulUncErrClearRcvBuf_1[1]
pseudo_bit_t SendBufMisuseErrClear[1]
pseudo_bit_t LaFifoEmpty_VL1[1]
pseudo_bit_t SD_RX_EQUAL_ENABLE[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrUnCorErrLogA_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_GPIODebugSelReg_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_IBPCSConfig_1_pb)
pseudo_bit_t RxBufrUnCorErrCheckBit_36_0[37]
pseudo_bit_t MulCorErrMskSendLaFIFO6_0[1]
pseudo_bit_t MulUncErrStatusMsixTable2[1]
pseudo_bit_t PciePoisonedTLP[1]
pseudo_bit_t _unused_1[16]
pseudo_bit_t SendMinPktLenErr[1]
pseudo_bit_t _unused_2[8]
pseudo_bit_t _unused_0[4]
pseudo_bit_t _unused_0[3]
pseudo_bit_t _unused_0[3]
pseudo_bit_t FlowCtrlWaterMark[8]
pseudo_bit_t UncErrClearSendPbcArray[1]
pseudo_bit_t RcvUrg13IntClear[1]
pseudo_bit_t CorErrMskMsixTable1[1]
pseudo_bit_t ForcestatusValidNoEop_0[1]
pseudo_bit_t FSSUncErrSendBufVL15[1]
pseudo_bit_t _unused_0[6]
pseudo_bit_t FlowValid[1]
pseudo_bit_t MulCorErrClearRcvDMAHdrBuf_1[1]
pseudo_bit_t ScbFetchDescFlag[1]
pseudo_bit_t MulCorErrMskRcvFlags_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBNCModeCtrl_1_pb)
pseudo_bit_t UncErrClearRcvDMAHdrBuf_0[1]
pseudo_bit_t SD_ADD_ENB[1]
pseudo_bit_t UncErrClearRcvDMAHdrBuf_1[1]
pseudo_bit_t _unused_0[59]
pseudo_bit_t RcvMaxPktLenErrMask[1]
pseudo_bit_t _unused_3[4]
pseudo_bit_t MsixTable_1_0_UnCorErrData[64]
pseudo_bit_t _unused_1[11]
pseudo_bit_t SDmaMissingDwErr[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RcvAvail7IntBlocked[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogC_0_pb)
pseudo_bit_t _unused_0[18]
pseudo_bit_t _unused_2[1]
pseudo_bit_t RcvQPMapContext30[5]
pseudo_bit_t ErrIntClear_0[1]
pseudo_bit_t SD_SPEED_DDR[1]
pseudo_bit_t HardwareErrClear[1]
pseudo_bit_t CorErrMskPCIePostDataBuf[1]
pseudo_bit_t MulUncErrClearRcvDMAHdrBuf_1[1]
unsigned char pseudo_bit_t
Datatype used to represent a bit in the pseudo-structures.
pseudo_bit_t heartbeat_timed_out[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableD_0_pb)
pseudo_bit_t _unused_2[8]
pseudo_bit_t _unused_0[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb)
pseudo_bit_t RcvHdrq2DCAXfrCnt[6]
pseudo_bit_t MulUncErrClearRcvDMAHdrBuf_0[1]
pseudo_bit_t _unused_2[7]
pseudo_bit_t MulUncErrMskRcvTIDArray[1]
pseudo_bit_t SBufMainArrayUnCorErrData_127_64[64]
pseudo_bit_t SendDoneIntClear_0[1]
pseudo_bit_t RcvQPMapContext17[5]
pseudo_bit_t SendUnsupportedVLErr[1]
pseudo_bit_t _unused_3[15]
pseudo_bit_t MulCorErrStatusLookupiqBuf_1[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t reset_tx_deemphasis_override[1]
pseudo_bit_t SendMaxPktLenErrClear[1]
pseudo_bit_t _unused_5[5]
pseudo_bit_t RxBufrUnCorErrData_191_128[64]
pseudo_bit_t txcp1_ena[4]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch3[1]
pseudo_bit_t UncErrStatusSendLaFIFO2_1[1]
pseudo_bit_t RcvAvail1IntBlocked[1]
pseudo_bit_t power_down[1]
pseudo_bit_t RcvAvail13IntBlocked[1]
pseudo_bit_t SDmaRpyTagErr[1]
pseudo_bit_t CorErrClearSendBufExtra[1]
pseudo_bit_t MulCorErrClearRcvEgrArray[1]
pseudo_bit_t TSMEnable_send_TS1[1]
pseudo_bit_t UncErrStatusSendLaFIFO6_0[1]
pseudo_bit_t RcvMaxPktLenErrMask[1]
pseudo_bit_t ContextEnableKernel[1]
pseudo_bit_t _unused_2[8]
pseudo_bit_t FSSUncErrMsixTable2[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t static_disable_rxenagain_qdr_ch2[1]
pseudo_bit_t PciePDataBufrCorErrData_127_64[64]
pseudo_bit_t SendUnderRunErr[1]
pseudo_bit_t SDmaInt_0[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t MulUncErrStatusRcvBuf_1[1]
pseudo_bit_t MulUncErrClearPCIePostDataBuf[1]
pseudo_bit_t RcvShortPktLenErrClear[1]
pseudo_bit_t GPIOSourceSelDebug[16]
pseudo_bit_t static_disable_rxenale_sdr_ch1[1]
pseudo_bit_t RcvShortPktLenErrMask[1]
pseudo_bit_t RcvUnexpectedCharErrClear[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t RxTIDArrayUnCorErrData_39_0[40]
pseudo_bit_t PcieCplHdrBufrUnCorErrAddr_8_0[9]
pseudo_bit_t PcieCplDataBufrCorErrCheckBit_21_0[22]
pseudo_bit_t RcvHdrq4DCAOPH[8]
pseudo_bit_t output_valid[1]
pseudo_bit_t ScrambleCapRemoteMask[1]
pseudo_bit_t CorErrClearPCIePostDataBuf[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO1_0[1]
pseudo_bit_t UncErrMskRcvFlags_1[1]
pseudo_bit_t FSSCorErrRcvDMAHdrBuf_1[1]
pseudo_bit_t RpyLowAddr_6_0[7]
pseudo_bit_t RxBufrCorErrAddr_15_0[16]
pseudo_bit_t MulCorErrClearRcvDMAHdrBuf_0[1]
pseudo_bit_t SDmaSingleDescriptor[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvPktLEDCnt_0_pb)
pseudo_bit_t RcvEBPErr[1]
pseudo_bit_t MulUncErrMskSendLaFIFO0_1[1]
pseudo_bit_t CorErrStatusRcvDMADataBuf_0[1]
pseudo_bit_t ContextEnableUser[16]
pseudo_bit_t UncErrStatusSendRmFIFO_0[1]
pseudo_bit_t RxHdrFifoCorErrData_63_0[64]
pseudo_bit_t RcvQPMapContext22[5]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch2[8]
pseudo_bit_t RxBufrCorErrCheckBit_36_0[37]
pseudo_bit_t RcvQPMapContext25[5]
pseudo_bit_t static_disable_rxenadfe_sdr_ch1[8]
pseudo_bit_t RcvIBFlowErrClear[1]
pseudo_bit_t FSSUncErrPCIeCompDataBuf[1]
pseudo_bit_t IB_LAT_MODE[1]
pseudo_bit_t _unused_0[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogC_1_pb)
pseudo_bit_t SendDoneIntBlocked_0[1]
pseudo_bit_t LaFifoEmpty_VL1[1]
pseudo_bit_t RcvResetCredit[1]
pseudo_bit_t RcvQPMapContext22[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogD_1_pb)
pseudo_bit_t SendDroppedDataPktErrMask[1]
pseudo_bit_t _unused_0[3]
pseudo_bit_t _unused_0[37]
pseudo_bit_t FSSCorErrSendBufExtra[1]
pseudo_bit_t RcvEgrFullErrMask[1]
pseudo_bit_t _unused_0[8]
pseudo_bit_t SDmaHaltErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable4_pb)
pseudo_bit_t SendDmaIdleCnt[16]
pseudo_bit_t PciePoisonedTLPMask[1]
pseudo_bit_t SendDma0DCAOPH[8]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t UncErrMskSendPbcArray[1]
pseudo_bit_t UncErrClearSendLaFIFO0_0[1]
pseudo_bit_t RxEagerArrayUnCorErrData_39_0[40]
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableCorErrLogA_pb)
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t SDmaCleanup[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayUnCorErrLogA_pb)
pseudo_bit_t _unused_3[4]
pseudo_bit_t RcvQPMapContext21[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiCorErrStatus_pb)
pseudo_bit_t RcvQpMcContext[5]
pseudo_bit_t MulUncErrClearRcvDMADataBuf_1[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t RcvBadVersionErrClear[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvHdrq1DCAXfrCnt[6]
pseudo_bit_t RcvIBLostLinkErr[1]
pseudo_bit_t txampcntl_d2a[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb)
pseudo_bit_t _unused_0[12]
pseudo_bit_t _unused_0[28]
pseudo_bit_t TS_TX_RX_CFG[16]
pseudo_bit_t RcvUrg13IntBlocked[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t _unused_0[2]
pseudo_bit_t ONperiod[32]
pseudo_bit_t _unused_1[11]
pseudo_bit_t RcvUrg7IntBlocked[1]
pseudo_bit_t BaseAddr_LargePIO[21]
pseudo_bit_t _unused_1[45]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead13_pb)
pseudo_bit_t Size_SmallPIO[12]
pseudo_bit_t tx_override_deemphasis_select[1]
pseudo_bit_t UncErrStatusSendLaFIFO7_0[1]
pseudo_bit_t CorErrMskRcvDMAHdrBuf_0[1]
pseudo_bit_t MulCorErrClearSendLaFIFO2_0[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t _unused_0[6]
pseudo_bit_t RxBufrCorErrData_127_64[64]
pseudo_bit_t UncErrClearSendLaFIFO0_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendPbcArrayCorErrLog_pb)
pseudo_bit_t CorErrClearPCIePostHdrBuf[1]
pseudo_bit_t ScrambleEn[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_DebugPortNibbleSel_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogA_1_pb)
pseudo_bit_t dyn_disable_rxenagain_sdr_ch0[1]
pseudo_bit_t UncErrStatusSendBufMain[1]
pseudo_bit_t FSSUncErrRcvDMADataBuf_1[1]
pseudo_bit_t _unused_0[32]
pseudo_bit_t FSSUncErrSendLaFIFO2_0[1]
pseudo_bit_t TxCreditOk_VL3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrUnCorErrLogC_pb)
pseudo_bit_t RcvUrg3IntMask[1]
pseudo_bit_t _unused_5[5]
pseudo_bit_t MulCorErrClearSendBufVL15[1]
pseudo_bit_t FSSCorErrSendLaFIFO7_1[1]
pseudo_bit_t debug_port_sel_credit_b_1[3]
pseudo_bit_t _unused_0[3]
pseudo_bit_t FSSCorErrMsixTable2[1]
pseudo_bit_t _unused_1[16]
pseudo_bit_t RcvICRCErr[1]
pseudo_bit_t MulCorErrMskSendLaFIFO7_0[1]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch3[1]
pseudo_bit_t static_disable_rxenale_sdr_ch0[1]
pseudo_bit_t RcvICRCErrMask[1]
pseudo_bit_t TS_3_TX_VALID[1]
pseudo_bit_t CHANNEL_RESET_N[4]
pseudo_bit_t SDmaCleanupDoneBlocked_0[1]
pseudo_bit_t RcvHdrFullErrClear[1]
pseudo_bit_t MulCorErrClearSendRmFIFO_0[1]
pseudo_bit_t debug_port_sel_tx_ibport[1]
pseudo_bit_t write_not_read[1]
pseudo_bit_t RcvAvail3IntMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrCorErrLogB_pb)
pseudo_bit_t RcvAvail14IntMask[1]
pseudo_bit_t RxHdrFifoCorErrAddr_10_0[11]
pseudo_bit_t RcvHdrErrMask[1]
pseudo_bit_t Finished_sc[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaPriorityThld_1_pb)
pseudo_bit_t MulCorErrMskSendPbcArray[1]
pseudo_bit_t RcvUrg15IntClear[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch2[8]
pseudo_bit_t InvalidAddrErr[1]
pseudo_bit_t SDmaRpyTagErrMask[1]
pseudo_bit_t LinkSpeedActive[1]
pseudo_bit_t RxBufrUnCorErrAddr_15_0[16]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO3_0[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t PcieRetryBufrCorErrCheckBit_20_0[21]
pseudo_bit_t _unused_0[3]
pseudo_bit_t UncErrMskSendLaFIFO5_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogC_0_pb)
pseudo_bit_t SBufMainArrayUnCorErrDword_3_0[4]
pseudo_bit_t _unused_0[23]
pseudo_bit_t RcvQPMapContext0[5]
pseudo_bit_t _unused_5[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufUsed0_0_pb)
pseudo_bit_t SelPulse[16]
pseudo_bit_t RxDataFifoCorErrData_127_64[64]
pseudo_bit_t TxCreditOk_VL2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayCorErrLogA_pb)
pseudo_bit_t UncErrClearRcvBuf_0[1]
pseudo_bit_t IBSerdesPClkNotDetectMask_0[1]
pseudo_bit_t SDmaOutOfBoundErr[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t MulCorErrClearSendLaFIFO6_0[1]
pseudo_bit_t UncErrStatusRcvDMAHdrBuf_1[1]
pseudo_bit_t start_counter[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogB_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb)
pseudo_bit_t KeepOnGenErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSerdesCtrl_0_pb)
pseudo_bit_t UncErrStatusRcvFlags_1[1]
pseudo_bit_t FSSCorErrSendLaFIFO0_0[1]
pseudo_bit_t CorErrStatusSendLaFIFO4_1[1]
pseudo_bit_t MulCorErrClearMsixTable1[1]
pseudo_bit_t MulCorErrClearSendLaFIFO1_1[1]
pseudo_bit_t RcvHdrq3DCAOPH[8]
pseudo_bit_t _unused_0[37]
pseudo_bit_t SendUnexpectedPktNumErrMask[1]
pseudo_bit_t xcv_rreset[1]
pseudo_bit_t UncErrStatusPCIePostHdrBuf[1]
pseudo_bit_t UncErrStatusPCIeRetryBuf[1]
pseudo_bit_t RcvAvail13IntClear[1]
pseudo_bit_t static_disable_rxenale_ddr_ch0[1]
pseudo_bit_t _unused_0[23]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead9_pb)
pseudo_bit_t static_disable_rxenale_ddr_ch0[1]
pseudo_bit_t _unused_1[32]
pseudo_bit_t IB_BACK_PORCH[5]
pseudo_bit_t FSSUncErrRcvFlags_1[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch2[8]
pseudo_bit_t RcvAvail3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHead_0_pb)
pseudo_bit_t RcvBadTidErr[1]
pseudo_bit_t RxPktInProgress[1]
pseudo_bit_t FSSUncErrSendLaFIFO5_1[1]
pseudo_bit_t RcvQPMapContext12[5]
pseudo_bit_t _unused_0[7]
pseudo_bit_t MulUncErrMskPCIePostDataBuf[1]
pseudo_bit_t MulUncErrStatusRcvBuf_0[1]
pseudo_bit_t RcvHdrFullErr[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvLongPktLenErrMask[1]
pseudo_bit_t start_operation[1]
pseudo_bit_t _unused_5[4]
pseudo_bit_t _unused_0[11]
pseudo_bit_t MulUncErrMskSendLaFIFO2_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead3_pb)
pseudo_bit_t PciePDataBufrCorErrCheckBit_21_0[22]
pseudo_bit_t FlowValid[1]
pseudo_bit_t MulCorErrStatusMsixTable1[1]
pseudo_bit_t UncErrMskSendLaFIFO4_0[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t SDmaRpyTagErr[1]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch2[1]
pseudo_bit_t _unused_2[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableUnCorErrLogB_pb)
pseudo_bit_t _unused_0[13]
pseudo_bit_t _unused_2[21]
pseudo_bit_t MulUncErrStatusSendLaFIFO5_0[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t MulCorErrMskSendBufExtra[1]
pseudo_bit_t _unused_0[34]
pseudo_bit_t MsixTable_1_UnCorErrAddr[7]
pseudo_bit_t _unused_0[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayUnCorErrLogA_pb)
pseudo_bit_t MulCorErrClearSendPbcArray[1]
pseudo_bit_t PciePHdrBufrCorErrAddr_8_0[9]
pseudo_bit_t SDmaIdleIntMask_0[1]
pseudo_bit_t SD_SPEED_SDR[1]
pseudo_bit_t MulUncErrMskRcvBuf_0[1]
pseudo_bit_t static_disable_rxenale_sdr_ch3[1]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t dyn_disable_rxenale_sdr_ch3[1]
pseudo_bit_t _unused_0[37]
pseudo_bit_t _unused_0[6]
pseudo_bit_t SDmaGenMismatchErr[1]
pseudo_bit_t HRTBT_AUTO[1]
pseudo_bit_t MulCorErrStatusRcvBuf_0[1]
pseudo_bit_t InternalSDmaHalt[1]
pseudo_bit_t dyn_disable_rxenale_ddr_ch3[1]
pseudo_bit_t RxEagerArrayUnCorErrCheckBit_11_0[12]
pseudo_bit_t PCIeBusParity[3]
pseudo_bit_t ScrambleCapRemoteForce[1]
pseudo_bit_t RcvQPMapContext21[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrCorErrLogA_pb)
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t PCIeBusParityClear[3]
pseudo_bit_t _unused_0[4]
pseudo_bit_t CorErrMskSendBufExtra[1]
pseudo_bit_t MulCorErrMskSendLaFIFO6_1[1]
pseudo_bit_t _unused_0[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_LowPriority0_0_pb)
pseudo_bit_t RcvAvail8IntMask[1]
pseudo_bit_t TSMEnable_send_TS1[1]
pseudo_bit_t MulUncErrMskSendLaFIFO5_1[1]
pseudo_bit_t ErrIntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogC_1_pb)
pseudo_bit_t SDmaGenMismatchErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriorityLimit_1_pb)
pseudo_bit_t UncErrClearPCIePostHdrBuf[1]
pseudo_bit_t RmFifoArrayCorErrData_127_64[64]
pseudo_bit_t UncErrMskSendBufVL15[1]
pseudo_bit_t MulUncErrMskPCIeCompDataBuf[1]
pseudo_bit_t FSSCorErrSendLaFIFO5_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogA_0_pb)
pseudo_bit_t RcvQPMapContext10[5]
pseudo_bit_t CorErrMskRcvFlags_1[1]
pseudo_bit_t CorErrStatusPCIeCompDataBuf[1]
pseudo_bit_t _unused_0[8]
pseudo_bit_t FSSCorErrSendRmFIFO_1[1]
pseudo_bit_t IBStatIntReductionEn[1]
pseudo_bit_t SplFifoDescIndex[16]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch2[1]
pseudo_bit_t UncErrMskSendLaFIFO6_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrMask_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogB_1_pb)
pseudo_bit_t RmFifoArrayUnCorErrCheckBit_27_0[28]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch0[1]
pseudo_bit_t DDS_RXEQ_FAIL[1]
pseudo_bit_t SDmaGenMismatchErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCheckControl_0_pb)
pseudo_bit_t SD_ADD_ENB[1]
pseudo_bit_t CHANNEL_RESET_N[4]
pseudo_bit_t MulCorErrStatusMsixTable0[1]
pseudo_bit_t _unused_0[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_LowPriority0_1_pb)
pseudo_bit_t _unused_0[4]
pseudo_bit_t _unused_0[4]
pseudo_bit_t RcvHdrq6DCAOPH[8]
pseudo_bit_t _unused_0[18]
pseudo_bit_t FSSCorErrSendRmFIFO_0[1]
pseudo_bit_t MulCorErrClearLookupiqBuf_1[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO0_0[1]
pseudo_bit_t _unused_0[48]
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlC_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_EXTStatus_pb)
pseudo_bit_t FSSUncErrSendRmFIFO_0[1]
pseudo_bit_t CorErrClearSendLaFIFO5_0[1]
pseudo_bit_t MulUncErrStatusRcvDMAHdrBuf_1[1]
pseudo_bit_t RxMaxCreditVL[12]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayUnCorErrLogA_pb)
pseudo_bit_t RcvAvail2IntMask[1]
pseudo_bit_t dyn_disable_rxenale_sdr_ch2[1]
pseudo_bit_t FSSCorErrSendLaFIFO2_1[1]
pseudo_bit_t _unused_0[20]
pseudo_bit_t RxBufrCorErrData_191_128[64]
pseudo_bit_t UncErrStatusRcvEgrArray[1]
pseudo_bit_t _unused_3[24]
pseudo_bit_t MulUncErrMskSendBufMain[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogA_1_pb)
pseudo_bit_t RmFifoArrayCorErrData_127_64[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlD_pb)
pseudo_bit_t SendDroppedSmpPktErr[1]
pseudo_bit_t RcvUrg14IntClear[1]
pseudo_bit_t RxBufrConsumedVL[12]
pseudo_bit_t RcvQPMapContext25[5]
pseudo_bit_t MulCorErrMskLookupiqBuf_0[1]
pseudo_bit_t _unused_1[15]
pseudo_bit_t RcvAvail11IntMask[1]
pseudo_bit_t RcvIBLostLinkErrClear[1]
pseudo_bit_t RxLkupiqUnCorErrCheckBit_7_0[8]
pseudo_bit_t RcvUrg10IntClear[1]
pseudo_bit_t CorErrMskPCIeCompDataBuf[1]
pseudo_bit_t _unused_0[45]
pseudo_bit_t RcvHdrAddr[38]
pseudo_bit_t _unused_1[35]
pseudo_bit_t _unused_0[1]
pseudo_bit_t RcvShortPktLenErrMask[1]
pseudo_bit_t RcvHdrq0DCAXfrCnt[6]
pseudo_bit_t _unused_1[11]
pseudo_bit_t NibbleSel14[4]
pseudo_bit_t LinkState[3]
pseudo_bit_t MulUncErrMskMsixTable0[1]
pseudo_bit_t RcvHdrLenErrClear[1]
pseudo_bit_t SDmaTailOutOfBoundErrMask[1]
pseudo_bit_t pcie_phy_txParityErr[1]
pseudo_bit_t RcvUrg6IntBlocked[1]
pseudo_bit_t MulCorErrStatusRcvDMAHdrBuf_1[1]
pseudo_bit_t UncErrStatusRcvDMADataBuf_1[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t SDmaBufMaskDuplicateErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable8_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDMask_1_pb)
pseudo_bit_t _unused_0[48]
pseudo_bit_t _unused_2[8]
pseudo_bit_t UncErrMskMsixTable0[1]
pseudo_bit_t MulUncErrStatusSendBufExtra[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrUnCorErrLogB_pb)
pseudo_bit_t RcvUrg11IntMask[1]
pseudo_bit_t dyn_disable_rxenale_qdr_ch0[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO4_1[1]
pseudo_bit_t RcvAvail10IntMask[1]
pseudo_bit_t RxBufrCorErrData_63_0[64]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogB_1_pb)
pseudo_bit_t RcvUrg2IntBlocked[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t SDmaProgressIntClear_0[1]
pseudo_bit_t RcvUrg0IntBlocked[1]
pseudo_bit_t MulUncErrClearSendBufVL15[1]
pseudo_bit_t RxHdrFifoCorErrData_63_0[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufErr0_pb)
pseudo_bit_t CorErrClearPCIeCompHdrBuf[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t procmon_count[12]
pseudo_bit_t _unused_0[4]
pseudo_bit_t RcvAvail7IntMask[1]
pseudo_bit_t ScbEntryValid[1]
pseudo_bit_t FSSUncErrLookupiqBuf_1[1]
pseudo_bit_t SDmaIdleInt_0[1]
pseudo_bit_t TxCreditOk_VL0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableB_1_pb)
pseudo_bit_t RmFifoEmpty[1]
pseudo_bit_t UncErrClearSendLaFIFO5_0[1]
pseudo_bit_t RcvAvail9IntClear[1]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch2[1]
pseudo_bit_t RcvQPMapContext9[5]
pseudo_bit_t RcvHdrq16DCAXfrCnt[6]
pseudo_bit_t static_disable_rxenadfe_sdr_ch3[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable12_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead12_pb)
pseudo_bit_t CorErrClearRcvDMADataBuf_1[1]
pseudo_bit_t MulUncErrMskSendLaFIFO4_1[1]
pseudo_bit_t UncErrMskLookupiqBuf_1[1]
pseudo_bit_t FSSCorErrRcvDMAHdrBuf_0[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t RmFifoArrayCorErrDword_3_0[4]
pseudo_bit_t _unused_0[24]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb)
pseudo_bit_t RcvQPMapContext16[5]
pseudo_bit_t _unused_2[8]
pseudo_bit_t _unused_2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead1_pb)
pseudo_bit_t _unused_1[11]
pseudo_bit_t RcvQPMapContext14[5]
pseudo_bit_t SDmaUnexpDataErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriorityLimit_0_pb)
pseudo_bit_t CorErrClearSendLaFIFO1_0[1]
pseudo_bit_t _unused_1[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvStatus_0_pb)
pseudo_bit_t _unused_1[45]
pseudo_bit_t FSSCorErrPCIeCompHdrBuf[1]
pseudo_bit_t RcvIBPortEnable[1]
pseudo_bit_t RmFifoEmpty[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t MulUncErrStatusRcvDMADataBuf_1[1]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch1[1]
pseudo_bit_t NibbleSel4[4]
pseudo_bit_t RcvBadVersionErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ahb_access_ctrl_pb)
pseudo_bit_t Port0_QDR_Enabled[1]
pseudo_bit_t MaxPktLen[11]
pseudo_bit_t MulCorErrStatusRcvFlags_1[1]
pseudo_bit_t _unused_2[7]
pseudo_bit_t FSSCorErrRcvFlags_1[1]
pseudo_bit_t RxFlagCorErrCheckBit_7_0[8]
pseudo_bit_t MulCorErrClearSendLaFIFO4_1[1]
pseudo_bit_t _unused_0[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogC_0_pb)
pseudo_bit_t RcvEBPErrClear[1]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t IBCBusFromSPCParityErrClear_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemUnCorErrClear_pb)
pseudo_bit_t _unused_2[48]
pseudo_bit_t _unused_4[2]
pseudo_bit_t RcvShortPktLenErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayUnCorErrLogB_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCtrl_1_pb)
pseudo_bit_t LaFifoEmpty_VL7[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogB_0_pb)
pseudo_bit_t FSSCorErrRcvEgrArray[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t SBufMainArrayCorErrDword_3_0[4]
pseudo_bit_t SendDmaReloadCnt[16]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t RcvAvail15IntMask[1]
pseudo_bit_t _unused_0[46]
pseudo_bit_t TSMCode_TS2[9]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrUnCorErrLogC_pb)
pseudo_bit_t SPC_JTAG_ACCESS_EN[1]
pseudo_bit_t _unused_1[45]
pseudo_bit_t R_Emulation_Revcode[22]
pseudo_bit_t SwapEccDataExtraBits[1]
pseudo_bit_t MulCorErrMskPCIePostHdrBuf[1]
pseudo_bit_t ForcestatusValidNoEop_1[1]
pseudo_bit_t FlowCtrlWaterMark[8]
pseudo_bit_t SDmaProgressIntBlocked_1[1]
pseudo_bit_t SDmaEnable[1]
pseudo_bit_t RcvAvail17IntBlocked[1]
pseudo_bit_t UncErrStatusSendLaFIFO7_1[1]
pseudo_bit_t _unused_1[2]
pseudo_bit_t RcvHdrLenErrMask[1]
pseudo_bit_t _unused_0[12]
pseudo_bit_t RcvHdrErr[1]
pseudo_bit_t _unused_0[10]
pseudo_bit_t InvalidEEPCmdErrClear[1]
pseudo_bit_t SDmaRpyTagErrMask[1]
pseudo_bit_t RxBufrCorErrData_258_256[3]
pseudo_bit_t UncErrMskSendLaFIFO1_1[1]
pseudo_bit_t SDmaVL15ErrMask[1]
pseudo_bit_t CorErrMskSendLaFIFO1_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead6_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufBase_pb)
pseudo_bit_t SDmaDwEnErrClear[1]
pseudo_bit_t static_disable_rxenale_qdr_ch1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb)
pseudo_bit_t RcvAvail10IntBlocked[1]
pseudo_bit_t _unused_0[8]
pseudo_bit_t LinkInitCmd[3]
pseudo_bit_t RcvVCRCErrMask[1]
pseudo_bit_t MulUncErrStatusSendRmFIFO_1[1]
pseudo_bit_t SDma1stDescErrMask[1]
pseudo_bit_t RcvAvail4IntClear[1]
pseudo_bit_t UncErrMskSendLaFIFO0_0[1]
pseudo_bit_t MsixTable_2_UnCorErrData[32]
pseudo_bit_t SendIBPacketMask_63_32[64]
pseudo_bit_t ScbDescIndex_13_0[14]
pseudo_bit_t _unused_1[1]
pseudo_bit_t MulCorErrMskRcvDMAHdrBuf_1[1]
pseudo_bit_t SendVLMismatchErrMask[1]
pseudo_bit_t MulUncErrMskSendLaFIFO1_1[1]
pseudo_bit_t PciePHdrBufrUnCorErrData_63_0[64]
pseudo_bit_t _unused_1[6]
pseudo_bit_t RcvHdrq11DCAOPH[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead5_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_HwErrClear_pb)
pseudo_bit_t LaFifoEmpty_VL15[1]
pseudo_bit_t _unused_0[34]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogB_0_pb)
pseudo_bit_t FSSCorErrSendLaFIFO4_0[1]
pseudo_bit_t ONperiod[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_active_feature_mask_pb)
pseudo_bit_t SendMinPktLenErr[1]
pseudo_bit_t UncErrStatusRcvTIDArray[1]
pseudo_bit_t FSSCorErrSendLaFIFO1_1[1]
pseudo_bit_t RcvFormatErrMask[1]
pseudo_bit_t _unused_0[5]
pseudo_bit_t _unused_0[4]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t SDmaWrongPortErrMask[1]
pseudo_bit_t ScrambleCapRemote[1]
pseudo_bit_t RcvUrg15IntBlocked[1]
pseudo_bit_t TXE_IBC_Idle[1]
pseudo_bit_t FSSCorErrSendLaFIFO0_1[1]
pseudo_bit_t CorErrMskRcvBuf_1[1]
pseudo_bit_t LaFifoArray0CorErrCheckBit_10_0[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemErrCtrlB_pb)
pseudo_bit_t debug_port_sel_pcs_pipe_lane815[3]
pseudo_bit_t RxLkupiqCorErrData_45_0[46]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t MsixTable_1_0_CorErrData[64]
pseudo_bit_t R_ChipRevMajor[8]
pseudo_bit_t RawIPV6_En[1]
pseudo_bit_t SendDroppedSmpPktErrMask[1]
pseudo_bit_t DisarmSendBuf[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogD_0_pb)
pseudo_bit_t static_disable_rxenadfe_sdr_ch0[8]
pseudo_bit_t MulCorErrClearPCIeCompDataBuf[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaTail_1_pb)
pseudo_bit_t GenMismatch[1]
pseudo_bit_t TidReDirect[16]
pseudo_bit_t IBTxLaneReversed[1]
pseudo_bit_t IBStatusChangedMask[1]
pseudo_bit_t LinkWidthActive[1]
pseudo_bit_t SDmaMemReadErrMask_0[1]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t _unused_4[2]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch1[1]
pseudo_bit_t IBCBusToSPCparityErrClear_1[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t CorErrStatusSendLaFIFO2_0[1]
pseudo_bit_t SendMaxPktLenErrMask[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t CorErrMskSendLaFIFO7_0[1]
pseudo_bit_t ReqDDSLocalFromRmt[4]
pseudo_bit_t MulUncErrStatusSendLaFIFO6_0[1]
pseudo_bit_t MulUncErrClearSendLaFIFO0_1[1]
pseudo_bit_t FSSUncErrSendLaFIFO5_0[1]
pseudo_bit_t UncErrMskRcvBuf_0[1]
pseudo_bit_t RxBufrConsumedVL[12]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t SDmaBaseErrMask[1]
pseudo_bit_t ring_osc_select[3]
pseudo_bit_t EnEnhancedDebugMode[1]
pseudo_bit_t FSSUncErrPCIeRetryBuf[1]
pseudo_bit_t MemoryErrClear[1]
pseudo_bit_t _unused_1[57]
pseudo_bit_t RcvQPMapContext1[5]
pseudo_bit_t _unused_2[32]
pseudo_bit_t RcvAvail6[1]
pseudo_bit_t RxTIDArrayCorErrAddr_16_0[17]
pseudo_bit_t _unused_0[4]
pseudo_bit_t RT_BufSize[3]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReloadCnt_0_pb)
pseudo_bit_t RcvQPMapContext13[5]
pseudo_bit_t IBStatusChangedMask[1]
pseudo_bit_t MulCorErrMskSendLaFIFO1_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCtrl_pb)
pseudo_bit_t ForceCreditUpToDate[1]
pseudo_bit_t PcieCplDataBufrUnCorErrData_136_128[9]
pseudo_bit_t IBStatusChangedClear[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO7_0[1]
pseudo_bit_t SDma1stDescErrMask[1]
pseudo_bit_t RcvQpMcContext[5]
pseudo_bit_t RcvAvail16IntBlocked[1]
pseudo_bit_t SeqMismatch[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_DebugSigsIntSel_pb)
pseudo_bit_t dyn_disable_rxenale_qdr_ch3[1]
pseudo_bit_t PcieRetryBufrUnCorErrCheckBit_20_0[21]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogA_1_pb)
pseudo_bit_t _unused_1[35]
pseudo_bit_t SendCheckMask_63_32[64]
pseudo_bit_t LaFifoArray0UnCorErrCheckBit_10_0[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrCorErrLogA_pb)
pseudo_bit_t RxFlagUnCorErrAddr_12_0[13]
pseudo_bit_t _unused_2[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlB_1_pb)
pseudo_bit_t SDmaIntEnable[1]
pseudo_bit_t TS_RX_TX_CFG[16]
pseudo_bit_t SDmaHaltErrMask[1]
pseudo_bit_t TxeBypassIbc[1]
pseudo_bit_t TSMEnable_send_TS2[1]
pseudo_bit_t RcvUrg2IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableB_0_pb)
pseudo_bit_t SBufMainArrayCorErrCheckBit_27_0[28]
pseudo_bit_t RcvAvail16[1]
pseudo_bit_t KeepAfterSeqErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb)
pseudo_bit_t MulCorErrStatusPCIeRetryBuf[1]
pseudo_bit_t static_disable_rxenale_sdr_ch2[1]
pseudo_bit_t CorErrMskSendRmFIFO_1[1]
pseudo_bit_t _unused_0[20]
pseudo_bit_t _unused_1[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogB_1_pb)
pseudo_bit_t _unused_0[20]
pseudo_bit_t SDmaRpyTagErrClear[1]
pseudo_bit_t IBCBusFromSPCParityErrMask_0[1]
pseudo_bit_t _unused_1[1]
pseudo_bit_t PacketTooSmall[1]
pseudo_bit_t SBufVL15MisUseErr[1]
pseudo_bit_t RcvContextShareErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCheckMask0_pb)
pseudo_bit_t CorErrStatusPCIeRetryBuf[1]
pseudo_bit_t TS_3_TX_VALID[1]
pseudo_bit_t ibsd_adaptation_timer_started[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO1_0[1]
pseudo_bit_t RxLkupiqUnCorErrAddr_12_0[13]
pseudo_bit_t CorErrClearSendBufVL15[1]
pseudo_bit_t UncErrClearSendRmFIFO_0[1]
pseudo_bit_t RcvQPMapEnable[1]
pseudo_bit_t heartbeat_crosstalk[4]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RcvHdrq9DCAOPH[8]
pseudo_bit_t _unused_0[59]
pseudo_bit_t static_disable_rxenagain_sdr_ch3[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t static_disable_rxenagain_sdr_ch1[1]
pseudo_bit_t RcvAvail0IntBlocked[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableA_1_pb)
pseudo_bit_t RcvMinPktLenErr[1]
pseudo_bit_t BufUsed_63_0[64]
pseudo_bit_t dyn_disable_rxenale_ddr_ch1[1]
pseudo_bit_t UncErrMskSendRmFIFO_0[1]
pseudo_bit_t MulCorErrClearRcvTIDArray[1]
pseudo_bit_t MulCorErrClearSendLaFIFO4_0[1]
pseudo_bit_t CorErrStatusSendLaFIFO2_1[1]
pseudo_bit_t debug_port_sel_credit_a_1[3]
pseudo_bit_t ErrIntMask_0[1]
pseudo_bit_t CorErrStatusRcvDMAHdrBuf_1[1]
pseudo_bit_t LaFifoArray0UnCorErrData_34_0[35]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t TSMEnable_ignore_TSM_on_rx[1]
pseudo_bit_t txcn1_ena[3]
pseudo_bit_t CorErrMskSendLaFIFO4_1[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t FSSUncErrSendLaFIFO7_1[1]
pseudo_bit_t PciePHdrBufrUnCorErrCheckBit_15_0[16]
pseudo_bit_t _unused_0[1]
pseudo_bit_t CorErrStatusRcvDMADataBuf_1[1]
pseudo_bit_t FSSCorErrSendLaFIFO3_0[1]
pseudo_bit_t RcvUnexpectedCharErrClear[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t _unused_0[8]
pseudo_bit_t SendVLMismatchErr[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t RxHdrFifoCorErrData_127_64[64]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t RcvHdrErrMask[1]
pseudo_bit_t _unused_0[12]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable7_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead2_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb)
pseudo_bit_t MulCorErrClearSendLaFIFO3_0[1]
pseudo_bit_t IB_LANE_REV_SUPPORTED[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t FSSUncErrMsixTable1[1]
pseudo_bit_t SendGRHCheckMask_63_32[64]
pseudo_bit_t _unused_0[4]
pseudo_bit_t SBufVL15ArrayCorErrData_63_0[64]
pseudo_bit_t _unused_0[12]
pseudo_bit_t LaFifoArray0CorErrCheckBit_10_0[11]
pseudo_bit_t MulUncErrStatusPCIeCompHdrBuf[1]
pseudo_bit_t _unused_0[59]
pseudo_bit_t dyn_disable_rxenale_qdr_ch1[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvUrg3IntClear[1]
pseudo_bit_t UncErrStatusRcvDMADataBuf_0[1]
pseudo_bit_t PcieRetryBufrUnCorErrData_63_0[64]
pseudo_bit_t ErrIntMask[1]
pseudo_bit_t EnhMode_SrcMuxSelWrEn[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t _unused_0[10]
pseudo_bit_t SDmaMissingDwErrClear[1]
pseudo_bit_t _unused_2[8]
pseudo_bit_t UncErrStatusSendLaFIFO4_1[1]
pseudo_bit_t static_disable_rxenagain_sdr_ch2[1]
pseudo_bit_t NibbleSel8[4]
pseudo_bit_t SDma1stDescErr[1]
pseudo_bit_t SendBuf_31_0[64]
pseudo_bit_t LATriggered[1]
pseudo_bit_t PciePHdrBufrCorErrCheckBit_15_0[16]
pseudo_bit_t _unused_1[11]
pseudo_bit_t TXE_IBC_Idle[1]
pseudo_bit_t UncErrClearMsixTable0[1]
pseudo_bit_t _unused_0[7]
pseudo_bit_t _unused_3[15]
pseudo_bit_t ForceIBCBusFromSPCParityErr_0[1]
pseudo_bit_t _unused_1[13]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogA_1_pb)
pseudo_bit_t static_disable_rxenale_ddr_ch2[1]
pseudo_bit_t TS_T_TX_VALID[1]
pseudo_bit_t IB_ENABLE_FILT_DPKT[1]
pseudo_bit_t SplFifoBufNum[8]
pseudo_bit_t _unused_0[19]
pseudo_bit_t LaFifoEmpty_VL3[1]
pseudo_bit_t Port1_SDR_Enabled[1]
pseudo_bit_t CorErrStatusRcvBuf_1[1]
pseudo_bit_t _unused_0[27]
pseudo_bit_t RcvIBFlowErr[1]
pseudo_bit_t MulCorErrMskRcvFlags_0[1]
pseudo_bit_t PriorityThreshold[4]
pseudo_bit_t UncErrStatusLookupiqBuf_1[1]
pseudo_bit_t SendBufMisuseErr[1]
pseudo_bit_t RmFifoArrayCorErrAddr_13_0[14]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrUnCorErrLogA_pb)
pseudo_bit_t static_disable_rxenale_qdr_ch2[1]
pseudo_bit_t TS_TX_SPEED[3]
pseudo_bit_t MulUncErrClearSendLaFIFO2_1[1]
pseudo_bit_t InvalidAddrErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb)
pseudo_bit_t CorErrMskSendLaFIFO3_0[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch0[8]
pseudo_bit_t MaxPktLen[11]
pseudo_bit_t UncErrClearSendBufExtra[1]
pseudo_bit_t RcvBadVersionErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_efuse_control_reg_pb)
pseudo_bit_t AssertGPIOIntMask[1]
pseudo_bit_t _unused_1[4]
pseudo_bit_t ResetNegated[1]
pseudo_bit_t RcvAvail8IntClear[1]
pseudo_bit_t IBStatusChangedClear[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t _unused_0[51]
pseudo_bit_t _unused_2[8]
pseudo_bit_t RxFlagCorErrAddr_12_0[13]
pseudo_bit_t _unused_0[48]
pseudo_bit_t RcvEBPErrMask[1]
pseudo_bit_t UncErrClearPCIePostDataBuf[1]
pseudo_bit_t CorErrClearSendLaFIFO4_1[1]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t MulUncErrClearMsixTable1[1]
pseudo_bit_t MulUncErrMskSendRmFIFO_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrTailAddr0_pb)
pseudo_bit_t GenMismatch[1]
pseudo_bit_t RxDataFifoCorErrData_127_64[64]
pseudo_bit_t RcvAvail5[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch2[8]
pseudo_bit_t RcvHdrq5DCAOPH[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrStatus_pb)
pseudo_bit_t TS_TX_TX_CFG[16]
pseudo_bit_t RcvAvail12IntMask[1]
pseudo_bit_t SendPktLenErr[1]
pseudo_bit_t UncErrMskRcvTIDArray[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch1[8]
pseudo_bit_t _unused_2[32]
pseudo_bit_t MulCorErrStatusSendLaFIFO4_1[1]
pseudo_bit_t SDmaCleanupDone_1[1]
pseudo_bit_t HRTBT_REQ[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t RcvEBPErr[1]
pseudo_bit_t SendIBSLIDAssign_15_0[16]
pseudo_bit_t RcvUrg5IntClear[1]
pseudo_bit_t _unused_4[2]
PSEUDO_BIT_STRUCT(struct QIB_7322_LAControlReg_pb)
pseudo_bit_t _unused_2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogE_0_pb)
pseudo_bit_t IBCBusFromSPCParityErr_1[1]
pseudo_bit_t SendUnderRunErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableUnCorErrLogC_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlC_1_pb)
pseudo_bit_t RcvTailUpdDCAEnable[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_HwErrStatus_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReloadCnt_1_pb)
pseudo_bit_t RcvQPMapContext31[5]
pseudo_bit_t SendPktLenErrClear[1]
pseudo_bit_t CREDIT_CHANGE[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogA_0_pb)
pseudo_bit_t Num_SmallBuffers[9]
pseudo_bit_t CorErrStatusSendRmFIFO_1[1]
pseudo_bit_t RcvQPMapContext20[5]
pseudo_bit_t static_disable_rxenale_qdr_ch2[1]
pseudo_bit_t _unused_0[47]
pseudo_bit_t SendUnsupportedVLErrMask[1]
pseudo_bit_t CorErrClearPCIeCompDataBuf[1]
pseudo_bit_t InternalSendDmaHead[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCtrl_0_pb)
pseudo_bit_t dyn_disable_rxenale_qdr_ch3[1]
pseudo_bit_t VL15BufMisuseErrClear[1]
pseudo_bit_t RcvEgrFullErrClear[1]
pseudo_bit_t InvalidAddrErrMask[1]
pseudo_bit_t RcvVCRCErrClear[1]
pseudo_bit_t LinkTrainingState[5]
pseudo_bit_t RcvUrg5IntMask[1]
pseudo_bit_t RcvLongPktLenErr[1]
pseudo_bit_t SDmaIntClear_0[1]
pseudo_bit_t MulUncErrMskSendLaFIFO6_0[1]
pseudo_bit_t SDmaWrongPortErrClear[1]
pseudo_bit_t _unused_2[6]
pseudo_bit_t UncErrMskPCIeCompHdrBuf[1]
pseudo_bit_t RcvUnexpectedCharErr[1]
pseudo_bit_t UncErrStatusRcvFlags_0[1]
pseudo_bit_t Delay_sc[20]
pseudo_bit_t _unused_4[2]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch2[8]
pseudo_bit_t NibbleSel3[4]
pseudo_bit_t SendDone_0[1]
pseudo_bit_t RcvUrg6IntMask[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t RcvBadTidErrMask[1]
pseudo_bit_t RcvUrg8IntMask[1]
pseudo_bit_t RxDataFifoUnCorErrData_127_64[64]
pseudo_bit_t SendBufMisuseErrClear[1]
pseudo_bit_t SDmaBaseErrClear[1]
pseudo_bit_t Num_LargeBuffers[6]
pseudo_bit_t dyn_disable_rxenale_sdr_ch0[1]
pseudo_bit_t statusValidNoEopMask_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvBTHQP_0_pb)
pseudo_bit_t IBSerdesPClkNotDetect_1[1]
pseudo_bit_t SDmaIdleIntBlocked_0[1]
pseudo_bit_t RcvAvail15[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t SHeadersErrClear[1]
pseudo_bit_t static_disable_rxenale_sdr_ch3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead10_pb)
pseudo_bit_t SDmaProgressInt_1[1]
pseudo_bit_t CorErrStatusSendLaFIFO1_1[1]
pseudo_bit_t NibbleSel2[4]
pseudo_bit_t ErrIntBlocked[1]
pseudo_bit_t RxEagerArrayCorErrAddr_17_0[18]
pseudo_bit_t TempsenseTholdReachedMask[1]
pseudo_bit_t RcvMinPktLenErrMask[1]
pseudo_bit_t SplFifoDescIndex[16]
pseudo_bit_t MulUncErrStatusPCIePostHdrBuf[1]
pseudo_bit_t MulUncErrMskSendBufExtra[1]
pseudo_bit_t _unused_0[43]
pseudo_bit_t MulCorErrStatusSendLaFIFO3_1[1]
pseudo_bit_t RcvBTHQP[24]
pseudo_bit_t sw_ahb_sel[1]
pseudo_bit_t FSSCorErrLookupiqBuf_1[1]
pseudo_bit_t ScbEntryValid[1]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrUnCorErrLogA_pb)
pseudo_bit_t CorErrStatusRcvFlags_1[1]
pseudo_bit_t _unused_0[43]
pseudo_bit_t RcvQPMapContext20[5]
pseudo_bit_t MulCorErrStatusSendLaFIFO0_1[1]
pseudo_bit_t RcvQPMapContext4[5]
pseudo_bit_t CorErrClearMsixTable2[1]
pseudo_bit_t _unused_0[14]
pseudo_bit_t _unused_0[12]
pseudo_bit_t MulUncErrMskRcvDMADataBuf_1[1]
pseudo_bit_t CounterWrEnable[1]
pseudo_bit_t _unused_0[3]
pseudo_bit_t ReqTagUsed_7_0[8]
pseudo_bit_t RxBufrUnCorErrData_63_0[64]
pseudo_bit_t _unused_4[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t statusValidNoEop_0[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch0[8]
pseudo_bit_t RxBufrCorErrAddr_15_0[16]
pseudo_bit_t MulUncErrMskSendLaFIFO3_0[1]
pseudo_bit_t PcieCplTimeout[1]
pseudo_bit_t MulUncErrClearSendLaFIFO7_1[1]
pseudo_bit_t SendSpecialTriggerErrClear[1]
pseudo_bit_t SDmaGenMismatchErr[1]
pseudo_bit_t MulCorErrMskSendLaFIFO4_0[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t RxBufrCorErrData_63_0[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHead_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogA_1_pb)
pseudo_bit_t TS_TX_TX_CFG[16]
pseudo_bit_t IBVLArbiterEn[1]
pseudo_bit_t static_disable_rxenale_qdr_ch3[1]
pseudo_bit_t MulUncErrMskSendBufVL15[1]
pseudo_bit_t DISABLE_RXLATOFF_SDR[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogA_0_pb)
pseudo_bit_t CorErrMskSendRmFIFO_0[1]
pseudo_bit_t _unused_0[54]
pseudo_bit_t _unused_1[3]
pseudo_bit_t SDmaGenMismatchErrClear[1]
pseudo_bit_t CorErrClearLookupiqBuf_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb)
pseudo_bit_t LinkRoundTripLatency[26]
pseudo_bit_t MulUncErrStatusMsixTable0[1]
pseudo_bit_t _unused_5[4]
pseudo_bit_t HaltInProg[1]
pseudo_bit_t SplFifoFull[1]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch0[1]
pseudo_bit_t RxTIDArrayUnCorErrAddr_16_0[17]
pseudo_bit_t PciePDataBufrUnCorErrData_63_0[64]
pseudo_bit_t MulCorErrClearSendLaFIFO3_1[1]
pseudo_bit_t SendBufAvailIntClear[1]
pseudo_bit_t _unused_0[3]
pseudo_bit_t RxBufrCorErrCheckBit_36_0[37]
pseudo_bit_t _unused_2[37]
pseudo_bit_t RcvQPMapContext23[5]
pseudo_bit_t UncErrClearRcvDMADataBuf_1[1]
pseudo_bit_t SendUnexpectedPktNumErr[1]
pseudo_bit_t _unused_0[18]
pseudo_bit_t RcvHdrq5DCAXfrCnt[6]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrCorErrLogC_pb)
pseudo_bit_t _unused_0[56]
pseudo_bit_t LaFifoArray0CorErrData_34_0[35]
pseudo_bit_t MulCorErrMskSendLaFIFO7_1[1]
pseudo_bit_t RcvPartitionKeyDisable[1]
pseudo_bit_t UncErrStatusSendLaFIFO2_0[1]
pseudo_bit_t MulUncErrMskPCIeCompHdrBuf[1]
pseudo_bit_t RcvFormatErrMask[1]
pseudo_bit_t _unused_1[12]
pseudo_bit_t AssertGPIO[1]
pseudo_bit_t UncErrMskSendLaFIFO2_0[1]
pseudo_bit_t Port1_DDR_Enabled[1]
pseudo_bit_t FSSUncErrRcvFlags_0[1]
pseudo_bit_t SDmaIntBlocked_1[1]
pseudo_bit_t PacketTooSmall_En[1]
pseudo_bit_t AvailUpdThld[5]
pseudo_bit_t RcvAvail2IntBlocked[1]
pseudo_bit_t RcvQPMapContext11[5]
pseudo_bit_t UncErrClearPCIeCompDataBuf[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogC_1_pb)
pseudo_bit_t MulUncErrMskLookupiqBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IntMask_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable0_pb)
pseudo_bit_t _unused_0[54]
pseudo_bit_t RcvAvail12IntBlocked[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t FSSCorErrSendLaFIFO3_1[1]
pseudo_bit_t RcvUrg14IntBlocked[1]
pseudo_bit_t TS_RX_RX_CFG[16]
pseudo_bit_t MulCorErrClearMsixTable2[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t DISABLE_RXLATOFF_DDR[1]
pseudo_bit_t _unused_0[13]
pseudo_bit_t RcvAvail14IntBlocked[1]
pseudo_bit_t RxFlagCorErrCheckBit_7_0[8]
pseudo_bit_t IBSerdesPClkNotDetect_0[1]
pseudo_bit_t _unused_3[4]
pseudo_bit_t SDmaOutOfBoundErrMask[1]
pseudo_bit_t SendBufAvailIntBlocked[1]
pseudo_bit_t _unused_0[25]
pseudo_bit_t RxBufrCorErrData_191_128[64]
pseudo_bit_t SendPbcArrayUnCorErrData_21_0[22]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrClear_0_pb)
pseudo_bit_t MulUncErrStatusSendLaFIFO0_0[1]
pseudo_bit_t PcieCplDataBufrCorErrData_136_128[9]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrUnCorErrLogC_pb)
pseudo_bit_t threshold[10]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t MulUncErrMskSendLaFIFO0_0[1]
pseudo_bit_t CorErrMskMsixTable2[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t sw_sel_ahb_trgt[2]
pseudo_bit_t SDmaOutOfBoundErrClear[1]
pseudo_bit_t RcvAvail15IntClear[1]
pseudo_bit_t RcvUrg16IntClear[1]
pseudo_bit_t _unused_1[21]
pseudo_bit_t RcvHeadPointer[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_TX_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogC_1_pb)
pseudo_bit_t _unused_0[59]
pseudo_bit_t MsixTable_2_CorErrCheckBits[7]
pseudo_bit_t MulCorErrMskRcvTIDArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvCtrl_pb)
pseudo_bit_t read_data_valid[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t MulCorErrClearSendLaFIFO2_1[1]
pseudo_bit_t static_disable_rxenadfe_sdr_ch1[8]
pseudo_bit_t SendMinPktLenErrMask[1]
pseudo_bit_t MulUncErrClearRcvEgrArray[1]
pseudo_bit_t static_disable_rxenagain_sdr_ch0[1]
pseudo_bit_t InternalSendDmaHead[16]
pseudo_bit_t RT_BufSize[3]
pseudo_bit_t LinkDownDefaultState[1]
pseudo_bit_t CorErrClearSendLaFIFO6_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemErrCtrlA_pb)
pseudo_bit_t _unused_0[14]
pseudo_bit_t RcvQPMapContext9[5]
pseudo_bit_t RcvAvail6IntMask[1]
pseudo_bit_t debug_port_sel_credit_a_0[3]
pseudo_bit_t SendPbcArrayCorErrAddr_9_0[10]
pseudo_bit_t RcvUrg0IntClear[1]
pseudo_bit_t PCIECplQDiagEn[1]
pseudo_bit_t SDmaDwEnErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlB_pb)
pseudo_bit_t MulCorErrStatusSendRmFIFO_1[1]
pseudo_bit_t _unused_4[2]
pseudo_bit_t FSSCorErrRcvBuf_1[1]
pseudo_bit_t RmFifoArrayUnCorErrDword_3_0[4]
pseudo_bit_t _unused_1[3]
pseudo_bit_t MulCorErrStatusSendLaFIFO2_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb)
pseudo_bit_t CorErrMskSendLaFIFO4_0[1]
pseudo_bit_t PcieCplHdrBufrCorErrAddr_8_0[9]
pseudo_bit_t debug_port_sel_pcs_pipe_lane07[3]
pseudo_bit_t CorErrClearSendLaFIFO6_1[1]
pseudo_bit_t RcvFormatErrClear[1]
pseudo_bit_t SendMinPktLenErrMask[1]
pseudo_bit_t PowerOnBISTFailed[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDMask_0_pb)
pseudo_bit_t CorErrClearSendPbcArray[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t _unused_0[37]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableE_0_pb)
pseudo_bit_t MulCorErrMskPCIeCompDataBuf[1]
pseudo_bit_t MulCorErrClearSendLaFIFO1_0[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t AvailUpdCount[5]
pseudo_bit_t _unused_1[4]
pseudo_bit_t RcvAvail4IntMask[1]
pseudo_bit_t MulCorErrStatusPCIeCompDataBuf[1]
pseudo_bit_t IB_POLARITY_REV_SUPP[1]
pseudo_bit_t RcvHdrq10DCAOPH[8]
pseudo_bit_t TxCreditOk_VL4[1]
pseudo_bit_t MulUncErrStatusPCIeRetryBuf[1]
pseudo_bit_t RcvQPMapContext15[5]
pseudo_bit_t RcvQPMapContext10[5]
pseudo_bit_t MulCorErrMskSendRmFIFO_1[1]
pseudo_bit_t FlowValid[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufVL15ArrayUnCorErrLogA_pb)
pseudo_bit_t ScbFetchDescFlag[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayUnCorErrLogB_pb)
pseudo_bit_t RcvUnsupportedVLErr[1]
pseudo_bit_t RcvUrg11IntBlocked[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMulticastContext_1_pb)
pseudo_bit_t ContextCfg[2]
pseudo_bit_t RcvAvail12[1]
pseudo_bit_t UncErrMskMsixTable1[1]
pseudo_bit_t DbgClkPortSel[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufAvail0_pb)
pseudo_bit_t IBCBusToSPCparityErrClear_0[1]
pseudo_bit_t SendDMAHead1DCAEnable[1]
pseudo_bit_t _unused_0[39]
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableUnCorErrLogA_pb)
pseudo_bit_t RcvUrg13IntMask[1]
pseudo_bit_t RcvQPMapContext0[5]
pseudo_bit_t RcvHdrLenErrMask[1]
pseudo_bit_t RcvIBLostLinkErrClear[1]
pseudo_bit_t xcv_treset[1]
pseudo_bit_t MulUncErrStatusSendBufVL15[1]
pseudo_bit_t SDmaIdleInt_1[1]
pseudo_bit_t UncErrStatusSendLaFIFO0_1[1]
pseudo_bit_t CorErrStatusSendLaFIFO6_0[1]
pseudo_bit_t RcvHdrLenErrClear[1]
pseudo_bit_t _unused_0[56]
pseudo_bit_t _unused_0[32]
pseudo_bit_t MulCorErrClearRcvFlags_1[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t CorErrMskSendPbcArray[1]
pseudo_bit_t RcvAvail1[1]
pseudo_bit_t _unused_2[13]
pseudo_bit_t RcvAvail13[1]
pseudo_bit_t PcieCplHdrBufrCorErrHdr_103_64[40]
pseudo_bit_t static_disable_rxenagain_ddr_ch3[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t _unused_0[16]
pseudo_bit_t _unused_0[1]
pseudo_bit_t CREDIT_CHANGE[1]
pseudo_bit_t SendBufAvailUpd[1]
pseudo_bit_t RcvHdrq1DCAOPH[8]
pseudo_bit_t ScrambleCapLocal[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t dyn_disable_rxenale_qdr_ch0[1]
pseudo_bit_t LaFifoArray0CorErrAddr_10_0[11]
pseudo_bit_t SDmaGenMismatchErrMask[1]
pseudo_bit_t CorErrMskSendLaFIFO2_0[1]
pseudo_bit_t MulCorErrMskSendRmFIFO_0[1]
pseudo_bit_t PcieCplHdrBufrUnCorErrHdr_63_0[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaLenGen_0_pb)
pseudo_bit_t ForceCreditUpToDate[1]
pseudo_bit_t MulUncErrClearSendLaFIFO7_0[1]
pseudo_bit_t _unused_0[7]
pseudo_bit_t TxCreditOk_VL5[1]
pseudo_bit_t debug_port_sel_rx_ibport[1]
pseudo_bit_t TS_TX_SPEED[3]
pseudo_bit_t SDmaMissingDwErrMask[1]
pseudo_bit_t RxDataFifoCorErrCheckBit_15_0[16]
pseudo_bit_t FlowCtrlPeriod[8]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t CorErrClearLookupiqBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayCorErrLogA_pb)
pseudo_bit_t MulUncErrStatusSendLaFIFO2_0[1]
pseudo_bit_t _unused_0[6]
pseudo_bit_t statusValidNoEop_1[1]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch1[8]
pseudo_bit_t RcvQPMapContext28[5]
pseudo_bit_t SplFifoFull[1]
pseudo_bit_t NibbleSel5[4]
pseudo_bit_t RmFifoArrayCorErrDword_3_0[4]
pseudo_bit_t FSSUncErrRcvTIDArray[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t MulUncErrStatusRcvFlags_1[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t UncErrMskSendLaFIFO6_1[1]
pseudo_bit_t RcvAvail14IntClear[1]
pseudo_bit_t FSSUncErrRcvDMAHdrBuf_1[1]
pseudo_bit_t _unused_2[8]
pseudo_bit_t _unused_2[6]
pseudo_bit_t DDS_RXEQ_FAIL[1]
pseudo_bit_t _unused_1[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSerdesCtrl_1_pb)
pseudo_bit_t _unused_5[5]
pseudo_bit_t _unused_1[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0CorErrLog_0_pb)
pseudo_bit_t MulUncErrClearSendLaFIFO0_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogB_0_pb)
pseudo_bit_t DmaeqBlockingContext[5]
pseudo_bit_t _unused_1[11]
pseudo_bit_t SBufVL15MisUseErrMask[1]
pseudo_bit_t dyn_disable_rxenale_qdr_ch2[1]
pseudo_bit_t _unused_2[1]
pseudo_bit_t RcvQPMapContext27[5]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t UncErrStatusRcvBuf_1[1]
pseudo_bit_t _unused_0[11]
pseudo_bit_t ForceIBCBusFromSPCParityErr_1[1]
pseudo_bit_t MulUncErrMskSendLaFIFO5_0[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t SDmaOutOfBoundErrClear[1]
pseudo_bit_t SwapEccDataBits[1]
pseudo_bit_t SendEnable[1]
pseudo_bit_t UncErrStatusSendLaFIFO4_0[1]
pseudo_bit_t static_disable_rxenagain_qdr_ch3[1]
pseudo_bit_t UncErrStatusPCIePostDataBuf[1]
pseudo_bit_t MulUncErrClearSendLaFIFO1_1[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t SeqMismatch[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrCorErrLogA_pb)
pseudo_bit_t UncErrClearRcvFlags_0[1]
pseudo_bit_t UncErrMskRcvEgrArray[1]
pseudo_bit_t _unused_0[58]
pseudo_bit_t SendDoneIntMask_1[1]
pseudo_bit_t LinkDownDefaultState[1]
pseudo_bit_t RcvFormatErr[1]
pseudo_bit_t RcvHdrq12DCAOPH[8]
pseudo_bit_t HRTBT_PORT[8]
pseudo_bit_t _unused_0[39]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t HRTBT_ENB[1]
pseudo_bit_t MulUncErrStatusRcvEgrArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_TXEStatus_1_pb)
pseudo_bit_t RxLkupiqCorErrCheckBit_7_0[8]
pseudo_bit_t SDmaUnexpDataErr[1]
pseudo_bit_t MsixTable_0_CorErrCheckBits[7]
pseudo_bit_t LATriggeredClear[1]
pseudo_bit_t debug_port_sel_pcs_sdout[1]
pseudo_bit_t FSSUncErrSendBufExtra[1]
pseudo_bit_t RcvAvail8IntBlocked[1]
pseudo_bit_t SDmaRpyTagErrClear[1]
pseudo_bit_t PCIERetryBufDiagEn[1]
pseudo_bit_t MulUncErrClearSendLaFIFO4_1[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t SDmaCleanupDoneMask_0[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t CorErrStatusMsixTable2[1]
pseudo_bit_t _unused_0[28]
pseudo_bit_t RxDataFifoUnCorErrData_63_0[64]
pseudo_bit_t _unused_0[8]
pseudo_bit_t SendDroppedSmpPktErrClear[1]
pseudo_bit_t VL15BufMisuseErrMask[1]
pseudo_bit_t RxBufrUnCorErrData_63_0[64]
pseudo_bit_t static_disable_rxenale_sdr_ch1[1]
pseudo_bit_t RcvMaxPktLenErr[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch3[8]
pseudo_bit_t LaFifoEmpty_VL0[1]
pseudo_bit_t UncErrMskMsixTable2[1]
pseudo_bit_t MulUncErrStatusRcvTIDArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayCorErrLogA_pb)
pseudo_bit_t SDmaProgressIntMask_0[1]
pseudo_bit_t SDmaIntBlocked_0[1]
pseudo_bit_t UncErrMskSendBufExtra[1]
pseudo_bit_t PowerOnBISTFailedClear[1]
pseudo_bit_t PowerOnBISTFailedMask[1]
pseudo_bit_t SDmaCleanup[1]
pseudo_bit_t MulUncErrMskPCIePostHdrBuf[1]
pseudo_bit_t UncErrStatusSendLaFIFO3_1[1]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch3[8]
pseudo_bit_t SplFifoBufNum[8]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvAvail0IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemUnCorErrStatus_pb)
pseudo_bit_t LEDPort1YellowOn[1]
pseudo_bit_t MulUncErrClearPCIeCompHdrBuf[1]
pseudo_bit_t RcvAvail4[1]
pseudo_bit_t FlowCtrlPeriod[8]
pseudo_bit_t _unused_0[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_ahb_transaction_reg_pb)
pseudo_bit_t MsixTable_2_UnCorErrAddr[7]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t SD_SPEED_QDR[1]
pseudo_bit_t _unused_1[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_AvailUpdCount_pb)
pseudo_bit_t MulCorErrStatusPCIePostDataBuf[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t _unused_0[7]
pseudo_bit_t CorErrMskRcvEgrArray[1]
pseudo_bit_t RcvUrg2IntMask[1]
pseudo_bit_t UncErrStatusMsixTable0[1]
pseudo_bit_t FSSCorErrLookupiqBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableC_0_pb)
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RcvAvail11[1]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch3[8]
pseudo_bit_t MulCorErrStatusSendLaFIFO7_1[1]
pseudo_bit_t RcvAvailTOReload[16]
pseudo_bit_t SplFifoReadyToGo[1]
pseudo_bit_t MulUncErrClearSendLaFIFO5_1[1]
pseudo_bit_t MsixTable_0_CorErrAddr[7]
pseudo_bit_t _unused_1[26]
pseudo_bit_t SendArmLaunchErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableC_1_pb)
pseudo_bit_t _unused_0[34]
pseudo_bit_t SDmaMissingDwErr[1]
pseudo_bit_t MulUncErrClearSendBufMain[1]
pseudo_bit_t IBTxLaneReversed[1]
pseudo_bit_t _unused_3[24]
pseudo_bit_t FSSUncErrRcvEgrArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogA_1_pb)
pseudo_bit_t static_disable_rxenadfe_sdr_ch3[8]
pseudo_bit_t LaFifoArray0CorErrAddr_10_0[11]
pseudo_bit_t SplFifoEmpty[1]
pseudo_bit_t FSSUncErrSendLaFIFO2_1[1]
pseudo_bit_t PCIESerdesPClkNotDetect[1]
pseudo_bit_t CorErrMskRcvDMAHdrBuf_1[1]
pseudo_bit_t UncErrMskPCIeCompDataBuf[1]
pseudo_bit_t _unused_0[54]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufMask0_1_pb)
pseudo_bit_t SendMaxPktLenErrMask[1]
pseudo_bit_t _unused_0[3]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvPktLEDCnt_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogA_1_pb)
pseudo_bit_t XrcTypeCode[3]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t MulCorErrClearRcvDMADataBuf_0[1]
pseudo_bit_t _unused_1[3]
pseudo_bit_t RcvShortPktLenErr[1]
pseudo_bit_t static_disable_rxenadfe_sdr_ch0[8]
pseudo_bit_t MulCorErrClearSendBufMain[1]
pseudo_bit_t RcvUrg16IntMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvBTHQP_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_EEPCtlStat_pb)
pseudo_bit_t MulCorErrMskSendLaFIFO2_1[1]
pseudo_bit_t _unused_0[53]
PSEUDO_BIT_STRUCT(struct QIB_7322_IntStatus_pb)
pseudo_bit_t IBRxLaneReversed[1]
pseudo_bit_t TS_TX_OPCODE[2]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrUnCorErrLogB_pb)
pseudo_bit_t SD_SPEED_QDR[1]
pseudo_bit_t RcvQPMapContext28[5]
pseudo_bit_t PcieCplHdrBufrUnCorErrCheckBit_15_0[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrMask_pb)
pseudo_bit_t SDmaIntEnable[1]
pseudo_bit_t IBStatusChanged[1]
pseudo_bit_t last_program_address[11]
pseudo_bit_t static_disable_rxenale_ddr_ch2[1]
pseudo_bit_t RcvUrg9IntClear[1]
pseudo_bit_t _unused_0[3]
pseudo_bit_t RcvUrg12IntClear[1]
pseudo_bit_t SendDroppedSmpPktErr[1]
pseudo_bit_t RcvAvail0[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t FSSCorErrSendLaFIFO2_0[1]
pseudo_bit_t RcvAvail6IntBlocked[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHeadAddr_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayCorErrLogB_pb)
pseudo_bit_t SDmaVL15ErrClear[1]
pseudo_bit_t UncErrStatusSendLaFIFO3_0[1]
pseudo_bit_t CorErrClearRcvDMAHdrBuf_0[1]
pseudo_bit_t static_disable_rxenale_qdr_ch0[1]
pseudo_bit_t CorErrStatusPCIePostHdrBuf[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t MulUncErrClearSendPbcArray[1]
pseudo_bit_t RxLkupiqCorErrCheckBit_7_0[8]
pseudo_bit_t _unused_0[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrUnCorErrLogC_pb)
pseudo_bit_t CorErrStatusPCIePostDataBuf[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t SDmaProgressInt_0[1]
pseudo_bit_t _unused_0[3]
pseudo_bit_t RxBufrCorErrData_258_256[3]
pseudo_bit_t _unused_1[14]
pseudo_bit_t RcvUrg10IntMask[1]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayCorErrLogB_pb)
pseudo_bit_t VL15BufMisuseErrClear[1]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch1[1]
pseudo_bit_t RxBufrCorErrData_255_192[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogB_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrCorErrLogC_pb)
pseudo_bit_t UncErrClearRcvFlags_1[1]
pseudo_bit_t RcvHdrFullErrMask[1]
pseudo_bit_t SendDoneIntBlocked_1[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch0[8]
pseudo_bit_t MsixTable_2_CorErrData[32]
pseudo_bit_t NibbleSel9[4]
pseudo_bit_t MulCorErrStatusSendLaFIFO5_0[1]
pseudo_bit_t SDmaHaltErr[1]
pseudo_bit_t _unused_0[37]
pseudo_bit_t RcvMaxPktLenErrClear[1]
pseudo_bit_t _unused_1[3]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t RmFifoArrayUnCorErrData_127_64[64]
pseudo_bit_t IB_FRONT_PORCH[5]
pseudo_bit_t _unused_0[24]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvStatus_1_pb)
pseudo_bit_t LaFifoEmpty_VL4[1]
pseudo_bit_t _unused_0[8]
pseudo_bit_t LinkRoundTripLatency[26]
pseudo_bit_t _unused_2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiUnCorErrClear_pb)
pseudo_bit_t _unused_0[4]
pseudo_bit_t IB_FRONT_PORCH[5]
pseudo_bit_t _unused_1[9]
pseudo_bit_t RxDataFifoUnCorErrAddr_10_0[11]
pseudo_bit_t SDmaWrongPortErr[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t PcieRetryBufrUnCorErrData_127_64[64]
pseudo_bit_t MulCorErrStatusLookupiqBuf_0[1]
pseudo_bit_t FSSUncErrSendLaFIFO7_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReqTagUsed_0_pb)
pseudo_bit_t CorErrStatusSendLaFIFO6_1[1]
pseudo_bit_t RpyLowAddr_6_0[7]
pseudo_bit_t LaFifoEmpty_VL2[1]
pseudo_bit_t MulCorErrClearRcvDMADataBuf_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayUnCorErrLogC_pb)
pseudo_bit_t PcieCplTimeoutClear[1]
pseudo_bit_t RcvUrg10IntBlocked[1]
pseudo_bit_t IBStatIntReductionEn[1]
pseudo_bit_t LinkInitCmd[3]
pseudo_bit_t CorErrClearSendLaFIFO0_1[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t BufMask_63_0[64]
pseudo_bit_t RcvQPMapContext24[5]
pseudo_bit_t RcvAvail10IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_TXEStatus_0_pb)
pseudo_bit_t CorErrStatusSendRmFIFO_0[1]
pseudo_bit_t SendMaxPktLenErr[1]
pseudo_bit_t ResetNegatedMask[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t CorErrMskRcvBuf_0[1]
pseudo_bit_t RcvHdrq6DCAXfrCnt[6]
pseudo_bit_t UncErrMskSendLaFIFO2_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayCorErrLogC_pb)
pseudo_bit_t SplFifoEmpty[1]
pseudo_bit_t MulCorErrClearSendBufExtra[1]
pseudo_bit_t RcvIBLostLinkErrMask[1]
pseudo_bit_t _unused_2[25]
pseudo_bit_t RcvAvail1IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrUnCorErrLogA_pb)
pseudo_bit_t MulUncErrStatusRcvDMADataBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufSize_pb)
pseudo_bit_t RxLkupiqUnCorErrData_45_0[46]
pseudo_bit_t RxLkupiqCorErrData_45_0[46]
pseudo_bit_t RxDataFifoUnCorErrCheckBit_15_0[16]
pseudo_bit_t FlowValid[1]
pseudo_bit_t _unused_0[5]
pseudo_bit_t _unused_1[35]
pseudo_bit_t SHeadersErrMask[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO1_1[1]
pseudo_bit_t MulCorErrClearPCIeCompHdrBuf[1]
pseudo_bit_t IB_ENABLE_FILT_DPKT[1]
pseudo_bit_t MulUncErrMskSendLaFIFO7_0[1]
pseudo_bit_t CorErrStatusRcvTIDArray[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RcvHdrErrClear[1]
pseudo_bit_t LaFifoArray0UnCorErrAddr_10_0[11]
pseudo_bit_t SendBufAvail[1]
pseudo_bit_t SendSpecialTriggerErr[1]
pseudo_bit_t _unused_1[11]
pseudo_bit_t PcieCplDataBufrUnCorErrCheckBit_21_0[22]
pseudo_bit_t EnDbgPort[1]
pseudo_bit_t RxFlagUnCorErrData_63_0[64]
pseudo_bit_t RcvIBFlowErrMask[1]
pseudo_bit_t RcvHdrq14DCAXfrCnt[6]
pseudo_bit_t txcp1_ena[4]
pseudo_bit_t _unused_1[11]
pseudo_bit_t MemBISTDisabled[1]
pseudo_bit_t LinkTrainingState[5]
pseudo_bit_t _unused_1[21]
pseudo_bit_t RcvQPMapContext6[5]
pseudo_bit_t RcvHdrq4DCAXfrCnt[6]
pseudo_bit_t MulUncErrStatusPCIeCompDataBuf[1]
pseudo_bit_t SendBufErr_63_0[64]
pseudo_bit_t _unused_1[35]
pseudo_bit_t NibbleSel13[4]
pseudo_bit_t _unused_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogC_0_pb)
pseudo_bit_t MulUncErrMskRcvDMAHdrBuf_0[1]
pseudo_bit_t CorErrClearSendLaFIFO2_0[1]
pseudo_bit_t FSSUncErrSendLaFIFO6_0[1]
pseudo_bit_t CorErrStatusSendLaFIFO5_0[1]
pseudo_bit_t OFFperiod[32]
pseudo_bit_t _unused_0[60]
pseudo_bit_t UncErrMskSendLaFIFO1_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_RX_1_pb)
pseudo_bit_t PciePDataBufrCorErrAddr_13_0[14]
pseudo_bit_t _unused_1[45]
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlA_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogD_1_pb)
pseudo_bit_t _unused_0[34]
pseudo_bit_t FlowValid[1]
pseudo_bit_t FSSUncErrMsixTable0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrStatus_0_pb)
pseudo_bit_t _unused_2[29]
pseudo_bit_t RcvVCRCErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlC_0_pb)
pseudo_bit_t ScrambleCapRemote[1]
pseudo_bit_t MulCorErrStatusPCIePostHdrBuf[1]
pseudo_bit_t CorErrClearRcvFlags_0[1]
pseudo_bit_t RcvUrg1IntClear[1]
pseudo_bit_t SDmaMemReadErr_0[1]
pseudo_bit_t _unused_0[2]
pseudo_bit_t SDmaHaltErrClear[1]
pseudo_bit_t TxCreditOk_VL7[1]
pseudo_bit_t RcvQPMapContext24[5]
pseudo_bit_t LEDPort0GreenOn[1]
pseudo_bit_t CorErrClearRcvFlags_1[1]
pseudo_bit_t TS_TX_RX_CFG[16]
pseudo_bit_t _unused_0[45]
pseudo_bit_t _unused_3[1]
pseudo_bit_t MulCorErrMskSendLaFIFO3_0[1]
pseudo_bit_t RcvAvail16IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable13_pb)
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t PcieRetryBufrCorErrAddr_13_0[14]
pseudo_bit_t RcvBTHQP[24]
pseudo_bit_t CorErrStatusSendBufVL15[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t UncErrClearPCIeRetryBuf[1]
pseudo_bit_t RcvAvail7[1]
pseudo_bit_t ReqTagUsed_7_0[8]
pseudo_bit_t RcvLongPktLenErrClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogD_0_pb)
pseudo_bit_t TxCreditOk_VL2[1]
pseudo_bit_t CorErrStatusMsixTable0[1]
pseudo_bit_t _unused_2[32]
pseudo_bit_t InternalSDmaHalt[1]
pseudo_bit_t LinkWidthActive[1]
pseudo_bit_t CorErrStatusPCIeCompHdrBuf[1]
pseudo_bit_t RcvAvail9[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_Control_pb)
pseudo_bit_t SDmaBaseErrClear[1]
pseudo_bit_t UncErrClearSendBufVL15[1]
pseudo_bit_t RcvUrg6IntClear[1]
pseudo_bit_t static_disable_rxenagain_qdr_ch0[1]
pseudo_bit_t CorErrMskSendLaFIFO5_0[1]
pseudo_bit_t UncErrClearMsixTable1[1]
pseudo_bit_t RcvAvail4IntBlocked[1]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch2[8]
pseudo_bit_t MulCorErrMskPCIePostDataBuf[1]
pseudo_bit_t RcvBadTidErrMask[1]
pseudo_bit_t MulUncErrMskSendLaFIFO6_1[1]
pseudo_bit_t heartbeat_crosstalk[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaDescCnt_1_pb)
pseudo_bit_t SDmaIntClear_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb)
pseudo_bit_t static_disable_rxenale_qdr_ch0[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t Port0_DDR_Enabled[1]
pseudo_bit_t PhyerrThreshold[4]
pseudo_bit_t _unused_4[1]
pseudo_bit_t MsixTable_0_UnCorErrCheckBits[7]
pseudo_bit_t static_disable_rxenagain_sdr_ch0[1]
pseudo_bit_t TxeBypassIbc[1]
pseudo_bit_t BufMask_63_0[64]
pseudo_bit_t tx_rx_reset[1]
pseudo_bit_t IB_ENHANCED_MODE[1]
pseudo_bit_t SendIBSLIDMask_15_0[16]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrCorErrLogA_pb)
pseudo_bit_t xcv_rreset[1]
pseudo_bit_t FSSCorErrMsixTable1[1]
pseudo_bit_t debug_port_sel_pcie_rx_tx[1]
pseudo_bit_t MulCorErrClearPCIePostDataBuf[1]
pseudo_bit_t CorErrStatusSendLaFIFO7_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrAddr0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableCorErrLogB_pb)
pseudo_bit_t UncErrStatusLookupiqBuf_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrUnCorErrLogA_pb)
pseudo_bit_t static_disable_rxenagain_ddr_ch3[1]
pseudo_bit_t VirtualLane[3]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogB_0_pb)
pseudo_bit_t static_disable_rxenagain_sdr_ch1[1]
pseudo_bit_t FSSCorErrSendLaFIFO1_0[1]
pseudo_bit_t RxLkupiqCorErrAddr_12_0[13]
pseudo_bit_t MulUncErrMskMsixTable1[1]
pseudo_bit_t RcvUrg1IntBlocked[1]
pseudo_bit_t ErrIntBlocked_1[1]
pseudo_bit_t RxTIDArrayUnCorErrCheckBit_11_0[12]
pseudo_bit_t RxDataFifoUnCorErrAddr_10_0[11]
pseudo_bit_t TS_T_RX_VALID[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvAvailTimeOut0_pb)
pseudo_bit_t RcvHdrq17DCAOPH[8]
pseudo_bit_t RawIPV6_En[1]
pseudo_bit_t _unused_0[12]
pseudo_bit_t RcvAvail14[1]
pseudo_bit_t SDmaDescAddrMisalignErr[1]
pseudo_bit_t SDmaCleanupDone_0[1]
pseudo_bit_t txcn1_xtra_emph0[2]
pseudo_bit_t TxCreditOk_VL4[1]
pseudo_bit_t RmFifoArrayUnCorErrAddr_13_0[14]
pseudo_bit_t IBSerdesPClkNotDetectClear_0[1]
pseudo_bit_t SDmaDescFetchPriorityEn[1]
pseudo_bit_t MulUncErrStatusSendBufMain[1]
pseudo_bit_t RxFlagCorErrData_63_0[64]
pseudo_bit_t SendIntBufAvail[1]
pseudo_bit_t _unused_0[34]
pseudo_bit_t RcvIBLostLinkErr[1]
pseudo_bit_t FSSCorErrSendBufMain[1]
pseudo_bit_t _unused_0[2]
pseudo_bit_t _unused_0[56]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendGRHCheckMask0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_IBPCSConfig_0_pb)
pseudo_bit_t CounterDisable[1]
pseudo_bit_t _unused_0[57]
pseudo_bit_t IB_POLARITY_REV_SUPP[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogE_1_pb)
pseudo_bit_t _unused_0[16]
pseudo_bit_t _unused_0[51]
pseudo_bit_t SDmaMemReadErrMask_1[1]
pseudo_bit_t CorErrStatusSendBufMain[1]
pseudo_bit_t RcvQPMapContext31[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogA_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogA_0_pb)
pseudo_bit_t HRTBT_ENB[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t FSSUncErrSendRmFIFO_1[1]
pseudo_bit_t LaFifoEmpty_VL6[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IntRedirect0_pb)
pseudo_bit_t TS_3_RX_VALID[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrCorErrLogB_pb)
pseudo_bit_t _unused_0[11]
pseudo_bit_t static_disable_rxenagain_qdr_ch3[1]
pseudo_bit_t SendUnexpectedPktNumErrMask[1]
pseudo_bit_t RpyTag_7_0[8]
pseudo_bit_t RcvUrg9IntBlocked[1]
pseudo_bit_t RxHdrFifoCorErrCheckBit_15_0[16]
pseudo_bit_t _unused_1[36]
pseudo_bit_t MulUncErrStatusLookupiqBuf_0[1]
pseudo_bit_t SDmaDescAddrMisalignErrMask[1]
pseudo_bit_t SendUnexpectedPktNumErrClear[1]
pseudo_bit_t FSSCorErrRcvBuf_0[1]
pseudo_bit_t RxBufrUnCorErrCheckBit_36_0[37]
pseudo_bit_t UncErrClearSendLaFIFO2_0[1]
pseudo_bit_t UncErrClearSendLaFIFO1_0[1]
pseudo_bit_t static_disable_rxenale_sdr_ch2[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendPbcArrayUnCorErrLog_pb)
pseudo_bit_t MsixTable_1_CorErrCheckBits[7]
pseudo_bit_t SendDroppedDataPktErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IntBlocked_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogB_0_pb)
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t VL15BufMisuseErrMask[1]
pseudo_bit_t dyn_disable_rxenagain_sdr_ch3[1]
pseudo_bit_t SendDmaHeadAddr[48]
pseudo_bit_t debug_port_sel_pcs_symlock_elfifo_lane[4]
pseudo_bit_t SBufMainArrayCorErrAddr_18_0[19]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead11_pb)
pseudo_bit_t dyn_disable_rxenale_sdr_ch2[1]
pseudo_bit_t RcvShortPktLenErr[1]
pseudo_bit_t UncErrMskSendRmFIFO_1[1]
pseudo_bit_t VL15BufMisuseErr[1]
pseudo_bit_t RcvUrg8IntBlocked[1]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch1[1]
pseudo_bit_t RxDataFifoCorErrCheckBit_15_0[16]
pseudo_bit_t RcvUrg4IntBlocked[1]
pseudo_bit_t RcvContextShareErrClear[1]
pseudo_bit_t RxFlagCorErrData_63_0[64]
pseudo_bit_t RxFlagCorErrAddr_12_0[13]
pseudo_bit_t SDmaIdleIntClear_0[1]
pseudo_bit_t FSSUncErrSendLaFIFO1_0[1]
pseudo_bit_t RcvMinPktLenErrClear[1]
pseudo_bit_t _unused_0[1]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch2[8]
pseudo_bit_t CorErrStatusRcvFlags_0[1]
pseudo_bit_t FSSUncErrRcvBuf_0[1]
pseudo_bit_t VirtualLane[3]
PSEUDO_BIT_STRUCT(struct QIB_7322_DebugPortSel_pb)
pseudo_bit_t SDmaProgressIntBlocked_0[1]
pseudo_bit_t dyn_disable_rxenagain_qdr_ch1[1]
pseudo_bit_t TSMEnable_send_TS2[1]
pseudo_bit_t MulUncErrClearSendLaFIFO3_1[1]
pseudo_bit_t dyn_disable_rxenale_ddr_ch1[1]
pseudo_bit_t FSSUncErrSendLaFIFO4_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_EEPAddrCmd_pb)
pseudo_bit_t NibbleSel15[4]
pseudo_bit_t _unused_1[11]
pseudo_bit_t SDmaCleanupDoneClear_1[1]
pseudo_bit_t TxeAbortIbc[1]
pseudo_bit_t sensor_output_data[10]
pseudo_bit_t MulCorErrMskLookupiqBuf_1[1]
pseudo_bit_t RcvQPMapContext19[5]
pseudo_bit_t FSSCorErrMsixTable0[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch0[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t RcvHdrq8DCAOPH[8]
pseudo_bit_t _unused_2[8]
pseudo_bit_t _unused_1[35]
pseudo_bit_t RcvQPMapContext29[5]
pseudo_bit_t SendDroppedSmpPktErrMask[1]
pseudo_bit_t MulUncErrClearMsixTable0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable3_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDAssign_1_pb)
pseudo_bit_t _unused_0[16]
pseudo_bit_t SplFifoReadyToGo[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead8_pb)
pseudo_bit_t PCIESerdesPClkNotDetectClear[1]
pseudo_bit_t PcieCplDataBufrUnCorErrData_127_64[64]
pseudo_bit_t RcvHdrq8DCAXfrCnt[6]
pseudo_bit_t FSSCorErrSendLaFIFO4_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable10_pb)
pseudo_bit_t PciePHdrBufrUnCorErrData_107_64[44]
pseudo_bit_t RcvHdrq13DCAXfrCnt[6]
pseudo_bit_t SDma1stDescErr[1]
pseudo_bit_t SDmaDescAddrMisalignErr[1]
pseudo_bit_t SendIBSLIDAssign_15_0[16]
pseudo_bit_t SDmaUnexpDataErrMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_RX_0_pb)
pseudo_bit_t MulUncErrMskPCIeRetryBuf[1]
pseudo_bit_t RcvAvail7IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusA_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogC_0_pb)
pseudo_bit_t UncErrStatusSendLaFIFO1_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaPriorityThld_0_pb)
pseudo_bit_t SDmaDwEnErrMask[1]
pseudo_bit_t RcvUnsupportedVLErr[1]
pseudo_bit_t AssertGPIOIntClear[1]
pseudo_bit_t CorErrStatusRcvEgrArray[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch3[8]
pseudo_bit_t RcvQPMapContext17[5]
pseudo_bit_t ScoreBoardDrainInProg[1]
pseudo_bit_t _unused_0[48]
pseudo_bit_t RcvHdrq7DCAXfrCnt[6]
pseudo_bit_t RcvUrg0IntMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogA_0_pb)
pseudo_bit_t SplFifoDisarmed[1]
pseudo_bit_t FSSCorErrPCIePostHdrBuf[1]
pseudo_bit_t ahb_address[11]
pseudo_bit_t IBStatusChanged[1]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch1[8]
pseudo_bit_t RcvHdrq16DCAOPH[8]
pseudo_bit_t RcvQPMapContext7[5]
pseudo_bit_t CorErrMskMsixTable0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemUnCorErrMask_pb)
pseudo_bit_t _unused_1[16]
pseudo_bit_t DmaeqBlockingContext[5]
pseudo_bit_t UncErrMskLookupiqBuf_0[1]
pseudo_bit_t DisableEccCorrection[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RxFlagUnCorErrData_63_0[64]
pseudo_bit_t SendDMAHead0DCAEnable[1]
pseudo_bit_t dyn_disable_rxenale_ddr_ch3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogB_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlB_0_pb)
pseudo_bit_t MulUncErrStatusSendLaFIFO3_1[1]
pseudo_bit_t RcvHdrq9DCAXfrCnt[6]
pseudo_bit_t _unused_2[13]
pseudo_bit_t TxeDrainRmFifo[1]
pseudo_bit_t _unused_1[11]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiCorErrMask_pb)
pseudo_bit_t MulUncErrClearSendLaFIFO2_0[1]
pseudo_bit_t UncErrClearSendLaFIFO6_1[1]
pseudo_bit_t FSSUncErrPCIePostHdrBuf[1]
pseudo_bit_t RcvUnsupportedVLErrClear[1]
pseudo_bit_t RpyTag_7_0[8]
pseudo_bit_t CorErrClearSendLaFIFO3_0[1]
pseudo_bit_t SrcMuxSel1[8]
pseudo_bit_t MulUncErrMskRcvBuf_1[1]
pseudo_bit_t CorErrMskSendLaFIFO0_0[1]
pseudo_bit_t _unused_2[1]
pseudo_bit_t FSSCorErrSendBufVL15[1]
pseudo_bit_t CorErrStatusLookupiqBuf_0[1]
pseudo_bit_t _unused_1[1]
pseudo_bit_t UncErrMskSendLaFIFO3_1[1]
pseudo_bit_t RcvIBPortEnable[1]
pseudo_bit_t RcvUrg8IntClear[1]
pseudo_bit_t SendPktLenErrMask[1]
pseudo_bit_t _unused_0[10]
pseudo_bit_t MulUncErrMskSendLaFIFO4_0[1]
pseudo_bit_t CorErrClearRcvTIDArray[1]
pseudo_bit_t _unused_0[10]
pseudo_bit_t SDmaDescAddrMisalignErrClear[1]
pseudo_bit_t SDmaInt_1[1]
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch2[8]
pseudo_bit_t _unused_1[35]
pseudo_bit_t UncErrStatusSendLaFIFO6_1[1]
pseudo_bit_t FlowValid[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableD_1_pb)
pseudo_bit_t RmFifoArrayCorErrAddr_13_0[14]
pseudo_bit_t UncErrClearSendLaFIFO5_1[1]
pseudo_bit_t FSSCorErrSendLaFIFO7_0[1]
pseudo_bit_t _unused_4[6]
pseudo_bit_t RcvIBFlowErr[1]
pseudo_bit_t static_disable_rxenale_sdr_ch0[1]
pseudo_bit_t FSSUncErrSendLaFIFO3_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_voltage_margin_reg_pb)
pseudo_bit_t RcvHdrq3DCAXfrCnt[6]
pseudo_bit_t MulCorErrStatusRcvFlags_0[1]
pseudo_bit_t SDmaSingleDescriptor[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvQPMapContext13[5]
pseudo_bit_t TSMEnable_ignore_TSM_on_rx[1]
pseudo_bit_t RmFifoArrayUnCorErrDword_3_0[4]
pseudo_bit_t _unused_0[48]
pseudo_bit_t RcvQPMapContext7[5]
pseudo_bit_t tx_override_deemphasis_select[1]
pseudo_bit_t NibbleSel0[4]
pseudo_bit_t OverrunThreshold[4]
pseudo_bit_t UncErrStatusSendLaFIFO5_0[1]
pseudo_bit_t MulUncErrStatusRcvFlags_0[1]
pseudo_bit_t MulCorErrStatusRcvEgrArray[1]
pseudo_bit_t HdrSuppEnabled[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0UnCorErrLog_0_pb)
pseudo_bit_t RcvUrg17IntClear[1]
pseudo_bit_t MemoryErr[1]
pseudo_bit_t FSSUncErrPCIeCompHdrBuf[1]
pseudo_bit_t MulCorErrClearSendLaFIFO0_0[1]
pseudo_bit_t SendUnexpectedPktNumErr[1]
pseudo_bit_t AssertGPIOIntBlocked[1]
pseudo_bit_t SendUnderRunErrClear[1]
pseudo_bit_t _unused_0[5]
pseudo_bit_t IB_DLID_MASK[16]
pseudo_bit_t _unused_0[24]
pseudo_bit_t CorErrMskPCIePostHdrBuf[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogC_0_pb)
pseudo_bit_t LinkSpeedActive[1]
pseudo_bit_t CorErrStatusSendLaFIFO5_1[1]
pseudo_bit_t RcvUrg11IntClear[1]
pseudo_bit_t RcvHdrq13DCAOPH[8]
pseudo_bit_t SrcMuxSel0[8]
pseudo_bit_t RxTIDArrayCorErrCheckBit_11_0[12]
pseudo_bit_t LaFifoEmpty_VL5[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t UncErrClearSendLaFIFO2_1[1]
pseudo_bit_t _unused_0[4]
pseudo_bit_t HRTBT_PORT[8]
pseudo_bit_t CorErrMskSendLaFIFO6_1[1]
pseudo_bit_t MulCorErrClearSendLaFIFO0_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrUnCorErrLogB_pb)
pseudo_bit_t RcvUrg17IntMask[1]
pseudo_bit_t _unused_0[11]
pseudo_bit_t NibbleSel11[4]
pseudo_bit_t MulCorErrMskSendLaFIFO0_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemCorErrClear_pb)
pseudo_bit_t _unused_0[24]
pseudo_bit_t Port0_SDR_Enabled[1]
pseudo_bit_t UncErrStatusMsixTable2[1]
pseudo_bit_t UncErrClearMsixTable2[1]
pseudo_bit_t TxeAbortIbc[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_HwDiagCtrl_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogC_1_pb)
pseudo_bit_t UncErrClearSendLaFIFO6_0[1]
pseudo_bit_t _unused_0[3]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead16_pb)
pseudo_bit_t CorErrMskSendLaFIFO3_1[1]
pseudo_bit_t SDmaBaseErr[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RcvUrg7IntClear[1]
pseudo_bit_t SDmaTailOutOfBoundErrClear[1]
pseudo_bit_t _unused_0[37]
pseudo_bit_t Generation[3]
pseudo_bit_t TempsenseTholdReached[1]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t ScoreBoardDrainInProg[1]
pseudo_bit_t SendDma1DCAOPH[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBase_1_pb)
pseudo_bit_t CorErrStatusRcvBuf_0[1]
pseudo_bit_t _unused_0[40]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t link_sync_mask[10]
pseudo_bit_t SDmaMemReadErr_1[1]
pseudo_bit_t _unused_0[23]
pseudo_bit_t _unused_1[35]
pseudo_bit_t ErrIntBlocked_0[1]
pseudo_bit_t static_disable_rxenagain_qdr_ch0[1]
pseudo_bit_t SHeadersErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_EXTCtrl_pb)
pseudo_bit_t MulCorErrStatusSendBufMain[1]
pseudo_bit_t RcvQPMapContext2[5]
pseudo_bit_t _unused_0[34]
pseudo_bit_t dyn_disable_rxenagain_ddr_ch2[1]
pseudo_bit_t RcvUrg12IntBlocked[1]
pseudo_bit_t SendPktLenErrClear[1]
pseudo_bit_t _unused_2[12]
pseudo_bit_t _unused_0[16]
pseudo_bit_t SDmaProgressIntClear_1[1]
pseudo_bit_t MulUncErrMskRcvEgrArray[1]
pseudo_bit_t Address_sc[9]
pseudo_bit_t RxHdrFifoCorErrData_127_64[64]
pseudo_bit_t static_disable_rxenagain_qdr_ch2[1]
pseudo_bit_t RcvMaxPktLenErr[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogB_0_pb)
pseudo_bit_t MulCorErrMskRcvDMADataBuf_1[1]
pseudo_bit_t SendUnderRunErrMask[1]
pseudo_bit_t RcvAvail17[1]
pseudo_bit_t FSSCorErrSendLaFIFO6_1[1]
pseudo_bit_t R_ChipRevMinor[8]
pseudo_bit_t temp_sense_select[3]
pseudo_bit_t SeqMismatch[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaIdleCnt_0_pb)
pseudo_bit_t _unused_0[4]
pseudo_bit_t LaFifoEmpty_VL6[1]
pseudo_bit_t MulUncErrStatusSendPbcArray[1]
pseudo_bit_t RcvQPMapContext6[5]
pseudo_bit_t RcvAvail2[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch2[8]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t _unused_1[14]
pseudo_bit_t LinkSpeedQDR[1]
pseudo_bit_t RcvFormatErr[1]
pseudo_bit_t PcieRetryBufrUnCorErrData_133_128[6]
pseudo_bit_t RxLkupiqUnCorErrAddr_12_0[13]
pseudo_bit_t _unused_0[58]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaLenGen_1_pb)
pseudo_bit_t RcvQPMapContext30[5]
pseudo_bit_t PacketTooSmall_En[1]
pseudo_bit_t PciePoisonedTLPClear[1]
pseudo_bit_t PcieCplHdrBufrUnCorErrHdr_103_64[40]
pseudo_bit_t _unused_2[1]
pseudo_bit_t static_disable_rxenagain_sdr_ch3[1]
pseudo_bit_t OverrunThreshold[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0UnCorErrLog_1_pb)
pseudo_bit_t SDmaMemReadErrClear_1[1]
pseudo_bit_t IB_ENHANCED_MODE[1]
pseudo_bit_t UncErrMskPCIePostDataBuf[1]
pseudo_bit_t SDma1stDescErrClear[1]
pseudo_bit_t RxBufrUnCorErrData_127_64[64]
pseudo_bit_t FSSUncErrSendLaFIFO6_1[1]
pseudo_bit_t RcvUnexpectedCharErr[1]
pseudo_bit_t LaFifoArray0UnCorErrData_34_0[35]
pseudo_bit_t voltage_margin_settings[2]
pseudo_bit_t RcvBadVersionErr[1]
pseudo_bit_t _unused_0[24]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable9_pb)
pseudo_bit_t CorErrMskSendBufMain[1]
pseudo_bit_t _unused_3[4]
pseudo_bit_t SendPbcArrayUnCorErrAddr_9_0[10]
pseudo_bit_t _unused_0[24]
pseudo_bit_t CorErrStatusSendLaFIFO3_0[1]
pseudo_bit_t RcvQPMapContext8[5]
pseudo_bit_t SDmaMissingDwErrClear[1]
pseudo_bit_t IB_DLID_MASK[16]
pseudo_bit_t TxeDrainRmFifo[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable16_pb)
pseudo_bit_t FlowValid[1]
pseudo_bit_t IBSerdesPClkNotDetectMask_1[1]
pseudo_bit_t RcvQPMapContext27[5]
pseudo_bit_t PcieRetryBufrCorErrData_63_0[64]
pseudo_bit_t RxEagerArrayCorErrCheckBit_11_0[12]
pseudo_bit_t UncErrClearRcvEgrArray[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogB_1_pb)
pseudo_bit_t RcvHdrq15DCAOPH[8]
pseudo_bit_t MulCorErrStatusSendRmFIFO_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb)
pseudo_bit_t SendArmLaunchErr[1]
pseudo_bit_t RxDataFifoUnCorErrCheckBit_15_0[16]
pseudo_bit_t SendUnderRunErrClear[1]
pseudo_bit_t VirtualLane[3]
pseudo_bit_t SendMaxPktLenErr[1]
pseudo_bit_t ahb_req_err[1]
pseudo_bit_t MulUncErrClearSendLaFIFO3_0[1]
pseudo_bit_t UncErrStatusSendRmFIFO_1[1]
pseudo_bit_t RxDataFifoCorErrData_63_0[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufVL15ArrayCorErrLogA_pb)
pseudo_bit_t SDmaTailOutOfBoundErrMask[1]
pseudo_bit_t RcvQPMapContext3[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogA_1_pb)
pseudo_bit_t _unused_0[4]
pseudo_bit_t RxHdrFifoCorErrAddr_10_0[11]
pseudo_bit_t static_disable_rxenagain_ddr_ch2[1]
pseudo_bit_t UncErrClearLookupiqBuf_1[1]
pseudo_bit_t RxDataFifoCorErrAddr_10_0[11]
pseudo_bit_t RcvQPMapContext8[5]
pseudo_bit_t RcvICRCErrClear[1]
pseudo_bit_t RcvHdrq2DCAOPH[8]
pseudo_bit_t VL15BufMisuseErr[1]
pseudo_bit_t RcvHdrq14DCAOPH[8]
pseudo_bit_t RxEagerArrayCorErrData_39_0[40]
pseudo_bit_t RcvPartitionKeyDisable[1]
pseudo_bit_t RcvHeadPointer[32]
pseudo_bit_t RxTIDArrayCorErrData_39_0[40]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogA_0_pb)
pseudo_bit_t RcvAvail6IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead14_pb)
pseudo_bit_t RcvUrg4IntClear[1]
pseudo_bit_t CorErrStatusSendLaFIFO1_0[1]
pseudo_bit_t _unused_0[8]
pseudo_bit_t RcvHdrq7DCAOPH[8]
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_TX_0_pb)
pseudo_bit_t SDmaDwEnErrClear[1]
pseudo_bit_t RxEagerArrayUnCorErrAddr_17_0[18]
pseudo_bit_t static_disable_rxenagain_qdr_ch1[1]
pseudo_bit_t _unused_1[3]
pseudo_bit_t RcvQPMapContext29[5]
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlF_pb)
pseudo_bit_t dyn_disable_rxenale_sdr_ch1[1]
pseudo_bit_t debug_port_sel_xgxs_1[4]
pseudo_bit_t SendDmaHead[16]
pseudo_bit_t MulUncErrStatusPCIePostDataBuf[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlE_pb)
pseudo_bit_t RxHdrFifoUnCorErrData_127_64[64]
pseudo_bit_t CorErrStatusSendLaFIFO3_1[1]
pseudo_bit_t ibsd_adaptation_timer_reached_threshold[1]
pseudo_bit_t _unused_0[16]
pseudo_bit_t SDmaHaltErrMask[1]
pseudo_bit_t MulCorErrClearSendRmFIFO_1[1]
pseudo_bit_t SDmaIdleIntBlocked_1[1]
pseudo_bit_t RcvHeadPointer[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogB_1_pb)
pseudo_bit_t LATriggeredMask[1]
pseudo_bit_t ahb_data[32]
pseudo_bit_t ScrambleCapRemoteForce[1]
pseudo_bit_t _unused_0[24]
pseudo_bit_t _unused_1[35]
pseudo_bit_t CorErrClearSendLaFIFO4_0[1]
pseudo_bit_t NibbleSel7[4]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogB_1_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCheckControl_1_pb)
pseudo_bit_t _unused_0[2]
pseudo_bit_t dyn_disable_rxenale_ddr_ch0[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t SendDoneIntMask_0[1]
pseudo_bit_t NonKeyPacket[1]
pseudo_bit_t RcvEBPErrMask[1]
pseudo_bit_t _unused_0[19]
pseudo_bit_t UncErrMskRcvDMAHdrBuf_0[1]
pseudo_bit_t RxBufrUnCorErrAddr_15_0[16]
pseudo_bit_t _unused_0[4]
pseudo_bit_t RcvAvailTOCount[16]
pseudo_bit_t RcvHdrq11DCAXfrCnt[6]
pseudo_bit_t UncErrMskRcvDMAHdrBuf_1[1]
pseudo_bit_t SendUnexpectedPktNumErrClear[1]
pseudo_bit_t HardwareErrMask[1]
pseudo_bit_t MulUncErrClearRcvTIDArray[1]
pseudo_bit_t IBCBusFromSPCParityErr_0[1]
pseudo_bit_t InvalidEEPCmdMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrCorErrLogC_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlA_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaStatus_0_pb)
pseudo_bit_t SDmaEnable[1]
pseudo_bit_t UncErrStatusRcvBuf_0[1]
pseudo_bit_t SendDmaTail[16]
pseudo_bit_t _unused_2[11]
pseudo_bit_t MulCorErrStatusPCIeCompHdrBuf[1]
pseudo_bit_t PcieCplDataBufrUnCorErrAddr_13_0[14]
pseudo_bit_t MulUncErrMskRcvDMADataBuf_0[1]
pseudo_bit_t _unused_0[46]
pseudo_bit_t RcvVCRCErrMask[1]
pseudo_bit_t UncErrStatusSendPbcArray[1]
pseudo_bit_t SendPbcArrayUnCorErrCheckBit_6_0[7]
pseudo_bit_t MulUncErrClearMsixTable2[1]
pseudo_bit_t RcvUnsupportedVLErrMask[1]
pseudo_bit_t FSSUncErrSendBufMain[1]
pseudo_bit_t IBSerdesPClkNotDetectClear_1[1]
pseudo_bit_t TS_TX_OPCODE[2]
pseudo_bit_t SDmaUnexpDataErrClear[1]
pseudo_bit_t KeepOnGenErr[1]
pseudo_bit_t dyn_disable_rxenale_qdr_ch1[1]
pseudo_bit_t MulUncErrStatusSendLaFIFO4_0[1]
pseudo_bit_t operation[2]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch0[8]
pseudo_bit_t static_disable_rxenale_ddr_ch1[1]
pseudo_bit_t RcvLongPktLenErrMask[1]
pseudo_bit_t ScrambleCapRemoteMask[1]
pseudo_bit_t PCIESerdesPClkNotDetectMask[1]
pseudo_bit_t RcvAvail5IntMask[1]
pseudo_bit_t _unused_1[24]
pseudo_bit_t CorErrClearSendLaFIFO0_0[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogB_1_pb)
pseudo_bit_t CorErrClearSendBufMain[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogA_0_pb)
pseudo_bit_t UncErrClearSendLaFIFO3_1[1]
pseudo_bit_t static_disable_rxenadfe_sdr_ch2[8]
pseudo_bit_t txampcntl_d2a[4]
pseudo_bit_t MulUncErrClearSendLaFIFO6_0[1]
pseudo_bit_t _unused_0[59]
pseudo_bit_t SDmaTailOutOfBoundErrClear[1]
pseudo_bit_t debug_port_sel_credit_b_0[3]
pseudo_bit_t GenMismatch[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RxHdrFifoUnCorErrData_63_0[64]
pseudo_bit_t SDmaTailOutOfBoundErr[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t RxLkupiqUnCorErrCheckBit_7_0[8]
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch0[8]
pseudo_bit_t _unused_4[1]
pseudo_bit_t RcvBadVersionErrClear[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch1[8]
pseudo_bit_t SendUnsupportedVLErrClear[1]
pseudo_bit_t static_disable_rxenadfe_ddr_ch1[8]
pseudo_bit_t _unused_1[35]
pseudo_bit_t RcvUnsupportedVLErrClear[1]
pseudo_bit_t RmFifoArrayUnCorErrData_63_0[64]
pseudo_bit_t _unused_5[5]
pseudo_bit_t _unused_2[32]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufMask0_0_pb)
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable15_pb)
pseudo_bit_t _unused_0[47]
pseudo_bit_t static_disable_rxenadfe_qdr_ch0[8]
pseudo_bit_t _unused_0[1]
pseudo_bit_t IB_NUM_CHANNELS[2]
pseudo_bit_t RcvAvail3IntClear[1]
pseudo_bit_t IBVLArbiterEn[1]
pseudo_bit_t static_disable_rxenadfe_qdr_ch3[8]
pseudo_bit_t FSSUncErrRcvBuf_1[1]
pseudo_bit_t UncErrStatusPCIeCompHdrBuf[1]
pseudo_bit_t PciePDataBufrUnCorErrAddr_13_0[14]
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch1[8]
pseudo_bit_t ContextEnableKernel[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrCorErrLogC_pb)
pseudo_bit_t RcvAvail5IntClear[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableF_1_pb)
pseudo_bit_t txcn1_ena[3]
pseudo_bit_t _unused_0[12]
pseudo_bit_t static_disable_rxenale_qdr_ch1[1]
pseudo_bit_t RmFifoArrayCorErrCheckBit_27_0[28]
pseudo_bit_t RmFifoArrayUnCorErrData_63_0[64]
pseudo_bit_t _unused_3[4]
pseudo_bit_t TempsenseTholdReachedClear[1]
pseudo_bit_t RcvUrg12IntMask[1]
pseudo_bit_t _unused_1[35]
pseudo_bit_t SDmaIntMask_0[1]
pseudo_bit_t _unused_4[2]
pseudo_bit_t debug_port_sel_xgxs_0[4]
pseudo_bit_t RcvQPMapContext1[5]
pseudo_bit_t SDmaMissingDwErrMask[1]
pseudo_bit_t ScrambleEn[1]
pseudo_bit_t _unused_2[1]
pseudo_bit_t UncErrClearRcvBuf_1[1]
pseudo_bit_t FSSUncErrRcvDMADataBuf_0[1]
pseudo_bit_t FSSUncErrLookupiqBuf_0[1]
pseudo_bit_t pcie_phy_txParityErr[1]
pseudo_bit_t RcvQPMapContext16[5]
pseudo_bit_t SendBufMisuseErrMask[1]
pseudo_bit_t LaFifoEmpty_VL15[1]
pseudo_bit_t _unused_0[12]
pseudo_bit_t CorErrStatusSendLaFIFO0_1[1]
pseudo_bit_t _unused_0[61]
pseudo_bit_t dyn_disable_rxenale_sdr_ch3[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaIdleCnt_1_pb)
pseudo_bit_t RxBufrCorErrData_127_64[64]
pseudo_bit_t SBufVL15MisUseErrClear[1]
pseudo_bit_t RxFlagUnCorErrCheckBit_7_0[8]
pseudo_bit_t GenMismatch[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogA_0_pb)
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t RxHdrFifoUnCorErrData_63_0[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogC_1_pb)
pseudo_bit_t UncErrMskPCIePostHdrBuf[1]
pseudo_bit_t R_Emulation[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogA_1_pb)
pseudo_bit_t _unused_0[2]
pseudo_bit_t RcvHdrTailAddr[38]
pseudo_bit_t UncErrStatusSendBufExtra[1]
pseudo_bit_t MulCorErrMskPCIeCompHdrBuf[1]
pseudo_bit_t HdrSuppEnabled[1]
pseudo_bit_t FlowValid[1]
pseudo_bit_t MulCorErrMskSendLaFIFO1_1[1]
pseudo_bit_t MulCorErrStatusSendLaFIFO6_1[1]
pseudo_bit_t SendIBSLIDMask_15_0[16]
pseudo_bit_t SDma1stDescErrClear[1]
pseudo_bit_t SDmaDwEnErr[1]
pseudo_bit_t CorErrMskLookupiqBuf_0[1]
pseudo_bit_t _unused_0[54]
pseudo_bit_t RxFlagUnCorErrAddr_12_0[13]
pseudo_bit_t SendEnable[1]
pseudo_bit_t SBufMainArrayUnCorErrCheckBit_27_0[28]
pseudo_bit_t RcvUrg1IntMask[1]
pseudo_bit_t MulUncErrStatusRcvDMAHdrBuf_0[1]
pseudo_bit_t _unused_1[6]
pseudo_bit_t _unused_0[16]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvQPMapContext15[5]
pseudo_bit_t _unused_0[16]
pseudo_bit_t RcvUnexpectedCharErrMask[1]
pseudo_bit_t RcvVCRCErr[1]
pseudo_bit_t MulCorErrMskMsixTable2[1]
pseudo_bit_t MulUncErrMskSendLaFIFO7_1[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemCorErrMask_pb)
pseudo_bit_t SDmaProgressIntMask_1[1]
pseudo_bit_t R_Simulator[1]
pseudo_bit_t UncErrStatusPCIeCompDataBuf[1]
pseudo_bit_t debug_port_sel_pcs_rxdet_encdec_lane[3]
pseudo_bit_t SeqMismatch[1]
pseudo_bit_t reset_tx_deemphasis_override[1]
pseudo_bit_t UncErrMskRcvDMADataBuf_1[1]
pseudo_bit_t TSMCode_TS1[9]
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiCorErrClear_pb)
pseudo_bit_t _unused_1[16]
pseudo_bit_t RxBufrUnCorErrData_255_192[64]
pseudo_bit_t static_disable_rxenale_ddr_ch1[1]
pseudo_bit_t TidFlowEnable[1]
pseudo_bit_t _unused_1[2]
pseudo_bit_t RmFifoArrayUnCorErrData_127_64[64]
pseudo_bit_t _unused_0[3]
pseudo_bit_t RcvAvail13IntMask[1]
pseudo_bit_t RcvUrg14IntMask[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrMask_1_pb)
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch2[8]
pseudo_bit_t UncErrClearSendRmFIFO_1[1]
pseudo_bit_t _unused_0[3]
pseudo_bit_t MulUncErrMskRcvFlags_1[1]
pseudo_bit_t SBufMainArrayCorErrData_127_64[64]
pseudo_bit_t TxeDrainLaFifo[1]
pseudo_bit_t MulUncErrMskLookupiqBuf_1[1]
pseudo_bit_t KeepAfterSeqErr[1]
pseudo_bit_t RcvHdrq12DCAXfrCnt[6]
pseudo_bit_t UncErrClearSendBufMain[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaStatus_1_pb)
pseudo_bit_t RxEqLocalDevice[2]
pseudo_bit_t RxDataFifoCorErrData_63_0[64]
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayUnCorErrLogB_pb)
pseudo_bit_t _unused_0[8]
pseudo_bit_t TS_3_RX_VALID[1]
PSEUDO_BIT_STRUCT(struct QIB_7322_SPC_JTAG_ACCESS_REG_pb)
pseudo_bit_t static_disable_rxenagain_ddr_ch1[1]
pseudo_bit_t RxBufrUnCorErrData_191_128[64]
pseudo_bit_t _unused_0[37]
pseudo_bit_t MulUncErrStatusMsixTable1[1]
pseudo_bit_t SendVLMismatchErrMask[1]