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iPXE
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An ATA Logical Block Address. More...
#include <ata.h>
Data Fields | |
| uint64_t | native |
| LBA as a 64-bit integer in native-endian order. More... | |
| struct { | |
| uint8_t low_cur | |
| uint8_t mid_cur | |
| uint8_t high_cur | |
| uint8_t low_prev | |
| uint8_t mid_prev | |
| uint8_t high_prev | |
| uint16_t pad | |
| } | bytes |
| ATA registers. More... | |
An ATA Logical Block Address.
ATA controllers have three byte-wide registers for specifying the block address: LBA Low, LBA Mid and LBA High. This allows for a 24-bit address. Some devices support the "48-bit address feature set" (LBA48), in which case each of these byte-wide registers is actually a two-entry FIFO, and the "previous" byte pushed into the FIFO is used as the corresponding high-order byte. So, to set up the 48-bit address 0x123456abcdef, you would issue
0x56 -> LBA Low register 0xef -> LBA Low register 0x34 -> LBA Mid register 0xcd -> LBA Mid register 0x12 -> LBA High register 0xab -> LBA High register
This structure encapsulates this information by providing a single 64-bit integer in native byte order, unioned with bytes named so that the sequence becomes
low_prev -> LBA Low register low_cur -> LBA Low register mid_prev -> LBA Mid register mid_cur -> LBA Mid register high_prev -> LBA High register high_cur -> LBA High register
Just to complicate matters further, in non-LBA48 mode it is possible to have a 28-bit address, in which case bits 27:24 must be written into the low four bits of the Device register.
| uint64_t ata_lba::native |
| struct { ... } ata_lba::bytes |
ATA registers.
1.8.15