iPXE
ProcessorBind.h
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1 /** @file
2  Processor or Compiler specific defines and types for LoongArch
3 
4  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
5 
6  SPDX-License-Identifier: BSD-2-Clause-Patent
7 
8 **/
9 
10 #ifndef PROCESSOR_BIND_H_
11 #define PROCESSOR_BIND_H_
12 
13 FILE_LICENCE ( BSD2_PATENT );
14 
15 //
16 // Define the processor type so other code can make processor based choices
17 //
18 #define MDE_CPU_LOONGARCH64
19 
20 #define EFIAPI
21 
22 //
23 // Make sure we are using the correct packing rules per EFI specification
24 //
25 #ifndef __GNUC__
26  #pragma pack()
27 #endif
28 
29 //
30 // Assume standard LoongArch 64-bit alignment.
31 // Need to check portability of long long
32 //
33 typedef unsigned long long UINT64;
34 typedef long long INT64;
35 typedef unsigned int UINT32;
36 typedef int INT32;
37 typedef unsigned short UINT16;
38 typedef unsigned short CHAR16;
39 typedef short INT16;
40 typedef unsigned char BOOLEAN;
41 typedef unsigned char UINT8;
42 typedef char CHAR8;
43 typedef char INT8;
44 
45 //
46 // Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
47 // 8 bytes on supported 64-bit processor instructions)
48 //
49 
50 typedef UINT64 UINTN;
51 
52 //
53 // Signed value of native width. (4 bytes on supported 32-bit processor instructions,
54 // 8 bytes on supported 64-bit processor instructions)
55 //
56 typedef INT64 INTN;
57 
58 //
59 // Processor specific defines
60 //
61 
62 //
63 // A value of native width with the highest bit set.
64 //
65 #define MAX_BIT 0x8000000000000000ULL
66 //
67 // A value of native width with the two highest bits set.
68 //
69 #define MAX_2_BITS 0xC000000000000000ULL
70 
71 //
72 // Maximum legal LoongArch 64-bit address
73 //
74 #define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
75 
76 //
77 // Maximum usable address at boot time (48 bits using 4KB pages)
78 //
79 #define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL
80 
81 //
82 // Maximum legal LoongArch 64-bit INTN and UINTN values.
83 //
84 #define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)
85 #define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
86 
87 //
88 // Page allocation granularity for LoongArch
89 //
90 #define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
91 #define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
92 
93 #if defined (__GNUC__)
94 //
95 // For GNU assembly code, .global or .globl can declare global symbols.
96 // Define this macro to unify the usage.
97 //
98 #define ASM_GLOBAL .globl
99 #endif
100 
101 //
102 // The stack alignment required for LoongArch
103 //
104 #define CPU_STACK_ALIGNMENT 16
105 
106 /**
107  Return the pointer to the first instruction of a function given a function pointer.
108  On LOONGARCH CPU architectures, these two pointer values are the same,
109  so the implementation of this macro is very simple.
110 
111  @param FunctionPointer A pointer to a function.
112 
113  @return The pointer to the first instruction of a function given a function pointer.
114 
115 **/
116 #define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
117 
118 #ifndef __USER_LABEL_PREFIX__
119 #define __USER_LABEL_PREFIX__
120 #endif
121 
122 #endif
int INT32
Definition: ProcessorBind.h:99
unsigned char BOOLEAN
INT64 INTN
Signed value of native width.
unsigned int UINT32
Definition: ProcessorBind.h:98
unsigned short CHAR16
unsigned char UINT8
long long INT64
Definition: ProcessorBind.h:97
short INT16
unsigned short UINT16
UINT64 UINTN
Unsigned value of native width.
unsigned long long UINT64
Definition: ProcessorBind.h:96
FILE_LICENCE(BSD2_PATENT)
char CHAR8
signed char INT8