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EF10 hardware architecture definitions. More...
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| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
EF10 hardware architecture definitions.
EF10 hardware architecture definitions have a name prefix following the format:
E<type>_<min-rev><max-rev>_
The following <type> strings are used:
MMIO register Host memory structure
Address R Bitfield RF SF Enumerator FE SE
<min-rev> is the first revision to which the definition applies:
D: Huntington A0
If the definition has been changed or removed in later revisions then <max-rev> is the last revision to which the definition applies; otherwise it is "Z".
Definition in file ef10_regs.h.
| #define ER_DZ_BIU_HW_REV_ID 0x00000000 |
Definition at line 53 of file ef10_regs.h.
| #define ERF_DZ_HW_REV_ID_LBN 0 |
Definition at line 54 of file ef10_regs.h.
| #define ERF_DZ_HW_REV_ID_WIDTH 32 |
Definition at line 55 of file ef10_regs.h.
| #define ER_DZ_BIU_MC_SFT_STATUS 0x00000010 |
Definition at line 58 of file ef10_regs.h.
| #define ER_DZ_BIU_MC_SFT_STATUS_STEP 4 |
Definition at line 59 of file ef10_regs.h.
| #define ER_DZ_BIU_MC_SFT_STATUS_ROWS 8 |
Definition at line 60 of file ef10_regs.h.
| #define ERF_DZ_MC_SFT_STATUS_LBN 0 |
Definition at line 61 of file ef10_regs.h.
| #define ERF_DZ_MC_SFT_STATUS_WIDTH 32 |
Definition at line 62 of file ef10_regs.h.
| #define ER_DZ_BIU_INT_ISR 0x00000090 |
Definition at line 65 of file ef10_regs.h.
| #define ERF_DZ_ISR_REG_LBN 0 |
Definition at line 66 of file ef10_regs.h.
| #define ERF_DZ_ISR_REG_WIDTH 32 |
Definition at line 67 of file ef10_regs.h.
| #define ER_DZ_MC_DB_LWRD 0x00000200 |
Definition at line 70 of file ef10_regs.h.
| #define ERF_DZ_MC_DOORBELL_L_LBN 0 |
Definition at line 71 of file ef10_regs.h.
| #define ERF_DZ_MC_DOORBELL_L_WIDTH 32 |
Definition at line 72 of file ef10_regs.h.
| #define ER_DZ_MC_DB_HWRD 0x00000204 |
Definition at line 75 of file ef10_regs.h.
| #define ERF_DZ_MC_DOORBELL_H_LBN 0 |
Definition at line 76 of file ef10_regs.h.
| #define ERF_DZ_MC_DOORBELL_H_WIDTH 32 |
Definition at line 77 of file ef10_regs.h.
| #define ER_DZ_EVQ_RPTR 0x00000400 |
Definition at line 80 of file ef10_regs.h.
| #define ER_DZ_EVQ_RPTR_STEP 8192 |
Definition at line 81 of file ef10_regs.h.
| #define ER_DZ_EVQ_RPTR_ROWS 2048 |
Definition at line 82 of file ef10_regs.h.
| #define ERF_DZ_EVQ_RPTR_VLD_LBN 15 |
Definition at line 83 of file ef10_regs.h.
| #define ERF_DZ_EVQ_RPTR_VLD_WIDTH 1 |
Definition at line 84 of file ef10_regs.h.
| #define ERF_DZ_EVQ_RPTR_LBN 0 |
Definition at line 85 of file ef10_regs.h.
| #define ERF_DZ_EVQ_RPTR_WIDTH 15 |
Definition at line 86 of file ef10_regs.h.
| #define ER_DZ_EVQ_TMR 0x00000420 |
Definition at line 89 of file ef10_regs.h.
| #define ER_DZ_EVQ_TMR_STEP 8192 |
Definition at line 90 of file ef10_regs.h.
| #define ER_DZ_EVQ_TMR_ROWS 2048 |
Definition at line 91 of file ef10_regs.h.
| #define ERF_DZ_TC_TIMER_MODE_LBN 14 |
Definition at line 92 of file ef10_regs.h.
| #define ERF_DZ_TC_TIMER_MODE_WIDTH 2 |
Definition at line 93 of file ef10_regs.h.
| #define ERF_DZ_TC_TIMER_VAL_LBN 0 |
Definition at line 94 of file ef10_regs.h.
| #define ERF_DZ_TC_TIMER_VAL_WIDTH 14 |
Definition at line 95 of file ef10_regs.h.
| #define ER_DZ_RX_DESC_UPD 0x00000830 |
Definition at line 98 of file ef10_regs.h.
| #define ER_DZ_RX_DESC_UPD_STEP 8192 |
Definition at line 99 of file ef10_regs.h.
| #define ER_DZ_RX_DESC_UPD_ROWS 2048 |
Definition at line 100 of file ef10_regs.h.
| #define ERF_DZ_RX_DESC_WPTR_LBN 0 |
Definition at line 101 of file ef10_regs.h.
| #define ERF_DZ_RX_DESC_WPTR_WIDTH 12 |
Definition at line 102 of file ef10_regs.h.
| #define ER_DZ_TX_DESC_UPD 0x00000a10 |
Definition at line 105 of file ef10_regs.h.
| #define ER_DZ_TX_DESC_UPD_STEP 8192 |
Definition at line 106 of file ef10_regs.h.
| #define ER_DZ_TX_DESC_UPD_ROWS 2048 |
Definition at line 107 of file ef10_regs.h.
| #define ERF_DZ_RSVD_LBN 76 |
Definition at line 108 of file ef10_regs.h.
| #define ERF_DZ_RSVD_WIDTH 20 |
Definition at line 109 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_WPTR_LBN 64 |
Definition at line 110 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_WPTR_WIDTH 12 |
Definition at line 111 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_HWORD_LBN 32 |
Definition at line 112 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_HWORD_WIDTH 32 |
Definition at line 113 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_LWORD_LBN 0 |
Definition at line 114 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_LWORD_WIDTH 32 |
Definition at line 115 of file ef10_regs.h.
| #define ESF_DZ_DRV_CODE_LBN 60 |
Definition at line 118 of file ef10_regs.h.
| #define ESF_DZ_DRV_CODE_WIDTH 4 |
Definition at line 119 of file ef10_regs.h.
| #define ESF_DZ_DRV_SUB_CODE_LBN 56 |
Definition at line 120 of file ef10_regs.h.
| #define ESF_DZ_DRV_SUB_CODE_WIDTH 4 |
Definition at line 121 of file ef10_regs.h.
| #define ESE_DZ_DRV_TIMER_EV 3 |
Definition at line 122 of file ef10_regs.h.
| #define ESE_DZ_DRV_START_UP_EV 2 |
Definition at line 123 of file ef10_regs.h.
| #define ESE_DZ_DRV_WAKE_UP_EV 1 |
Definition at line 124 of file ef10_regs.h.
| #define ESF_DZ_DRV_SUB_DATA_LBN 0 |
Definition at line 125 of file ef10_regs.h.
| #define ESF_DZ_DRV_SUB_DATA_WIDTH 56 |
Definition at line 126 of file ef10_regs.h.
| #define ESF_DZ_DRV_EVQ_ID_LBN 0 |
Definition at line 127 of file ef10_regs.h.
| #define ESF_DZ_DRV_EVQ_ID_WIDTH 14 |
Definition at line 128 of file ef10_regs.h.
| #define ESF_DZ_DRV_TMR_ID_LBN 0 |
Definition at line 129 of file ef10_regs.h.
| #define ESF_DZ_DRV_TMR_ID_WIDTH 14 |
Definition at line 130 of file ef10_regs.h.
| #define ESF_DZ_EV_CODE_LBN 60 |
Definition at line 133 of file ef10_regs.h.
| #define ESF_DZ_EV_CODE_WIDTH 4 |
Definition at line 134 of file ef10_regs.h.
| #define ESE_DZ_EV_CODE_MCDI_EV 12 |
Definition at line 135 of file ef10_regs.h.
| #define ESE_DZ_EV_CODE_DRIVER_EV 5 |
Definition at line 136 of file ef10_regs.h.
| #define ESE_DZ_EV_CODE_TX_EV 2 |
Definition at line 137 of file ef10_regs.h.
| #define ESE_DZ_EV_CODE_RX_EV 0 |
Definition at line 138 of file ef10_regs.h.
| #define ESE_DZ_OTHER other |
Definition at line 139 of file ef10_regs.h.
| #define ESF_DZ_EV_DATA_LBN 0 |
Definition at line 140 of file ef10_regs.h.
| #define ESF_DZ_EV_DATA_WIDTH 60 |
Definition at line 141 of file ef10_regs.h.
| #define ESF_DZ_MC_CODE_LBN 60 |
Definition at line 144 of file ef10_regs.h.
| #define ESF_DZ_MC_CODE_WIDTH 4 |
Definition at line 145 of file ef10_regs.h.
| #define ESF_DZ_MC_OVERRIDE_HOLDOFF_LBN 59 |
Definition at line 146 of file ef10_regs.h.
| #define ESF_DZ_MC_OVERRIDE_HOLDOFF_WIDTH 1 |
Definition at line 147 of file ef10_regs.h.
| #define ESF_DZ_MC_DROP_EVENT_LBN 58 |
Definition at line 148 of file ef10_regs.h.
| #define ESF_DZ_MC_DROP_EVENT_WIDTH 1 |
Definition at line 149 of file ef10_regs.h.
| #define ESF_DZ_MC_SOFT_LBN 0 |
Definition at line 150 of file ef10_regs.h.
| #define ESF_DZ_MC_SOFT_WIDTH 58 |
Definition at line 151 of file ef10_regs.h.
| #define ESF_DZ_RX_CODE_LBN 60 |
Definition at line 154 of file ef10_regs.h.
| #define ESF_DZ_RX_CODE_WIDTH 4 |
Definition at line 155 of file ef10_regs.h.
| #define ESF_DZ_RX_OVERRIDE_HOLDOFF_LBN 59 |
Definition at line 156 of file ef10_regs.h.
| #define ESF_DZ_RX_OVERRIDE_HOLDOFF_WIDTH 1 |
Definition at line 157 of file ef10_regs.h.
| #define ESF_DZ_RX_DROP_EVENT_LBN 58 |
Definition at line 158 of file ef10_regs.h.
| #define ESF_DZ_RX_DROP_EVENT_WIDTH 1 |
Definition at line 159 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_RSVD2_LBN 54 |
Definition at line 160 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_RSVD2_WIDTH 4 |
Definition at line 161 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_SOFT2_LBN 52 |
Definition at line 162 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_SOFT2_WIDTH 2 |
Definition at line 163 of file ef10_regs.h.
| #define ESF_DZ_RX_DSC_PTR_LBITS_LBN 48 |
Definition at line 164 of file ef10_regs.h.
| #define ESF_DZ_RX_DSC_PTR_LBITS_WIDTH 4 |
Definition at line 165 of file ef10_regs.h.
| #define ESF_DZ_RX_L4_CLASS_LBN 45 |
Definition at line 166 of file ef10_regs.h.
| #define ESF_DZ_RX_L4_CLASS_WIDTH 3 |
Definition at line 167 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_RSVD7 7 |
Definition at line 168 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_RSVD6 6 |
Definition at line 169 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_RSVD5 5 |
Definition at line 170 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_RSVD4 4 |
Definition at line 171 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_RSVD3 3 |
Definition at line 172 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_UDP 2 |
Definition at line 173 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_TCP 1 |
Definition at line 174 of file ef10_regs.h.
| #define ESE_DZ_L4_CLASS_UNKNOWN 0 |
Definition at line 175 of file ef10_regs.h.
| #define ESF_DZ_RX_L3_CLASS_LBN 42 |
Definition at line 176 of file ef10_regs.h.
| #define ESF_DZ_RX_L3_CLASS_WIDTH 3 |
Definition at line 177 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_RSVD7 7 |
Definition at line 178 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_IP6_FRAG 6 |
Definition at line 179 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_ARP 5 |
Definition at line 180 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_IP4_FRAG 4 |
Definition at line 181 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_FCOE 3 |
Definition at line 182 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_IP6 2 |
Definition at line 183 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_IP4 1 |
Definition at line 184 of file ef10_regs.h.
| #define ESE_DZ_L3_CLASS_UNKNOWN 0 |
Definition at line 185 of file ef10_regs.h.
| #define ESF_DZ_RX_ETH_TAG_CLASS_LBN 39 |
Definition at line 186 of file ef10_regs.h.
| #define ESF_DZ_RX_ETH_TAG_CLASS_WIDTH 3 |
Definition at line 187 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_RSVD7 7 |
Definition at line 188 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_RSVD6 6 |
Definition at line 189 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_RSVD5 5 |
Definition at line 190 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_RSVD4 4 |
Definition at line 191 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_RSVD3 3 |
Definition at line 192 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_VLAN2 2 |
Definition at line 193 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_VLAN1 1 |
Definition at line 194 of file ef10_regs.h.
| #define ESE_DZ_ETH_TAG_CLASS_NONE 0 |
Definition at line 195 of file ef10_regs.h.
| #define ESF_DZ_RX_ETH_BASE_CLASS_LBN 36 |
Definition at line 196 of file ef10_regs.h.
| #define ESF_DZ_RX_ETH_BASE_CLASS_WIDTH 3 |
Definition at line 197 of file ef10_regs.h.
| #define ESE_DZ_ETH_BASE_CLASS_LLC_SNAP 2 |
Definition at line 198 of file ef10_regs.h.
| #define ESE_DZ_ETH_BASE_CLASS_LLC 1 |
Definition at line 199 of file ef10_regs.h.
| #define ESE_DZ_ETH_BASE_CLASS_ETH2 0 |
Definition at line 200 of file ef10_regs.h.
| #define ESF_DZ_RX_MAC_CLASS_LBN 35 |
Definition at line 201 of file ef10_regs.h.
| #define ESF_DZ_RX_MAC_CLASS_WIDTH 1 |
Definition at line 202 of file ef10_regs.h.
| #define ESE_DZ_MAC_CLASS_MCAST 1 |
Definition at line 203 of file ef10_regs.h.
| #define ESE_DZ_MAC_CLASS_UCAST 0 |
Definition at line 204 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_SOFT1_LBN 32 |
Definition at line 205 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_SOFT1_WIDTH 3 |
Definition at line 206 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_RSVD1_LBN 31 |
Definition at line 207 of file ef10_regs.h.
| #define ESF_DZ_RX_EV_RSVD1_WIDTH 1 |
Definition at line 208 of file ef10_regs.h.
| #define ESF_DZ_RX_ABORT_LBN 30 |
Definition at line 209 of file ef10_regs.h.
| #define ESF_DZ_RX_ABORT_WIDTH 1 |
Definition at line 210 of file ef10_regs.h.
| #define ESF_DZ_RX_ECC_ERR_LBN 29 |
Definition at line 211 of file ef10_regs.h.
| #define ESF_DZ_RX_ECC_ERR_WIDTH 1 |
Definition at line 212 of file ef10_regs.h.
| #define ESF_DZ_RX_CRC1_ERR_LBN 28 |
Definition at line 213 of file ef10_regs.h.
| #define ESF_DZ_RX_CRC1_ERR_WIDTH 1 |
Definition at line 214 of file ef10_regs.h.
| #define ESF_DZ_RX_CRC0_ERR_LBN 27 |
Definition at line 215 of file ef10_regs.h.
| #define ESF_DZ_RX_CRC0_ERR_WIDTH 1 |
Definition at line 216 of file ef10_regs.h.
| #define ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN 26 |
Definition at line 217 of file ef10_regs.h.
| #define ESF_DZ_RX_TCPUDP_CKSUM_ERR_WIDTH 1 |
Definition at line 218 of file ef10_regs.h.
| #define ESF_DZ_RX_IPCKSUM_ERR_LBN 25 |
Definition at line 219 of file ef10_regs.h.
| #define ESF_DZ_RX_IPCKSUM_ERR_WIDTH 1 |
Definition at line 220 of file ef10_regs.h.
| #define ESF_DZ_RX_ECRC_ERR_LBN 24 |
Definition at line 221 of file ef10_regs.h.
| #define ESF_DZ_RX_ECRC_ERR_WIDTH 1 |
Definition at line 222 of file ef10_regs.h.
| #define ESF_DZ_RX_QLABEL_LBN 16 |
Definition at line 223 of file ef10_regs.h.
| #define ESF_DZ_RX_QLABEL_WIDTH 5 |
Definition at line 224 of file ef10_regs.h.
| #define ESF_DZ_RX_PARSE_INCOMPLETE_LBN 15 |
Definition at line 225 of file ef10_regs.h.
| #define ESF_DZ_RX_PARSE_INCOMPLETE_WIDTH 1 |
Definition at line 226 of file ef10_regs.h.
| #define ESF_DZ_RX_CONT_LBN 14 |
Definition at line 227 of file ef10_regs.h.
| #define ESF_DZ_RX_CONT_WIDTH 1 |
Definition at line 228 of file ef10_regs.h.
| #define ESF_DZ_RX_BYTES_LBN 0 |
Definition at line 229 of file ef10_regs.h.
| #define ESF_DZ_RX_BYTES_WIDTH 14 |
Definition at line 230 of file ef10_regs.h.
| #define ESF_DZ_RX_KER_RESERVED_LBN 62 |
Definition at line 233 of file ef10_regs.h.
| #define ESF_DZ_RX_KER_RESERVED_WIDTH 2 |
Definition at line 234 of file ef10_regs.h.
| #define ESF_DZ_RX_KER_BYTE_CNT_LBN 48 |
Definition at line 235 of file ef10_regs.h.
| #define ESF_DZ_RX_KER_BYTE_CNT_WIDTH 14 |
Definition at line 236 of file ef10_regs.h.
| #define ESF_DZ_RX_KER_BUF_ADDR_LBN 0 |
Definition at line 237 of file ef10_regs.h.
| #define ESF_DZ_RX_KER_BUF_ADDR_WIDTH 48 |
Definition at line 238 of file ef10_regs.h.
| #define ESF_DZ_TX_DESC_IS_OPT_LBN 63 |
Definition at line 306 of file ef10_regs.h.
| #define ESF_DZ_TX_DESC_IS_OPT_WIDTH 1 |
Definition at line 307 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_TYPE_LBN 60 |
Definition at line 308 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_TYPE_WIDTH 3 |
Definition at line 309 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_DESC_TSO 7 |
Definition at line 310 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_DESC_VLAN 6 |
Definition at line 311 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_DESC_CRC_CSUM 0 |
Definition at line 312 of file ef10_regs.h.
| #define ESF_DZ_TX_TIMESTAMP_LBN 5 |
Definition at line 248 of file ef10_regs.h.
| #define ESF_DZ_TX_TIMESTAMP_WIDTH 1 |
Definition at line 249 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_CRC_MODE_LBN 2 |
Definition at line 250 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_CRC_MODE_WIDTH 3 |
Definition at line 251 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_CRC_FCOIP_MPA 5 |
Definition at line 252 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_CRC_FCOIP_FCOE 4 |
Definition at line 253 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_CRC_ISCSI_HDR_AND_PYLD 3 |
Definition at line 254 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_CRC_ISCSI_HDR 2 |
Definition at line 255 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_CRC_FCOE 1 |
Definition at line 256 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_CRC_OFF 0 |
Definition at line 257 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_UDP_TCP_CSUM_LBN 1 |
Definition at line 258 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_UDP_TCP_CSUM_WIDTH 1 |
Definition at line 259 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_IP_CSUM_LBN 0 |
Definition at line 260 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_IP_CSUM_WIDTH 1 |
Definition at line 261 of file ef10_regs.h.
| #define ESF_DZ_TX_CODE_LBN 60 |
Definition at line 264 of file ef10_regs.h.
| #define ESF_DZ_TX_CODE_WIDTH 4 |
Definition at line 265 of file ef10_regs.h.
| #define ESF_DZ_TX_OVERRIDE_HOLDOFF_LBN 59 |
Definition at line 266 of file ef10_regs.h.
| #define ESF_DZ_TX_OVERRIDE_HOLDOFF_WIDTH 1 |
Definition at line 267 of file ef10_regs.h.
| #define ESF_DZ_TX_DROP_EVENT_LBN 58 |
Definition at line 268 of file ef10_regs.h.
| #define ESF_DZ_TX_DROP_EVENT_WIDTH 1 |
Definition at line 269 of file ef10_regs.h.
| #define ESF_DZ_TX_EV_RSVD_LBN 48 |
Definition at line 270 of file ef10_regs.h.
| #define ESF_DZ_TX_EV_RSVD_WIDTH 10 |
Definition at line 271 of file ef10_regs.h.
| #define ESF_DZ_TX_SOFT2_LBN 32 |
Definition at line 272 of file ef10_regs.h.
| #define ESF_DZ_TX_SOFT2_WIDTH 16 |
Definition at line 273 of file ef10_regs.h.
| #define ESF_DZ_TX_CAN_MERGE_LBN 31 |
Definition at line 274 of file ef10_regs.h.
| #define ESF_DZ_TX_CAN_MERGE_WIDTH 1 |
Definition at line 275 of file ef10_regs.h.
| #define ESF_DZ_TX_SOFT1_LBN 24 |
Definition at line 276 of file ef10_regs.h.
| #define ESF_DZ_TX_SOFT1_WIDTH 7 |
Definition at line 277 of file ef10_regs.h.
| #define ESF_DZ_TX_QLABEL_LBN 16 |
Definition at line 278 of file ef10_regs.h.
| #define ESF_DZ_TX_QLABEL_WIDTH 5 |
Definition at line 279 of file ef10_regs.h.
| #define ESF_DZ_TX_DESCR_INDX_LBN 0 |
Definition at line 280 of file ef10_regs.h.
| #define ESF_DZ_TX_DESCR_INDX_WIDTH 16 |
Definition at line 281 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_TYPE_LBN 63 |
Definition at line 284 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_TYPE_WIDTH 1 |
Definition at line 285 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_CONT_LBN 62 |
Definition at line 286 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_CONT_WIDTH 1 |
Definition at line 287 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_BYTE_CNT_LBN 48 |
Definition at line 288 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_BYTE_CNT_WIDTH 14 |
Definition at line 289 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_BUF_ADDR_LBN 0 |
Definition at line 290 of file ef10_regs.h.
| #define ESF_DZ_TX_KER_BUF_ADDR_WIDTH 48 |
Definition at line 291 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_TYPE_LBN 63 |
Definition at line 294 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_TYPE_WIDTH 1 |
Definition at line 295 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_OPT_LBN 60 |
Definition at line 296 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_OPT_WIDTH 3 |
Definition at line 297 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_CONT_LBN 59 |
Definition at line 298 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_CONT_WIDTH 1 |
Definition at line 299 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_BYTE_CNT_LBN 32 |
Definition at line 300 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_BYTE_CNT_WIDTH 12 |
Definition at line 301 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_BUF_ADDR_LBN 0 |
Definition at line 302 of file ef10_regs.h.
| #define ESF_DZ_TX_PIO_BUF_ADDR_WIDTH 12 |
Definition at line 303 of file ef10_regs.h.
| #define ESF_DZ_TX_DESC_IS_OPT_LBN 63 |
Definition at line 306 of file ef10_regs.h.
| #define ESF_DZ_TX_DESC_IS_OPT_WIDTH 1 |
Definition at line 307 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_TYPE_LBN 60 |
Definition at line 308 of file ef10_regs.h.
| #define ESF_DZ_TX_OPTION_TYPE_WIDTH 3 |
Definition at line 309 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_DESC_TSO 7 |
Definition at line 310 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_DESC_VLAN 6 |
Definition at line 311 of file ef10_regs.h.
| #define ESE_DZ_TX_OPTION_DESC_CRC_CSUM 0 |
Definition at line 312 of file ef10_regs.h.
| #define ESF_DZ_TX_TSO_TCP_FLAGS_LBN 48 |
Definition at line 313 of file ef10_regs.h.
| #define ESF_DZ_TX_TSO_TCP_FLAGS_WIDTH 8 |
Definition at line 314 of file ef10_regs.h.
| #define ESF_DZ_TX_TSO_IP_ID_LBN 32 |
Definition at line 315 of file ef10_regs.h.
| #define ESF_DZ_TX_TSO_IP_ID_WIDTH 16 |
Definition at line 316 of file ef10_regs.h.
| #define ESF_DZ_TX_TSO_TCP_SEQNO_LBN 0 |
Definition at line 317 of file ef10_regs.h.
| #define ESF_DZ_TX_TSO_TCP_SEQNO_WIDTH 32 |
Definition at line 318 of file ef10_regs.h.
| #define ER_DZ_TX_DESC_UPD_DWORD (ER_DZ_TX_DESC_UPD + 2 * 4) |
Definition at line 325 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_WPTR_DWORD_LBN (ERF_DZ_TX_DESC_WPTR_LBN - 2 * 32) |
Definition at line 326 of file ef10_regs.h.
| #define ERF_DZ_TX_DESC_WPTR_DWORD_WIDTH ERF_DZ_TX_DESC_WPTR_WIDTH |
Definition at line 327 of file ef10_regs.h.
| #define ER_DD_EVQ_INDIRECT ER_DZ_TX_DESC_UPD_DWORD |
Definition at line 335 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_RPTR_FLAGS_LBN 8 |
Definition at line 336 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_RPTR_FLAGS_WIDTH 4 |
Definition at line 337 of file ef10_regs.h.
| #define EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH 8 |
Definition at line 338 of file ef10_regs.h.
| #define EFE_DD_EVQ_IND_RPTR_FLAGS_LOW 9 |
Definition at line 339 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_RPTR_LBN 0 |
Definition at line 340 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_RPTR_WIDTH 8 |
Definition at line 341 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_TIMER_FLAGS_LBN 10 |
Definition at line 342 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_TIMER_FLAGS_WIDTH 2 |
Definition at line 343 of file ef10_regs.h.
| #define EFE_DD_EVQ_IND_TIMER_FLAGS 3 |
Definition at line 344 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_TIMER_MODE_LBN 8 |
Definition at line 345 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_TIMER_MODE_WIDTH 2 |
Definition at line 346 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_TIMER_VAL_LBN 0 |
Definition at line 347 of file ef10_regs.h.
| #define ERF_DD_EVQ_IND_TIMER_VAL_WIDTH 8 |
Definition at line 348 of file ef10_regs.h.
| #define ER_DZ_TX_PIOBUF 4096 |
Definition at line 353 of file ef10_regs.h.
| #define ER_DZ_TX_PIOBUF_SIZE 2048 |
Definition at line 354 of file ef10_regs.h.
| #define ES_DZ_RX_PREFIX_HASH_OFST 0 |
Definition at line 357 of file ef10_regs.h.
| #define ES_DZ_RX_PREFIX_VLAN1_OFST 4 |
Definition at line 358 of file ef10_regs.h.
| #define ES_DZ_RX_PREFIX_VLAN2_OFST 6 |
Definition at line 359 of file ef10_regs.h.
| #define ES_DZ_RX_PREFIX_PKTLEN_OFST 8 |
Definition at line 360 of file ef10_regs.h.
| #define ES_DZ_RX_PREFIX_TSTAMP_OFST 10 |
Definition at line 361 of file ef10_regs.h.
| #define ES_DZ_RX_PREFIX_SIZE 14 |
Definition at line 362 of file ef10_regs.h.
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
1.8.15