iPXE
ena.h
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1 #ifndef _ENA_H
2 #define _ENA_H
3 
4 /** @file
5  *
6  * Amazon ENA network driver
7  *
8  */
9 
10 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
11 
12 #include <stdint.h>
13 #include <ipxe/if_ether.h>
14 
15 /** BAR size */
16 #define ENA_BAR_SIZE 16384
17 
18 /** Queue alignment */
19 #define ENA_ALIGN 4096
20 
21 /** Number of admin queue entries */
22 #define ENA_AQ_COUNT 2
23 
24 /** Number of admin completion queue entries */
25 #define ENA_ACQ_COUNT 2
26 
27 /** Number of transmit queue entries */
28 #define ENA_TX_COUNT 16
29 
30 /** Number of receive queue entries */
31 #define ENA_RX_COUNT 128
32 
33 /** Receive queue maximum fill level */
34 #define ENA_RX_FILL 16
35 
36 /** Base address low register offset */
37 #define ENA_BASE_LO 0x0
38 
39 /** Base address high register offset */
40 #define ENA_BASE_HI 0x4
41 
42 /** Capability register value */
43 #define ENA_CAPS( count, size ) ( ( (size) << 16 ) | ( (count) << 0 ) )
44 
45 /** Admin queue base address register */
46 #define ENA_AQ_BASE 0x10
47 
48 /** Admin queue capabilities register */
49 #define ENA_AQ_CAPS 0x18
50 
51 /** Admin completion queue base address register */
52 #define ENA_ACQ_BASE 0x20
53 
54 /** Admin completion queue capabilities register */
55 #define ENA_ACQ_CAPS 0x28
56 
57 /** Admin queue doorbell register */
58 #define ENA_AQ_DB 0x2c
59 
60 /** Maximum time to wait for admin requests */
61 #define ENA_ADMIN_MAX_WAIT_MS 5000
62 
63 /** Device control register */
64 #define ENA_CTRL 0x54
65 #define ENA_CTRL_RESET 0x00000001UL /**< Reset */
66 
67 /** Maximum time to wait for reset */
68 #define ENA_RESET_MAX_WAIT_MS 1000
69 
70 /** Device status register */
71 #define ENA_STAT 0x58
72 #define ENA_STAT_RESET 0x00000008UL /**< Reset in progress */
73 
74 /** Admin queue entry header */
75 struct ena_aq_header {
76  /** Request identifier */
78  /** Reserved */
80  /** Opcode */
82  /** Flags */
84 } __attribute__ (( packed ));
85 
86 /** Admin queue ownership phase flag */
87 #define ENA_AQ_PHASE 0x01
88 
89 /** Admin completion queue entry header */
91  /** Request identifier */
93  /** Reserved */
95  /** Status */
97  /** Flags */
99  /** Extended status */
101  /** Consumer index */
103 } __attribute__ (( packed ));
104 
105 /** Admin completion queue ownership phase flag */
106 #define ENA_ACQ_PHASE 0x01
107 
108 /** Device attributes */
109 #define ENA_DEVICE_ATTRIBUTES 1
110 
111 /** Device attributes */
113  /** Implementation */
115  /** Device version */
117  /** Supported features */
119  /** Reserved */
121  /** Physical address width */
123  /** Virtual address width */
124  uint32_t virtual;
125  /** MAC address */
127  /** Reserved */
129  /** Maximum MTU */
131 } __attribute__ (( packed ));
132 
133 /** Host attributes */
134 #define ENA_HOST_ATTRIBUTES 28
135 
136 /** Host attributes */
138  /** Host info base address */
140  /** Debug area base address */
142  /** Debug area size */
144 } __attribute__ (( packed ));
145 
146 /** Host information */
148  /** Operating system type */
150  /** Operating system distribution (string) */
151  char dist_str[128];
152  /** Operating system distribution (numeric) */
154  /** Kernel version (string) */
155  char kernel_str[32];
156  /** Kernel version (numeric) */
158  /** Driver version */
160  /** Linux network device features */
162  /** ENA specification version */
164  /** PCI bus:dev.fn address */
166  /** Number of CPUs */
168  /** Reserved */
170  /** Supported features */
172 } __attribute__ (( packed ));
173 
174 /** Linux operating system type
175  *
176  * There is a defined "iPXE" operating system type (with value 5).
177  * However, some very broken versions of the ENA firmware will refuse
178  * to allow a completion queue to be created if the "iPXE" type is
179  * used.
180  */
181 #define ENA_HOST_INFO_TYPE_LINUX 1
182 
183 /** Driver version
184  *
185  * The driver version field is nominally used to report a version
186  * number outside of the VM for consumption by humans (and potentially
187  * by automated monitoring tools that could e.g. check for outdated
188  * versions with known security flaws).
189  *
190  * However, at some point in the development of the ENA firmware, some
191  * unknown person at AWS thought it would be sensible to apply a
192  * machine interpretation to this field and adjust the behaviour of
193  * the firmware based on its value, thereby creating a maintenance and
194  * debugging nightmare for all existing and future drivers.
195  *
196  * Hint to engineers: if you ever find yourself writing code of the
197  * form "if (version == SOME_MAGIC_NUMBER)" then something has gone
198  * very, very wrong. This *always* indicates that something is
199  * broken, either in your own code or in the code with which you are
200  * forced to interact.
201  */
202 #define ENA_HOST_INFO_VERSION_WTF 0x00000002UL
203 
204 /** ENA specification version */
205 #define ENA_HOST_INFO_SPEC_2_0 0x0200
206 
207 /** Feature */
208 union ena_feature {
209  /** Device attributes */
211  /** Host attributes */
213 };
214 
215 /** Submission queue direction */
217  /** Transmit */
218  ENA_SQ_TX = 0x20,
219  /** Receive */
220  ENA_SQ_RX = 0x40,
221 };
222 
223 /** Create submission queue */
224 #define ENA_CREATE_SQ 1
225 
226 /** Create submission queue request */
228  /** Header */
230  /** Direction */
232  /** Reserved */
234  /** Policy */
236  /** Completion queue identifier */
238  /** Number of entries */
240  /** Base address */
242  /** Writeback address */
244  /** Reserved */
246 } __attribute__ (( packed ));
247 
248 /** Submission queue policy */
250  /** Use host memory */
252  /** Memory is contiguous */
254 };
255 
256 /** Create submission queue response */
258  /** Header */
260  /** Submission queue identifier */
262  /** Reserved */
264  /** Doorbell register offset */
266  /** LLQ descriptor ring offset */
268  /** LLQ header offset */
270 } __attribute__ (( packed ));
271 
272 /** Destroy submission queue */
273 #define ENA_DESTROY_SQ 2
274 
275 /** Destroy submission queue request */
277  /** Header */
279  /** Submission queue identifier */
281  /** Direction */
283  /** Reserved */
285 } __attribute__ (( packed ));
286 
287 /** Destroy submission queue response */
289  /** Header */
291 } __attribute__ (( packed ));
292 
293 /** Create completion queue */
294 #define ENA_CREATE_CQ 3
295 
296 /** Create completion queue request */
298  /** Header */
300  /** Interrupts enabled */
302  /** Entry size (in 32-bit words) */
304  /** Number of entries */
306  /** MSI-X vector */
308  /** Base address */
310 } __attribute__ (( packed ));
311 
312 /** Empty MSI-X vector
313  *
314  * Some versions of the ENA firmware will complain if the completion
315  * queue's MSI-X vector field is left empty, even though the queue
316  * configuration specifies that interrupts are not used.
317  */
318 #define ENA_MSIX_NONE 0xffffffffUL
319 
320 /** Create completion queue response */
322  /** Header */
324  /** Completion queue identifier */
326  /** Actual number of entries */
328  /** NUMA node register offset */
330  /** Doorbell register offset */
332  /** Interrupt unmask register offset */
334 } __attribute__ (( packed ));
335 
336 /** Destroy completion queue */
337 #define ENA_DESTROY_CQ 4
338 
339 /** Destroy completion queue request */
341  /** Header */
343  /** Completion queue identifier */
345  /** Reserved */
347 } __attribute__ (( packed ));
348 
349 /** Destroy completion queue response */
351  /** Header */
353 } __attribute__ (( packed ));
354 
355 /** Get feature */
356 #define ENA_GET_FEATURE 8
357 
358 /** Get feature request */
360  /** Header */
362  /** Length */
364  /** Address */
366  /** Flags */
368  /** Feature identifier */
370  /** Reserved */
372 } __attribute__ (( packed ));
373 
374 /** Get feature response */
376  /** Header */
378  /** Feature */
380 } __attribute__ (( packed ));
381 
382 /** Set feature */
383 #define ENA_SET_FEATURE 9
384 
385 /** Set feature request */
387  /** Header */
389  /** Length */
391  /** Address */
393  /** Flags */
395  /** Feature identifier */
397  /** Reserved */
399  /** Feature */
401 } __attribute__ (( packed ));
402 
403 /** Get statistics */
404 #define ENA_GET_STATS 11
405 
406 /** Get statistics request */
408  /** Header */
410  /** Reserved */
412  /** Type */
414  /** Scope */
416  /** Reserved */
418  /** Queue ID */
420  /** Device ID */
422 } __attribute__ (( packed ));
423 
424 /** Basic statistics */
425 #define ENA_STATS_TYPE_BASIC 0
426 
427 /** Ethernet statistics */
428 #define ENA_STATS_SCOPE_ETH 1
429 
430 /** My device */
431 #define ENA_DEVICE_MINE 0xffff
432 
433 /** Get statistics response */
435  /** Header */
437  /** Transmit byte count */
439  /** Transmit packet count */
441  /** Receive byte count */
443  /** Receive packet count */
445  /** Receive drop count */
447 } __attribute__ (( packed ));
448 
449 /** Admin queue request */
450 union ena_aq_req {
451  /** Header */
453  /** Create submission queue */
455  /** Destroy submission queue */
457  /** Create completion queue */
459  /** Destroy completion queue */
461  /** Get feature */
463  /** Set feature */
465  /** Get statistics */
467  /** Padding */
469 };
470 
471 /** Admin completion queue response */
472 union ena_acq_rsp {
473  /** Header */
475  /** Create submission queue */
477  /** Destroy submission queue */
479  /** Create completion queue */
481  /** Destroy completion queue */
483  /** Get feature */
485  /** Get statistics */
487  /** Padding */
489 };
490 
491 /** Admin queue */
492 struct ena_aq {
493  /** Requests */
494  union ena_aq_req *req;
495  /** Producer counter */
496  unsigned int prod;
497 };
498 
499 /** Admin completion queue */
500 struct ena_acq {
501  /** Responses */
502  union ena_acq_rsp *rsp;
503  /** Consumer counter */
504  unsigned int cons;
505  /** Phase */
506  unsigned int phase;
507 };
508 
509 /** Transmit submission queue entry */
510 struct ena_tx_sqe {
511  /** Length */
513  /** Reserved */
515  /** Flags */
517  /** Reserved */
519  /** Request identifier */
521  /** Address */
523 } __attribute__ (( packed ));
524 
525 /** Receive submission queue entry */
526 struct ena_rx_sqe {
527  /** Length */
529  /** Reserved */
531  /** Flags */
533  /** Request identifier */
535  /** Reserved */
537  /** Address */
539 } __attribute__ (( packed ));
540 
541 /** Submission queue ownership phase flag */
542 #define ENA_SQE_PHASE 0x01
543 
544 /** This is the first descriptor */
545 #define ENA_SQE_FIRST 0x04
546 
547 /** This is the last descriptor */
548 #define ENA_SQE_LAST 0x08
549 
550 /** Request completion */
551 #define ENA_SQE_CPL 0x10
552 
553 /** Transmit completion queue entry */
554 struct ena_tx_cqe {
555  /** Request identifier */
557  /** Status */
559  /** Flags */
561  /** Reserved */
563  /** Consumer index */
565 } __attribute__ (( packed ));
566 
567 /** Transmit completion request identifier */
568 #define ENA_TX_CQE_ID(id) ( (id) >> 2 )
569 
570 /** Receive completion queue entry */
571 struct ena_rx_cqe {
572  /** Reserved */
574  /** Flags */
576  /** Length */
578  /** Request identifier */
580  /** Reserved */
582 } __attribute__ (( packed ));
583 
584 /** Completion queue ownership phase flag */
585 #define ENA_CQE_PHASE 0x01
586 
587 /** Submission queue */
588 struct ena_sq {
589  /** Entries */
590  union {
591  /** Transmit submission queue entries */
592  struct ena_tx_sqe *tx;
593  /** Receive submission queue entries */
594  struct ena_rx_sqe *rx;
595  /** Raw data */
596  void *raw;
597  } sqe;
598  /** Buffer IDs */
600  /** Doorbell register offset */
601  unsigned int doorbell;
602  /** Total length of entries */
603  size_t len;
604  /** Producer counter */
605  unsigned int prod;
606  /** Phase */
607  unsigned int phase;
608  /** Submission queue identifier */
610  /** Direction */
612  /** Number of entries */
614  /** Maximum fill level */
616  /** Fill level (limited to completion queue size) */
618 };
619 
620 /**
621  * Initialise submission queue
622  *
623  * @v sq Submission queue
624  * @v direction Direction
625  * @v count Number of entries
626  * @v max Maximum fill level
627  * @v size Size of each entry
628  * @v ids Buffer IDs
629  */
630 static inline __attribute__ (( always_inline )) void
631 ena_sq_init ( struct ena_sq *sq, unsigned int direction, unsigned int count,
632  unsigned int max, size_t size, uint8_t *ids ) {
633 
634  sq->len = ( count * size );
635  sq->direction = direction;
636  sq->count = count;
637  sq->max = max;
638  sq->ids = ids;
639 }
640 
641 /** Completion queue */
642 struct ena_cq {
643  /** Entries */
644  union {
645  /** Transmit completion queue entries */
646  struct ena_tx_cqe *tx;
647  /** Receive completion queue entries */
648  struct ena_rx_cqe *rx;
649  /** Raw data */
650  void *raw;
651  } cqe;
652  /** Doorbell register offset */
653  unsigned int doorbell;
654  /** Total length of entries */
655  size_t len;
656  /** Consumer counter */
657  unsigned int cons;
658  /** Phase */
659  unsigned int phase;
660  /** Completion queue identifier */
662  /** Entry size (in 32-bit words) */
664  /** Requested number of entries */
666  /** Actual number of entries */
668  /** Actual number of entries minus one */
670 };
671 
672 /**
673  * Initialise completion queue
674  *
675  * @v cq Completion queue
676  * @v count Number of entries
677  * @v size Size of each entry
678  */
679 static inline __attribute__ (( always_inline )) void
680 ena_cq_init ( struct ena_cq *cq, unsigned int count, size_t size ) {
681 
682  cq->len = ( count * size );
683  cq->size = ( size / sizeof ( uint32_t ) );
685 }
686 
687 /** Queue pair */
688 struct ena_qp {
689  /** Submission queue */
690  struct ena_sq sq;
691  /** Completion queue */
692  struct ena_cq cq;
693 };
694 
695 /** An ENA network card */
696 struct ena_nic {
697  /** Registers */
698  void *regs;
699  /** Host info */
701  /** Admin queue */
702  struct ena_aq aq;
703  /** Admin completion queue */
704  struct ena_acq acq;
705  /** Transmit queue */
706  struct ena_qp tx;
707  /** Receive queue */
708  struct ena_qp rx;
709  /** Transmit buffer IDs */
711  /** Transmit I/O buffers, indexed by buffer ID */
713  /** Receive buffer IDs */
715  /** Receive I/O buffers, indexed by buffer ID */
717 };
718 
719 #endif /* _ENA_H */
uint8_t reserved_b[2]
Reserved.
Definition: ena.h:536
Destroy completion queue response.
Definition: ena.h:350
uint8_t reserved_a[12]
Reserved.
Definition: ena.h:411
struct ena_aq aq
Admin queue.
Definition: ena.h:702
Queue pair.
Definition: ena.h:688
uint16_t id
Completion queue identifier.
Definition: ena.h:325
uint32_t intr
Interrupt unmask register offset.
Definition: ena.h:333
struct ena_tx_sqe * tx
Transmit submission queue entries.
Definition: ena.h:592
struct ena_qp rx
Receive queue.
Definition: ena.h:708
uint8_t type
Type.
Definition: ena.h:413
struct ena_acq_header header
Header.
Definition: ena.h:259
unsigned short uint16_t
Definition: stdint.h:11
void * raw
Raw data.
Definition: ena.h:650
struct ena_aq_header header
Header.
Definition: ena.h:299
uint64_t address
Address.
Definition: ena.h:365
Host information.
Definition: ena.h:147
uint8_t reserved[2]
Reserved.
Definition: ena.h:346
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:126
#define ENA_RX_COUNT
Number of receive queue entries.
Definition: ena.h:31
uint64_t info
Host info base address.
Definition: ena.h:139
uint8_t reserved_a
Reserved.
Definition: ena.h:514
uint8_t rx_ids[ENA_RX_COUNT]
Receive buffer IDs.
Definition: ena.h:714
Create completion queue request.
Definition: ena.h:297
uint8_t mask
Actual number of entries minus one.
Definition: ena.h:669
uint8_t reserved_a
Reserved.
Definition: ena.h:233
uint8_t reserved_b[8]
Reserved.
Definition: ena.h:245
size_t len
Total length of entries.
Definition: ena.h:603
static unsigned int unsigned int unsigned int size_t uint8_t * ids
Definition: ena.h:632
unsigned int doorbell
Doorbell register offset.
Definition: ena.h:601
uint8_t count
Number of entries.
Definition: ena.h:613
struct ena_aq_header header
Header.
Definition: ena.h:361
uint8_t flags
Flags.
Definition: ena.h:367
uint8_t * ids
Buffer IDs.
Definition: ena.h:599
unsigned int prod
Producer counter.
Definition: ena.h:605
uint16_t id
Completion queue identifier.
Definition: ena.h:344
uint8_t reserved[2]
Reserved.
Definition: ena.h:398
uint64_t linux_features
Linux network device features.
Definition: ena.h:161
struct ena_tx_cqe * tx
Transmit completion queue entries.
Definition: ena.h:646
Create submission queue response.
Definition: ena.h:257
uint32_t doorbell
Doorbell register offset.
Definition: ena.h:265
uint8_t reserved_a[3]
Reserved.
Definition: ena.h:573
struct ena_get_stats_rsp get_stats
Get statistics.
Definition: ena.h:486
Transmit submission queue entry.
Definition: ena.h:510
struct ena_qp tx
Transmit queue.
Definition: ena.h:706
uint8_t reserved[2]
Reserved.
Definition: ena.h:562
struct ena_set_feature_req set_feature
Set feature.
Definition: ena.h:464
uint16_t count
Number of entries.
Definition: ena.h:239
union ena_sq::@39 sqe
Entries.
Transmit completion queue entry.
Definition: ena.h:554
Get feature response.
Definition: ena.h:375
unsigned long long uint64_t
Definition: stdint.h:13
uint8_t id
Request identifier.
Definition: ena.h:520
Admin queue.
Definition: ena.h:492
union ena_cq::@40 cqe
Entries.
uint32_t features
Supported features.
Definition: ena.h:118
uint16_t count
Number of entries.
Definition: ena.h:305
uint32_t mtu
Maximum MTU.
Definition: ena.h:130
uint8_t direction
Direction.
Definition: ena.h:14
struct ena_acq_header header
Header.
Definition: ena.h:377
static unsigned int unsigned int unsigned int max
Definition: ena.h:631
uint64_t rx_drops
Receive drop count.
Definition: ena.h:446
uint16_t len
Length.
Definition: ena.h:528
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:663
Destroy completion queue request.
Definition: ena.h:340
uint32_t llq_desc
LLQ descriptor ring offset.
Definition: ena.h:267
uint8_t reserved_a[4]
Reserved.
Definition: ena.h:120
uint32_t doorbell
Doorbell register offset.
Definition: ena.h:331
uint32_t features
Supported features.
Definition: ena.h:171
unsigned int phase
Phase.
Definition: ena.h:659
uint16_t spec
ENA specification version.
Definition: ena.h:163
uint64_t address
Address.
Definition: ena.h:538
struct ena_aq_header header
Header.
Definition: ena.h:342
struct ena_aq_header header
Header.
Definition: ena.h:229
#define ENA_TX_COUNT
Number of transmit queue entries.
Definition: ena.h:28
uint64_t address
Base address.
Definition: ena.h:309
unsigned int doorbell
Doorbell register offset.
Definition: ena.h:653
struct ena_aq_header header
Header.
Definition: ena.h:388
void * regs
Registers.
Definition: ena.h:698
uint32_t dist
Operating system distribution (numeric)
Definition: ena.h:153
uint8_t tx_ids[ENA_TX_COUNT]
Transmit buffer IDs.
Definition: ena.h:710
uint32_t debug_len
Debug area size.
Definition: ena.h:143
uint32_t llq_data
LLQ header offset.
Definition: ena.h:269
Completion queue.
Definition: ena.h:642
Submission queue.
Definition: ena.h:588
struct ena_destroy_sq_rsp destroy_sq
Destroy submission queue.
Definition: ena.h:478
Feature.
Definition: ena.h:208
uint8_t status
Status.
Definition: ena.h:96
uint8_t reserved[2]
Reserved.
Definition: ena.h:263
size_t len
Total length of entries.
Definition: ena.h:655
struct ena_get_feature_rsp get_feature
Get feature.
Definition: ena.h:484
uint16_t id
Request identifier.
Definition: ena.h:556
struct ena_acq_header header
Header.
Definition: ena.h:352
A hardware device.
Definition: device.h:73
uint64_t writeback
Writeback address.
Definition: ena.h:243
uint8_t reserved
Reserved.
Definition: ena.h:284
uint8_t reserved_a[2]
Reserved.
Definition: ena.h:169
uint64_t tx_packets
Transmit packet count.
Definition: ena.h:440
uint16_t id
Request identifier.
Definition: ena.h:534
uint8_t id
Feature identifier.
Definition: ena.h:369
uint16_t cpus
Number of CPUs.
Definition: ena.h:167
uint32_t len
Length.
Definition: ena.h:390
uint16_t cons
Consumer index.
Definition: ena.h:564
Host attributes.
Definition: ena.h:137
uint8_t reserved_b[2]
Reserved.
Definition: ena.h:128
union ena_aq_req * req
Requests.
Definition: ena.h:494
Transmit.
Definition: ena.h:218
uint64_t address
Base address.
Definition: ena.h:241
uint16_t cq_id
Completion queue identifier.
Definition: ena.h:237
uint8_t reserved
Reserved.
Definition: ena.h:94
ena_sq_policy
Submission queue policy.
Definition: ena.h:249
unsigned int cons
Consumer counter.
Definition: ena.h:504
uint8_t flags
Flags.
Definition: ena.h:560
unsigned int cons
Consumer counter.
Definition: ena.h:657
uint16_t policy
Policy.
Definition: ena.h:235
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:303
uint8_t flags
Flags.
Definition: ena.h:83
uint16_t ext
Extended status.
Definition: ena.h:100
uint16_t busdevfn
PCI bus:dev.fn address.
Definition: ena.h:165
uint64_t debug
Debug area base address.
Definition: ena.h:141
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
uint8_t id
Feature identifier.
Definition: ena.h:396
unsigned int phase
Phase.
Definition: ena.h:607
struct ena_get_stats_req get_stats
Get statistics.
Definition: ena.h:466
uint16_t count
Actual number of entries.
Definition: ena.h:327
struct ena_create_cq_req create_cq
Create completion queue.
Definition: ena.h:458
struct ena_destroy_cq_req destroy_cq
Destroy completion queue.
Definition: ena.h:460
Create completion queue response.
Definition: ena.h:321
uint8_t direction
Direction.
Definition: ena.h:231
Create submission queue request.
Definition: ena.h:227
struct ena_rx_cqe * rx
Receive completion queue entries.
Definition: ena.h:648
struct ena_cq cq
Completion queue.
Definition: ena.h:692
uint8_t flags
Flags.
Definition: ena.h:575
uint32_t vector
MSI-X vector.
Definition: ena.h:307
struct ena_aq_header header
Header.
Definition: ena.h:278
uint8_t flags
Flags.
Definition: ena.h:516
Destroy submission queue response.
Definition: ena.h:288
struct ena_acq_header header
Header.
Definition: ena.h:474
uint32_t len
Length.
Definition: ena.h:363
uint8_t pad[64]
Padding.
Definition: ena.h:488
struct ena_acq_header header
Header.
Definition: ena.h:290
uint16_t id
Completion queue identifier.
Definition: ena.h:661
unsigned char uint8_t
Definition: stdint.h:10
uint8_t reserved_b[2]
Reserved.
Definition: ena.h:417
struct ena_host_attributes host
Host attributes.
Definition: ena.h:212
uint8_t actual
Actual number of entries.
Definition: ena.h:667
Destroy submission queue request.
Definition: ena.h:276
struct ena_create_cq_rsp create_cq
Create completion queue.
Definition: ena.h:480
#define ETH_ALEN
Definition: if_ether.h:8
uint16_t queue
Queue ID.
Definition: ena.h:419
ena_sq_direction
Submission queue direction.
Definition: ena.h:216
uint32_t node
NUMA node register offset.
Definition: ena.h:329
unsigned int uint32_t
Definition: stdint.h:12
uint8_t requested
Requested number of entries.
Definition: ena.h:665
struct ena_acq acq
Admin completion queue.
Definition: ena.h:704
uint32_t version
Driver version.
Definition: ena.h:159
struct ena_create_sq_rsp create_sq
Create submission queue.
Definition: ena.h:476
uint8_t reserved_b[3]
Reserved.
Definition: ena.h:518
uint16_t id
Submission queue identifier.
Definition: ena.h:280
struct io_buffer * rx_iobuf[ENA_RX_COUNT]
Receive I/O buffers, indexed by buffer ID.
Definition: ena.h:716
uint8_t reserved_a
Reserved.
Definition: ena.h:530
uint8_t reserved_b[8]
Reserved.
Definition: ena.h:581
Use host memory.
Definition: ena.h:251
uint8_t reserved
Reserved.
Definition: ena.h:79
Memory is contiguous.
Definition: ena.h:253
uint8_t intr
Interrupts enabled.
Definition: ena.h:301
uint64_t address
Address.
Definition: ena.h:392
uint8_t max
Maximum fill level.
Definition: ena.h:615
struct ena_acq_header header
Header.
Definition: ena.h:323
A named feature.
Definition: features.h:78
struct ena_get_feature_req get_feature
Get feature.
Definition: ena.h:462
Get statistics response.
Definition: ena.h:434
struct ena_host_info * info
Host info.
Definition: ena.h:700
struct ena_sq sq
Submission queue.
Definition: ena.h:690
uint64_t rx_bytes
Receive byte count.
Definition: ena.h:442
uint32_t version
Device version.
Definition: ena.h:116
uint16_t len
Length.
Definition: ena.h:577
uint16_t id
Request identifier.
Definition: ena.h:579
Receive submission queue entry.
Definition: ena.h:526
uint8_t pad[64]
Padding.
Definition: ena.h:468
uint8_t flags
Flags.
Definition: ena.h:98
uint64_t address
Address.
Definition: ena.h:522
Receive completion queue entry.
Definition: ena.h:571
uint8_t direction
Direction.
Definition: ena.h:282
Admin completion queue response.
Definition: ena.h:472
uint8_t flags
Flags.
Definition: ena.h:394
uint16_t count
Number of entries.
Definition: ena.h:22
uint32_t physical
Physical address width.
Definition: ena.h:122
uint8_t opcode
Opcode.
Definition: ena.h:81
union ena_acq_rsp * rsp
Responses.
Definition: ena.h:502
uint64_t tx_bytes
Transmit byte count.
Definition: ena.h:438
uint16_t id
Submission queue identifier.
Definition: ena.h:261
uint8_t flags
Flags.
Definition: ena.h:532
struct ena_acq_header header
Header.
Definition: ena.h:436
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
uint16_t len
Length.
Definition: ena.h:512
char dist_str[128]
Operating system distribution (string)
Definition: ena.h:151
uint16_t id
Submission queue identifier.
Definition: ena.h:609
uint8_t scope
Scope.
Definition: ena.h:415
char kernel_str[32]
Kernel version (string)
Definition: ena.h:155
struct ena_destroy_sq_req destroy_sq
Destroy submission queue.
Definition: ena.h:456
struct ena_rx_sqe * rx
Receive submission queue entries.
Definition: ena.h:594
uint8_t fill
Fill level (limited to completion queue size)
Definition: ena.h:617
Get feature request.
Definition: ena.h:359
Device attributes.
Definition: ena.h:112
An ENA network card.
Definition: ena.h:696
uint32_t kernel
Kernel version (numeric)
Definition: ena.h:157
uint8_t reserved[2]
Reserved.
Definition: ena.h:371
Admin queue request.
Definition: ena.h:450
Admin queue entry header.
Definition: ena.h:75
uint8_t id
Request identifier.
Definition: ena.h:77
uint8_t status
Status.
Definition: ena.h:558
struct ena_aq_header header
Header.
Definition: ena.h:452
struct ena_aq_header header
Header.
Definition: ena.h:409
unsigned int prod
Producer counter.
Definition: ena.h:496
struct io_buffer * tx_iobuf[ENA_TX_COUNT]
Transmit I/O buffers, indexed by buffer ID.
Definition: ena.h:712
uint64_t rx_packets
Receive packet count.
Definition: ena.h:444
Admin completion queue entry header.
Definition: ena.h:90
union ena_feature __attribute__
Admin completion queue.
Definition: ena.h:500
Receive.
Definition: ena.h:220
Set feature request.
Definition: ena.h:386
struct ena_destroy_cq_rsp destroy_cq
Destroy completion queue.
Definition: ena.h:482
uint8_t direction
Direction.
Definition: ena.h:611
void * raw
Raw data.
Definition: ena.h:596
struct ena_create_sq_req create_sq
Create submission queue.
Definition: ena.h:454
Get statistics request.
Definition: ena.h:407
unsigned int phase
Phase.
Definition: ena.h:506
uint16_t device
Device ID.
Definition: ena.h:421
uint16_t cons
Consumer index.
Definition: ena.h:102
uint32_t implementation
Implementation.
Definition: ena.h:114
uint8_t id
Request identifier.
Definition: ena.h:92
A persistent I/O buffer.
Definition: iobuf.h:33
uint32_t type
Operating system type.
Definition: ena.h:149