iPXE
ena.h
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1 #ifndef _ENA_H
2 #define _ENA_H
3 
4 /** @file
5  *
6  * Amazon ENA network driver
7  *
8  */
9 
10 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
11 
12 #include <stdint.h>
13 #include <ipxe/if_ether.h>
14 
15 /** BAR size */
16 #define ENA_BAR_SIZE 16384
17 
18 /** Queue alignment */
19 #define ENA_ALIGN 4096
20 
21 /** Number of admin queue entries */
22 #define ENA_AQ_COUNT 2
23 
24 /** Number of admin completion queue entries */
25 #define ENA_ACQ_COUNT 2
26 
27 /** Number of async event notification queue entries */
28 #define ENA_AENQ_COUNT 2
29 
30 /** Number of transmit queue entries */
31 #define ENA_TX_COUNT 16
32 
33 /** Number of receive queue entries */
34 #define ENA_RX_COUNT 128
35 
36 /** Receive queue maximum fill level */
37 #define ENA_RX_FILL 16
38 
39 /** Base address low register offset */
40 #define ENA_BASE_LO 0x0
41 
42 /** Base address high register offset */
43 #define ENA_BASE_HI 0x4
44 
45 /** Capability register value */
46 #define ENA_CAPS( count, size ) ( ( (size) << 16 ) | ( (count) << 0 ) )
47 
48 /** Admin queue base address register */
49 #define ENA_AQ_BASE 0x10
50 
51 /** Admin queue capabilities register */
52 #define ENA_AQ_CAPS 0x18
53 
54 /** Admin completion queue base address register */
55 #define ENA_ACQ_BASE 0x20
56 
57 /** Admin completion queue capabilities register */
58 #define ENA_ACQ_CAPS 0x28
59 
60 /** Admin queue doorbell register */
61 #define ENA_AQ_DB 0x2c
62 
63 /** Maximum time to wait for admin requests */
64 #define ENA_ADMIN_MAX_WAIT_MS 5000
65 
66 /** Async event notification queue capabilities register */
67 #define ENA_AENQ_CAPS 0x34
68 
69 /** Async event notification queue base address register */
70 #define ENA_AENQ_BASE 0x38
71 
72 /** Device control register */
73 #define ENA_CTRL 0x54
74 #define ENA_CTRL_RESET 0x00000001UL /**< Reset */
75 
76 /** Maximum time to wait for reset */
77 #define ENA_RESET_MAX_WAIT_MS 1000
78 
79 /** Device status register */
80 #define ENA_STAT 0x58
81 #define ENA_STAT_RESET 0x00000008UL /**< Reset in progress */
82 
83 /** Admin queue entry header */
84 struct ena_aq_header {
85  /** Request identifier */
87  /** Reserved */
89  /** Opcode */
91  /** Flags */
93 } __attribute__ (( packed ));
94 
95 /** Admin queue ownership phase flag */
96 #define ENA_AQ_PHASE 0x01
97 
98 /** Admin completion queue entry header */
100  /** Request identifier */
102  /** Reserved */
104  /** Status */
106  /** Flags */
108  /** Extended status */
110  /** Consumer index */
112 } __attribute__ (( packed ));
113 
114 /** Admin completion queue ownership phase flag */
115 #define ENA_ACQ_PHASE 0x01
116 
117 /** Device attributes */
118 #define ENA_DEVICE_ATTRIBUTES 1
119 
120 /** Device attributes */
122  /** Implementation */
124  /** Device version */
126  /** Supported features */
128  /** Reserved */
130  /** Physical address width */
132  /** Virtual address width */
133  uint32_t virtual;
134  /** MAC address */
136  /** Reserved */
138  /** Maximum MTU */
140 } __attribute__ (( packed ));
141 
142 /** Async event notification queue config */
143 #define ENA_AENQ_CONFIG 26
144 
145 /** Async event notification queue config */
147  /** Bitmask of supported AENQ groups (device -> host) */
149  /** Bitmask of enabled AENQ groups (host -> device) */
151 } __attribute__ (( packed ));
152 
153 /** Host attributes */
154 #define ENA_HOST_ATTRIBUTES 28
155 
156 /** Host attributes */
158  /** Host info base address */
160  /** Debug area base address */
162  /** Debug area size */
164 } __attribute__ (( packed ));
165 
166 /** Host information */
168  /** Operating system type */
170  /** Operating system distribution (string) */
171  char dist_str[128];
172  /** Operating system distribution (numeric) */
174  /** Kernel version (string) */
175  char kernel_str[32];
176  /** Kernel version (numeric) */
178  /** Driver version */
180  /** Linux network device features */
182  /** ENA specification version */
184  /** PCI bus:dev.fn address */
186  /** Number of CPUs */
188  /** Reserved */
190  /** Supported features */
192 } __attribute__ (( packed ));
193 
194 /** Linux operating system type
195  *
196  * There is a defined "iPXE" operating system type (with value 5).
197  * However, some very broken versions of the ENA firmware will refuse
198  * to allow a completion queue to be created if the "iPXE" type is
199  * used.
200  */
201 #define ENA_HOST_INFO_TYPE_LINUX 1
202 
203 /** Driver version
204  *
205  * The driver version field is nominally used to report a version
206  * number outside of the VM for consumption by humans (and potentially
207  * by automated monitoring tools that could e.g. check for outdated
208  * versions with known security flaws).
209  *
210  * However, at some point in the development of the ENA firmware, some
211  * unknown person at AWS thought it would be sensible to apply a
212  * machine interpretation to this field and adjust the behaviour of
213  * the firmware based on its value, thereby creating a maintenance and
214  * debugging nightmare for all existing and future drivers.
215  *
216  * Hint to engineers: if you ever find yourself writing code of the
217  * form "if (version == SOME_MAGIC_NUMBER)" then something has gone
218  * very, very wrong. This *always* indicates that something is
219  * broken, either in your own code or in the code with which you are
220  * forced to interact.
221  */
222 #define ENA_HOST_INFO_VERSION_WTF 0x00000002UL
223 
224 /** ENA specification version */
225 #define ENA_HOST_INFO_SPEC_2_0 0x0200
226 
227 /** Feature */
228 union ena_feature {
229  /** Device attributes */
231  /** Async event notification queue config */
233  /** Host attributes */
235 };
236 
237 /** Submission queue direction */
239  /** Transmit */
240  ENA_SQ_TX = 0x20,
241  /** Receive */
242  ENA_SQ_RX = 0x40,
243 };
244 
245 /** Create submission queue */
246 #define ENA_CREATE_SQ 1
247 
248 /** Create submission queue request */
250  /** Header */
252  /** Direction */
254  /** Reserved */
256  /** Policy */
258  /** Completion queue identifier */
260  /** Number of entries */
262  /** Base address */
264  /** Writeback address */
266  /** Reserved */
268 } __attribute__ (( packed ));
269 
270 /** Submission queue policy */
272  /** Use host memory */
274  /** Memory is contiguous */
276 };
277 
278 /** Create submission queue response */
280  /** Header */
282  /** Submission queue identifier */
284  /** Reserved */
286  /** Doorbell register offset */
288  /** LLQ descriptor ring offset */
290  /** LLQ header offset */
292 } __attribute__ (( packed ));
293 
294 /** Destroy submission queue */
295 #define ENA_DESTROY_SQ 2
296 
297 /** Destroy submission queue request */
299  /** Header */
301  /** Submission queue identifier */
303  /** Direction */
305  /** Reserved */
307 } __attribute__ (( packed ));
308 
309 /** Destroy submission queue response */
311  /** Header */
313 } __attribute__ (( packed ));
314 
315 /** Create completion queue */
316 #define ENA_CREATE_CQ 3
317 
318 /** Create completion queue request */
320  /** Header */
322  /** Interrupts enabled */
324  /** Entry size (in 32-bit words) */
326  /** Number of entries */
328  /** MSI-X vector */
330  /** Base address */
332 } __attribute__ (( packed ));
333 
334 /** Empty MSI-X vector
335  *
336  * Some versions of the ENA firmware will complain if the completion
337  * queue's MSI-X vector field is left empty, even though the queue
338  * configuration specifies that interrupts are not used.
339  */
340 #define ENA_MSIX_NONE 0xffffffffUL
341 
342 /** Create completion queue response */
344  /** Header */
346  /** Completion queue identifier */
348  /** Actual number of entries */
350  /** NUMA node register offset */
352  /** Doorbell register offset */
354  /** Interrupt unmask register offset */
356 } __attribute__ (( packed ));
357 
358 /** Destroy completion queue */
359 #define ENA_DESTROY_CQ 4
360 
361 /** Destroy completion queue request */
363  /** Header */
365  /** Completion queue identifier */
367  /** Reserved */
369 } __attribute__ (( packed ));
370 
371 /** Destroy completion queue response */
373  /** Header */
375 } __attribute__ (( packed ));
376 
377 /** Get feature */
378 #define ENA_GET_FEATURE 8
379 
380 /** Get feature request */
382  /** Header */
384  /** Length */
386  /** Address */
388  /** Flags */
390  /** Feature identifier */
392  /** Reserved */
394 } __attribute__ (( packed ));
395 
396 /** Get feature response */
398  /** Header */
400  /** Feature */
402 } __attribute__ (( packed ));
403 
404 /** Set feature */
405 #define ENA_SET_FEATURE 9
406 
407 /** Set feature request */
409  /** Header */
411  /** Length */
413  /** Address */
415  /** Flags */
417  /** Feature identifier */
419  /** Reserved */
421  /** Feature */
423 } __attribute__ (( packed ));
424 
425 /** Get statistics */
426 #define ENA_GET_STATS 11
427 
428 /** Get statistics request */
430  /** Header */
432  /** Reserved */
434  /** Type */
436  /** Scope */
438  /** Reserved */
440  /** Queue ID */
442  /** Device ID */
444 } __attribute__ (( packed ));
445 
446 /** Basic statistics */
447 #define ENA_STATS_TYPE_BASIC 0
448 
449 /** Ethernet statistics */
450 #define ENA_STATS_SCOPE_ETH 1
451 
452 /** My device */
453 #define ENA_DEVICE_MINE 0xffff
454 
455 /** Get statistics response */
457  /** Header */
459  /** Transmit byte count */
461  /** Transmit packet count */
463  /** Receive byte count */
465  /** Receive packet count */
467  /** Receive drop count */
469 } __attribute__ (( packed ));
470 
471 /** Admin queue request */
472 union ena_aq_req {
473  /** Header */
475  /** Create submission queue */
477  /** Destroy submission queue */
479  /** Create completion queue */
481  /** Destroy completion queue */
483  /** Get feature */
485  /** Set feature */
487  /** Get statistics */
489  /** Padding */
491 };
492 
493 /** Admin completion queue response */
494 union ena_acq_rsp {
495  /** Header */
497  /** Create submission queue */
499  /** Destroy submission queue */
501  /** Create completion queue */
503  /** Destroy completion queue */
505  /** Get feature */
507  /** Get statistics */
509  /** Padding */
511 };
512 
513 /** Admin queue */
514 struct ena_aq {
515  /** Requests */
516  union ena_aq_req *req;
517  /** Producer counter */
518  unsigned int prod;
519 };
520 
521 /** Admin completion queue */
522 struct ena_acq {
523  /** Responses */
524  union ena_acq_rsp *rsp;
525  /** Consumer counter */
526  unsigned int cons;
527  /** Phase */
528  unsigned int phase;
529 };
530 
531 /** Async event notification queue event */
533  /** Type of event */
535  /** ID of event */
537  /** Phase */
539  /** Reserved */
541  /** Timestamp */
543  /** Additional event data */
545 } __attribute__ (( packed ));
546 
547 /** Async event notification queue */
548 struct ena_aenq {
549  /** Events */
551 };
552 
553 /** Transmit submission queue entry */
554 struct ena_tx_sqe {
555  /** Length */
557  /** Reserved */
559  /** Flags */
561  /** Reserved */
563  /** Request identifier */
565  /** Address */
567 } __attribute__ (( packed ));
568 
569 /** Receive submission queue entry */
570 struct ena_rx_sqe {
571  /** Length */
573  /** Reserved */
575  /** Flags */
577  /** Request identifier */
579  /** Reserved */
581  /** Address */
583 } __attribute__ (( packed ));
584 
585 /** Submission queue ownership phase flag */
586 #define ENA_SQE_PHASE 0x01
587 
588 /** This is the first descriptor */
589 #define ENA_SQE_FIRST 0x04
590 
591 /** This is the last descriptor */
592 #define ENA_SQE_LAST 0x08
593 
594 /** Request completion */
595 #define ENA_SQE_CPL 0x10
596 
597 /** Transmit completion queue entry */
598 struct ena_tx_cqe {
599  /** Request identifier */
601  /** Status */
603  /** Flags */
605  /** Reserved */
607  /** Consumer index */
609 } __attribute__ (( packed ));
610 
611 /** Transmit completion request identifier */
612 #define ENA_TX_CQE_ID(id) ( (id) >> 2 )
613 
614 /** Receive completion queue entry */
615 struct ena_rx_cqe {
616  /** Reserved */
618  /** Flags */
620  /** Length */
622  /** Request identifier */
624  /** Reserved */
626 } __attribute__ (( packed ));
627 
628 /** Completion queue ownership phase flag */
629 #define ENA_CQE_PHASE 0x01
630 
631 /** Submission queue */
632 struct ena_sq {
633  /** Entries */
634  union {
635  /** Transmit submission queue entries */
636  struct ena_tx_sqe *tx;
637  /** Receive submission queue entries */
638  struct ena_rx_sqe *rx;
639  /** Raw data */
640  void *raw;
641  } sqe;
642  /** Buffer IDs */
644  /** Doorbell register offset */
645  unsigned int doorbell;
646  /** Total length of entries */
647  size_t len;
648  /** Producer counter */
649  unsigned int prod;
650  /** Phase */
651  unsigned int phase;
652  /** Submission queue identifier */
654  /** Direction */
656  /** Number of entries */
658  /** Maximum fill level */
660  /** Fill level (limited to completion queue size) */
662 };
663 
664 /**
665  * Initialise submission queue
666  *
667  * @v sq Submission queue
668  * @v direction Direction
669  * @v count Number of entries
670  * @v max Maximum fill level
671  * @v size Size of each entry
672  * @v ids Buffer IDs
673  */
674 static inline __attribute__ (( always_inline )) void
675 ena_sq_init ( struct ena_sq *sq, unsigned int direction, unsigned int count,
676  unsigned int max, size_t size, uint8_t *ids ) {
677 
678  sq->len = ( count * size );
679  sq->direction = direction;
680  sq->count = count;
681  sq->max = max;
682  sq->ids = ids;
683 }
684 
685 /** Completion queue */
686 struct ena_cq {
687  /** Entries */
688  union {
689  /** Transmit completion queue entries */
690  struct ena_tx_cqe *tx;
691  /** Receive completion queue entries */
692  struct ena_rx_cqe *rx;
693  /** Raw data */
694  void *raw;
695  } cqe;
696  /** Doorbell register offset */
697  unsigned int doorbell;
698  /** Total length of entries */
699  size_t len;
700  /** Consumer counter */
701  unsigned int cons;
702  /** Phase */
703  unsigned int phase;
704  /** Completion queue identifier */
706  /** Entry size (in 32-bit words) */
708  /** Requested number of entries */
710  /** Actual number of entries */
712  /** Actual number of entries minus one */
714 };
715 
716 /**
717  * Initialise completion queue
718  *
719  * @v cq Completion queue
720  * @v count Number of entries
721  * @v size Size of each entry
722  */
723 static inline __attribute__ (( always_inline )) void
724 ena_cq_init ( struct ena_cq *cq, unsigned int count, size_t size ) {
725 
726  cq->len = ( count * size );
727  cq->size = ( size / sizeof ( uint32_t ) );
729 }
730 
731 /** Queue pair */
732 struct ena_qp {
733  /** Submission queue */
734  struct ena_sq sq;
735  /** Completion queue */
736  struct ena_cq cq;
737 };
738 
739 /** An ENA network card */
740 struct ena_nic {
741  /** Registers */
742  void *regs;
743  /** Host info */
745  /** Admin queue */
746  struct ena_aq aq;
747  /** Admin completion queue */
748  struct ena_acq acq;
749  /** Async event notification queue */
750  struct ena_aenq aenq;
751  /** Transmit queue */
752  struct ena_qp tx;
753  /** Receive queue */
754  struct ena_qp rx;
755  /** Transmit buffer IDs */
757  /** Transmit I/O buffers, indexed by buffer ID */
759  /** Receive buffer IDs */
761  /** Receive I/O buffers, indexed by buffer ID */
763 };
764 
765 #endif /* _ENA_H */
uint8_t reserved_b[2]
Reserved.
Definition: ena.h:580
Destroy completion queue response.
Definition: ena.h:372
uint8_t reserved_a[12]
Reserved.
Definition: ena.h:433
struct ena_aq aq
Admin queue.
Definition: ena.h:746
Queue pair.
Definition: ena.h:732
uint16_t id
Completion queue identifier.
Definition: ena.h:347
uint32_t intr
Interrupt unmask register offset.
Definition: ena.h:355
struct ena_tx_sqe * tx
Transmit submission queue entries.
Definition: ena.h:636
uint8_t reserved[3]
Reserved.
Definition: ena.h:540
struct ena_qp rx
Receive queue.
Definition: ena.h:754
uint8_t type
Type.
Definition: ena.h:435
struct ena_acq_header header
Header.
Definition: ena.h:281
unsigned short uint16_t
Definition: stdint.h:11
void * raw
Raw data.
Definition: ena.h:694
struct ena_aq_header header
Header.
Definition: ena.h:321
uint64_t address
Address.
Definition: ena.h:387
Host information.
Definition: ena.h:167
uint8_t reserved[2]
Reserved.
Definition: ena.h:368
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:135
#define ENA_RX_COUNT
Number of receive queue entries.
Definition: ena.h:34
uint64_t info
Host info base address.
Definition: ena.h:159
uint8_t reserved_a
Reserved.
Definition: ena.h:558
uint8_t rx_ids[ENA_RX_COUNT]
Receive buffer IDs.
Definition: ena.h:760
Create completion queue request.
Definition: ena.h:319
uint8_t mask
Actual number of entries minus one.
Definition: ena.h:713
uint8_t reserved_a
Reserved.
Definition: ena.h:255
uint8_t reserved_b[8]
Reserved.
Definition: ena.h:267
size_t len
Total length of entries.
Definition: ena.h:647
static unsigned int unsigned int unsigned int size_t uint8_t * ids
Definition: ena.h:676
unsigned int doorbell
Doorbell register offset.
Definition: ena.h:645
uint8_t count
Number of entries.
Definition: ena.h:657
struct ena_aq_header header
Header.
Definition: ena.h:383
uint8_t flags
Flags.
Definition: ena.h:389
uint8_t * ids
Buffer IDs.
Definition: ena.h:643
unsigned int prod
Producer counter.
Definition: ena.h:649
uint16_t id
Completion queue identifier.
Definition: ena.h:366
uint8_t reserved[2]
Reserved.
Definition: ena.h:420
uint64_t linux_features
Linux network device features.
Definition: ena.h:181
struct ena_tx_cqe * tx
Transmit completion queue entries.
Definition: ena.h:690
Create submission queue response.
Definition: ena.h:279
uint32_t doorbell
Doorbell register offset.
Definition: ena.h:287
uint8_t reserved_a[3]
Reserved.
Definition: ena.h:617
struct ena_get_stats_rsp get_stats
Get statistics.
Definition: ena.h:508
Transmit submission queue entry.
Definition: ena.h:554
struct ena_qp tx
Transmit queue.
Definition: ena.h:752
uint8_t reserved[2]
Reserved.
Definition: ena.h:606
struct ena_set_feature_req set_feature
Set feature.
Definition: ena.h:486
uint16_t count
Number of entries.
Definition: ena.h:261
union ena_sq::@39 sqe
Entries.
struct ena_aenq aenq
Async event notification queue.
Definition: ena.h:750
Transmit completion queue entry.
Definition: ena.h:598
Get feature response.
Definition: ena.h:397
unsigned long long uint64_t
Definition: stdint.h:13
uint8_t id
Request identifier.
Definition: ena.h:564
Admin queue.
Definition: ena.h:514
union ena_cq::@40 cqe
Entries.
uint32_t features
Supported features.
Definition: ena.h:127
uint16_t count
Number of entries.
Definition: ena.h:327
uint32_t mtu
Maximum MTU.
Definition: ena.h:139
uint8_t direction
Direction.
Definition: ena.h:14
struct ena_acq_header header
Header.
Definition: ena.h:399
static unsigned int unsigned int unsigned int max
Definition: ena.h:675
uint64_t rx_drops
Receive drop count.
Definition: ena.h:468
uint16_t len
Length.
Definition: ena.h:572
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:707
Destroy completion queue request.
Definition: ena.h:362
uint32_t llq_desc
LLQ descriptor ring offset.
Definition: ena.h:289
uint8_t reserved_a[4]
Reserved.
Definition: ena.h:129
uint32_t doorbell
Doorbell register offset.
Definition: ena.h:353
uint32_t features
Supported features.
Definition: ena.h:191
unsigned int phase
Phase.
Definition: ena.h:703
uint16_t spec
ENA specification version.
Definition: ena.h:183
uint64_t address
Address.
Definition: ena.h:582
struct ena_aq_header header
Header.
Definition: ena.h:364
struct ena_aq_header header
Header.
Definition: ena.h:251
#define ENA_TX_COUNT
Number of transmit queue entries.
Definition: ena.h:31
uint64_t address
Base address.
Definition: ena.h:331
unsigned int doorbell
Doorbell register offset.
Definition: ena.h:697
struct ena_aq_header header
Header.
Definition: ena.h:410
void * regs
Registers.
Definition: ena.h:742
uint32_t dist
Operating system distribution (numeric)
Definition: ena.h:173
uint8_t tx_ids[ENA_TX_COUNT]
Transmit buffer IDs.
Definition: ena.h:756
uint32_t debug_len
Debug area size.
Definition: ena.h:163
uint32_t llq_data
LLQ header offset.
Definition: ena.h:291
Completion queue.
Definition: ena.h:686
uint32_t enabled
Bitmask of enabled AENQ groups (host -> device)
Definition: ena.h:150
Submission queue.
Definition: ena.h:632
struct ena_destroy_sq_rsp destroy_sq
Destroy submission queue.
Definition: ena.h:500
Feature.
Definition: ena.h:228
uint8_t status
Status.
Definition: ena.h:105
uint8_t reserved[2]
Reserved.
Definition: ena.h:285
size_t len
Total length of entries.
Definition: ena.h:699
struct ena_get_feature_rsp get_feature
Get feature.
Definition: ena.h:506
uint16_t id
Request identifier.
Definition: ena.h:600
uint16_t group
Type of event.
Definition: ena.h:534
struct ena_acq_header header
Header.
Definition: ena.h:374
A hardware device.
Definition: device.h:73
uint64_t writeback
Writeback address.
Definition: ena.h:265
uint8_t reserved
Reserved.
Definition: ena.h:306
uint8_t reserved_a[2]
Reserved.
Definition: ena.h:189
uint64_t tx_packets
Transmit packet count.
Definition: ena.h:462
uint16_t id
Request identifier.
Definition: ena.h:578
uint8_t id
Feature identifier.
Definition: ena.h:391
uint16_t cpus
Number of CPUs.
Definition: ena.h:187
uint32_t len
Length.
Definition: ena.h:412
uint16_t cons
Consumer index.
Definition: ena.h:608
Host attributes.
Definition: ena.h:157
uint8_t reserved_b[2]
Reserved.
Definition: ena.h:137
union ena_aq_req * req
Requests.
Definition: ena.h:516
Transmit.
Definition: ena.h:240
uint64_t address
Base address.
Definition: ena.h:263
uint16_t cq_id
Completion queue identifier.
Definition: ena.h:259
uint8_t reserved
Reserved.
Definition: ena.h:103
ena_sq_policy
Submission queue policy.
Definition: ena.h:271
unsigned int cons
Consumer counter.
Definition: ena.h:526
uint8_t flags
Flags.
Definition: ena.h:604
unsigned int cons
Consumer counter.
Definition: ena.h:701
uint16_t policy
Policy.
Definition: ena.h:257
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:325
uint8_t flags
Flags.
Definition: ena.h:92
uint16_t ext
Extended status.
Definition: ena.h:109
uint16_t busdevfn
PCI bus:dev.fn address.
Definition: ena.h:185
struct ena_aenq_event * evt
Events.
Definition: ena.h:550
uint64_t debug
Debug area base address.
Definition: ena.h:161
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
uint8_t id
Feature identifier.
Definition: ena.h:418
unsigned int phase
Phase.
Definition: ena.h:651
struct ena_get_stats_req get_stats
Get statistics.
Definition: ena.h:488
uint32_t supported
Bitmask of supported AENQ groups (device -> host)
Definition: ena.h:148
uint16_t count
Actual number of entries.
Definition: ena.h:349
struct ena_create_cq_req create_cq
Create completion queue.
Definition: ena.h:480
struct ena_destroy_cq_req destroy_cq
Destroy completion queue.
Definition: ena.h:482
Create completion queue response.
Definition: ena.h:343
uint8_t direction
Direction.
Definition: ena.h:253
Create submission queue request.
Definition: ena.h:249
struct ena_rx_cqe * rx
Receive completion queue entries.
Definition: ena.h:692
struct ena_cq cq
Completion queue.
Definition: ena.h:736
uint8_t flags
Flags.
Definition: ena.h:619
uint32_t vector
MSI-X vector.
Definition: ena.h:329
struct ena_aq_header header
Header.
Definition: ena.h:300
uint8_t flags
Flags.
Definition: ena.h:560
Destroy submission queue response.
Definition: ena.h:310
struct ena_acq_header header
Header.
Definition: ena.h:496
uint32_t len
Length.
Definition: ena.h:385
uint8_t pad[64]
Padding.
Definition: ena.h:510
struct ena_acq_header header
Header.
Definition: ena.h:312
uint16_t id
Completion queue identifier.
Definition: ena.h:705
unsigned char uint8_t
Definition: stdint.h:10
uint8_t reserved_b[2]
Reserved.
Definition: ena.h:439
struct ena_host_attributes host
Host attributes.
Definition: ena.h:234
uint8_t actual
Actual number of entries.
Definition: ena.h:711
Destroy submission queue request.
Definition: ena.h:298
struct ena_create_cq_rsp create_cq
Create completion queue.
Definition: ena.h:502
#define ETH_ALEN
Definition: if_ether.h:8
uint16_t queue
Queue ID.
Definition: ena.h:441
ena_sq_direction
Submission queue direction.
Definition: ena.h:238
uint32_t node
NUMA node register offset.
Definition: ena.h:351
unsigned int uint32_t
Definition: stdint.h:12
uint8_t requested
Requested number of entries.
Definition: ena.h:709
struct ena_acq acq
Admin completion queue.
Definition: ena.h:748
Async event notification queue config.
Definition: ena.h:146
uint32_t version
Driver version.
Definition: ena.h:179
struct ena_create_sq_rsp create_sq
Create submission queue.
Definition: ena.h:498
uint8_t reserved_b[3]
Reserved.
Definition: ena.h:562
uint16_t id
Submission queue identifier.
Definition: ena.h:302
struct io_buffer * rx_iobuf[ENA_RX_COUNT]
Receive I/O buffers, indexed by buffer ID.
Definition: ena.h:762
uint8_t reserved_a
Reserved.
Definition: ena.h:574
Async event notification queue event.
Definition: ena.h:532
uint8_t reserved_b[8]
Reserved.
Definition: ena.h:625
Use host memory.
Definition: ena.h:273
uint8_t reserved
Reserved.
Definition: ena.h:88
Memory is contiguous.
Definition: ena.h:275
uint8_t intr
Interrupts enabled.
Definition: ena.h:323
uint64_t address
Address.
Definition: ena.h:414
uint8_t max
Maximum fill level.
Definition: ena.h:659
struct ena_acq_header header
Header.
Definition: ena.h:345
uint16_t syndrome
ID of event.
Definition: ena.h:536
A named feature.
Definition: features.h:78
struct ena_get_feature_req get_feature
Get feature.
Definition: ena.h:484
Get statistics response.
Definition: ena.h:456
struct ena_host_info * info
Host info.
Definition: ena.h:744
struct ena_sq sq
Submission queue.
Definition: ena.h:734
uint64_t rx_bytes
Receive byte count.
Definition: ena.h:464
uint32_t version
Device version.
Definition: ena.h:125
uint16_t len
Length.
Definition: ena.h:621
uint16_t id
Request identifier.
Definition: ena.h:623
Receive submission queue entry.
Definition: ena.h:570
uint8_t pad[64]
Padding.
Definition: ena.h:490
uint8_t flags
Flags.
Definition: ena.h:107
uint64_t address
Address.
Definition: ena.h:566
Receive completion queue entry.
Definition: ena.h:615
uint8_t direction
Direction.
Definition: ena.h:304
Admin completion queue response.
Definition: ena.h:494
uint8_t flags
Flags.
Definition: ena.h:416
uint16_t count
Number of entries.
Definition: ena.h:22
uint32_t physical
Physical address width.
Definition: ena.h:131
uint8_t opcode
Opcode.
Definition: ena.h:90
Async event notification queue.
Definition: ena.h:548
union ena_acq_rsp * rsp
Responses.
Definition: ena.h:524
uint64_t tx_bytes
Transmit byte count.
Definition: ena.h:460
uint16_t id
Submission queue identifier.
Definition: ena.h:283
uint8_t flags
Flags.
Definition: ena.h:576
struct ena_acq_header header
Header.
Definition: ena.h:458
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
uint16_t len
Length.
Definition: ena.h:556
char dist_str[128]
Operating system distribution (string)
Definition: ena.h:171
uint64_t timestamp
Timestamp.
Definition: ena.h:542
uint16_t id
Submission queue identifier.
Definition: ena.h:653
uint8_t scope
Scope.
Definition: ena.h:437
char kernel_str[32]
Kernel version (string)
Definition: ena.h:175
struct ena_destroy_sq_req destroy_sq
Destroy submission queue.
Definition: ena.h:478
struct ena_rx_sqe * rx
Receive submission queue entries.
Definition: ena.h:638
uint8_t fill
Fill level (limited to completion queue size)
Definition: ena.h:661
Get feature request.
Definition: ena.h:381
uint8_t flags
Phase.
Definition: ena.h:538
Device attributes.
Definition: ena.h:121
An ENA network card.
Definition: ena.h:740
uint32_t kernel
Kernel version (numeric)
Definition: ena.h:177
uint8_t reserved[2]
Reserved.
Definition: ena.h:393
Admin queue request.
Definition: ena.h:472
Admin queue entry header.
Definition: ena.h:84
uint8_t id
Request identifier.
Definition: ena.h:86
uint8_t status
Status.
Definition: ena.h:602
struct ena_aq_header header
Header.
Definition: ena.h:474
struct ena_aq_header header
Header.
Definition: ena.h:431
unsigned int prod
Producer counter.
Definition: ena.h:518
struct io_buffer * tx_iobuf[ENA_TX_COUNT]
Transmit I/O buffers, indexed by buffer ID.
Definition: ena.h:758
uint64_t rx_packets
Receive packet count.
Definition: ena.h:466
Admin completion queue entry header.
Definition: ena.h:99
struct ena_aenq_config aenq
Async event notification queue config.
Definition: ena.h:232
union ena_feature __attribute__
Admin completion queue.
Definition: ena.h:522
Receive.
Definition: ena.h:242
Set feature request.
Definition: ena.h:408
struct ena_destroy_cq_rsp destroy_cq
Destroy completion queue.
Definition: ena.h:504
uint8_t direction
Direction.
Definition: ena.h:655
void * raw
Raw data.
Definition: ena.h:640
struct ena_create_sq_req create_sq
Create submission queue.
Definition: ena.h:476
Get statistics request.
Definition: ena.h:429
unsigned int phase
Phase.
Definition: ena.h:528
uint16_t device
Device ID.
Definition: ena.h:443
uint16_t cons
Consumer index.
Definition: ena.h:111
uint32_t implementation
Implementation.
Definition: ena.h:123
uint8_t data[48]
Additional event data.
Definition: ena.h:544
uint8_t id
Request identifier.
Definition: ena.h:101
A persistent I/O buffer.
Definition: iobuf.h:33
uint32_t type
Operating system type.
Definition: ena.h:169