16550-compatible UART More...

#include <ipxe/uart.h>
#include <bits/ns16550.h>

Data Structures
struct	ns16550_uart
	A 16550-compatible UART. More...

Macros
#define	NS16550_LEN 8
	Length of register region. More...

#define	NS16550_THR 0x00
	Transmitter holding register. More...

#define	NS16550_RBR 0x00
	Receiver buffer register. More...

#define	NS16550_IER 0x01
	Interrupt enable register. More...

#define	NS16550_FCR 0x02
	FIFO control register. More...

#define	NS16550_FCR_FE 0x01
	FIFO enable. More...

#define	NS16550_LCR 0x03
	Line control register. More...

#define	NS16550_LCR_WLS0 0x01
	Word length select bit 0. More...

#define	NS16550_LCR_WLS1 0x02
	Word length select bit 1. More...

#define	NS16550_LCR_STB 0x04
	Number of stop bits. More...

#define	NS16550_LCR_PEN 0x08
	Parity enable. More...

#define	NS16550_LCR_EPS 0x10
	Even parity select. More...

#define	NS16550_LCR_DLAB 0x80
	Divisor latch access bit. More...

#define	NS16550_LCR_WORD_LEN(x) ( ( (x) - 5 ) << 0 )
	Word length. More...

#define	NS16550_LCR_STOP_BITS(x) ( ( (x) - 1 ) << 2 )
	Stop bits. More...

#define	NS16550_LCR_PARITY(x) ( ( (x) - 0 ) << 3 )
	Parity. More...

#define	NS16550_LCR_WPS(word_len, parity, stop_bits)
	Calculate line control register value. More...

#define	NS16550_LCR_8N1 NS16550_LCR_WPS ( 8, 0, 1 )
	Default LCR value: 8 data bits, no parity, one stop bit. More...

#define	NS16550_MCR 0x04
	Modem control register. More...

#define	NS16550_MCR_DTR 0x01
	Data terminal ready. More...

#define	NS16550_MCR_RTS 0x02
	Request to send. More...

#define	NS16550_LSR 0x05
	Line status register. More...

#define	NS16550_LSR_DR 0x01
	Data ready. More...

#define	NS16550_LSR_THRE 0x20
	Transmitter holding reg. More...

#define	NS16550_LSR_TEMT 0x40
	Transmitter empty. More...

#define	NS16550_SCR 0x07
	Scratch register. More...

#define	NS16550_DLL 0x00
	Divisor latch (least significant byte) More...

#define	NS16550_DLM 0x01
	Divisor latch (most significant byte) More...

#define	NS16550_CLK_BIT 16
	Post-division clock cycles per data bit. More...

#define	NS16550_CLK_DEFAULT 1843200
	Default input clock rate (1.8432 MHz) More...

Functions
	FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)

void	ns16550_write (struct ns16550_uart *ns16550, unsigned int address, uint8_t data)
	Dummy COM1 UART for non-x86 platforms. More...

uint8_t	ns16550_read (struct ns16550_uart *ns16550, unsigned int address)

Variables
struct uart_operations	ns16550_operations
	16550 UART operations More...

Detailed Description

16550-compatible UART

Definition in file ns16550.h.

Macro Definition Documentation

◆ NS16550_LEN

#define NS16550_LEN 8

Length of register region.

Definition at line 15 of file ns16550.h.

◆ NS16550_THR

#define NS16550_THR 0x00

Transmitter holding register.

Definition at line 18 of file ns16550.h.

◆ NS16550_RBR

#define NS16550_RBR 0x00

Receiver buffer register.

Definition at line 21 of file ns16550.h.

◆ NS16550_IER

#define NS16550_IER 0x01

Interrupt enable register.

Definition at line 24 of file ns16550.h.

◆ NS16550_FCR

#define NS16550_FCR 0x02

FIFO control register.

Definition at line 27 of file ns16550.h.

◆ NS16550_FCR_FE

#define NS16550_FCR_FE 0x01

FIFO enable.

Definition at line 28 of file ns16550.h.

◆ NS16550_LCR

#define NS16550_LCR 0x03

Line control register.

Definition at line 31 of file ns16550.h.

◆ NS16550_LCR_WLS0

#define NS16550_LCR_WLS0 0x01

Word length select bit 0.

Definition at line 32 of file ns16550.h.

◆ NS16550_LCR_WLS1

#define NS16550_LCR_WLS1 0x02

Word length select bit 1.

Definition at line 33 of file ns16550.h.

◆ NS16550_LCR_STB

#define NS16550_LCR_STB 0x04

Number of stop bits.

Definition at line 34 of file ns16550.h.

◆ NS16550_LCR_PEN

#define NS16550_LCR_PEN 0x08

Parity enable.

Definition at line 35 of file ns16550.h.

◆ NS16550_LCR_EPS

#define NS16550_LCR_EPS 0x10

Even parity select.

Definition at line 36 of file ns16550.h.

◆ NS16550_LCR_DLAB

#define NS16550_LCR_DLAB 0x80

Divisor latch access bit.

Definition at line 37 of file ns16550.h.

◆ NS16550_LCR_WORD_LEN

#define NS16550_LCR_WORD_LEN ( x ) ( ( (x) - 5 ) << 0 )

Word length.

Definition at line 39 of file ns16550.h.

◆ NS16550_LCR_STOP_BITS

#define NS16550_LCR_STOP_BITS ( x ) ( ( (x) - 1 ) << 2 )

Stop bits.

Definition at line 40 of file ns16550.h.

◆ NS16550_LCR_PARITY

#define NS16550_LCR_PARITY ( x ) ( ( (x) - 0 ) << 3 )

Parity.

Definition at line 41 of file ns16550.h.

◆ NS16550_LCR_WPS

#define NS16550_LCR_WPS	(	word_len,
		parity,
		stop_bits
	)

Value:

( NS16550_LCR_WORD_LEN ( (word_len) ) |         \
          NS16550_LCR_PARITY ( (parity) ) |             \
          NS16550_LCR_STOP_BITS ( (stop_bits) ) )

Calculate line control register value.

Parameters

word_len	Word length (5-8)
parity	Parity (0=none, 1=odd, 3=even)
stop_bits	Stop bits (1-2)

Return values

lcr	Line control register value

Definition at line 51 of file ns16550.h.

◆ NS16550_LCR_8N1

#define NS16550_LCR_8N1 NS16550_LCR_WPS ( 8, 0, 1 )

Default LCR value: 8 data bits, no parity, one stop bit.

Definition at line 57 of file ns16550.h.

◆ NS16550_MCR

#define NS16550_MCR 0x04

Modem control register.

Definition at line 60 of file ns16550.h.

◆ NS16550_MCR_DTR

#define NS16550_MCR_DTR 0x01

Data terminal ready.

Definition at line 61 of file ns16550.h.

◆ NS16550_MCR_RTS

#define NS16550_MCR_RTS 0x02

Request to send.

Definition at line 62 of file ns16550.h.

◆ NS16550_LSR

#define NS16550_LSR 0x05

Line status register.

Definition at line 65 of file ns16550.h.

◆ NS16550_LSR_DR

#define NS16550_LSR_DR 0x01

Data ready.

Definition at line 66 of file ns16550.h.

◆ NS16550_LSR_THRE

#define NS16550_LSR_THRE 0x20

Transmitter holding reg.

empty

Definition at line 67 of file ns16550.h.

◆ NS16550_LSR_TEMT

#define NS16550_LSR_TEMT 0x40

Transmitter empty.

Definition at line 68 of file ns16550.h.

◆ NS16550_SCR

#define NS16550_SCR 0x07

Scratch register.

Definition at line 71 of file ns16550.h.

◆ NS16550_DLL

#define NS16550_DLL 0x00

Divisor latch (least significant byte)

Definition at line 74 of file ns16550.h.

◆ NS16550_DLM

#define NS16550_DLM 0x01

Divisor latch (most significant byte)

Definition at line 77 of file ns16550.h.

◆ NS16550_CLK_BIT

#define NS16550_CLK_BIT 16

Post-division clock cycles per data bit.

Definition at line 92 of file ns16550.h.

◆ NS16550_CLK_DEFAULT

#define NS16550_CLK_DEFAULT 1843200

Default input clock rate (1.8432 MHz)

Definition at line 95 of file ns16550.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )

◆ ns16550_write()

void ns16550_write	(	struct ns16550_uart *	ns16550,
		unsigned int	address,
		uint8_t	data
	)

Dummy COM1 UART for non-x86 platforms.

The architecture-independent config/serial.h header has long included the line

#define COMCONSOLE COM1

which is meaningless on non-x86 platforms where there is no COM1 port. Allow COM1 to be treated as equivalent to "no UART" on non-x86 platforms, to avoid breaking existing build configurations.

Referenced by ns16550_init(), and ns16550_transmit().

◆ ns16550_read()

uint8_t ns16550_read	(	struct ns16550_uart *	ns16550,
		unsigned int	address
	)

Referenced by ns16550_data_ready(), ns16550_flush(), ns16550_init(), ns16550_receive(), and ns16550_transmit().

Variable Documentation

◆ ns16550_operations

struct uart_operations ns16550_operations

16550 UART operations

Definition at line 171 of file ns16550.c.

Referenced by dwuart_probe(), and spcr_16550().

Data Structures

Macros

Functions

Variables