14 #define IRQ_PIC_CUTOFF 8 17 #define PIC1_ICW1 0x20 18 #define PIC1_OCW2 0x20 19 #define PIC1_OCW3 0x20 23 #define PIC1_ICW2 0x21 24 #define PIC1_ICW3 0x21 25 #define PIC1_ICW4 0x21 27 #define PIC2_ICW1 0xa0 28 #define PIC2_OCW2 0xa0 29 #define PIC2_OCW3 0xa0 33 #define PIC2_ICW2 0xa1 34 #define PIC2_ICW3 0xa1 35 #define PIC2_ICW4 0xa1 40 #define OCW3_READ_IRR 0x02 41 #define OCW3_READ_ISR 0x03 42 #define ICR_EOI_NON_SPECIFIC 0x20 43 #define ICR_EOI_NOP 0x40 44 #define ICR_EOI_SPECIFIC 0x60 45 #define ICR_EOI_SET_PRIORITY 0xc0 48 #define IMR_REG(x) ( (x) < IRQ_PIC_CUTOFF ? PIC1_IMR : PIC2_IMR ) 49 #define IMR_BIT(x) ( 1 << ( (x) % IRQ_PIC_CUTOFF ) ) 52 #define ICR_REG( irq ) ( (irq) < IRQ_PIC_CUTOFF ? PIC1_ICR : PIC2_ICR ) 53 #define ICR_VALUE( irq ) ( (irq) % IRQ_PIC_CUTOFF ) 57 #define IRQ_INT( irq ) ( ( ( (irq) - IRQ_PIC_CUTOFF ) ^ 0x70 ) & 0x7f ) 70 irq_enabled (
unsigned int irq ) {
74 return ( (
imr & mask ) == 0 );
84 enable_irq (
unsigned int irq ) {
89 return ( (
imr & mask ) == 0 );
99 disable_irq (
unsigned int irq ) {
104 return ( (
imr & mask ) == 0 );
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
void send_eoi(unsigned int irq)
Send End-Of-Interrupt to the PIC.
uint8_t inb(volatile uint8_t *io_addr)
Read byte from I/O-mapped device.
static __attribute__((always_inline)) int irq_enabled(unsigned int irq)
Check if interrupt is enabled.
#define outb(data, io_addr)