iPXE
UefiPxe.h
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00001 /** @file
00002   This header file contains all of the PXE type definitions,
00003   structure prototypes, global variables and constants that
00004   are needed for porting PXE to EFI.
00005 
00006 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
00007 This program and the accompanying materials are licensed and made available under
00008 the terms and conditions of the BSD License that accompanies this distribution.
00009 The full text of the license may be found at
00010 http://opensource.org/licenses/bsd-license.php.
00011 
00012 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
00013 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
00014 
00015   @par Revision Reference:
00016   32/64-bit PXE specification:
00017   alpha-4, 99-Dec-17.
00018 
00019 **/
00020 
00021 #ifndef __EFI_PXE_H__
00022 #define __EFI_PXE_H__
00023 
00024 FILE_LICENCE ( BSD3 );
00025 
00026 #pragma pack(1)
00027 
00028 #define PXE_BUSTYPE(a, b, c, d) \
00029     ( \
00030       (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
00031         ((PXE_UINT32) (a) & 0xFF) \
00032     )
00033 
00034 ///
00035 /// UNDI ROM ID and devive ID signature.
00036 ///
00037 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
00038 
00039 ///
00040 /// BUS ROM ID signatures.
00041 ///
00042 #define PXE_BUSTYPE_PCI     PXE_BUSTYPE ('P', 'C', 'I', 'R')
00043 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
00044 #define PXE_BUSTYPE_USB     PXE_BUSTYPE ('U', 'S', 'B', 'R')
00045 #define PXE_BUSTYPE_1394    PXE_BUSTYPE ('1', '3', '9', '4')
00046 
00047 #define PXE_SWAP_UINT16(n)  ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
00048 
00049 #define PXE_SWAP_UINT32(n) \
00050   ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
00051    (((PXE_UINT32)(n) & 0x0000FF00) << 8)  | \
00052    (((PXE_UINT32)(n) & 0x00FF0000) >> 8)  | \
00053    (((PXE_UINT32)(n) & 0xFF000000) >> 24))
00054 
00055 #define PXE_SWAP_UINT64(n) \
00056   ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
00057    (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
00058    (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
00059    (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8)  | \
00060    (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8)  | \
00061    (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
00062    (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
00063    (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
00064 
00065 
00066 #define PXE_CPBSIZE_NOT_USED  0               ///< zero
00067 #define PXE_DBSIZE_NOT_USED   0               ///< zero
00068 #define PXE_CPBADDR_NOT_USED  (PXE_UINT64) 0  ///< zero
00069 #define PXE_DBADDR_NOT_USED   (PXE_UINT64) 0  ///< zero
00070 #define PXE_CONST             CONST
00071 
00072 #define PXE_VOLATILE          volatile
00073 
00074 typedef VOID           PXE_VOID;
00075 typedef UINT8          PXE_UINT8;
00076 typedef UINT16         PXE_UINT16;
00077 typedef UINT32         PXE_UINT32;
00078 typedef UINTN          PXE_UINTN;
00079 
00080 ///
00081 /// Typedef unsigned long PXE_UINT64.
00082 ///
00083 typedef UINT64      PXE_UINT64;
00084 
00085 typedef PXE_UINT8 PXE_BOOL;
00086 #define PXE_FALSE 0            ///< zero
00087 #define PXE_TRUE  (!PXE_FALSE)
00088 
00089 typedef PXE_UINT16      PXE_OPCODE;
00090 
00091 ///
00092 /// Return UNDI operational state.
00093 ///
00094 #define PXE_OPCODE_GET_STATE  0x0000
00095 
00096 ///
00097 /// Change UNDI operational state from Stopped to Started.
00098 ///
00099 #define PXE_OPCODE_START  0x0001
00100 
00101 ///
00102 /// Change UNDI operational state from Started to Stopped.
00103 ///
00104 #define PXE_OPCODE_STOP 0x0002
00105 
00106 ///
00107 /// Get UNDI initialization information.
00108 ///
00109 #define PXE_OPCODE_GET_INIT_INFO  0x0003
00110 
00111 ///
00112 /// Get NIC configuration information.
00113 ///
00114 #define PXE_OPCODE_GET_CONFIG_INFO  0x0004
00115 
00116 ///
00117 /// Changed UNDI operational state from Started to Initialized.
00118 ///
00119 #define PXE_OPCODE_INITIALIZE 0x0005
00120 
00121 ///
00122 /// Re-initialize the NIC H/W.
00123 ///
00124 #define PXE_OPCODE_RESET  0x0006
00125 
00126 ///
00127 /// Change the UNDI operational state from Initialized to Started.
00128 ///
00129 #define PXE_OPCODE_SHUTDOWN 0x0007
00130 
00131 ///
00132 /// Read & change state of external interrupt enables.
00133 ///
00134 #define PXE_OPCODE_INTERRUPT_ENABLES  0x0008
00135 
00136 ///
00137 /// Read & change state of packet receive filters.
00138 ///
00139 #define PXE_OPCODE_RECEIVE_FILTERS  0x0009
00140 
00141 ///
00142 /// Read & change station MAC address.
00143 ///
00144 #define PXE_OPCODE_STATION_ADDRESS  0x000A
00145 
00146 ///
00147 /// Read traffic statistics.
00148 ///
00149 #define PXE_OPCODE_STATISTICS 0x000B
00150 
00151 ///
00152 /// Convert multicast IP address to multicast MAC address.
00153 ///
00154 #define PXE_OPCODE_MCAST_IP_TO_MAC  0x000C
00155 
00156 ///
00157 /// Read or change non-volatile storage on the NIC.
00158 ///
00159 #define PXE_OPCODE_NVDATA 0x000D
00160 
00161 ///
00162 /// Get & clear interrupt status.
00163 ///
00164 #define PXE_OPCODE_GET_STATUS 0x000E
00165 
00166 ///
00167 /// Fill media header in packet for transmit.
00168 ///
00169 #define PXE_OPCODE_FILL_HEADER  0x000F
00170 
00171 ///
00172 /// Transmit packet(s).
00173 ///
00174 #define PXE_OPCODE_TRANSMIT 0x0010
00175 
00176 ///
00177 /// Receive packet.
00178 ///
00179 #define PXE_OPCODE_RECEIVE  0x0011
00180 
00181 ///
00182 /// Last valid PXE UNDI OpCode number.
00183 ///
00184 #define PXE_OPCODE_LAST_VALID 0x0011
00185 
00186 typedef PXE_UINT16  PXE_OPFLAGS;
00187 
00188 #define PXE_OPFLAGS_NOT_USED  0x0000
00189 
00190 //
00191 // //////////////////////////////////////
00192 // UNDI Get State
00193 //
00194 // No OpFlags
00195 
00196 ////////////////////////////////////////
00197 // UNDI Start
00198 //
00199 // No OpFlags
00200 
00201 ////////////////////////////////////////
00202 // UNDI Stop
00203 //
00204 // No OpFlags
00205 
00206 ////////////////////////////////////////
00207 // UNDI Get Init Info
00208 //
00209 // No Opflags
00210 
00211 ////////////////////////////////////////
00212 // UNDI Get Config Info
00213 //
00214 // No Opflags
00215 
00216 ///
00217 /// UNDI Initialize
00218 ///
00219 #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK    0x0001
00220 #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE         0x0000
00221 #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE  0x0001
00222 
00223 ///
00224 ///
00225 /// UNDI Reset
00226 ///
00227 #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS  0x0001
00228 #define PXE_OPFLAGS_RESET_DISABLE_FILTERS     0x0002
00229 
00230 ///
00231 /// UNDI Shutdown.
00232 ///
00233 /// No OpFlags.
00234 
00235 ///
00236 /// UNDI Interrupt Enables.
00237 ///
00238 ///
00239 /// Select whether to enable or disable external interrupt signals.
00240 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
00241 ///
00242 #define PXE_OPFLAGS_INTERRUPT_OPMASK  0xC000
00243 #define PXE_OPFLAGS_INTERRUPT_ENABLE  0x8000
00244 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
00245 #define PXE_OPFLAGS_INTERRUPT_READ    0x0000
00246 
00247 ///
00248 /// Enable receive interrupts.  An external interrupt will be generated
00249 /// after a complete non-error packet has been received.
00250 ///
00251 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
00252 
00253 ///
00254 /// Enable transmit interrupts.  An external interrupt will be generated
00255 /// after a complete non-error packet has been transmitted.
00256 ///
00257 #define PXE_OPFLAGS_INTERRUPT_TRANSMIT  0x0002
00258 
00259 ///
00260 /// Enable command interrupts.  An external interrupt will be generated
00261 /// when command execution stops.
00262 ///
00263 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
00264 
00265 ///
00266 /// Generate software interrupt.  Setting this bit generates an external
00267 /// interrupt, if it is supported by the hardware.
00268 ///
00269 #define PXE_OPFLAGS_INTERRUPT_SOFTWARE  0x0008
00270 
00271 ///
00272 /// UNDI Receive Filters.
00273 ///
00274 ///
00275 /// Select whether to enable or disable receive filters.
00276 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
00277 ///
00278 #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK   0xC000
00279 #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE   0x8000
00280 #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE  0x4000
00281 #define PXE_OPFLAGS_RECEIVE_FILTER_READ     0x0000
00282 
00283 ///
00284 /// To reset the contents of the multicast MAC address filter list,
00285 /// set this OpFlag:
00286 ///
00287 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
00288 
00289 ///
00290 /// Enable unicast packet receiving.  Packets sent to the current station
00291 /// MAC address will be received.
00292 ///
00293 #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST  0x0001
00294 
00295 ///
00296 /// Enable broadcast packet receiving.  Packets sent to the broadcast
00297 /// MAC address will be received.
00298 ///
00299 #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST  0x0002
00300 
00301 ///
00302 /// Enable filtered multicast packet receiving.  Packets sent to any
00303 /// of the multicast MAC addresses in the multicast MAC address filter
00304 /// list will be received.  If the filter list is empty, no multicast
00305 ///
00306 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
00307 
00308 ///
00309 /// Enable promiscuous packet receiving.  All packets will be received.
00310 ///
00311 #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008
00312 
00313 ///
00314 /// Enable promiscuous multicast packet receiving.  All multicast
00315 /// packets will be received.
00316 ///
00317 #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010
00318 
00319 ///
00320 /// UNDI Station Address.
00321 ///
00322 #define PXE_OPFLAGS_STATION_ADDRESS_READ   0x0000
00323 #define PXE_OPFLAGS_STATION_ADDRESS_WRITE  0x0000
00324 #define PXE_OPFLAGS_STATION_ADDRESS_RESET  0x0001
00325 
00326 ///
00327 /// UNDI Statistics.
00328 ///
00329 #define PXE_OPFLAGS_STATISTICS_READ   0x0000
00330 #define PXE_OPFLAGS_STATISTICS_RESET  0x0001
00331 
00332 ///
00333 /// UNDI MCast IP to MAC.
00334 ///
00335 ///
00336 /// Identify the type of IP address in the CPB.
00337 ///
00338 #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK  0x0003
00339 #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC       0x0000
00340 #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC       0x0001
00341 
00342 ///
00343 /// UNDI NvData.
00344 ///
00345 ///
00346 /// Select the type of non-volatile data operation.
00347 ///
00348 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
00349 #define PXE_OPFLAGS_NVDATA_READ   0x0000
00350 #define PXE_OPFLAGS_NVDATA_WRITE  0x0001
00351 
00352 ///
00353 /// UNDI Get Status.
00354 ///
00355 ///
00356 /// Return current interrupt status.  This will also clear any interrupts
00357 /// that are currently set.  This can be used in a polling routine.  The
00358 /// interrupt flags are still set and cleared even when the interrupts
00359 /// are disabled.
00360 ///
00361 #define PXE_OPFLAGS_GET_INTERRUPT_STATUS  0x0001
00362 
00363 ///
00364 /// Return list of transmitted buffers for recycling.  Transmit buffers
00365 /// must not be changed or unallocated until they have recycled.  After
00366 /// issuing a transmit command, wait for a transmit complete interrupt.
00367 /// When a transmit complete interrupt is received, read the transmitted
00368 /// buffers.  Do not plan on getting one buffer per interrupt.  Some
00369 /// NICs and UNDIs may transmit multiple buffers per interrupt.
00370 ///
00371 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
00372 
00373 ///
00374 /// Return current media status.
00375 ///
00376 #define PXE_OPFLAGS_GET_MEDIA_STATUS    0x0004
00377 
00378 ///
00379 /// UNDI Fill Header.
00380 ///
00381 #define PXE_OPFLAGS_FILL_HEADER_OPMASK      0x0001
00382 #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED  0x0001
00383 #define PXE_OPFLAGS_FILL_HEADER_WHOLE       0x0000
00384 
00385 ///
00386 /// UNDI Transmit.
00387 ///
00388 ///
00389 /// S/W UNDI only.  Return after the packet has been transmitted.  A
00390 /// transmit complete interrupt will still be generated and the transmit
00391 /// buffer will have to be recycled.
00392 ///
00393 #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK  0x0001
00394 #define PXE_OPFLAGS_TRANSMIT_BLOCK          0x0001
00395 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK     0x0000
00396 
00397 #define PXE_OPFLAGS_TRANSMIT_OPMASK     0x0002
00398 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
00399 #define PXE_OPFLAGS_TRANSMIT_WHOLE      0x0000
00400 
00401 ///
00402 /// UNDI Receive.
00403 ///
00404 /// No OpFlags.
00405 ///
00406 
00407 ///
00408 /// PXE STATFLAGS.
00409 ///
00410 typedef PXE_UINT16  PXE_STATFLAGS;
00411 
00412 #define PXE_STATFLAGS_INITIALIZE  0x0000
00413 
00414 ///
00415 /// Common StatFlags that can be returned by all commands.
00416 ///
00417 ///
00418 /// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
00419 /// implemented by all UNDIs.  COMMAND_QUEUED is only needed by UNDIs
00420 /// that support command queuing.
00421 ///
00422 #define PXE_STATFLAGS_STATUS_MASK       0xC000
00423 #define PXE_STATFLAGS_COMMAND_COMPLETE  0xC000
00424 #define PXE_STATFLAGS_COMMAND_FAILED    0x8000
00425 #define PXE_STATFLAGS_COMMAND_QUEUED    0x4000
00426 
00427 ///
00428 /// UNDI Get State.
00429 ///
00430 #define PXE_STATFLAGS_GET_STATE_MASK        0x0003
00431 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
00432 #define PXE_STATFLAGS_GET_STATE_STARTED     0x0001
00433 #define PXE_STATFLAGS_GET_STATE_STOPPED     0x0000
00434 
00435 ///
00436 /// UNDI Start.
00437 ///
00438 /// No additional StatFlags.
00439 ///
00440 
00441 ///
00442 /// UNDI Get Init Info.
00443 ///
00444 #define PXE_STATFLAGS_CABLE_DETECT_MASK           0x0001
00445 #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED  0x0000
00446 #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED      0x0001
00447 
00448 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_MASK           0x0002
00449 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_NOT_SUPPORTED  0x0000
00450 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED      0x0002
00451 
00452 ///
00453 /// UNDI Initialize.
00454 ///
00455 #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA  0x0001
00456 
00457 ///
00458 /// UNDI Reset.
00459 ///
00460 #define PXE_STATFLAGS_RESET_NO_MEDIA  0x0001
00461 
00462 ///
00463 /// UNDI Shutdown.
00464 ///
00465 /// No additional StatFlags.
00466 
00467 ///
00468 /// UNDI Interrupt Enables.
00469 ///
00470 ///
00471 /// If set, receive interrupts are enabled.
00472 ///
00473 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
00474 
00475 ///
00476 /// If set, transmit interrupts are enabled.
00477 ///
00478 #define PXE_STATFLAGS_INTERRUPT_TRANSMIT  0x0002
00479 
00480 ///
00481 /// If set, command interrupts are enabled.
00482 ///
00483 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
00484 
00485 ///
00486 /// UNDI Receive Filters.
00487 ///
00488 
00489 ///
00490 /// If set, unicast packets will be received.
00491 ///
00492 #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST  0x0001
00493 
00494 ///
00495 /// If set, broadcast packets will be received.
00496 ///
00497 #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST  0x0002
00498 
00499 ///
00500 /// If set, multicast packets that match up with the multicast address
00501 /// filter list will be received.
00502 ///
00503 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
00504 
00505 ///
00506 /// If set, all packets will be received.
00507 ///
00508 #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008
00509 
00510 ///
00511 /// If set, all multicast packets will be received.
00512 ///
00513 #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010
00514 
00515 ///
00516 /// UNDI Station Address.
00517 ///
00518 /// No additional StatFlags.
00519 ///
00520 
00521 ///
00522 /// UNDI Statistics.
00523 ///
00524 /// No additional StatFlags.
00525 ///
00526 
00527 ///
00528 //// UNDI MCast IP to MAC.
00529 ////
00530 //// No additional StatFlags.
00531 
00532 ///
00533 /// UNDI NvData.
00534 ///
00535 /// No additional StatFlags.
00536 ///
00537 
00538 ///
00539 /// UNDI Get Status.
00540 ///
00541 
00542 ///
00543 /// Use to determine if an interrupt has occurred.
00544 ///
00545 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
00546 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS  0x0000
00547 
00548 ///
00549 /// If set, at least one receive interrupt occurred.
00550 ///
00551 #define PXE_STATFLAGS_GET_STATUS_RECEIVE  0x0001
00552 
00553 ///
00554 /// If set, at least one transmit interrupt occurred.
00555 ///
00556 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
00557 
00558 ///
00559 /// If set, at least one command interrupt occurred.
00560 ///
00561 #define PXE_STATFLAGS_GET_STATUS_COMMAND  0x0004
00562 
00563 ///
00564 /// If set, at least one software interrupt occurred.
00565 ///
00566 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
00567 
00568 ///
00569 /// This flag is set if the transmitted buffer queue is empty.  This flag
00570 /// will be set if all transmitted buffer addresses get written into the DB.
00571 ///
00572 #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY  0x0010
00573 
00574 ///
00575 /// This flag is set if no transmitted buffer addresses were written
00576 /// into the DB.  (This could be because DBsize was too small.)
00577 ///
00578 #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN  0x0020
00579 
00580 ///
00581 /// This flag is set if there is no media detected.
00582 ///
00583 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA  0x0040
00584 
00585 ///
00586 /// UNDI Fill Header.
00587 ///
00588 /// No additional StatFlags.
00589 ///
00590 
00591 ///
00592 /// UNDI Transmit.
00593 ///
00594 /// No additional StatFlags.
00595 
00596 ///
00597 /// UNDI Receive
00598 ///.
00599 
00600 ///
00601 /// No additional StatFlags.
00602 ///
00603 typedef PXE_UINT16  PXE_STATCODE;
00604 
00605 #define PXE_STATCODE_INITIALIZE 0x0000
00606 
00607 ///
00608 /// Common StatCodes returned by all UNDI commands, UNDI protocol functions
00609 /// and BC protocol functions.
00610 ///
00611 #define PXE_STATCODE_SUCCESS              0x0000
00612 
00613 #define PXE_STATCODE_INVALID_CDB          0x0001
00614 #define PXE_STATCODE_INVALID_CPB          0x0002
00615 #define PXE_STATCODE_BUSY                 0x0003
00616 #define PXE_STATCODE_QUEUE_FULL           0x0004
00617 #define PXE_STATCODE_ALREADY_STARTED      0x0005
00618 #define PXE_STATCODE_NOT_STARTED          0x0006
00619 #define PXE_STATCODE_NOT_SHUTDOWN         0x0007
00620 #define PXE_STATCODE_ALREADY_INITIALIZED  0x0008
00621 #define PXE_STATCODE_NOT_INITIALIZED      0x0009
00622 #define PXE_STATCODE_DEVICE_FAILURE       0x000A
00623 #define PXE_STATCODE_NVDATA_FAILURE       0x000B
00624 #define PXE_STATCODE_UNSUPPORTED          0x000C
00625 #define PXE_STATCODE_BUFFER_FULL          0x000D
00626 #define PXE_STATCODE_INVALID_PARAMETER    0x000E
00627 #define PXE_STATCODE_INVALID_UNDI         0x000F
00628 #define PXE_STATCODE_IPV4_NOT_SUPPORTED   0x0010
00629 #define PXE_STATCODE_IPV6_NOT_SUPPORTED   0x0011
00630 #define PXE_STATCODE_NOT_ENOUGH_MEMORY    0x0012
00631 #define PXE_STATCODE_NO_DATA              0x0013
00632 
00633 typedef PXE_UINT16  PXE_IFNUM;
00634 
00635 ///
00636 /// This interface number must be passed to the S/W UNDI Start command.
00637 ///
00638 #define PXE_IFNUM_START 0x0000
00639 
00640 ///
00641 /// This interface number is returned by the S/W UNDI Get State and
00642 /// Start commands if information in the CDB, CPB or DB is invalid.
00643 ///
00644 #define PXE_IFNUM_INVALID 0x0000
00645 
00646 typedef PXE_UINT16  PXE_CONTROL;
00647 
00648 ///
00649 /// Setting this flag directs the UNDI to queue this command for later
00650 /// execution if the UNDI is busy and it supports command queuing.
00651 /// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
00652 /// is returned.  If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
00653 /// error is returned.
00654 ///
00655 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
00656 
00657 ///
00658 /// These two bit values are used to determine if there are more UNDI
00659 /// CDB structures following this one.  If the link bit is set, there
00660 /// must be a CDB structure following this one.  Execution will start
00661 /// on the next CDB structure as soon as this one completes successfully.
00662 /// If an error is generated by this command, execution will stop.
00663 ///
00664 #define PXE_CONTROL_LINK              0x0001
00665 #define PXE_CONTROL_LAST_CDB_IN_LIST  0x0000
00666 
00667 typedef PXE_UINT8   PXE_FRAME_TYPE;
00668 
00669 #define PXE_FRAME_TYPE_NONE                     0x00
00670 #define PXE_FRAME_TYPE_UNICAST                  0x01
00671 #define PXE_FRAME_TYPE_BROADCAST                0x02
00672 #define PXE_FRAME_TYPE_FILTERED_MULTICAST       0x03
00673 #define PXE_FRAME_TYPE_PROMISCUOUS              0x04
00674 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST    0x05
00675 
00676 #define PXE_FRAME_TYPE_MULTICAST                PXE_FRAME_TYPE_FILTERED_MULTICAST
00677 
00678 typedef PXE_UINT32  PXE_IPV4;
00679 
00680 typedef PXE_UINT32  PXE_IPV6[4];
00681 #define PXE_MAC_LENGTH  32
00682 
00683 typedef PXE_UINT8   PXE_MAC_ADDR[PXE_MAC_LENGTH];
00684 
00685 typedef PXE_UINT8   PXE_IFTYPE;
00686 typedef UINT16      PXE_MEDIA_PROTOCOL;
00687 
00688 ///
00689 /// This information is from the ARP section of RFC 1700.
00690 ///
00691 ///     1 Ethernet (10Mb)                                    [JBP]
00692 ///     2 Experimental Ethernet (3Mb)                        [JBP]
00693 ///     3 Amateur Radio AX.25                                [PXK]
00694 ///     4 Proteon ProNET Token Ring                          [JBP]
00695 ///     5 Chaos                                              [GXP]
00696 ///     6 IEEE 802 Networks                                  [JBP]
00697 ///     7 ARCNET                                             [JBP]
00698 ///     8 Hyperchannel                                       [JBP]
00699 ///     9 Lanstar                                             [TU]
00700 ///    10 Autonet Short Address                             [MXB1]
00701 ///    11 LocalTalk                                         [JKR1]
00702 ///    12 LocalNet (IBM* PCNet or SYTEK* LocalNET)           [JXM]
00703 ///    13 Ultra link                                        [RXD2]
00704 ///    14 SMDS                                              [GXC1]
00705 ///    15 Frame Relay                                        [AGM]
00706 ///    16 Asynchronous Transmission Mode (ATM)              [JXB2]
00707 ///    17 HDLC                                               [JBP]
00708 ///    18 Fibre Channel                            [Yakov Rekhter]
00709 ///    19 Asynchronous Transmission Mode (ATM)      [Mark Laubach]
00710 ///    20 Serial Line                                        [JBP]
00711 ///    21 Asynchronous Transmission Mode (ATM)              [MXB1]
00712 ///
00713 /// * Other names and brands may be claimed as the property of others.
00714 ///
00715 #define PXE_IFTYPE_ETHERNET       0x01
00716 #define PXE_IFTYPE_TOKENRING      0x04
00717 #define PXE_IFTYPE_FIBRE_CHANNEL  0x12
00718 
00719 typedef struct s_pxe_hw_undi {
00720   PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE.
00721   PXE_UINT8   Len;            ///< sizeof(PXE_HW_UNDI).
00722   PXE_UINT8   Fudge;          ///< makes 8-bit cksum equal zero.
00723   PXE_UINT8   Rev;            ///< PXE_ROMID_REV.
00724   PXE_UINT8   IFcnt;          ///< physical connector count lower byte.
00725   PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER.
00726   PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER.
00727   PXE_UINT8   IFcntExt;       ///< physical connector count upper byte.
00728   PXE_UINT8   reserved;       ///< zero, not used.
00729   PXE_UINT32  Implementation; ///< implementation flags.
00730   ///< reserved             ///< vendor use.
00731   ///< UINT32 Status;       ///< status port.
00732   ///< UINT32 Command;      ///< command port.
00733   ///< UINT64 CDBaddr;      ///< CDB address port.
00734   ///<
00735 } PXE_HW_UNDI;
00736 
00737 ///
00738 /// Status port bit definitions.
00739 ///
00740 
00741 ///
00742 /// UNDI operation state.
00743 ///
00744 #define PXE_HWSTAT_STATE_MASK   0xC0000000
00745 #define PXE_HWSTAT_BUSY         0xC0000000
00746 #define PXE_HWSTAT_INITIALIZED  0x80000000
00747 #define PXE_HWSTAT_STARTED      0x40000000
00748 #define PXE_HWSTAT_STOPPED      0x00000000
00749 
00750 ///
00751 /// If set, last command failed.
00752 ///
00753 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000
00754 
00755 ///
00756 /// If set, identifies enabled receive filters.
00757 ///
00758 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
00759 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED           0x00000800
00760 #define PXE_HWSTAT_BROADCAST_RX_ENABLED             0x00000400
00761 #define PXE_HWSTAT_MULTICAST_RX_ENABLED             0x00000200
00762 #define PXE_HWSTAT_UNICAST_RX_ENABLED               0x00000100
00763 
00764 ///
00765 /// If set, identifies enabled external interrupts.
00766 ///
00767 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED     0x00000080
00768 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED  0x00000040
00769 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED    0x00000020
00770 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
00771 
00772 ///
00773 /// If set, identifies pending interrupts.
00774 ///
00775 #define PXE_HWSTAT_SOFTWARE_INT_PENDING     0x00000008
00776 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING  0x00000004
00777 #define PXE_HWSTAT_PACKET_RX_INT_PENDING    0x00000002
00778 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
00779 
00780 ///
00781 /// Command port definitions.
00782 ///
00783 
00784 ///
00785 /// If set, CDB identified in CDBaddr port is given to UNDI.
00786 /// If not set, other bits in this word will be processed.
00787 ///
00788 #define PXE_HWCMD_ISSUE_COMMAND   0x80000000
00789 #define PXE_HWCMD_INTS_AND_FILTS  0x00000000
00790 
00791 ///
00792 /// Use these to enable/disable receive filters.
00793 ///
00794 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
00795 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE           0x00000800
00796 #define PXE_HWCMD_BROADCAST_RX_ENABLE             0x00000400
00797 #define PXE_HWCMD_MULTICAST_RX_ENABLE             0x00000200
00798 #define PXE_HWCMD_UNICAST_RX_ENABLE               0x00000100
00799 
00800 ///
00801 /// Use these to enable/disable external interrupts.
00802 ///
00803 #define PXE_HWCMD_SOFTWARE_INT_ENABLE     0x00000080
00804 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE  0x00000040
00805 #define PXE_HWCMD_PACKET_RX_INT_ENABLE    0x00000020
00806 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
00807 
00808 ///
00809 /// Use these to clear pending external interrupts.
00810 ///
00811 #define PXE_HWCMD_CLEAR_SOFTWARE_INT      0x00000008
00812 #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT   0x00000004
00813 #define PXE_HWCMD_CLEAR_PACKET_RX_INT     0x00000002
00814 #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT  0x00000001
00815 
00816 typedef struct s_pxe_sw_undi {
00817   PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE.
00818   PXE_UINT8   Len;            ///< sizeof(PXE_SW_UNDI).
00819   PXE_UINT8   Fudge;          ///< makes 8-bit cksum zero.
00820   PXE_UINT8   Rev;            ///< PXE_ROMID_REV.
00821   PXE_UINT8   IFcnt;          ///< physical connector count lower byte.
00822   PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER.
00823   PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER.
00824   PXE_UINT8   IFcntExt;       ///< physical connector count upper byte.
00825   PXE_UINT8   reserved1;      ///< zero, not used.
00826   PXE_UINT32  Implementation; ///< Implementation flags.
00827   PXE_UINT64  EntryPoint;     ///< API entry point.
00828   PXE_UINT8   reserved2[3];   ///< zero, not used.
00829   PXE_UINT8   BusCnt;         ///< number of bustypes supported.
00830   PXE_UINT32  BusType[1];     ///< list of supported bustypes.
00831 } PXE_SW_UNDI;
00832 
00833 typedef union u_pxe_undi {
00834   PXE_HW_UNDI hw;
00835   PXE_SW_UNDI sw;
00836 } PXE_UNDI;
00837 
00838 ///
00839 /// Signature of !PXE structure.
00840 ///
00841 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
00842 
00843 ///
00844 /// !PXE structure format revision
00845 ///.
00846 #define PXE_ROMID_REV 0x02
00847 
00848 ///
00849 /// UNDI command interface revision.  These are the values that get sent
00850 /// in option 94 (Client Network Interface Identifier) in the DHCP Discover
00851 /// and PXE Boot Server Request packets.
00852 ///
00853 #define PXE_ROMID_MAJORVER    0x03
00854 #define PXE_ROMID_MINORVER    0x01
00855 
00856 ///
00857 /// Implementation flags.
00858 ///
00859 #define PXE_ROMID_IMP_HW_UNDI                             0x80000000
00860 #define PXE_ROMID_IMP_SW_VIRT_ADDR                        0x40000000
00861 #define PXE_ROMID_IMP_64BIT_DEVICE                        0x00010000
00862 #define PXE_ROMID_IMP_FRAG_SUPPORTED                      0x00008000
00863 #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED                  0x00004000
00864 #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED                 0x00002000
00865 #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED               0x00001000
00866 #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK                 0x00000C00
00867 #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE                0x00000C00
00868 #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE              0x00000800
00869 #define PXE_ROMID_IMP_NVDATA_READ_ONLY                    0x00000400
00870 #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE                0x00000000
00871 #define PXE_ROMID_IMP_STATISTICS_SUPPORTED                0x00000200
00872 #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE               0x00000100
00873 #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED  0x00000080
00874 #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED            0x00000040
00875 #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED              0x00000020
00876 #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED     0x00000010
00877 #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED              0x00000008
00878 #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED           0x00000004
00879 #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED             0x00000002
00880 #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED          0x00000001
00881 
00882 typedef struct s_pxe_cdb {
00883   PXE_OPCODE    OpCode;
00884   PXE_OPFLAGS   OpFlags;
00885   PXE_UINT16    CPBsize;
00886   PXE_UINT16    DBsize;
00887   PXE_UINT64    CPBaddr;
00888   PXE_UINT64    DBaddr;
00889   PXE_STATCODE  StatCode;
00890   PXE_STATFLAGS StatFlags;
00891   PXE_UINT16    IFnum;
00892   PXE_CONTROL   Control;
00893 } PXE_CDB;
00894 
00895 typedef union u_pxe_ip_addr {
00896   PXE_IPV6  IPv6;
00897   PXE_IPV4  IPv4;
00898 } PXE_IP_ADDR;
00899 
00900 typedef union pxe_device {
00901   ///
00902   /// PCI and PC Card NICs are both identified using bus, device
00903   /// and function numbers.  For PC Card, this may require PC
00904   /// Card services to be loaded in the BIOS or preboot
00905   /// environment.
00906   ///
00907   struct {
00908     ///
00909     /// See S/W UNDI ROMID structure definition for PCI and
00910     /// PCC BusType definitions.
00911     ///
00912     PXE_UINT32  BusType;
00913 
00914     ///
00915     /// Bus, device & function numbers that locate this device.
00916     ///
00917     PXE_UINT16  Bus;
00918     PXE_UINT8   Device;
00919     PXE_UINT8   Function;
00920   }
00921   PCI, PCC;
00922 
00923 } PXE_DEVICE;
00924 
00925 ///
00926 /// cpb and db definitions
00927 ///
00928 #define MAX_PCI_CONFIG_LEN    64  ///< # of dwords.
00929 #define MAX_EEPROM_LEN        128 ///< # of dwords.
00930 #define MAX_XMIT_BUFFERS      32  ///< recycling Q length for xmit_done.
00931 #define MAX_MCAST_ADDRESS_CNT 8
00932 
00933 typedef struct s_pxe_cpb_start_30 {
00934   ///
00935   /// PXE_VOID Delay(UINTN microseconds);
00936   ///
00937   /// UNDI will never request a delay smaller than 10 microseconds
00938   /// and will always request delays in increments of 10 microseconds.
00939   /// The Delay() CallBack routine must delay between n and n + 10
00940   /// microseconds before returning control to the UNDI.
00941   ///
00942   /// This field cannot be set to zero.
00943   ///
00944   UINT64  Delay;
00945 
00946   ///
00947   /// PXE_VOID Block(UINT32 enable);
00948   ///
00949   /// UNDI may need to block multi-threaded/multi-processor access to
00950   /// critical code sections when programming or accessing the network
00951   /// device.  To this end, a blocking service is needed by the UNDI.
00952   /// When UNDI needs a block, it will call Block() passing a non-zero
00953   /// value.  When UNDI no longer needs a block, it will call Block()
00954   /// with a zero value.  When called, if the Block() is already enabled,
00955   /// do not return control to the UNDI until the previous Block() is
00956   /// disabled.
00957   ///
00958   /// This field cannot be set to zero.
00959   ///
00960   UINT64  Block;
00961 
00962   ///
00963   /// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
00964   ///
00965   /// UNDI will pass the virtual address of a buffer and the virtual
00966   /// address of a 64-bit physical buffer.  Convert the virtual address
00967   /// to a physical address and write the result to the physical address
00968   /// buffer.  If virtual and physical addresses are the same, just
00969   /// copy the virtual address to the physical address buffer.
00970   ///
00971   /// This field can be set to zero if virtual and physical addresses
00972   /// are equal.
00973   ///
00974   UINT64  Virt2Phys;
00975   ///
00976   /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
00977   ///              UINT64 buf_addr);
00978   ///
00979   /// UNDI will read or write the device io space using this call back
00980   /// function. It passes the number of bytes as the len parameter and it
00981   /// will be either 1,2,4 or 8.
00982   ///
00983   /// This field can not be set to zero.
00984   ///
00985   UINT64  Mem_IO;
00986 } PXE_CPB_START_30;
00987 
00988 typedef struct s_pxe_cpb_start_31 {
00989   ///
00990   /// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
00991   ///
00992   /// UNDI will never request a delay smaller than 10 microseconds
00993   /// and will always request delays in increments of 10 microseconds.
00994   /// The Delay() CallBack routine must delay between n and n + 10
00995   /// microseconds before returning control to the UNDI.
00996   ///
00997   /// This field cannot be set to zero.
00998   ///
00999   UINT64  Delay;
01000 
01001   ///
01002   /// PXE_VOID Block(UINT64 unq_id, UINT32 enable);
01003   ///
01004   /// UNDI may need to block multi-threaded/multi-processor access to
01005   /// critical code sections when programming or accessing the network
01006   /// device.  To this end, a blocking service is needed by the UNDI.
01007   /// When UNDI needs a block, it will call Block() passing a non-zero
01008   /// value.  When UNDI no longer needs a block, it will call Block()
01009   /// with a zero value.  When called, if the Block() is already enabled,
01010   /// do not return control to the UNDI until the previous Block() is
01011   /// disabled.
01012   ///
01013   /// This field cannot be set to zero.
01014   ///
01015   UINT64  Block;
01016 
01017   ///
01018   /// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
01019   ///
01020   /// UNDI will pass the virtual address of a buffer and the virtual
01021   /// address of a 64-bit physical buffer.  Convert the virtual address
01022   /// to a physical address and write the result to the physical address
01023   /// buffer.  If virtual and physical addresses are the same, just
01024   /// copy the virtual address to the physical address buffer.
01025   ///
01026   /// This field can be set to zero if virtual and physical addresses
01027   /// are equal.
01028   ///
01029   UINT64  Virt2Phys;
01030   ///
01031   /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
01032   ///              UINT64 buf_addr);
01033   ///
01034   /// UNDI will read or write the device io space using this call back
01035   /// function. It passes the number of bytes as the len parameter and it
01036   /// will be either 1,2,4 or 8.
01037   ///
01038   /// This field can not be set to zero.
01039   ///
01040   UINT64  Mem_IO;
01041   ///
01042   /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
01043   ///                 UINT32 Direction, UINT64 mapped_addr);
01044   ///
01045   /// UNDI will pass the virtual address of a buffer, direction of the data
01046   /// flow from/to the mapped buffer (the constants are defined below)
01047   /// and a place holder (pointer) for the mapped address.
01048   /// This call will Map the given address to a physical DMA address and write
01049   /// the result to the mapped_addr pointer.  If there is no need to
01050   /// map the given address to a lower address (i.e. the given address is
01051   /// associated with a physical address that is already compatible to be
01052   /// used with the DMA, it converts the given virtual address to it's
01053   /// physical address and write that in the mapped address pointer.
01054   ///
01055   /// This field can be set to zero if there is no mapping service available.
01056   ///
01057   UINT64  Map_Mem;
01058 
01059   ///
01060   /// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
01061   ///            UINT32 Direction, UINT64 mapped_addr);
01062   ///
01063   /// UNDI will pass the virtual and mapped addresses of a buffer.
01064   /// This call will un map the given address.
01065   ///
01066   /// This field can be set to zero if there is no unmapping service available.
01067   ///
01068   UINT64  UnMap_Mem;
01069 
01070   ///
01071   /// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
01072   ///            UINT32 size, UINT32 Direction, UINT64 mapped_addr);
01073   ///
01074   /// UNDI will pass the virtual and mapped addresses of a buffer.
01075   /// This call will synchronize the contents of both the virtual and mapped.
01076   /// buffers for the given Direction.
01077   ///
01078   /// This field can be set to zero if there is no service available.
01079   ///
01080   UINT64  Sync_Mem;
01081 
01082   ///
01083   /// protocol driver can provide anything for this Unique_ID, UNDI remembers
01084   /// that as just a 64bit value associated to the interface specified by
01085   /// the ifnum and gives it back as a parameter to all the call-back routines
01086   /// when calling for that interface!
01087   ///
01088   UINT64  Unique_ID;
01089 } PXE_CPB_START_31;
01090 
01091 #define TO_AND_FROM_DEVICE    0
01092 #define FROM_DEVICE           1
01093 #define TO_DEVICE             2
01094 
01095 #define PXE_DELAY_MILLISECOND 1000
01096 #define PXE_DELAY_SECOND      1000000
01097 #define PXE_IO_READ           0
01098 #define PXE_IO_WRITE          1
01099 #define PXE_MEM_READ          2
01100 #define PXE_MEM_WRITE         4
01101 
01102 typedef struct s_pxe_db_get_init_info {
01103   ///
01104   /// Minimum length of locked memory buffer that must be given to
01105   /// the Initialize command. Giving UNDI more memory will generally
01106   /// give better performance.
01107   ///
01108   /// If MemoryRequired is zero, the UNDI does not need and will not
01109   /// use system memory to receive and transmit packets.
01110   ///
01111   PXE_UINT32  MemoryRequired;
01112 
01113   ///
01114   /// Maximum frame data length for Tx/Rx excluding the media header.
01115   ///
01116   PXE_UINT32  FrameDataLen;
01117 
01118   ///
01119   /// Supported link speeds are in units of mega bits.  Common ethernet
01120   /// values are 10, 100 and 1000.  Unused LinkSpeeds[] entries are zero
01121   /// filled.
01122   ///
01123   PXE_UINT32  LinkSpeeds[4];
01124 
01125   ///
01126   /// Number of non-volatile storage items.
01127   ///
01128   PXE_UINT32  NvCount;
01129 
01130   ///
01131   /// Width of non-volatile storage item in bytes.  0, 1, 2 or 4
01132   ///
01133   PXE_UINT16  NvWidth;
01134 
01135   ///
01136   /// Media header length.  This is the typical media header length for
01137   /// this UNDI.  This information is needed when allocating receive
01138   /// and transmit buffers.
01139   ///
01140   PXE_UINT16  MediaHeaderLen;
01141 
01142   ///
01143   /// Number of bytes in the NIC hardware (MAC) address.
01144   ///
01145   PXE_UINT16  HWaddrLen;
01146 
01147   ///
01148   /// Maximum number of multicast MAC addresses in the multicast
01149   /// MAC address filter list.
01150   ///
01151   PXE_UINT16  MCastFilterCnt;
01152 
01153   ///
01154   /// Default number and size of transmit and receive buffers that will
01155   /// be allocated by the UNDI.  If MemoryRequired is non-zero, this
01156   /// allocation will come out of the memory buffer given to the Initialize
01157   /// command.  If MemoryRequired is zero, this allocation will come out of
01158   /// memory on the NIC.
01159   ///
01160   PXE_UINT16  TxBufCnt;
01161   PXE_UINT16  TxBufSize;
01162   PXE_UINT16  RxBufCnt;
01163   PXE_UINT16  RxBufSize;
01164 
01165   ///
01166   /// Hardware interface types defined in the Assigned Numbers RFC
01167   /// and used in DHCP and ARP packets.
01168   /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
01169   ///
01170   PXE_UINT8   IFtype;
01171 
01172   ///
01173   /// Supported duplex.  See PXE_DUPLEX_xxxxx #defines below.
01174   ///
01175   PXE_UINT8   SupportedDuplexModes;
01176 
01177   ///
01178   /// Supported loopback options.  See PXE_LOOPBACK_xxxxx #defines below.
01179   ///
01180   PXE_UINT8   SupportedLoopBackModes;
01181 } PXE_DB_GET_INIT_INFO;
01182 
01183 #define PXE_MAX_TXRX_UNIT_ETHER           1500
01184 
01185 #define PXE_HWADDR_LEN_ETHER              0x0006
01186 #define PXE_MAC_HEADER_LEN_ETHER          0x000E
01187 
01188 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED  1
01189 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED   2
01190 
01191 #define PXE_LOOPBACK_INTERNAL_SUPPORTED   1
01192 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED   2
01193 
01194 typedef struct s_pxe_pci_config_info {
01195   ///
01196   /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
01197   /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
01198   ///
01199   UINT32  BusType;
01200 
01201   ///
01202   /// This identifies the PCI network device that this UNDI interface.
01203   /// is bound to.
01204   ///
01205   UINT16  Bus;
01206   UINT8   Device;
01207   UINT8   Function;
01208 
01209   ///
01210   /// This is a copy of the PCI configuration space for this
01211   /// network device.
01212   ///
01213   union {
01214     UINT8   Byte[256];
01215     UINT16  Word[128];
01216     UINT32  Dword[64];
01217   } Config;
01218 } PXE_PCI_CONFIG_INFO;
01219 
01220 typedef struct s_pxe_pcc_config_info {
01221   ///
01222   /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
01223   /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
01224   ///
01225   PXE_UINT32  BusType;
01226 
01227   ///
01228   /// This identifies the PCC network device that this UNDI interface
01229   /// is bound to.
01230   ///
01231   PXE_UINT16  Bus;
01232   PXE_UINT8   Device;
01233   PXE_UINT8   Function;
01234 
01235   ///
01236   /// This is a copy of the PCC configuration space for this
01237   /// network device.
01238   ///
01239   union {
01240     PXE_UINT8   Byte[256];
01241     PXE_UINT16  Word[128];
01242     PXE_UINT32  Dword[64];
01243   } Config;
01244 } PXE_PCC_CONFIG_INFO;
01245 
01246 typedef union u_pxe_db_get_config_info {
01247   PXE_PCI_CONFIG_INFO   pci;
01248   PXE_PCC_CONFIG_INFO   pcc;
01249 } PXE_DB_GET_CONFIG_INFO;
01250 
01251 typedef struct s_pxe_cpb_initialize {
01252   ///
01253   /// Address of first (lowest) byte of the memory buffer.  This buffer must
01254   /// be in contiguous physical memory and cannot be swapped out.  The UNDI
01255   /// will be using this for transmit and receive buffering.
01256   ///
01257   PXE_UINT64  MemoryAddr;
01258 
01259   ///
01260   /// MemoryLength must be greater than or equal to MemoryRequired
01261   /// returned by the Get Init Info command.
01262   ///
01263   PXE_UINT32  MemoryLength;
01264 
01265   ///
01266   /// Desired link speed in Mbit/sec.  Common ethernet values are 10, 100
01267   /// and 1000.  Setting a value of zero will auto-detect and/or use the
01268   /// default link speed (operation depends on UNDI/NIC functionality).
01269   ///
01270   PXE_UINT32  LinkSpeed;
01271 
01272   ///
01273   /// Suggested number and size of receive and transmit buffers to
01274   /// allocate.  If MemoryAddr and MemoryLength are non-zero, this
01275   /// allocation comes out of the supplied memory buffer.  If MemoryAddr
01276   /// and MemoryLength are zero, this allocation comes out of memory
01277   /// on the NIC.
01278   ///
01279   /// If these fields are set to zero, the UNDI will allocate buffer
01280   /// counts and sizes as it sees fit.
01281   ///
01282   PXE_UINT16  TxBufCnt;
01283   PXE_UINT16  TxBufSize;
01284   PXE_UINT16  RxBufCnt;
01285   PXE_UINT16  RxBufSize;
01286 
01287   ///
01288   /// The following configuration parameters are optional and must be zero
01289   /// to use the default values.
01290   ///
01291   PXE_UINT8   DuplexMode;
01292 
01293   PXE_UINT8   LoopBackMode;
01294 } PXE_CPB_INITIALIZE;
01295 
01296 #define PXE_DUPLEX_DEFAULT      0x00
01297 #define PXE_FORCE_FULL_DUPLEX   0x01
01298 #define PXE_ENABLE_FULL_DUPLEX  0x02
01299 #define PXE_FORCE_HALF_DUPLEX   0x04
01300 #define PXE_DISABLE_FULL_DUPLEX 0x08
01301 
01302 #define LOOPBACK_NORMAL         0
01303 #define LOOPBACK_INTERNAL       1
01304 #define LOOPBACK_EXTERNAL       2
01305 
01306 typedef struct s_pxe_db_initialize {
01307   ///
01308   /// Actual amount of memory used from the supplied memory buffer.  This
01309   /// may be less that the amount of memory suppllied and may be zero if
01310   /// the UNDI and network device do not use external memory buffers.
01311   ///
01312   /// Memory used by the UNDI and network device is allocated from the
01313   /// lowest memory buffer address.
01314   ///
01315   PXE_UINT32  MemoryUsed;
01316 
01317   ///
01318   /// Actual number and size of receive and transmit buffers that were
01319   /// allocated.
01320   ///
01321   PXE_UINT16  TxBufCnt;
01322   PXE_UINT16  TxBufSize;
01323   PXE_UINT16  RxBufCnt;
01324   PXE_UINT16  RxBufSize;
01325 } PXE_DB_INITIALIZE;
01326 
01327 typedef struct s_pxe_cpb_receive_filters {
01328   ///
01329   /// List of multicast MAC addresses.  This list, if present, will
01330   /// replace the existing multicast MAC address filter list.
01331   ///
01332   PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];
01333 } PXE_CPB_RECEIVE_FILTERS;
01334 
01335 typedef struct s_pxe_db_receive_filters {
01336   ///
01337   /// Filtered multicast MAC address list.
01338   ///
01339   PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];
01340 } PXE_DB_RECEIVE_FILTERS;
01341 
01342 typedef struct s_pxe_cpb_station_address {
01343   ///
01344   /// If supplied and supported, the current station MAC address
01345   /// will be changed.
01346   ///
01347   PXE_MAC_ADDR  StationAddr;
01348 } PXE_CPB_STATION_ADDRESS;
01349 
01350 typedef struct s_pxe_dpb_station_address {
01351   ///
01352   /// Current station MAC address.
01353   ///
01354   PXE_MAC_ADDR  StationAddr;
01355 
01356   ///
01357   /// Station broadcast MAC address.
01358   ///
01359   PXE_MAC_ADDR  BroadcastAddr;
01360 
01361   ///
01362   /// Permanent station MAC address.
01363   ///
01364   PXE_MAC_ADDR  PermanentAddr;
01365 } PXE_DB_STATION_ADDRESS;
01366 
01367 typedef struct s_pxe_db_statistics {
01368   ///
01369   /// Bit field identifying what statistic data is collected by the
01370   /// UNDI/NIC.
01371   /// If bit 0x00 is set, Data[0x00] is collected.
01372   /// If bit 0x01 is set, Data[0x01] is collected.
01373   /// If bit 0x20 is set, Data[0x20] is collected.
01374   /// If bit 0x21 is set, Data[0x21] is collected.
01375   /// Etc.
01376   ///
01377   PXE_UINT64  Supported;
01378 
01379   ///
01380   /// Statistic data.
01381   ///
01382   PXE_UINT64  Data[64];
01383 } PXE_DB_STATISTICS;
01384 
01385 ///
01386 /// Total number of frames received.  Includes frames with errors and
01387 /// dropped frames.
01388 ///
01389 #define PXE_STATISTICS_RX_TOTAL_FRAMES  0x00
01390 
01391 ///
01392 /// Number of valid frames received and copied into receive buffers.
01393 ///
01394 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
01395 
01396 ///
01397 /// Number of frames below the minimum length for the media.
01398 /// This would be <64 for ethernet.
01399 ///
01400 #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES  0x02
01401 
01402 ///
01403 /// Number of frames longer than the maxminum length for the
01404 /// media.  This would be >1500 for ethernet.
01405 ///
01406 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
01407 
01408 ///
01409 /// Valid frames that were dropped because receive buffers were full.
01410 ///
01411 #define PXE_STATISTICS_RX_DROPPED_FRAMES  0x04
01412 
01413 ///
01414 /// Number of valid unicast frames received and not dropped.
01415 ///
01416 #define PXE_STATISTICS_RX_UNICAST_FRAMES  0x05
01417 
01418 ///
01419 /// Number of valid broadcast frames received and not dropped.
01420 ///
01421 #define PXE_STATISTICS_RX_BROADCAST_FRAMES  0x06
01422 
01423 ///
01424 /// Number of valid mutlicast frames received and not dropped.
01425 ///
01426 #define PXE_STATISTICS_RX_MULTICAST_FRAMES  0x07
01427 
01428 ///
01429 /// Number of frames w/ CRC or alignment errors.
01430 ///
01431 #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES  0x08
01432 
01433 ///
01434 /// Total number of bytes received.  Includes frames with errors
01435 /// and dropped frames.
01436 ///
01437 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
01438 
01439 ///
01440 /// Transmit statistics.
01441 ///
01442 #define PXE_STATISTICS_TX_TOTAL_FRAMES      0x0A
01443 #define PXE_STATISTICS_TX_GOOD_FRAMES       0x0B
01444 #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES  0x0C
01445 #define PXE_STATISTICS_TX_OVERSIZE_FRAMES   0x0D
01446 #define PXE_STATISTICS_TX_DROPPED_FRAMES    0x0E
01447 #define PXE_STATISTICS_TX_UNICAST_FRAMES    0x0F
01448 #define PXE_STATISTICS_TX_BROADCAST_FRAMES  0x10
01449 #define PXE_STATISTICS_TX_MULTICAST_FRAMES  0x11
01450 #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES  0x12
01451 #define PXE_STATISTICS_TX_TOTAL_BYTES       0x13
01452 
01453 ///
01454 /// Number of collisions detection on this subnet.
01455 ///
01456 #define PXE_STATISTICS_COLLISIONS 0x14
01457 
01458 ///
01459 /// Number of frames destined for unsupported protocol.
01460 ///
01461 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
01462 
01463 ///
01464 /// Number of valid frames received that were duplicated.
01465 ///
01466 #define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x16
01467 
01468 ///
01469 /// Number of encrypted frames received that failed to decrypt.
01470 ///
01471 #define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x17
01472 
01473 ///
01474 /// Number of frames that failed to transmit after exceeding the retry limit.
01475 ///
01476 #define PXE_STATISTICS_TX_ERROR_FRAMES 0x18
01477 
01478 ///
01479 /// Number of frames transmitted successfully after more than one attempt.
01480 ///
01481 #define PXE_STATISTICS_TX_RETRY_FRAMES 0x19
01482 
01483 typedef struct s_pxe_cpb_mcast_ip_to_mac {
01484   ///
01485   /// Multicast IP address to be converted to multicast MAC address.
01486   ///
01487   PXE_IP_ADDR IP;
01488 } PXE_CPB_MCAST_IP_TO_MAC;
01489 
01490 typedef struct s_pxe_db_mcast_ip_to_mac {
01491   ///
01492   /// Multicast MAC address.
01493   ///
01494   PXE_MAC_ADDR  MAC;
01495 } PXE_DB_MCAST_IP_TO_MAC;
01496 
01497 typedef struct s_pxe_cpb_nvdata_sparse {
01498   ///
01499   /// NvData item list.  Only items in this list will be updated.
01500   ///
01501   struct {
01502     ///
01503     ///  Non-volatile storage address to be changed.
01504     ///
01505     PXE_UINT32  Addr;
01506 
01507     ///
01508     /// Data item to write into above storage address.
01509     ///
01510     union {
01511       PXE_UINT8   Byte;
01512       PXE_UINT16  Word;
01513       PXE_UINT32  Dword;
01514     } Data;
01515   } Item[MAX_EEPROM_LEN];
01516 } PXE_CPB_NVDATA_SPARSE;
01517 
01518 ///
01519 /// When using bulk update, the size of the CPB structure must be
01520 /// the same size as the non-volatile NIC storage.
01521 ///
01522 typedef union u_pxe_cpb_nvdata_bulk {
01523   ///
01524   /// Array of byte-wide data items.
01525   ///
01526   PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];
01527 
01528   ///
01529   /// Array of word-wide data items.
01530   ///
01531   PXE_UINT16  Word[MAX_EEPROM_LEN << 1];
01532 
01533   ///
01534   /// Array of dword-wide data items.
01535   ///
01536   PXE_UINT32  Dword[MAX_EEPROM_LEN];
01537 } PXE_CPB_NVDATA_BULK;
01538 
01539 typedef struct s_pxe_db_nvdata {
01540   ///
01541   /// Arrays of data items from non-volatile storage.
01542   ///
01543   union {
01544     ///
01545     /// Array of byte-wide data items.
01546     ///
01547     PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];
01548 
01549     ///
01550     /// Array of word-wide data items.
01551     ///
01552     PXE_UINT16  Word[MAX_EEPROM_LEN << 1];
01553 
01554     ///
01555     /// Array of dword-wide data items.
01556     ///
01557     PXE_UINT32  Dword[MAX_EEPROM_LEN];
01558   } Data;
01559 } PXE_DB_NVDATA;
01560 
01561 typedef struct s_pxe_db_get_status {
01562   ///
01563   /// Length of next receive frame (header + data).  If this is zero,
01564   /// there is no next receive frame available.
01565   ///
01566   PXE_UINT32  RxFrameLen;
01567 
01568   ///
01569   /// Reserved, set to zero.
01570   ///
01571   PXE_UINT32  reserved;
01572 
01573   ///
01574   ///  Addresses of transmitted buffers that need to be recycled.
01575   ///
01576   PXE_UINT64  TxBuffer[MAX_XMIT_BUFFERS];
01577 } PXE_DB_GET_STATUS;
01578 
01579 typedef struct s_pxe_cpb_fill_header {
01580   ///
01581   /// Source and destination MAC addresses.  These will be copied into
01582   /// the media header without doing byte swapping.
01583   ///
01584   PXE_MAC_ADDR  SrcAddr;
01585   PXE_MAC_ADDR  DestAddr;
01586 
01587   ///
01588   /// Address of first byte of media header.  The first byte of packet data
01589   /// follows the last byte of the media header.
01590   ///
01591   PXE_UINT64        MediaHeader;
01592 
01593   ///
01594   /// Length of packet data in bytes (not including the media header).
01595   ///
01596   PXE_UINT32        PacketLen;
01597 
01598   ///
01599   /// Protocol type.  This will be copied into the media header without
01600   /// doing byte swapping.  Protocol type numbers can be obtained from
01601   /// the Assigned Numbers RFC 1700.
01602   ///
01603   PXE_UINT16        Protocol;
01604 
01605   ///
01606   /// Length of the media header in bytes.
01607   ///
01608   PXE_UINT16        MediaHeaderLen;
01609 } PXE_CPB_FILL_HEADER;
01610 
01611 #define PXE_PROTOCOL_ETHERNET_IP  0x0800
01612 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806
01613 #define MAX_XMIT_FRAGMENTS        16
01614 
01615 typedef struct s_pxe_cpb_fill_header_fragmented {
01616   ///
01617   /// Source and destination MAC addresses.  These will be copied into
01618   /// the media header without doing byte swapping.
01619   ///
01620   PXE_MAC_ADDR        SrcAddr;
01621   PXE_MAC_ADDR        DestAddr;
01622 
01623   ///
01624   /// Length of packet data in bytes (not including the media header).
01625   ///
01626   PXE_UINT32          PacketLen;
01627 
01628   ///
01629   /// Protocol type.  This will be copied into the media header without
01630   /// doing byte swapping.  Protocol type numbers can be obtained from
01631   /// the Assigned Numbers RFC 1700.
01632   ///
01633   PXE_MEDIA_PROTOCOL  Protocol;
01634 
01635   ///
01636   /// Length of the media header in bytes.
01637   ///
01638   PXE_UINT16          MediaHeaderLen;
01639 
01640   ///
01641   /// Number of packet fragment descriptors.
01642   ///
01643   PXE_UINT16          FragCnt;
01644 
01645   ///
01646   /// Reserved, must be set to zero.
01647   ///
01648   PXE_UINT16          reserved;
01649 
01650   ///
01651   /// Array of packet fragment descriptors.  The first byte of the media
01652   /// header is the first byte of the first fragment.
01653   ///
01654   struct {
01655     ///
01656     /// Address of this packet fragment.
01657     ///
01658     PXE_UINT64  FragAddr;
01659 
01660     ///
01661     /// Length of this packet fragment.
01662     ///
01663     PXE_UINT32  FragLen;
01664 
01665     ///
01666     /// Reserved, must be set to zero.
01667     ///
01668     PXE_UINT32  reserved;
01669   } FragDesc[MAX_XMIT_FRAGMENTS];
01670 }
01671 PXE_CPB_FILL_HEADER_FRAGMENTED;
01672 
01673 typedef struct s_pxe_cpb_transmit {
01674   ///
01675   /// Address of first byte of frame buffer.  This is also the first byte
01676   /// of the media header.
01677   ///
01678   PXE_UINT64  FrameAddr;
01679 
01680   ///
01681   /// Length of the data portion of the frame buffer in bytes.  Do not
01682   /// include the length of the media header.
01683   ///
01684   PXE_UINT32  DataLen;
01685 
01686   ///
01687   /// Length of the media header in bytes.
01688   ///
01689   PXE_UINT16  MediaheaderLen;
01690 
01691   ///
01692   /// Reserved, must be zero.
01693   ///
01694   PXE_UINT16  reserved;
01695 } PXE_CPB_TRANSMIT;
01696 
01697 typedef struct s_pxe_cpb_transmit_fragments {
01698   ///
01699   /// Length of packet data in bytes (not including the media header).
01700   ///
01701   PXE_UINT32  FrameLen;
01702 
01703   ///
01704   /// Length of the media header in bytes.
01705   ///
01706   PXE_UINT16  MediaheaderLen;
01707 
01708   ///
01709   /// Number of packet fragment descriptors.
01710   ///
01711   PXE_UINT16  FragCnt;
01712 
01713   ///
01714   /// Array of frame fragment descriptors.  The first byte of the first
01715   /// fragment is also the first byte of the media header.
01716   ///
01717   struct {
01718     ///
01719     /// Address of this frame fragment.
01720     ///
01721     PXE_UINT64  FragAddr;
01722 
01723     ///
01724     /// Length of this frame fragment.
01725     ///
01726     PXE_UINT32  FragLen;
01727 
01728     ///
01729     /// Reserved, must be set to zero.
01730     ///
01731     PXE_UINT32  reserved;
01732   } FragDesc[MAX_XMIT_FRAGMENTS];
01733 }
01734 PXE_CPB_TRANSMIT_FRAGMENTS;
01735 
01736 typedef struct s_pxe_cpb_receive {
01737   ///
01738   /// Address of first byte of receive buffer.  This is also the first byte
01739   /// of the frame header.
01740   ///
01741   PXE_UINT64  BufferAddr;
01742 
01743   ///
01744   /// Length of receive buffer.  This must be large enough to hold the
01745   /// received frame (media header + data).  If the length of smaller than
01746   /// the received frame, data will be lost.
01747   ///
01748   PXE_UINT32  BufferLen;
01749 
01750   ///
01751   /// Reserved, must be set to zero.
01752   ///
01753   PXE_UINT32  reserved;
01754 } PXE_CPB_RECEIVE;
01755 
01756 typedef struct s_pxe_db_receive {
01757   ///
01758   /// Source and destination MAC addresses from media header.
01759   ///
01760   PXE_MAC_ADDR        SrcAddr;
01761   PXE_MAC_ADDR        DestAddr;
01762 
01763   ///
01764   /// Length of received frame.  May be larger than receive buffer size.
01765   /// The receive buffer will not be overwritten.  This is how to tell
01766   /// if data was lost because the receive buffer was too small.
01767   ///
01768   PXE_UINT32          FrameLen;
01769 
01770   ///
01771   /// Protocol type from media header.
01772   ///
01773   PXE_MEDIA_PROTOCOL  Protocol;
01774 
01775   ///
01776   /// Length of media header in received frame.
01777   ///
01778   PXE_UINT16          MediaHeaderLen;
01779 
01780   ///
01781   /// Type of receive frame.
01782   ///
01783   PXE_FRAME_TYPE      Type;
01784 
01785   ///
01786   /// Reserved, must be zero.
01787   ///
01788   PXE_UINT8           reserved[7];
01789 
01790 } PXE_DB_RECEIVE;
01791 
01792 #pragma pack()
01793 
01794 #endif