iPXE
Data Structures | Defines | Functions
axge.h File Reference

Asix 10/100/1000 USB Ethernet driver. More...

#include <ipxe/usb.h>
#include <ipxe/usbnet.h>

Go to the source code of this file.

Data Structures

struct  axge_bulk_in_control
 Bulk IN Control (undocumented) More...
struct  axge_tx_header
 Transmit packet header. More...
struct  axge_rx_footer
 Receive packet footer. More...
struct  axge_rx_descriptor
 Receive packet descriptor. More...
struct  axge_interrupt
 Interrupt data. More...
struct  axge_device
 An AXGE network device. More...

Defines

#define AXGE_READ_MAC_REGISTER
 Read MAC register.
#define AXGE_WRITE_MAC_REGISTER
 Write MAC register.
#define AXGE_PLSR   0x02
 Physical Link Status Register.
#define AXGE_PLSR_EPHY_10   0x10
 Ethernet at 10Mbps.
#define AXGE_PLSR_EPHY_100   0x20
 Ethernet at 100Mbps.
#define AXGE_PLSR_EPHY_1000   0x40
 Ethernet at 1000Mbps.
#define AXGE_PLSR_EPHY_ANY
#define AXGE_RCR   0x0b
 RX Control Register.
#define AXGE_RCR_PRO   0x0001
 Promiscuous mode.
#define AXGE_RCR_AMALL   0x0002
 Accept all multicasts.
#define AXGE_RCR_AB   0x0008
 Accept broadcasts.
#define AXGE_RCR_SO   0x0080
 Start operation.
#define AXGE_NIDR   0x10
 Node ID Register.
#define AXGE_MSR   0x22
 Medium Status Register.
#define AXGE_MSR_GM   0x0001
 Gigabit mode.
#define AXGE_MSR_FD   0x0002
 Full duplex.
#define AXGE_MSR_RFC   0x0010
 RX flow control enable.
#define AXGE_MSR_TFC   0x0020
 TX flow control enable.
#define AXGE_MSR_RE   0x0100
 Receive enable.
#define AXGE_EPPRCR   0x26
 Ethernet PHY Power and Reset Control Register.
#define AXGE_EPPRCR_IPRL   0x0020
 Undocumented.
#define AXGE_EPPRCR_DELAY_MS   200
 Delay after initialising EPPRCR.
#define AXGE_BICR   0x2e
 Bulk IN Control Register (undocumented)
#define AXGE_CSR   0x33
 Clock Select Register (undocumented)
#define AXGE_CSR_BCS   0x01
 Undocumented.
#define AXGE_CSR_ACS   0x02
 Undocumented.
#define AXGE_CSR_DELAY_MS   100
 Delay after initialising CSR.
#define AXGE_RX_LEN_MASK   0x1fff
 Receive packet length mask.
#define AXGE_RX_LEN_PAD_ALIGN   8
 Receive packet length alignment.
#define AXGE_RX_CRC_ERROR   0x2000
 Receive packet CRC error.
#define AXGE_RX_DROP_ERROR   0x8000
 Receive packet dropped error.
#define AXGE_INTR_MAGIC   0x00a1
 Interrupt magic signature.
#define AXGE_INTR_LINK_PPLS   0x0001
 Link is up.
#define AXGE_INTR_MAX_FILL   2
 Interrupt maximum fill level.
#define AXGE_IN_MAX_FILL   8
 Bulk IN maximum fill level.
#define AXGE_IN_MTU   2048
 Bulk IN buffer size.
#define AXGE_IN_RESERVE   sizeof ( struct axge_tx_header )
 Amount of space to reserve at start of bulk IN buffers.

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)

Detailed Description

Asix 10/100/1000 USB Ethernet driver.

Definition in file axge.h.


Define Documentation

Value:
( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE |             \
          USB_REQUEST_TYPE ( 0x01 ) )

Read MAC register.

Definition at line 16 of file axge.h.

Referenced by axge_read_register().

Value:
( USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE |            \
          USB_REQUEST_TYPE ( 0x01 ) )

Write MAC register.

Definition at line 21 of file axge.h.

Referenced by axge_write_register().

#define AXGE_PLSR   0x02

Physical Link Status Register.

Definition at line 26 of file axge.h.

Referenced by axge_check_link().

#define AXGE_PLSR_EPHY_10   0x10

Ethernet at 10Mbps.

Definition at line 27 of file axge.h.

#define AXGE_PLSR_EPHY_100   0x20

Ethernet at 100Mbps.

Definition at line 28 of file axge.h.

#define AXGE_PLSR_EPHY_1000   0x40

Ethernet at 1000Mbps.

Definition at line 29 of file axge.h.

Value:
( AXGE_PLSR_EPHY_10 |                                           \
          AXGE_PLSR_EPHY_100 |                                          \
          AXGE_PLSR_EPHY_1000 )

Definition at line 30 of file axge.h.

Referenced by axge_check_link().

#define AXGE_RCR   0x0b

RX Control Register.

Definition at line 36 of file axge.h.

Referenced by axge_close(), and axge_open().

#define AXGE_RCR_PRO   0x0001

Promiscuous mode.

Definition at line 37 of file axge.h.

Referenced by axge_open().

#define AXGE_RCR_AMALL   0x0002

Accept all multicasts.

Definition at line 38 of file axge.h.

Referenced by axge_open().

#define AXGE_RCR_AB   0x0008

Accept broadcasts.

Definition at line 39 of file axge.h.

Referenced by axge_open().

#define AXGE_RCR_SO   0x0080

Start operation.

Definition at line 40 of file axge.h.

Referenced by axge_open().

#define AXGE_NIDR   0x10

Node ID Register.

Definition at line 43 of file axge.h.

Referenced by axge_open(), and axge_probe().

#define AXGE_MSR   0x22

Medium Status Register.

Definition at line 46 of file axge.h.

Referenced by axge_probe().

#define AXGE_MSR_GM   0x0001

Gigabit mode.

Definition at line 47 of file axge.h.

Referenced by axge_probe().

#define AXGE_MSR_FD   0x0002

Full duplex.

Definition at line 48 of file axge.h.

Referenced by axge_probe().

#define AXGE_MSR_RFC   0x0010

RX flow control enable.

Definition at line 49 of file axge.h.

Referenced by axge_probe().

#define AXGE_MSR_TFC   0x0020

TX flow control enable.

Definition at line 50 of file axge.h.

Referenced by axge_probe().

#define AXGE_MSR_RE   0x0100

Receive enable.

Definition at line 51 of file axge.h.

Referenced by axge_probe().

#define AXGE_EPPRCR   0x26

Ethernet PHY Power and Reset Control Register.

Definition at line 54 of file axge.h.

Referenced by axge_probe().

#define AXGE_EPPRCR_IPRL   0x0020

Undocumented.

Definition at line 55 of file axge.h.

Referenced by axge_probe().

#define AXGE_EPPRCR_DELAY_MS   200

Delay after initialising EPPRCR.

Definition at line 58 of file axge.h.

Referenced by axge_probe().

#define AXGE_BICR   0x2e

Bulk IN Control Register (undocumented)

Definition at line 61 of file axge.h.

Referenced by axge_probe().

#define AXGE_CSR   0x33

Clock Select Register (undocumented)

Definition at line 76 of file axge.h.

Referenced by axge_probe().

#define AXGE_CSR_BCS   0x01

Undocumented.

Definition at line 77 of file axge.h.

Referenced by axge_probe().

#define AXGE_CSR_ACS   0x02

Undocumented.

Definition at line 78 of file axge.h.

Referenced by axge_probe().

#define AXGE_CSR_DELAY_MS   100

Delay after initialising CSR.

Definition at line 81 of file axge.h.

Referenced by axge_probe().

#define AXGE_RX_LEN_MASK   0x1fff

Receive packet length mask.

Definition at line 108 of file axge.h.

Referenced by axge_in_complete().

#define AXGE_RX_LEN_PAD_ALIGN   8

Receive packet length alignment.

Definition at line 111 of file axge.h.

Referenced by axge_in_complete().

#define AXGE_RX_CRC_ERROR   0x2000

Receive packet CRC error.

Definition at line 114 of file axge.h.

Referenced by axge_in_complete().

#define AXGE_RX_DROP_ERROR   0x8000

Receive packet dropped error.

Definition at line 117 of file axge.h.

Referenced by axge_in_complete().

#define AXGE_INTR_MAGIC   0x00a1

Interrupt magic signature.

Definition at line 132 of file axge.h.

Referenced by axge_intr_complete().

#define AXGE_INTR_LINK_PPLS   0x0001

Link is up.

Definition at line 135 of file axge.h.

Referenced by axge_intr_complete().

#define AXGE_INTR_MAX_FILL   2

Interrupt maximum fill level.

This is a policy decision.

Definition at line 153 of file axge.h.

Referenced by axge_probe().

#define AXGE_IN_MAX_FILL   8

Bulk IN maximum fill level.

This is a policy decision.

Definition at line 159 of file axge.h.

Referenced by axge_probe().

#define AXGE_IN_MTU   2048

Bulk IN buffer size.

This is a policy decision.

Definition at line 165 of file axge.h.

Referenced by axge_probe().

#define AXGE_IN_RESERVE   sizeof ( struct axge_tx_header )

Amount of space to reserve at start of bulk IN buffers.

This is required to allow for protocols such as ARP which may reuse a received I/O buffer for transmission.

Definition at line 172 of file axge.h.

Referenced by axge_in_complete(), and axge_probe().


Function Documentation

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )