iPXE
mii.h
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00001 #ifndef _IPXE_MII_H
00002 #define _IPXE_MII_H
00003 
00004 /** @file
00005  *
00006  * Media Independent Interface
00007  *
00008  */
00009 
00010 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
00011 
00012 #include <mii.h>
00013 #include <ipxe/netdevice.h>
00014 
00015 struct mii_interface;
00016 
00017 /** MII interface operations */
00018 struct mii_operations {
00019         /**
00020          * Read from MII register
00021          *
00022          * @v mdio              MII interface
00023          * @v phy               PHY address
00024          * @v reg               Register address
00025          * @ret data            Data read, or negative error
00026          */
00027         int ( * read ) ( struct mii_interface *mdio, unsigned int phy,
00028                          unsigned int reg );
00029         /**
00030          * Write to MII register
00031          *
00032          * @v mdio              MII interface
00033          * @v phy               PHY address
00034          * @v reg               Register address
00035          * @v data              Data to write
00036          * @ret rc              Return status code
00037          */
00038         int ( * write ) ( struct mii_interface *mdio, unsigned int phy,
00039                           unsigned int reg, unsigned int data );
00040 };
00041 
00042 /** An MII interface */
00043 struct mii_interface {
00044         /** Interface operations */
00045         struct mii_operations *op;
00046 };
00047 
00048 /** An MII device */
00049 struct mii_device {
00050         /** MII interface */
00051         struct mii_interface *mdio;
00052         /** PHY address */
00053         unsigned int address;
00054 };
00055 
00056 /**
00057  * Initialise MII interface
00058  *
00059  * @v mdio              MII interface
00060  * @v op                MII interface operations
00061  */
00062 static inline __attribute__ (( always_inline )) void
00063 mdio_init ( struct mii_interface *mdio, struct mii_operations *op ) {
00064         mdio->op = op;
00065 }
00066 
00067 /**
00068  * Initialise MII device
00069  *
00070  * @v mii               MII device
00071  * @v mdio              MII interface
00072  * @v address           PHY address
00073  */
00074 static inline __attribute__ (( always_inline )) void
00075 mii_init ( struct mii_device *mii, struct mii_interface *mdio,
00076            unsigned int address ) {
00077         mii->mdio = mdio;
00078         mii->address = address;
00079 }
00080 
00081 /**
00082  * Read from MII register
00083  *
00084  * @v mii               MII device
00085  * @v reg               Register address
00086  * @ret data            Data read, or negative error
00087  */
00088 static inline __attribute__ (( always_inline )) int
00089 mii_read ( struct mii_device *mii, unsigned int reg ) {
00090         struct mii_interface *mdio = mii->mdio;
00091 
00092         return mdio->op->read ( mdio, mii->address, reg );
00093 }
00094 
00095 /**
00096  * Write to MII register
00097  *
00098  * @v mii               MII device
00099  * @v reg               Register address
00100  * @v data              Data to write
00101  * @ret rc              Return status code
00102  */
00103 static inline __attribute__ (( always_inline )) int
00104 mii_write ( struct mii_device *mii, unsigned int reg, unsigned int data ) {
00105         struct mii_interface *mdio = mii->mdio;
00106 
00107         return mdio->op->write ( mdio, mii->address, reg, data );
00108 }
00109 
00110 /**
00111  * Dump MII registers (for debugging)
00112  *
00113  * @v mii               MII device
00114  */
00115 static inline void
00116 mii_dump ( struct mii_device *mii ) {
00117         unsigned int i;
00118         int data;
00119 
00120         /* Do nothing unless debug output is enabled */
00121         if ( ! DBG_LOG )
00122                 return;
00123 
00124         /* Dump basic MII register set */
00125         for ( i = 0 ; i < 16 ; i++ ) {
00126                 if ( ( i % 8 ) == 0 ) {
00127                         DBGC ( mii, "MII %p registers %02x-%02x:",
00128                                mii, i, ( i + 7 ) );
00129                 }
00130                 data = mii_read ( mii, i );
00131                 if ( data >= 0 ) {
00132                         DBGC ( mii, " %04x", data );
00133                 } else {
00134                         DBGC ( mii, " XXXX" );
00135                 }
00136                 if ( ( i % 8 ) == 7 )
00137                         DBGC ( mii, "\n" );
00138         }
00139 }
00140 
00141 /** Maximum time to wait for a reset, in milliseconds */
00142 #define MII_RESET_MAX_WAIT_MS 500
00143 
00144 /** Maximum PHY address */
00145 #define MII_MAX_PHY_ADDRESS 31
00146 
00147 extern int mii_restart ( struct mii_device *mii );
00148 extern int mii_reset ( struct mii_device *mii );
00149 extern int mii_check_link ( struct mii_device *mii,
00150                             struct net_device *netdev );
00151 extern int mii_find ( struct mii_device *mii );
00152 
00153 #endif /* _IPXE_MII_H */