iPXE
Defines | Functions
lan78xx.h File Reference

Microchip LAN78xx USB Ethernet driver. More...

#include "smscusb.h"
#include "smsc75xx.h"

Go to the source code of this file.

Defines

#define LAN78XX_HW_CFG   0x0010
 Hardware configuration register.
#define LAN78XX_HW_CFG_LED1_EN   0x00200000UL
 LED1 enable.
#define LAN78XX_HW_CFG_LED0_EN   0x00100000UL
 LED1 enable.
#define LAN78XX_HW_CFG_LRST   0x00000002UL
 Soft lite reset.
#define LAN78XX_INT_EP_CTL   0x0098
 Interrupt endpoint control register.
#define LAN78XX_INT_EP_CTL_RDFO_EN   0x00400000UL
 RX FIFO overflow.
#define LAN78XX_INT_EP_CTL_PHY_EN   0x00020000UL
 PHY interrupt.
#define LAN78XX_BULK_IN_DLY   0x0094
 Bulk IN delay register.
#define LAN78XX_BULK_IN_DLY_SET(ticks)   ( (ticks) << 0 )
 Delay / 16.7ns.
#define LAN78XX_E2P_BASE   0x0040
 EEPROM register base.
#define LAN78XX_USB_CFG0   0x0080
 USB configuration register 0.
#define LAN78XX_USB_CFG0_BIR   0x00000040UL
 Bulk IN use NAK.
#define LAN78XX_RFE_CTL   0x00b0
 Receive filtering engine control register.
#define LAN78XX_RFE_CTL_AB   0x00000400UL
 Accept broadcast.
#define LAN78XX_RFE_CTL_AM   0x00000200UL
 Accept multicast.
#define LAN78XX_RFE_CTL_AU   0x00000100UL
 Accept unicast.
#define LAN78XX_FCT_RX_CTL   0x00c0
 FIFO controller RX FIFO control register.
#define LAN78XX_FCT_RX_CTL_EN   0x80000000UL
 FCT RX enable.
#define LAN78XX_FCT_RX_CTL_BAD   0x02000000UL
 Store bad frames.
#define LAN78XX_FCT_TX_CTL   0x00c4
 FIFO controller TX FIFO control register.
#define LAN78XX_FCT_TX_CTL_EN   0x80000000UL
 FCT TX enable.
#define LAN78XX_MAC_RX   0x0104
 MAC receive register.
#define LAN78XX_MAC_RX_MAX_SIZE(mtu)   ( (mtu) << 16 )
 Max frame size.
#define LAN78XX_MAC_RX_MAX_SIZE_DEFAULT   LAN78XX_MAC_RX_MAX_SIZE ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
#define LAN78XX_MAC_RX_FCS   0x00000010UL
 FCS stripping.
#define LAN78XX_MAC_RX_EN   0x00000001UL
 RX enable.
#define LAN78XX_MAC_TX   0x0108
 MAC transmit register.
#define LAN78XX_MAC_TX_EN   0x00000001UL
 TX enable.
#define LAN78XX_RX_ADDR_BASE   0x0118
 MAC receive address register base.
#define LAN78XX_MII_BASE   0x0120
 MII register base.
#define LAN78XX_MII_PHY_INTR_MASK   25
 PHY interrupt mask MII register.
#define LAN78XX_MII_PHY_INTR_SOURCE   26
 PHY interrupt source MII register.
#define LAN78XX_PHY_INTR_ENABLE   0x8000
 PHY interrupt: global enable.
#define LAN78XX_PHY_INTR_LINK   0x2000
 PHY interrupt: link state change.
#define LAN78XX_PHY_INTR_ANEG_ERR   0x0800
 PHY interrupt: auto-negotiation failure.
#define LAN78XX_PHY_INTR_ANEG_DONE   0x0400
 PHY interrupt: auto-negotiation complete.
#define LAN78XX_ADDR_FILT_BASE   0x0400
 MAC address perfect filter register base.
#define LAN78XX_OTP_BASE   0x1000
 OTP register base.
#define LAN78XX_RESET_MAX_WAIT_MS   100
 Maximum time to wait for reset (in milliseconds)

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)

Detailed Description

Microchip LAN78xx USB Ethernet driver.

Definition in file lan78xx.h.


Define Documentation

#define LAN78XX_HW_CFG   0x0010

Hardware configuration register.

Definition at line 16 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac(), and lan78xx_reset().

#define LAN78XX_HW_CFG_LED1_EN   0x00200000UL

LED1 enable.

Definition at line 17 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac().

#define LAN78XX_HW_CFG_LED0_EN   0x00100000UL

LED1 enable.

Definition at line 18 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac().

#define LAN78XX_HW_CFG_LRST   0x00000002UL

Soft lite reset.

Definition at line 19 of file lan78xx.h.

Referenced by lan78xx_reset().

#define LAN78XX_INT_EP_CTL   0x0098

Interrupt endpoint control register.

Definition at line 22 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_INT_EP_CTL_RDFO_EN   0x00400000UL

RX FIFO overflow.

Definition at line 23 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_INT_EP_CTL_PHY_EN   0x00020000UL

PHY interrupt.

Definition at line 24 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_BULK_IN_DLY   0x0094

Bulk IN delay register.

Definition at line 27 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_BULK_IN_DLY_SET (   ticks)    ( (ticks) << 0 )

Delay / 16.7ns.

Definition at line 28 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_E2P_BASE   0x0040

EEPROM register base.

Definition at line 31 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac().

#define LAN78XX_USB_CFG0   0x0080

USB configuration register 0.

Definition at line 34 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_USB_CFG0_BIR   0x00000040UL

Bulk IN use NAK.

Definition at line 35 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_RFE_CTL   0x00b0

Receive filtering engine control register.

Definition at line 38 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_RFE_CTL_AB   0x00000400UL

Accept broadcast.

Definition at line 39 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_RFE_CTL_AM   0x00000200UL

Accept multicast.

Definition at line 40 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_RFE_CTL_AU   0x00000100UL

Accept unicast.

Definition at line 41 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_FCT_RX_CTL   0x00c0

FIFO controller RX FIFO control register.

Definition at line 44 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_FCT_RX_CTL_EN   0x80000000UL

FCT RX enable.

Definition at line 45 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_FCT_RX_CTL_BAD   0x02000000UL

Store bad frames.

Definition at line 46 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_FCT_TX_CTL   0x00c4

FIFO controller TX FIFO control register.

Definition at line 49 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_FCT_TX_CTL_EN   0x80000000UL

FCT TX enable.

Definition at line 50 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MAC_RX   0x0104

MAC receive register.

Definition at line 53 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MAC_RX_MAX_SIZE (   mtu)    ( (mtu) << 16 )

Max frame size.

Definition at line 54 of file lan78xx.h.

#define LAN78XX_MAC_RX_MAX_SIZE_DEFAULT   LAN78XX_MAC_RX_MAX_SIZE ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Definition at line 55 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MAC_RX_FCS   0x00000010UL

FCS stripping.

Definition at line 57 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MAC_RX_EN   0x00000001UL

RX enable.

Definition at line 58 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MAC_TX   0x0108

MAC transmit register.

Definition at line 61 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MAC_TX_EN   0x00000001UL

TX enable.

Definition at line 62 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_RX_ADDR_BASE   0x0118

MAC receive address register base.

Definition at line 65 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MII_BASE   0x0120

MII register base.

Definition at line 68 of file lan78xx.h.

Referenced by lan78xx_probe().

#define LAN78XX_MII_PHY_INTR_MASK   25

PHY interrupt mask MII register.

Definition at line 71 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_MII_PHY_INTR_SOURCE   26

PHY interrupt source MII register.

Definition at line 74 of file lan78xx.h.

Referenced by lan78xx_probe().

#define LAN78XX_PHY_INTR_ENABLE   0x8000

PHY interrupt: global enable.

Definition at line 77 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_PHY_INTR_LINK   0x2000

PHY interrupt: link state change.

Definition at line 80 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_PHY_INTR_ANEG_ERR   0x0800

PHY interrupt: auto-negotiation failure.

Definition at line 83 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_PHY_INTR_ANEG_DONE   0x0400

PHY interrupt: auto-negotiation complete.

Definition at line 86 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_ADDR_FILT_BASE   0x0400

MAC address perfect filter register base.

Definition at line 89 of file lan78xx.h.

Referenced by lan78xx_open().

#define LAN78XX_OTP_BASE   0x1000

OTP register base.

Definition at line 92 of file lan78xx.h.

Referenced by lan78xx_fetch_mac().

#define LAN78XX_RESET_MAX_WAIT_MS   100

Maximum time to wait for reset (in milliseconds)

Definition at line 95 of file lan78xx.h.

Referenced by lan78xx_reset().


Function Documentation

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )