iPXE
Data Structures | Defines | Functions
ns8390.h File Reference

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Data Structures

struct  ringbuffer

Defines

#define VENDOR_NONE   0
#define VENDOR_WD   1
#define VENDOR_NOVELL   2
#define VENDOR_3COM   3
#define FLAG_PIO   0x01
#define FLAG_16BIT   0x02
#define FLAG_790   0x04
#define MEM_8192   32
#define MEM_16384   64
#define MEM_32768   128
#define ISA_MAX_ADDR   0x400
#define WD_LOW_BASE   0x200
#define WD_HIGH_BASE   0x3e0
#define WD_NIC_ADDR   0x10
#define WD_MSR   0x00
#define WD_ICR   0x01
#define WD_IAR   0x02
#define WD_BIO   0x03
#define WD_IRR   0x04
#define WD_LAAR   0x05
#define WD_IJR   0x06
#define WD_GP2   0x07
#define WD_LAR   0x08
#define WD_BID   0x0E
#define WD_ICR_16BIT   0x01
#define WD_MSR_MENB   0x40
#define WD_LAAR_L16EN   0x40
#define WD_LAAR_M16EN   0x80
#define WD_SOFTCONFIG   0x20
#define TYPE_WD8003S   0x02
#define TYPE_WD8003E   0x03
#define TYPE_WD8013EBT   0x05
#define TYPE_WD8003W   0x24
#define TYPE_WD8003EB   0x25
#define TYPE_WD8013W   0x26
#define TYPE_WD8013EP   0x27
#define TYPE_WD8013WC   0x28
#define TYPE_WD8013EPC   0x29
#define TYPE_SMC8216T   0x2a
#define TYPE_SMC8216C   0x2b
#define TYPE_SMC8416T   0x00 /* Bogus entries: the 8416 generates the */
#define TYPE_SMC8416C   0x00 /* the same codes as the 8216. */
#define TYPE_SMC8013EBP   0x2c
#define _3COM_TX_PAGE_OFFSET_8BIT   0x20
#define _3COM_TX_PAGE_OFFSET_16BIT   0x0
#define _3COM_RX_PAGE_OFFSET_16BIT   0x20
#define _3COM_ASIC_OFFSET   0x400
#define _3COM_NIC_OFFSET   0x0
#define _3COM_PSTR   0
#define _3COM_PSPR   1
#define _3COM_BCFR   3
#define _3COM_BCFR_2E0   0x01
#define _3COM_BCFR_2A0   0x02
#define _3COM_BCFR_280   0x04
#define _3COM_BCFR_250   0x08
#define _3COM_BCFR_350   0x10
#define _3COM_BCFR_330   0x20
#define _3COM_BCFR_310   0x40
#define _3COM_BCFR_300   0x80
#define _3COM_PCFR   4
#define _3COM_PCFR_PIO   0
#define _3COM_PCFR_C8000   0x10
#define _3COM_PCFR_CC000   0x20
#define _3COM_PCFR_D8000   0x40
#define _3COM_PCFR_DC000   0x80
#define _3COM_CR   6
#define _3COM_CR_RST   0x01 /* Reset GA and NIC */
#define _3COM_CR_XSEL   0x02 /* Transceiver select. BNC=1(def) AUI=0 */
#define _3COM_CR_EALO   0x04 /* window EA PROM 0-15 to I/O base */
#define _3COM_CR_EAHI   0x08 /* window EA PROM 16-31 to I/O base */
#define _3COM_CR_SHARE   0x10 /* select interrupt sharing option */
#define _3COM_CR_DBSEL   0x20 /* Double buffer select */
#define _3COM_CR_DDIR   0x40 /* DMA direction select */
#define _3COM_CR_START   0x80 /* Start DMA controller */
#define _3COM_GACFR   5
#define _3COM_GACFR_MBS0   0x01
#define _3COM_GACFR_MBS1   0x02
#define _3COM_GACFR_MBS2   0x04
#define _3COM_GACFR_RSEL   0x08 /* enable shared memory */
#define _3COM_GACFR_TEST   0x10 /* for GA testing */
#define _3COM_GACFR_OWS   0x20 /* select 0WS access to GA */
#define _3COM_GACFR_TCM   0x40 /* Mask DMA interrupts */
#define _3COM_GACFR_NIM   0x80 /* Mask NIC interrupts */
#define _3COM_STREG   7
#define _3COM_STREG_REV   0x07 /* GA revision */
#define _3COM_STREG_DIP   0x08 /* DMA in progress */
#define _3COM_STREG_DTC   0x10 /* DMA terminal count */
#define _3COM_STREG_OFLW   0x20 /* Overflow */
#define _3COM_STREG_UFLW   0x40 /* Underflow */
#define _3COM_STREG_DPRDY   0x80 /* Data port ready */
#define _3COM_IDCFR   8
#define _3COM_IDCFR_DRQ0   0x01 /* DMA request 1 select */
#define _3COM_IDCFR_DRQ1   0x02 /* DMA request 2 select */
#define _3COM_IDCFR_DRQ2   0x04 /* DMA request 3 select */
#define _3COM_IDCFR_UNUSED   0x08 /* not used */
#define _3COM_IDCFR_IRQ2   0x10 /* Interrupt request 2 select */
#define _3COM_IDCFR_IRQ3   0x20 /* Interrupt request 3 select */
#define _3COM_IDCFR_IRQ4   0x40 /* Interrupt request 4 select */
#define _3COM_IDCFR_IRQ5   0x80 /* Interrupt request 5 select */
#define _3COM_IRQ2   2
#define _3COM_IRQ3   3
#define _3COM_IRQ4   4
#define _3COM_IRQ5   5
#define _3COM_DAMSB   9
#define _3COM_DALSB   0x0a
#define _3COM_VPTR2   0x0b
#define _3COM_VPTR1   0x0c
#define _3COM_VPTR0   0x0d
#define _3COM_RFMSB   0x0e
#define _3COM_RFLSB   0x0f
#define NE_ASIC_OFFSET   0x10
#define NE_RESET   0x0F /* Used to reset card */
#define NE_DATA   0x00 /* Used to read/write NIC mem */
#define COMPEX_RL2000_TRIES   200
#define D8390_P0_COMMAND   0x00
#define D8390_P0_PSTART   0x01
#define D8390_P0_PSTOP   0x02
#define D8390_P0_BOUND   0x03
#define D8390_P0_TSR   0x04
#define D8390_P0_TPSR   0x04
#define D8390_P0_TBCR0   0x05
#define D8390_P0_TBCR1   0x06
#define D8390_P0_ISR   0x07
#define D8390_P0_RSAR0   0x08
#define D8390_P0_RSAR1   0x09
#define D8390_P0_RBCR0   0x0A
#define D8390_P0_RBCR1   0x0B
#define D8390_P0_RSR   0x0C
#define D8390_P0_RCR   0x0C
#define D8390_P0_TCR   0x0D
#define D8390_P0_DCR   0x0E
#define D8390_P0_IMR   0x0F
#define D8390_P1_COMMAND   0x00
#define D8390_P1_PAR0   0x01
#define D8390_P1_PAR1   0x02
#define D8390_P1_PAR2   0x03
#define D8390_P1_PAR3   0x04
#define D8390_P1_PAR4   0x05
#define D8390_P1_PAR5   0x06
#define D8390_P1_CURR   0x07
#define D8390_P1_MAR0   0x08
#define D8390_COMMAND_PS0   0x0 /* Page 0 select */
#define D8390_COMMAND_PS1   0x40 /* Page 1 select */
#define D8390_COMMAND_PS2   0x80 /* Page 2 select */
#define D8390_COMMAND_RD2   0x20 /* Remote DMA control */
#define D8390_COMMAND_RD1   0x10
#define D8390_COMMAND_RD0   0x08
#define D8390_COMMAND_TXP   0x04 /* transmit packet */
#define D8390_COMMAND_STA   0x02 /* start */
#define D8390_COMMAND_STP   0x01 /* stop */
#define D8390_RCR_MON   0x20 /* monitor mode */
#define D8390_DCR_FT1   0x40
#define D8390_DCR_LS   0x08 /* Loopback select */
#define D8390_DCR_WTS   0x01 /* Word transfer select */
#define D8390_ISR_PRX   0x01 /* successful recv */
#define D8390_ISR_PTX   0x02 /* successful xmit */
#define D8390_ISR_RXE   0x04 /* receive error */
#define D8390_ISR_TXE   0x08 /* transmit error */
#define D8390_ISR_OVW   0x10 /* Overflow */
#define D8390_ISR_CNT   0x20 /* Counter overflow */
#define D8390_ISR_RDC   0x40 /* Remote DMA complete */
#define D8390_ISR_RST   0x80 /* reset */
#define D8390_RSTAT_PRX   0x01 /* successful recv */
#define D8390_RSTAT_CRC   0x02 /* CRC error */
#define D8390_RSTAT_FAE   0x04 /* Frame alignment error */
#define D8390_RSTAT_OVER   0x08 /* FIFO overrun */
#define D8390_TXBUF_SIZE   6
#define D8390_RXBUF_END   32
#define D8390_PAGE_SIZE   256

Functions

 FILE_LICENCE (BSD2)

Define Documentation

#define VENDOR_NONE   0

Definition at line 11 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define VENDOR_WD   1

Definition at line 12 of file ns8390.h.

Referenced by eth_probe().

#define VENDOR_NOVELL   2

Definition at line 13 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define VENDOR_3COM   3

Definition at line 14 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define FLAG_PIO   0x01

Definition at line 16 of file ns8390.h.

Referenced by eth_probe(), ne_poll(), ne_probe(), ns8390_poll(), and ns8390_transmit().

#define FLAG_16BIT   0x02
#define FLAG_790   0x04

Definition at line 18 of file ns8390.h.

Referenced by eth_probe(), eth_rx_overrun(), ns8390_poll(), ns8390_reset(), and ns8390_transmit().

#define MEM_8192   32

Definition at line 20 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define MEM_16384   64

Definition at line 21 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define MEM_32768   128

Definition at line 22 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define ISA_MAX_ADDR   0x400

Definition at line 24 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define WD_LOW_BASE   0x200

Definition at line 29 of file ns8390.h.

Referenced by eth_probe().

#define WD_HIGH_BASE   0x3e0

Definition at line 30 of file ns8390.h.

Referenced by eth_probe().

#define WD_NIC_ADDR   0x10

Definition at line 34 of file ns8390.h.

Referenced by eth_probe().

#define WD_MSR   0x00

Definition at line 39 of file ns8390.h.

Referenced by eth_probe(), ns8390_poll(), and ns8390_transmit().

#define WD_ICR   0x01

Definition at line 40 of file ns8390.h.

Referenced by eth_probe().

#define WD_IAR   0x02

Definition at line 41 of file ns8390.h.

#define WD_BIO   0x03

Definition at line 42 of file ns8390.h.

#define WD_IRR   0x04

Definition at line 43 of file ns8390.h.

#define WD_LAAR   0x05

Definition at line 44 of file ns8390.h.

Referenced by eth_probe(), ns8390_poll(), and ns8390_transmit().

#define WD_IJR   0x06

Definition at line 45 of file ns8390.h.

#define WD_GP2   0x07

Definition at line 46 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define WD_LAR   0x08

Definition at line 47 of file ns8390.h.

Referenced by eth_probe().

#define WD_BID   0x0E

Definition at line 48 of file ns8390.h.

Referenced by eth_probe().

#define WD_ICR_16BIT   0x01

Definition at line 50 of file ns8390.h.

Referenced by eth_probe().

#define WD_MSR_MENB   0x40

Definition at line 52 of file ns8390.h.

Referenced by eth_probe(), ns8390_poll(), and ns8390_transmit().

#define WD_LAAR_L16EN   0x40

Definition at line 54 of file ns8390.h.

Referenced by eth_probe().

#define WD_LAAR_M16EN   0x80

Definition at line 55 of file ns8390.h.

Referenced by eth_probe(), ns8390_poll(), and ns8390_transmit().

#define WD_SOFTCONFIG   0x20

Definition at line 57 of file ns8390.h.

Referenced by eth_probe().

#define TYPE_WD8003S   0x02

Definition at line 62 of file ns8390.h.

#define TYPE_WD8003E   0x03

Definition at line 63 of file ns8390.h.

#define TYPE_WD8013EBT   0x05

Definition at line 64 of file ns8390.h.

#define TYPE_WD8003W   0x24

Definition at line 65 of file ns8390.h.

#define TYPE_WD8003EB   0x25

Definition at line 66 of file ns8390.h.

#define TYPE_WD8013W   0x26

Definition at line 67 of file ns8390.h.

#define TYPE_WD8013EP   0x27

Definition at line 68 of file ns8390.h.

Referenced by eth_probe().

#define TYPE_WD8013WC   0x28

Definition at line 69 of file ns8390.h.

#define TYPE_WD8013EPC   0x29

Definition at line 70 of file ns8390.h.

#define TYPE_SMC8216T   0x2a

Definition at line 71 of file ns8390.h.

Referenced by eth_probe().

#define TYPE_SMC8216C   0x2b

Definition at line 72 of file ns8390.h.

Referenced by eth_probe().

#define TYPE_SMC8416T   0x00 /* Bogus entries: the 8416 generates the */

Definition at line 73 of file ns8390.h.

#define TYPE_SMC8416C   0x00 /* the same codes as the 8216. */

Definition at line 74 of file ns8390.h.

#define TYPE_SMC8013EBP   0x2c

Definition at line 75 of file ns8390.h.

#define _3COM_TX_PAGE_OFFSET_8BIT   0x20

Definition at line 85 of file ns8390.h.

#define _3COM_TX_PAGE_OFFSET_16BIT   0x0

Definition at line 86 of file ns8390.h.

#define _3COM_RX_PAGE_OFFSET_16BIT   0x20

Definition at line 87 of file ns8390.h.

#define _3COM_ASIC_OFFSET   0x400

Definition at line 89 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_NIC_OFFSET   0x0

Definition at line 90 of file ns8390.h.

#define _3COM_PSTR   0

Definition at line 92 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_PSPR   1

Definition at line 93 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_BCFR   3

Definition at line 95 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_BCFR_2E0   0x01

Definition at line 96 of file ns8390.h.

#define _3COM_BCFR_2A0   0x02

Definition at line 97 of file ns8390.h.

#define _3COM_BCFR_280   0x04

Definition at line 98 of file ns8390.h.

#define _3COM_BCFR_250   0x08

Definition at line 99 of file ns8390.h.

#define _3COM_BCFR_350   0x10

Definition at line 100 of file ns8390.h.

#define _3COM_BCFR_330   0x20

Definition at line 101 of file ns8390.h.

#define _3COM_BCFR_310   0x40

Definition at line 102 of file ns8390.h.

#define _3COM_BCFR_300   0x80

Definition at line 103 of file ns8390.h.

#define _3COM_PCFR   4

Definition at line 104 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_PCFR_PIO   0

Definition at line 105 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_PCFR_C8000   0x10

Definition at line 106 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_PCFR_CC000   0x20

Definition at line 107 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_PCFR_D8000   0x40

Definition at line 108 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_PCFR_DC000   0x80

Definition at line 109 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_CR   6

Definition at line 110 of file ns8390.h.

Referenced by eth_pio_read(), eth_pio_write(), eth_probe(), and ns8390_reset().

#define _3COM_CR_RST   0x01 /* Reset GA and NIC */

Definition at line 111 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_CR_XSEL   0x02 /* Transceiver select. BNC=1(def) AUI=0 */

Definition at line 112 of file ns8390.h.

Referenced by eth_probe(), and ns8390_reset().

#define _3COM_CR_EALO   0x04 /* window EA PROM 0-15 to I/O base */

Definition at line 113 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_CR_EAHI   0x08 /* window EA PROM 16-31 to I/O base */

Definition at line 114 of file ns8390.h.

#define _3COM_CR_SHARE   0x10 /* select interrupt sharing option */

Definition at line 115 of file ns8390.h.

#define _3COM_CR_DBSEL   0x20 /* Double buffer select */

Definition at line 116 of file ns8390.h.

#define _3COM_CR_DDIR   0x40 /* DMA direction select */

Definition at line 117 of file ns8390.h.

Referenced by eth_pio_write().

#define _3COM_CR_START   0x80 /* Start DMA controller */

Definition at line 118 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define _3COM_GACFR   5

Definition at line 119 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_GACFR_MBS0   0x01

Definition at line 120 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_GACFR_MBS1   0x02

Definition at line 121 of file ns8390.h.

#define _3COM_GACFR_MBS2   0x04

Definition at line 122 of file ns8390.h.

#define _3COM_GACFR_RSEL   0x08 /* enable shared memory */

Definition at line 123 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_GACFR_TEST   0x10 /* for GA testing */

Definition at line 124 of file ns8390.h.

#define _3COM_GACFR_OWS   0x20 /* select 0WS access to GA */

Definition at line 125 of file ns8390.h.

#define _3COM_GACFR_TCM   0x40 /* Mask DMA interrupts */

Definition at line 126 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_GACFR_NIM   0x80 /* Mask NIC interrupts */

Definition at line 127 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_STREG   7

Definition at line 128 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define _3COM_STREG_REV   0x07 /* GA revision */

Definition at line 129 of file ns8390.h.

#define _3COM_STREG_DIP   0x08 /* DMA in progress */

Definition at line 130 of file ns8390.h.

#define _3COM_STREG_DTC   0x10 /* DMA terminal count */

Definition at line 131 of file ns8390.h.

#define _3COM_STREG_OFLW   0x20 /* Overflow */

Definition at line 132 of file ns8390.h.

#define _3COM_STREG_UFLW   0x40 /* Underflow */

Definition at line 133 of file ns8390.h.

#define _3COM_STREG_DPRDY   0x80 /* Data port ready */

Definition at line 134 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define _3COM_IDCFR   8

Definition at line 135 of file ns8390.h.

#define _3COM_IDCFR_DRQ0   0x01 /* DMA request 1 select */

Definition at line 136 of file ns8390.h.

#define _3COM_IDCFR_DRQ1   0x02 /* DMA request 2 select */

Definition at line 137 of file ns8390.h.

#define _3COM_IDCFR_DRQ2   0x04 /* DMA request 3 select */

Definition at line 138 of file ns8390.h.

#define _3COM_IDCFR_UNUSED   0x08 /* not used */

Definition at line 139 of file ns8390.h.

#define _3COM_IDCFR_IRQ2   0x10 /* Interrupt request 2 select */

Definition at line 140 of file ns8390.h.

#define _3COM_IDCFR_IRQ3   0x20 /* Interrupt request 3 select */

Definition at line 141 of file ns8390.h.

#define _3COM_IDCFR_IRQ4   0x40 /* Interrupt request 4 select */

Definition at line 142 of file ns8390.h.

#define _3COM_IDCFR_IRQ5   0x80 /* Interrupt request 5 select */

Definition at line 143 of file ns8390.h.

#define _3COM_IRQ2   2

Definition at line 144 of file ns8390.h.

#define _3COM_IRQ3   3

Definition at line 145 of file ns8390.h.

#define _3COM_IRQ4   4

Definition at line 146 of file ns8390.h.

#define _3COM_IRQ5   5

Definition at line 147 of file ns8390.h.

#define _3COM_DAMSB   9

Definition at line 148 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define _3COM_DALSB   0x0a

Definition at line 149 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define _3COM_VPTR2   0x0b

Definition at line 150 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_VPTR1   0x0c

Definition at line 151 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_VPTR0   0x0d

Definition at line 152 of file ns8390.h.

Referenced by eth_probe().

#define _3COM_RFMSB   0x0e

Definition at line 153 of file ns8390.h.

#define _3COM_RFLSB   0x0f

Definition at line 154 of file ns8390.h.

#define NE_ASIC_OFFSET   0x10

Definition at line 159 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define NE_RESET   0x0F /* Used to reset card */

Definition at line 160 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define NE_DATA   0x00 /* Used to read/write NIC mem */

Definition at line 161 of file ns8390.h.

#define COMPEX_RL2000_TRIES   200

Definition at line 163 of file ns8390.h.

Referenced by eth_pio_write().

#define D8390_P0_COMMAND   0x00
#define D8390_P0_PSTART   0x01

Definition at line 169 of file ns8390.h.

Referenced by eth_probe(), ne_probe(), ne_reset(), and ns8390_reset().

#define D8390_P0_PSTOP   0x02

Definition at line 170 of file ns8390.h.

Referenced by eth_probe(), ne_probe(), ne_reset(), and ns8390_reset().

#define D8390_P0_BOUND   0x03

Definition at line 171 of file ns8390.h.

Referenced by ne_poll(), ne_reset(), ns8390_poll(), and ns8390_reset().

#define D8390_P0_TSR   0x04

Definition at line 172 of file ns8390.h.

#define D8390_P0_TPSR   0x04

Definition at line 173 of file ns8390.h.

Referenced by ne_reset(), ne_transmit(), ns8390_reset(), and ns8390_transmit().

#define D8390_P0_TBCR0   0x05

Definition at line 174 of file ns8390.h.

Referenced by ne_transmit(), and ns8390_transmit().

#define D8390_P0_TBCR1   0x06

Definition at line 175 of file ns8390.h.

Referenced by ne_transmit(), and ns8390_transmit().

#define D8390_P0_ISR   0x07

Definition at line 176 of file ns8390.h.

Referenced by eth_pio_write(), eth_rx_overrun(), ne_reset(), ns8390_poll(), and ns8390_reset().

#define D8390_P0_RSAR0   0x08

Definition at line 177 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define D8390_P0_RSAR1   0x09

Definition at line 178 of file ns8390.h.

Referenced by eth_pio_read(), and eth_pio_write().

#define D8390_P0_RBCR0   0x0A

Definition at line 179 of file ns8390.h.

Referenced by eth_pio_read(), eth_pio_write(), eth_rx_overrun(), ne_reset(), and ns8390_reset().

#define D8390_P0_RBCR1   0x0B

Definition at line 180 of file ns8390.h.

Referenced by eth_pio_read(), eth_pio_write(), eth_rx_overrun(), ne_reset(), and ns8390_reset().

#define D8390_P0_RSR   0x0C

Definition at line 181 of file ns8390.h.

Referenced by ne_poll(), and ns8390_poll().

#define D8390_P0_RCR   0x0C

Definition at line 182 of file ns8390.h.

Referenced by enable_multicast(), eth_probe(), ne_probe(), ne_reset(), and ns8390_reset().

#define D8390_P0_TCR   0x0D

Definition at line 183 of file ns8390.h.

Referenced by eth_rx_overrun(), ne_probe1(), ne_reset(), and ns8390_reset().

#define D8390_P0_DCR   0x0E

Definition at line 184 of file ns8390.h.

Referenced by eth_probe(), ne_probe(), ne_reset(), and ns8390_reset().

#define D8390_P0_IMR   0x0F

Definition at line 185 of file ns8390.h.

Referenced by ne_reset(), and ns8390_reset().

#define D8390_P1_COMMAND   0x00

Definition at line 186 of file ns8390.h.

#define D8390_P1_PAR0   0x01

Definition at line 187 of file ns8390.h.

Referenced by ne_reset(), and ns8390_reset().

#define D8390_P1_PAR1   0x02

Definition at line 188 of file ns8390.h.

#define D8390_P1_PAR2   0x03

Definition at line 189 of file ns8390.h.

#define D8390_P1_PAR3   0x04

Definition at line 190 of file ns8390.h.

#define D8390_P1_PAR4   0x05

Definition at line 191 of file ns8390.h.

#define D8390_P1_PAR5   0x06

Definition at line 192 of file ns8390.h.

#define D8390_P1_CURR   0x07

Definition at line 193 of file ns8390.h.

Referenced by ne_poll(), ne_reset(), ns8390_poll(), and ns8390_reset().

#define D8390_P1_MAR0   0x08

Definition at line 194 of file ns8390.h.

Referenced by ne_reset(), and ns8390_reset().

#define D8390_COMMAND_PS0   0x0 /* Page 0 select */
#define D8390_COMMAND_PS1   0x40 /* Page 1 select */

Definition at line 197 of file ns8390.h.

Referenced by enable_multicast(), ne_poll(), ne_probe1(), ne_reset(), ns8390_poll(), and ns8390_reset().

#define D8390_COMMAND_PS2   0x80 /* Page 2 select */

Definition at line 198 of file ns8390.h.

#define D8390_COMMAND_RD2   0x20 /* Remote DMA control */
#define D8390_COMMAND_RD1   0x10

Definition at line 200 of file ns8390.h.

Referenced by eth_pio_write().

#define D8390_COMMAND_RD0   0x08

Definition at line 201 of file ns8390.h.

Referenced by eth_pio_read().

#define D8390_COMMAND_TXP   0x04 /* transmit packet */

Definition at line 202 of file ns8390.h.

Referenced by ne_transmit(), and ns8390_transmit().

#define D8390_COMMAND_STA   0x02 /* start */
#define D8390_COMMAND_STP   0x01 /* stop */

Definition at line 204 of file ns8390.h.

Referenced by eth_probe(), eth_rx_overrun(), ne_probe(), ne_probe1(), ne_reset(), and ns8390_reset().

#define D8390_RCR_MON   0x20 /* monitor mode */

Definition at line 206 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define D8390_DCR_FT1   0x40

Definition at line 208 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define D8390_DCR_LS   0x08 /* Loopback select */

Definition at line 209 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define D8390_DCR_WTS   0x01 /* Word transfer select */

Definition at line 210 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define D8390_ISR_PRX   0x01 /* successful recv */

Definition at line 212 of file ns8390.h.

#define D8390_ISR_PTX   0x02 /* successful xmit */

Definition at line 213 of file ns8390.h.

#define D8390_ISR_RXE   0x04 /* receive error */

Definition at line 214 of file ns8390.h.

#define D8390_ISR_TXE   0x08 /* transmit error */

Definition at line 215 of file ns8390.h.

#define D8390_ISR_OVW   0x10 /* Overflow */

Definition at line 216 of file ns8390.h.

Referenced by eth_rx_overrun(), and ns8390_poll().

#define D8390_ISR_CNT   0x20 /* Counter overflow */

Definition at line 217 of file ns8390.h.

#define D8390_ISR_RDC   0x40 /* Remote DMA complete */

Definition at line 218 of file ns8390.h.

Referenced by eth_pio_write().

#define D8390_ISR_RST   0x80 /* reset */

Definition at line 219 of file ns8390.h.

#define D8390_RSTAT_PRX   0x01 /* successful recv */

Definition at line 221 of file ns8390.h.

Referenced by ne_poll(), and ns8390_poll().

#define D8390_RSTAT_CRC   0x02 /* CRC error */

Definition at line 222 of file ns8390.h.

#define D8390_RSTAT_FAE   0x04 /* Frame alignment error */

Definition at line 223 of file ns8390.h.

#define D8390_RSTAT_OVER   0x08 /* FIFO overrun */

Definition at line 224 of file ns8390.h.

#define D8390_TXBUF_SIZE   6

Definition at line 226 of file ns8390.h.

Referenced by eth_probe(), and ne_probe().

#define D8390_RXBUF_END   32

Definition at line 227 of file ns8390.h.

#define D8390_PAGE_SIZE   256

Definition at line 228 of file ns8390.h.


Function Documentation

FILE_LICENCE ( BSD2  )