iPXE
ns8390.h
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00001 /**************************************************************************
00002 ETHERBOOT -  BOOTP/TFTP Bootstrap Program
00003 
00004 Author: Martin Renters
00005   Date: Jun/94
00006 
00007 **************************************************************************/
00008 
00009 FILE_LICENCE ( BSD2 );
00010 
00011 #define VENDOR_NONE     0
00012 #define VENDOR_WD       1
00013 #define VENDOR_NOVELL   2
00014 #define VENDOR_3COM     3
00015 
00016 #define FLAG_PIO        0x01
00017 #define FLAG_16BIT      0x02
00018 #define FLAG_790        0x04
00019 
00020 #define MEM_8192        32
00021 #define MEM_16384       64
00022 #define MEM_32768       128
00023 
00024 #define ISA_MAX_ADDR    0x400
00025 
00026 /**************************************************************************
00027 Western Digital/SMC Board Definitions
00028 **************************************************************************/
00029 #define WD_LOW_BASE     0x200
00030 #define WD_HIGH_BASE    0x3e0
00031 #ifndef WD_DEFAULT_MEM
00032 #define WD_DEFAULT_MEM  0xD0000
00033 #endif
00034 #define WD_NIC_ADDR     0x10
00035 
00036 /**************************************************************************
00037 Western Digital/SMC ASIC Addresses
00038 **************************************************************************/
00039 #define WD_MSR          0x00
00040 #define WD_ICR          0x01
00041 #define WD_IAR          0x02
00042 #define WD_BIO          0x03
00043 #define WD_IRR          0x04
00044 #define WD_LAAR         0x05
00045 #define WD_IJR          0x06
00046 #define WD_GP2          0x07
00047 #define WD_LAR          0x08
00048 #define WD_BID          0x0E
00049 
00050 #define WD_ICR_16BIT    0x01
00051 
00052 #define WD_MSR_MENB     0x40
00053 
00054 #define WD_LAAR_L16EN   0x40
00055 #define WD_LAAR_M16EN   0x80
00056 
00057 #define WD_SOFTCONFIG   0x20
00058 
00059 /**************************************************************************
00060 Western Digital/SMC Board Types
00061 **************************************************************************/
00062 #define TYPE_WD8003S    0x02
00063 #define TYPE_WD8003E    0x03
00064 #define TYPE_WD8013EBT  0x05
00065 #define TYPE_WD8003W    0x24
00066 #define TYPE_WD8003EB   0x25
00067 #define TYPE_WD8013W    0x26
00068 #define TYPE_WD8013EP   0x27
00069 #define TYPE_WD8013WC   0x28
00070 #define TYPE_WD8013EPC  0x29
00071 #define TYPE_SMC8216T   0x2a
00072 #define TYPE_SMC8216C   0x2b
00073 #define TYPE_SMC8416T   0x00    /* Bogus entries: the 8416 generates the */
00074 #define TYPE_SMC8416C   0x00    /* the same codes as the 8216. */
00075 #define TYPE_SMC8013EBP 0x2c
00076 
00077 /**************************************************************************
00078 3com 3c503 definitions
00079 **************************************************************************/
00080 
00081 #ifndef _3COM_BASE
00082 #define _3COM_BASE 0x300
00083 #endif
00084 
00085 #define _3COM_TX_PAGE_OFFSET_8BIT     0x20
00086 #define _3COM_TX_PAGE_OFFSET_16BIT    0x0
00087 #define _3COM_RX_PAGE_OFFSET_16BIT    0x20
00088 
00089 #define _3COM_ASIC_OFFSET 0x400
00090 #define _3COM_NIC_OFFSET 0x0
00091 
00092 #define _3COM_PSTR            0
00093 #define _3COM_PSPR            1
00094 
00095 #define _3COM_BCFR            3
00096 #define _3COM_BCFR_2E0        0x01
00097 #define _3COM_BCFR_2A0        0x02
00098 #define _3COM_BCFR_280        0x04
00099 #define _3COM_BCFR_250        0x08
00100 #define _3COM_BCFR_350        0x10
00101 #define _3COM_BCFR_330        0x20
00102 #define _3COM_BCFR_310        0x40
00103 #define _3COM_BCFR_300        0x80
00104 #define _3COM_PCFR            4
00105 #define _3COM_PCFR_PIO        0
00106 #define _3COM_PCFR_C8000      0x10
00107 #define _3COM_PCFR_CC000      0x20
00108 #define _3COM_PCFR_D8000      0x40
00109 #define _3COM_PCFR_DC000      0x80
00110 #define _3COM_CR              6
00111 #define _3COM_CR_RST          0x01    /* Reset GA and NIC */
00112 #define _3COM_CR_XSEL         0x02    /* Transceiver select. BNC=1(def) AUI=0 */
00113 #define _3COM_CR_EALO         0x04    /* window EA PROM 0-15 to I/O base */
00114 #define _3COM_CR_EAHI         0x08    /* window EA PROM 16-31 to I/O base */
00115 #define _3COM_CR_SHARE        0x10    /* select interrupt sharing option */
00116 #define _3COM_CR_DBSEL        0x20    /* Double buffer select */
00117 #define _3COM_CR_DDIR         0x40    /* DMA direction select */
00118 #define _3COM_CR_START        0x80    /* Start DMA controller */
00119 #define _3COM_GACFR           5
00120 #define _3COM_GACFR_MBS0      0x01
00121 #define _3COM_GACFR_MBS1      0x02
00122 #define _3COM_GACFR_MBS2      0x04
00123 #define _3COM_GACFR_RSEL      0x08    /* enable shared memory */
00124 #define _3COM_GACFR_TEST      0x10    /* for GA testing */
00125 #define _3COM_GACFR_OWS       0x20    /* select 0WS access to GA */
00126 #define _3COM_GACFR_TCM       0x40    /* Mask DMA interrupts */
00127 #define _3COM_GACFR_NIM       0x80    /* Mask NIC interrupts */
00128 #define _3COM_STREG           7
00129 #define _3COM_STREG_REV       0x07    /* GA revision */
00130 #define _3COM_STREG_DIP       0x08    /* DMA in progress */
00131 #define _3COM_STREG_DTC       0x10    /* DMA terminal count */
00132 #define _3COM_STREG_OFLW      0x20    /* Overflow */
00133 #define _3COM_STREG_UFLW      0x40    /* Underflow */
00134 #define _3COM_STREG_DPRDY     0x80    /* Data port ready */
00135 #define _3COM_IDCFR           8
00136 #define _3COM_IDCFR_DRQ0      0x01    /* DMA request 1 select */
00137 #define _3COM_IDCFR_DRQ1      0x02    /* DMA request 2 select */
00138 #define _3COM_IDCFR_DRQ2      0x04    /* DMA request 3 select */
00139 #define _3COM_IDCFR_UNUSED    0x08    /* not used */
00140 #define _3COM_IDCFR_IRQ2      0x10    /* Interrupt request 2 select */
00141 #define _3COM_IDCFR_IRQ3      0x20    /* Interrupt request 3 select */
00142 #define _3COM_IDCFR_IRQ4      0x40    /* Interrupt request 4 select */
00143 #define _3COM_IDCFR_IRQ5      0x80    /* Interrupt request 5 select */
00144 #define _3COM_IRQ2      2
00145 #define _3COM_IRQ3      3
00146 #define _3COM_IRQ4      4
00147 #define _3COM_IRQ5      5
00148 #define _3COM_DAMSB           9
00149 #define _3COM_DALSB           0x0a
00150 #define _3COM_VPTR2           0x0b
00151 #define _3COM_VPTR1           0x0c
00152 #define _3COM_VPTR0           0x0d
00153 #define _3COM_RFMSB           0x0e
00154 #define _3COM_RFLSB           0x0f
00155 
00156 /**************************************************************************
00157 NE1000/2000 definitions
00158 **************************************************************************/
00159 #define NE_ASIC_OFFSET  0x10
00160 #define NE_RESET        0x0F            /* Used to reset card */
00161 #define NE_DATA         0x00            /* Used to read/write NIC mem */
00162 
00163 #define COMPEX_RL2000_TRIES     200
00164 
00165 /**************************************************************************
00166 8390 Register Definitions
00167 **************************************************************************/
00168 #define D8390_P0_COMMAND        0x00
00169 #define D8390_P0_PSTART         0x01
00170 #define D8390_P0_PSTOP          0x02
00171 #define D8390_P0_BOUND          0x03
00172 #define D8390_P0_TSR            0x04
00173 #define D8390_P0_TPSR           0x04
00174 #define D8390_P0_TBCR0          0x05
00175 #define D8390_P0_TBCR1          0x06
00176 #define D8390_P0_ISR            0x07
00177 #define D8390_P0_RSAR0          0x08
00178 #define D8390_P0_RSAR1          0x09
00179 #define D8390_P0_RBCR0          0x0A
00180 #define D8390_P0_RBCR1          0x0B
00181 #define D8390_P0_RSR            0x0C
00182 #define D8390_P0_RCR            0x0C
00183 #define D8390_P0_TCR            0x0D
00184 #define D8390_P0_DCR            0x0E
00185 #define D8390_P0_IMR            0x0F
00186 #define D8390_P1_COMMAND        0x00
00187 #define D8390_P1_PAR0           0x01
00188 #define D8390_P1_PAR1           0x02
00189 #define D8390_P1_PAR2           0x03
00190 #define D8390_P1_PAR3           0x04
00191 #define D8390_P1_PAR4           0x05
00192 #define D8390_P1_PAR5           0x06
00193 #define D8390_P1_CURR           0x07
00194 #define D8390_P1_MAR0           0x08
00195 
00196 #define D8390_COMMAND_PS0       0x0             /* Page 0 select */
00197 #define D8390_COMMAND_PS1       0x40            /* Page 1 select */
00198 #define D8390_COMMAND_PS2       0x80            /* Page 2 select */
00199 #define D8390_COMMAND_RD2       0x20            /* Remote DMA control */
00200 #define D8390_COMMAND_RD1       0x10
00201 #define D8390_COMMAND_RD0       0x08
00202 #define D8390_COMMAND_TXP       0x04            /* transmit packet */
00203 #define D8390_COMMAND_STA       0x02            /* start */
00204 #define D8390_COMMAND_STP       0x01            /* stop */
00205 
00206 #define D8390_RCR_MON           0x20            /* monitor mode */
00207 
00208 #define D8390_DCR_FT1           0x40
00209 #define D8390_DCR_LS            0x08            /* Loopback select */
00210 #define D8390_DCR_WTS           0x01            /* Word transfer select */
00211 
00212 #define D8390_ISR_PRX           0x01            /* successful recv */
00213 #define D8390_ISR_PTX           0x02            /* successful xmit */
00214 #define D8390_ISR_RXE           0x04            /* receive error */
00215 #define D8390_ISR_TXE           0x08            /* transmit error */
00216 #define D8390_ISR_OVW           0x10            /* Overflow */
00217 #define D8390_ISR_CNT           0x20            /* Counter overflow */
00218 #define D8390_ISR_RDC           0x40            /* Remote DMA complete */
00219 #define D8390_ISR_RST           0x80            /* reset */
00220 
00221 #define D8390_RSTAT_PRX         0x01            /* successful recv */
00222 #define D8390_RSTAT_CRC         0x02            /* CRC error */
00223 #define D8390_RSTAT_FAE         0x04            /* Frame alignment error */
00224 #define D8390_RSTAT_OVER        0x08            /* FIFO overrun */
00225 
00226 #define D8390_TXBUF_SIZE        6
00227 #define D8390_RXBUF_END         32
00228 #define D8390_PAGE_SIZE         256
00229 
00230 struct ringbuffer {
00231         unsigned char status;
00232         unsigned char next;
00233         unsigned short len;
00234 };
00235 /*
00236  * Local variables:
00237  *  c-basic-offset: 8
00238  * End:
00239  */
00240