iPXE
nxhal_nic_interface.h
Go to the documentation of this file.
00001 FILE_LICENCE ( GPL2_ONLY );
00002 
00003 /*
00004  * Data types and structure for HAL - NIC interface.
00005  *
00006  */
00007 
00008 #ifndef _NXHAL_NIC_INTERFACE_H_
00009 #define _NXHAL_NIC_INTERFACE_H_
00010 
00011 /*****************************************************************************
00012  *        Simple Types
00013  *****************************************************************************/
00014 
00015 typedef U32     nx_reg_addr_t;
00016 
00017 /*****************************************************************************
00018  *        Root crb-based firmware commands
00019  *****************************************************************************/
00020 
00021 /* CRB Root Command
00022 
00023    A single set of crbs is used across all physical/virtual
00024    functions for capability queries, initialization, and
00025    context creation/destruction. 
00026 
00027    There are 4 CRBS:
00028        Command/Response CRB
00029        Argument1 CRB
00030        Argument2 CRB
00031        Argument3 CRB
00032        Signature CRB 
00033 
00034        The cmd/rsp crb is always intiated by the host via
00035        a command code and always responded by the card with
00036        a response code. The cmd and rsp codes are disjoint.
00037        The sequence of use is always CMD, RSP, CLEAR CMD.
00038 
00039        The arguments are for passing in command specific
00040        and response specific parameters/data. 
00041 
00042        The signature is composed of a magic value, the
00043        pci function id, and a command sequence id:
00044           [7:0]  = pci function
00045          [15:8]  = version
00046          [31:16] = magic of 0xcafe
00047 
00048        The pci function allows the card to take correct
00049        action for the given particular commands. 
00050        The firmware will attempt to detect
00051        an errant driver that has died while holding  
00052        the root crb hardware lock. Such an error condition
00053        shows up as the cmd/rsp crb stuck in a non-clear state.
00054 
00055    Interface Sequence:
00056      Host always makes requests and firmware always responds.
00057      Note that data field is always set prior to command field.
00058 
00059      [READ]             CMD/RSP CRB      ARGUMENT FIELD
00060      Host grab lock
00061      Host  ->           CMD              optional parameter
00062      FW   <-  (Good)    RSP-OK           DATA
00063      FW   <-  (Fail)    RSP-FAIL         optional failure code
00064      Host ->            CLEAR
00065      Host release lock
00066 
00067      [WRITE]            CMD/RSP CRB      ARGUMENT FIELD
00068      Host grab lock
00069      Host  ->           CMD              DATA
00070      FW   <-  (Good)    RSP-OK           optional write status
00071      FW   <-  (Write)   RSP-FAIL         optional failure code
00072      Host ->            CLEAR
00073      Host release lock
00074 
00075 */
00076 
00077 
00078 /*****************************************************************************
00079  *        CMD/RSP
00080  *****************************************************************************/
00081 
00082 #define NX_CDRP_SIGNATURE_TO_PCIFN(sign)    ((sign) & 0xff)
00083 #define NX_CDRP_SIGNATURE_TO_VERSION(sign)  (((sign)>>8) & 0xff)
00084 #define NX_CDRP_SIGNATURE_TO_MAGIC(sign)    (((sign)>>16) & 0xffff)
00085 #define NX_CDRP_SIGNATURE_VALID(sign)       \
00086         ( NX_CDRP_SIGNATURE_TO_MAGIC(sign) == 0xcafe && \
00087           NX_CDRP_SIGNATURE_TO_PCIFN(sign) < 8)
00088 #define NX_CDRP_SIGNATURE_MAKE(pcifn,version) \
00089         ( ((pcifn) & 0xff) |                  \
00090           (((version) & 0xff) << 8) |         \
00091           (0xcafe << 16) )
00092 
00093 #define NX_CDRP_CLEAR                       0x00000000
00094 #define NX_CDRP_CMD_BIT                     0x80000000
00095 
00096 /* All responses must have the NX_CDRP_CMD_BIT cleared
00097  * in the crb NX_CDRP_CRB_OFFSET. */
00098 #define NX_CDRP_FORM_RSP(rsp)              (rsp)
00099 #define NX_CDRP_IS_RSP(rsp)                (((rsp) & NX_CDRP_CMD_BIT) == 0)
00100 
00101 #define NX_CDRP_RSP_OK                      0x00000001
00102 #define NX_CDRP_RSP_FAIL                    0x00000002
00103 #define NX_CDRP_RSP_TIMEOUT                 0x00000003
00104 
00105 /* All commands must have the NX_CDRP_CMD_BIT set in
00106  * the crb NX_CDRP_CRB_OFFSET.
00107  * The macros below do not have it explicitly set to
00108  * allow their use in lookup tables */
00109 #define NX_CDRP_FORM_CMD(cmd)               (NX_CDRP_CMD_BIT | (cmd))
00110 #define NX_CDRP_IS_CMD(cmd)                 (((cmd) & NX_CDRP_CMD_BIT) != 0)
00111 
00112 /* [CMD] Capability Vector [RSP] Capability Vector */
00113 #define NX_CDRP_CMD_SUBMIT_CAPABILITIES     0x00000001
00114 
00115 /* [CMD] - [RSP] Query Value */
00116 #define NX_CDRP_CMD_READ_MAX_RDS_PER_CTX    0x00000002
00117 
00118 /* [CMD] - [RSP] Query Value */
00119 #define NX_CDRP_CMD_READ_MAX_SDS_PER_CTX    0x00000003
00120 
00121 /* [CMD] - [RSP] Query Value */
00122 #define NX_CDRP_CMD_READ_MAX_RULES_PER_CTX  0x00000004
00123 
00124 /* [CMD] - [RSP] Query Value */
00125 #define NX_CDRP_CMD_READ_MAX_RX_CTX         0x00000005
00126 
00127 /* [CMD] - [RSP] Query Value */
00128 #define NX_CDRP_CMD_READ_MAX_TX_CTX         0x00000006
00129 
00130 /* [CMD] Rx Config DMA Addr [RSP] rcode */
00131 #define NX_CDRP_CMD_CREATE_RX_CTX           0x00000007
00132 
00133 /* [CMD] Rx Context Handle, Reset Kind [RSP] rcode */
00134 #define NX_CDRP_CMD_DESTROY_RX_CTX          0x00000008
00135 
00136 /* [CMD] Tx Config DMA Addr [RSP] rcode */
00137 #define NX_CDRP_CMD_CREATE_TX_CTX           0x00000009
00138 
00139 /* [CMD] Tx Context Handle, Reset Kind [RSP] rcode */
00140 #define NX_CDRP_CMD_DESTROY_TX_CTX          0x0000000a
00141 
00142 /* [CMD] Stat setup dma addr - [RSP] Handle, rcode */
00143 #define NX_CDRP_CMD_SETUP_STATISTICS        0x0000000e
00144 
00145 /* [CMD] Handle - [RSP] rcode */
00146 #define NX_CDRP_CMD_GET_STATISTICS          0x0000000f
00147 
00148 /* [CMD] Handle - [RSP] rcode */
00149 #define NX_CDRP_CMD_DELETE_STATISTICS       0x00000010
00150 
00151 #define NX_CDRP_CMD_MAX                     0x00000011
00152 
00153 /*****************************************************************************
00154  *        Capabilities
00155  *****************************************************************************/
00156 
00157 #define NX_CAP_BIT(class, bit)              (1 << bit)
00158 
00159 /* Class 0 (i.e. ARGS 1)
00160  */
00161 #define NX_CAP0_LEGACY_CONTEXT              NX_CAP_BIT(0, 0)
00162 #define NX_CAP0_MULTI_CONTEXT               NX_CAP_BIT(0, 1)
00163 #define NX_CAP0_LEGACY_MN                   NX_CAP_BIT(0, 2)
00164 #define NX_CAP0_LEGACY_MS                   NX_CAP_BIT(0, 3)
00165 #define NX_CAP0_CUT_THROUGH                 NX_CAP_BIT(0, 4)
00166 #define NX_CAP0_LRO                         NX_CAP_BIT(0, 5)
00167 #define NX_CAP0_LSO                         NX_CAP_BIT(0, 6)
00168 
00169 /* Class 1 (i.e. ARGS 2)
00170  */
00171 #define NX_CAP1_NIC                         NX_CAP_BIT(1, 0)
00172 #define NX_CAP1_PXE                         NX_CAP_BIT(1, 1)
00173 #define NX_CAP1_CHIMNEY                     NX_CAP_BIT(1, 2)
00174 #define NX_CAP1_LSA                         NX_CAP_BIT(1, 3)
00175 #define NX_CAP1_RDMA                        NX_CAP_BIT(1, 4)
00176 #define NX_CAP1_ISCSI                       NX_CAP_BIT(1, 5)
00177 #define NX_CAP1_FCOE                        NX_CAP_BIT(1, 6)
00178 
00179 /* Class 2 (i.e. ARGS 3)
00180  */
00181 
00182 /*****************************************************************************
00183  *        Rules
00184  *****************************************************************************/
00185 
00186 typedef U32 nx_rx_rule_type_t;
00187 
00188 #define NX_RX_RULETYPE_DEFAULT              0
00189 #define NX_RX_RULETYPE_MAC                  1
00190 #define NX_RX_RULETYPE_MAC_VLAN             2
00191 #define NX_RX_RULETYPE_MAC_RSS              3
00192 #define NX_RX_RULETYPE_MAC_VLAN_RSS         4
00193 #define NX_RX_RULETYPE_MAX                  5
00194 
00195 typedef U32 nx_rx_rule_cmd_t;
00196 
00197 #define NX_RX_RULECMD_ADD                   0
00198 #define NX_RX_RULECMD_REMOVE                1
00199 #define NX_RX_RULECMD_MAX                   2
00200 
00201 typedef struct nx_rx_rule_arg_s {
00202         union {
00203                 struct {
00204                         char mac[6];
00205                 } m;
00206                 struct {
00207                         char mac[6];
00208                         char vlan;
00209                 } mv;
00210                 struct {
00211                         char mac[6];
00212                 } mr;
00213                 struct {
00214                         char mac[6];
00215                         char vlan;
00216                 } mvr;
00217         };
00218         /* will be union of all the different args for rules */
00219         U64 data;
00220 } nx_rx_rule_arg_t;
00221 
00222 typedef struct nx_rx_rule_s {
00223         U32 id;
00224         U32 active;
00225         nx_rx_rule_arg_t arg;
00226         nx_rx_rule_type_t type;
00227 } nx_rx_rule_t;
00228 
00229 /* MSG - REQUIRES TX CONTEXT */
00230 
00231 /* The rules can be added/deleted from both the
00232  *  host and card sides so rq/rsp are similar. 
00233  */
00234 typedef struct nx_hostmsg_rx_rule_s {
00235         nx_rx_rule_cmd_t cmd;
00236         nx_rx_rule_t rule;
00237 } nx_hostmsg_rx_rule_t;
00238 
00239 typedef struct nx_cardmsg_rx_rule_s {
00240         nx_rcode_t rcode;
00241         nx_rx_rule_cmd_t cmd;
00242         nx_rx_rule_t rule;
00243 } nx_cardmsg_rx_rule_t;
00244 
00245 
00246 /*****************************************************************************
00247  *        Common to Rx/Tx contexts
00248  *****************************************************************************/
00249 
00250 /*
00251  * Context states
00252  */
00253 
00254 typedef U32 nx_host_ctx_state_t;
00255 
00256 #define NX_HOST_CTX_STATE_FREED             0   /* Invalid state */
00257 #define NX_HOST_CTX_STATE_ALLOCATED         1   /* Not committed */
00258 /* The following states imply FW is aware of context */
00259 #define NX_HOST_CTX_STATE_ACTIVE            2
00260 #define NX_HOST_CTX_STATE_DISABLED          3
00261 #define NX_HOST_CTX_STATE_QUIESCED          4
00262 #define NX_HOST_CTX_STATE_MAX               5
00263 
00264 /*
00265  * Interrupt mask crb use must be set identically on the Tx 
00266  * and Rx context configs across a pci function 
00267  */
00268 
00269 /* Rx and Tx have unique interrupt/crb */
00270 #define NX_HOST_INT_CRB_MODE_UNIQUE         0
00271 /* Rx and Tx share a common interrupt/crb */
00272 #define NX_HOST_INT_CRB_MODE_SHARED         1   /* <= LEGACY */
00273 /* Rx does not use a crb */
00274 #define NX_HOST_INT_CRB_MODE_NORX           2
00275 /* Tx does not use a crb */
00276 #define NX_HOST_INT_CRB_MODE_NOTX           3
00277 /* Neither Rx nor Tx use a crb */
00278 #define NX_HOST_INT_CRB_MODE_NORXTX         4
00279 
00280 /*
00281  * Destroy Rx/Tx
00282  */
00283 
00284 #define NX_DESTROY_CTX_RESET                0
00285 #define NX_DESTROY_CTX_D3_RESET             1
00286 #define NX_DESTROY_CTX_MAX                  2
00287 
00288 
00289 /*****************************************************************************
00290  *        Tx
00291  *****************************************************************************/
00292 
00293 /*
00294  * Components of the host-request for Tx context creation.
00295  * CRB - DOES NOT REQUIRE Rx/TX CONTEXT 
00296  */
00297 
00298 typedef struct nx_hostrq_cds_ring_s {
00299         U64 host_phys_addr;     /* Ring base addr */
00300         U32 ring_size;          /* Ring entries */
00301         U32 rsvd;               /* Padding */
00302 } nx_hostrq_cds_ring_t;
00303 
00304 typedef struct nx_hostrq_tx_ctx_s {
00305         U64 host_rsp_dma_addr;  /* Response dma'd here */
00306         U64 cmd_cons_dma_addr;  /*  */
00307         U64 dummy_dma_addr;     /*  */
00308         U32 capabilities[4];    /* Flag bit vector */
00309         U32 host_int_crb_mode;  /* Interrupt crb usage */
00310         U32 rsvd1;              /* Padding */
00311         U16 rsvd2;              /* Padding */
00312         U16 interrupt_ctl;
00313         U16 msi_index;
00314         U16 rsvd3;              /* Padding */
00315         nx_hostrq_cds_ring_t cds_ring;  /* Desc of cds ring */
00316         U8  reserved[128];      /* future expansion */
00317 } nx_hostrq_tx_ctx_t;
00318 
00319 typedef struct nx_cardrsp_cds_ring_s {
00320         U32 host_producer_crb;  /* Crb to use */
00321         U32 interrupt_crb;      /* Crb to use */
00322 } nx_cardrsp_cds_ring_t;
00323 
00324 typedef struct nx_cardrsp_tx_ctx_s {
00325         U32 host_ctx_state;     /* Starting state */
00326         U16 context_id;         /* Handle for context */
00327         U8  phys_port;          /* Physical id of port */
00328         U8  virt_port;          /* Virtual/Logical id of port */
00329         nx_cardrsp_cds_ring_t cds_ring; /* Card cds settings */
00330         U8  reserved[128];      /* future expansion */
00331 } nx_cardrsp_tx_ctx_t;
00332 
00333 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX)                     \
00334                 ( sizeof(HOSTRQ_TX))
00335 
00336 #define SIZEOF_CARDRSP_TX(CARDRSP_TX)                   \
00337                 ( sizeof(CARDRSP_TX)) 
00338 
00339 /*****************************************************************************
00340  *        Rx
00341  *****************************************************************************/
00342 
00343 /*
00344  * RDS ring mapping to producer crbs
00345  */
00346 
00347 /* Each ring has a unique crb */
00348 #define NX_HOST_RDS_CRB_MODE_UNIQUE    0        /* <= LEGACY */
00349 
00350 /* All configured RDS Rings share common crb:
00351      1 Ring  - same as unique
00352      2 Rings - 16, 16
00353      3 Rings - 10, 10, 10 */
00354 #define NX_HOST_RDS_CRB_MODE_SHARED    1
00355 
00356 /* Bit usage is specified per-ring using the
00357    ring's size. Sum of bit lengths must be <= 32. 
00358    Packing is [Ring N] ... [Ring 1][Ring 0] */
00359 #define NX_HOST_RDS_CRB_MODE_CUSTOM    2
00360 #define NX_HOST_RDS_CRB_MODE_MAX       3
00361 
00362 
00363 /*
00364  * RDS Ting Types 
00365  */
00366 
00367 #define NX_RDS_RING_TYPE_NORMAL       0
00368 #define NX_RDS_RING_TYPE_JUMBO        1
00369 #define NX_RDS_RING_TYPE_LRO          2
00370 #define NX_RDS_RING_TYPE_MAX          3
00371 
00372 /*
00373  * Components of the host-request for Rx context creation.
00374  * CRB - DOES NOT REQUIRE Rx/TX CONTEXT 
00375  */
00376 
00377 typedef struct nx_hostrq_sds_ring_s {
00378         U64 host_phys_addr;     /* Ring base addr */
00379         U32 ring_size;          /* Ring entries */
00380         U16 msi_index;
00381         U16 rsvd;               /* Padding */
00382 } nx_hostrq_sds_ring_t;
00383 
00384 typedef struct nx_hostrq_rds_ring_s {
00385         U64 host_phys_addr;     /* Ring base addr */
00386         U64 buff_size;          /* Packet buffer size */
00387         U32 ring_size;          /* Ring entries */
00388         U32 ring_kind;          /* Class of ring */
00389 } nx_hostrq_rds_ring_t;
00390 
00391 typedef struct nx_hostrq_rx_ctx_s {
00392         U64 host_rsp_dma_addr;  /* Response dma'd here */
00393         U32 capabilities[4];    /* Flag bit vector */
00394         U32 host_int_crb_mode;  /* Interrupt crb usage */
00395         U32 host_rds_crb_mode;  /* RDS crb usage */
00396         /* These ring offsets are relative to data[0] below */
00397         U32 rds_ring_offset;    /* Offset to RDS config */
00398         U32 sds_ring_offset;    /* Offset to SDS config */
00399         U16 num_rds_rings;      /* Count of RDS rings */
00400         U16 num_sds_rings;      /* Count of SDS rings */
00401         U16 rsvd1;              /* Padding */
00402         U16 rsvd2;              /* Padding */
00403         U8  reserved[128];      /* reserve space for future expansion*/
00404         /* MUST BE 64-bit aligned.
00405            The following is packed:
00406            - N hostrq_rds_rings
00407            - N hostrq_sds_rings */
00408         char data[0];
00409 } nx_hostrq_rx_ctx_t;
00410 
00411 typedef struct nx_cardrsp_rds_ring_s {
00412         U32 host_producer_crb;  /* Crb to use */
00413         U32 rsvd1;              /* Padding */
00414 } nx_cardrsp_rds_ring_t;
00415 
00416 typedef struct nx_cardrsp_sds_ring_s {
00417         U32 host_consumer_crb;  /* Crb to use */
00418         U32 interrupt_crb;      /* Crb to use */
00419 } nx_cardrsp_sds_ring_t;
00420 
00421 typedef struct nx_cardrsp_rx_ctx_s {
00422         /* These ring offsets are relative to data[0] below */
00423         U32 rds_ring_offset;    /* Offset to RDS config */
00424         U32 sds_ring_offset;    /* Offset to SDS config */
00425         U32 host_ctx_state;     /* Starting State */
00426         U32 num_fn_per_port;    /* How many PCI fn share the port */
00427         U16 num_rds_rings;      /* Count of RDS rings */
00428         U16 num_sds_rings;      /* Count of SDS rings */
00429         U16 context_id;         /* Handle for context */
00430         U8  phys_port;          /* Physical id of port */
00431         U8  virt_port;          /* Virtual/Logical id of port */
00432         U8  reserved[128];      /* save space for future expansion */
00433         /*  MUST BE 64-bit aligned.
00434            The following is packed:
00435            - N cardrsp_rds_rings
00436            - N cardrs_sds_rings */
00437         char data[0];
00438 } nx_cardrsp_rx_ctx_t;
00439 
00440 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings)       \
00441         ( sizeof(HOSTRQ_RX) +                                   \
00442         (rds_rings)*(sizeof (nx_hostrq_rds_ring_t)) +           \
00443         (sds_rings)*(sizeof (nx_hostrq_sds_ring_t)) )
00444 
00445 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings)     \
00446         ( sizeof(CARDRSP_RX) +                                  \
00447         (rds_rings)*(sizeof (nx_cardrsp_rds_ring_t)) +          \
00448         (sds_rings)*(sizeof (nx_cardrsp_sds_ring_t)) )
00449 
00450 
00451 /*****************************************************************************
00452  *        Statistics
00453  *****************************************************************************/
00454 
00455 /*
00456  * The model of statistics update to use 
00457  */
00458 
00459 #define NX_STATISTICS_MODE_INVALID       0
00460 
00461 /* Permanent setup; Updates are only sent on explicit request 
00462    (NX_CDRP_CMD_GET_STATISTICS) */
00463 #define NX_STATISTICS_MODE_PULL          1
00464 
00465 /* Permanent setup; Updates are sent automatically and on 
00466    explicit request (NX_CDRP_CMD_GET_STATISTICS) */
00467 #define NX_STATISTICS_MODE_PUSH          2
00468 
00469 /* One time stat update. */
00470 #define NX_STATISTICS_MODE_SINGLE_SHOT   3
00471 
00472 #define NX_STATISTICS_MODE_MAX           4
00473 
00474 /*
00475  * What set of stats 
00476  */
00477 #define NX_STATISTICS_TYPE_INVALID       0
00478 #define NX_STATISTICS_TYPE_NIC_RX_CORE   1
00479 #define NX_STATISTICS_TYPE_NIC_TX_CORE   2
00480 #define NX_STATISTICS_TYPE_NIC_RX_ALL    3
00481 #define NX_STATISTICS_TYPE_NIC_TX_ALL    4
00482 #define NX_STATISTICS_TYPE_MAX           5
00483 
00484 
00485 /*
00486  * Request to setup statistics gathering.
00487  * CRB - DOES NOT REQUIRE Rx/TX CONTEXT 
00488  */
00489 
00490 typedef struct nx_hostrq_stat_setup_s {
00491         U64 host_stat_buffer;   /* Where to dma stats */
00492         U32 host_stat_size;     /* Size of stat buffer */
00493         U16 context_id;         /* Which context */
00494         U16 stat_type;          /* What class of stats */
00495         U16 stat_mode;          /* When to update */
00496         U16 stat_interval;      /* Frequency of update */
00497 } nx_hostrq_stat_setup_t;
00498 
00499 
00500 
00501 #endif /* _NXHAL_NIC_INTERFACE_H_ */