iPXE
Data Structures | Macros | Enumerations | Functions | Variables
3c90x.h File Reference

Go to the source code of this file.

Data Structures

struct  TXD
 
struct  RXD
 
struct  INF_3C90X
 

Macros

#define __3C90X_H_
 
#define XCVR_MAGIC   (0x5A00)
 
#define INT_INTERRUPTLATCH   (1<<0)
 
#define INT_HOSTERROR   (1<<1)
 
#define INT_TXCOMPLETE   (1<<2)
 
#define INT_RXCOMPLETE   (1<<4)
 
#define INT_RXEARLY   (1<<5)
 
#define INT_INTREQUESTED   (1<<6)
 
#define INT_UPDATESTATS   (1<<7)
 
#define INT_LINKEVENT   (1<<8)
 
#define INT_DNCOMPLETE   (1<<9)
 
#define INT_UPCOMPLETE   (1<<10)
 
#define INT_CMDINPROGRESS   (1<<12)
 
#define INT_WINDOWNUMBER   (7<<13)
 
#define TX_RING_SIZE   8
 
#define RX_RING_SIZE   8
 
#define TX_RING_ALIGN   16
 
#define RX_RING_ALIGN   16
 
#define RX_BUF_SIZE   1536
 
#define EEPROM_TIMEOUT   1 * 1000 * 1000
 

Enumerations

enum  Registers {
  regPowerMgmtCtrl_w = 0x7c, regUpMaxBurst_w = 0x7a, regDnMaxBurst_w = 0x78, regDebugControl_w = 0x74,
  regDebugData_l = 0x70, regRealTimeCnt_l = 0x40, regUpBurstThresh_b = 0x3e, regUpPoll_b = 0x3d,
  regUpPriorityThresh_b = 0x3c, regUpListPtr_l = 0x38, regCountdown_w = 0x36, regFreeTimer_w = 0x34,
  regUpPktStatus_l = 0x30, regTxFreeThresh_b = 0x2f, regDnPoll_b = 0x2d, regDnPriorityThresh_b = 0x2c,
  regDnBurstThresh_b = 0x2a, regDnListPtr_l = 0x24, regDmaCtrl_l = 0x20, regIntStatusAuto_w = 0x1e,
  regTxStatus_b = 0x1b, regTimer_b = 0x1a, regTxPktId_b = 0x18, regCommandIntStatus_w = 0x0e
}
 
enum  Registers7 { regPowerMgmtEvent_7_w = 0x0c, regVlanEtherType_7_w = 0x04, regVlanMask_7_w = 0x00 }
 
enum  Registers6 {
  regBytesXmittedOk_6_w = 0x0c, regBytesRcvdOk_6_w = 0x0a, regUpperFramesOk_6_b = 0x09, regFramesDeferred_6_b = 0x08,
  regFramesRecdOk_6_b = 0x07, regFramesXmittedOk_6_b = 0x06, regRxOverruns_6_b = 0x05, regLateCollisions_6_b = 0x04,
  regSingleCollisions_6_b = 0x03, regMultipleCollisions_6_b = 0x02, regSqeErrors_6_b = 0x01, regCarrierLost_6_b = 0x00
}
 
enum  Registers5 {
  regIndicationEnable_5_w = 0x0c, regInterruptEnable_5_w = 0x0a, regTxReclaimThresh_5_b = 0x09, regRxFilter_5_b = 0x08,
  regRxEarlyThresh_5_w = 0x06, regTxStartThresh_5_w = 0x00
}
 
enum  Registers4 {
  regUpperBytesOk_4_b = 0x0d, regBadSSD_4_b = 0x0c, regMediaStatus_4_w = 0x0a, regPhysicalMgmt_4_w = 0x08,
  regNetworkDiagnostic_4_w = 0x06, regFifoDiagnostic_4_w = 0x04, regVcoDiagnostic_4_w = 0x02
}
 
enum  Registers3 {
  regTxFree_3_w = 0x0c, regRxFree_3_w = 0x0a, regResetMediaOptions_3_w = 0x08, regMacControl_3_w = 0x06,
  regMaxPktSize_3_w = 0x04, regInternalConfig_3_l = 0x00
}
 
enum  Registers2 { regResetOptions_2_w = 0x0c, regStationMask_2_3w = 0x06, regStationAddress_2_3w = 0x00 }
 
enum  Registers1 { regRxStatus_1_w = 0x0a }
 
enum  Registers0 { regEepromData_0_w = 0x0c, regEepromCommand_0_w = 0x0a, regBiosRomData_0_b = 0x08, regBiosRomAddr_0_l = 0x04 }
 
enum  Windows {
  winNone = 0xff, winPowerVlan7 = 0x07, winStatistics6 = 0x06, winTxRxControl5 = 0x05,
  winDiagnostics4 = 0x04, winTxRxOptions3 = 0x03, winAddressing2 = 0x02, winUnused1 = 0x01,
  winEepromBios0 = 0x00
}
 
enum  Commands {
  cmdGlobalReset = 0x00, cmdSelectRegisterWindow = 0x01, cmdEnableDcConverter = 0x02, cmdRxDisable = 0x03,
  cmdRxEnable = 0x04, cmdRxReset = 0x05, cmdStallCtl = 0x06, cmdTxEnable = 0x09,
  cmdTxDisable = 0x0A, cmdTxReset = 0x0B, cmdRequestInterrupt = 0x0C, cmdAcknowledgeInterrupt = 0x0D,
  cmdSetInterruptEnable = 0x0E, cmdSetIndicationEnable = 0x0F, cmdSetRxFilter = 0x10, cmdSetRxEarlyThresh = 0x11,
  cmdSetTxStartThresh = 0x13, cmdStatisticsEnable = 0x15, cmdStatisticsDisable = 0x16, cmdDisableDcConverter = 0x17,
  cmdSetTxReclaimThresh = 0x18, cmdSetHashFilterBit = 0x19
}
 
enum  GlobalResetParams { globalResetAll = 0, globalResetMaskNetwork = (1<<2), globalResetMaskAll = 0x1ff }
 
enum  FrameStartHeader { fshTxIndicate = 0x8000, fshDnComplete = 0x10000, fshRndupDefeat = 0x10000000 }
 
enum  UpDownDesc { upLastFrag = (1 << 31), downLastFrag = (1 << 31) }
 
enum  UpPktStatus { upComplete = (1 << 15), upError = (1 << 14) }
 
enum  Stalls { upStall = 0x00, upUnStall = 0x01, dnStall = 0x02, dnUnStall = 0x03 }
 
enum  Resources { resRxRing = 0x00, resTxRing = 0x02, resRxIOBuf = 0x04 }
 
enum  eeprom { eepromBusy = (1 << 15), eepromRead = ((0x02) << 6), eepromRead_556 = 0x230, eepromHwAddrOffset = 0x0a }
 
enum  linktype {
  link10BaseT = 0x00, linkAUI = 0x01, link10Base2 = 0x03, link100BaseFX = 0x05,
  linkMII = 0x06, linkAutoneg = 0x08, linkExternalMII = 0x09
}
 

Functions

 FILE_LICENCE (BSD2)
 
struct TXD __attribute__ ((aligned(8)))
 

Variables

static struct net_device_operations a3c90x_operations
 
volatile unsigned int DnNextPtr
 
volatile unsigned int FrameStartHeader
 
volatile unsigned int DataAddr
 
volatile unsigned int DataLength
 
volatile unsigned int UpNextPtr
 
volatile unsigned int UpPktStatus
 
struct INF_3C90X __attribute__
 

Macro Definition Documentation

◆ __3C90X_H_

#define __3C90X_H_

Definition at line 51 of file 3c90x.h.

◆ XCVR_MAGIC

#define XCVR_MAGIC   (0x5A00)

Definition at line 55 of file 3c90x.h.

◆ INT_INTERRUPTLATCH

#define INT_INTERRUPTLATCH   (1<<0)

Definition at line 251 of file 3c90x.h.

◆ INT_HOSTERROR

#define INT_HOSTERROR   (1<<1)

Definition at line 252 of file 3c90x.h.

◆ INT_TXCOMPLETE

#define INT_TXCOMPLETE   (1<<2)

Definition at line 253 of file 3c90x.h.

◆ INT_RXCOMPLETE

#define INT_RXCOMPLETE   (1<<4)

Definition at line 254 of file 3c90x.h.

◆ INT_RXEARLY

#define INT_RXEARLY   (1<<5)

Definition at line 255 of file 3c90x.h.

◆ INT_INTREQUESTED

#define INT_INTREQUESTED   (1<<6)

Definition at line 256 of file 3c90x.h.

◆ INT_UPDATESTATS

#define INT_UPDATESTATS   (1<<7)

Definition at line 257 of file 3c90x.h.

◆ INT_LINKEVENT

#define INT_LINKEVENT   (1<<8)

Definition at line 258 of file 3c90x.h.

◆ INT_DNCOMPLETE

#define INT_DNCOMPLETE   (1<<9)

Definition at line 259 of file 3c90x.h.

◆ INT_UPCOMPLETE

#define INT_UPCOMPLETE   (1<<10)

Definition at line 260 of file 3c90x.h.

◆ INT_CMDINPROGRESS

#define INT_CMDINPROGRESS   (1<<12)

Definition at line 261 of file 3c90x.h.

◆ INT_WINDOWNUMBER

#define INT_WINDOWNUMBER   (7<<13)

Definition at line 262 of file 3c90x.h.

◆ TX_RING_SIZE

#define TX_RING_SIZE   8

Definition at line 265 of file 3c90x.h.

◆ RX_RING_SIZE

#define RX_RING_SIZE   8

Definition at line 266 of file 3c90x.h.

◆ TX_RING_ALIGN

#define TX_RING_ALIGN   16

Definition at line 267 of file 3c90x.h.

◆ RX_RING_ALIGN

#define RX_RING_ALIGN   16

Definition at line 268 of file 3c90x.h.

◆ RX_BUF_SIZE

#define RX_BUF_SIZE   1536

Definition at line 269 of file 3c90x.h.

◆ EEPROM_TIMEOUT

#define EEPROM_TIMEOUT   1 * 1000 * 1000

Definition at line 273 of file 3c90x.h.

Enumeration Type Documentation

◆ Registers

enum Registers
Enumerator
regPowerMgmtCtrl_w 
regUpMaxBurst_w 
regDnMaxBurst_w 
regDebugControl_w 
regDebugData_l 
regRealTimeCnt_l 
regUpBurstThresh_b 
regUpPoll_b 
regUpPriorityThresh_b 
regUpListPtr_l 
regCountdown_w 
regFreeTimer_w 
regUpPktStatus_l 
regTxFreeThresh_b 
regDnPoll_b 
regDnPriorityThresh_b 
regDnBurstThresh_b 
regDnListPtr_l 
regDmaCtrl_l 
regIntStatusAuto_w 
regTxStatus_b 
regTimer_b 
regTxPktId_b 
regCommandIntStatus_w 

Definition at line 58 of file 3c90x.h.

58  {
59  regPowerMgmtCtrl_w = 0x7c, /* 905B Revision Only */
60  regUpMaxBurst_w = 0x7a, /* 905B Revision Only */
61  regDnMaxBurst_w = 0x78, /* 905B Revision Only */
62  regDebugControl_w = 0x74, /* 905B Revision Only */
63  regDebugData_l = 0x70, /* 905B Revision Only */
64  regRealTimeCnt_l = 0x40, /* Universal */
65  regUpBurstThresh_b = 0x3e, /* 905B Revision Only */
66  regUpPoll_b = 0x3d, /* 905B Revision Only */
67  regUpPriorityThresh_b = 0x3c, /* 905B Revision Only */
68  regUpListPtr_l = 0x38, /* Universal */
69  regCountdown_w = 0x36, /* Universal */
70  regFreeTimer_w = 0x34, /* Universal */
71  regUpPktStatus_l = 0x30, /* Universal with Exception, pg 130 */
72  regTxFreeThresh_b = 0x2f, /* 90X Revision Only */
73  regDnPoll_b = 0x2d, /* 905B Revision Only */
74  regDnPriorityThresh_b = 0x2c, /* 905B Revision Only */
75  regDnBurstThresh_b = 0x2a, /* 905B Revision Only */
76  regDnListPtr_l = 0x24, /* Universal with Exception, pg 107 */
77  regDmaCtrl_l = 0x20, /* Universal with Exception, pg 106 */
78  /* */
79  regIntStatusAuto_w = 0x1e, /* 905B Revision Only */
80  regTxStatus_b = 0x1b, /* Universal with Exception, pg 113 */
81  regTimer_b = 0x1a, /* Universal */
82  regTxPktId_b = 0x18, /* 905B Revision Only */
83  regCommandIntStatus_w = 0x0e, /* Universal (Command Variations) */
84 };

◆ Registers7

enum Registers7
Enumerator
regPowerMgmtEvent_7_w 
regVlanEtherType_7_w 
regVlanMask_7_w 

Definition at line 87 of file 3c90x.h.

87  {
88  regPowerMgmtEvent_7_w = 0x0c, /* 905B Revision Only */
89  regVlanEtherType_7_w = 0x04, /* 905B Revision Only */
90  regVlanMask_7_w = 0x00, /* 905B Revision Only */
91 };

◆ Registers6

enum Registers6
Enumerator
regBytesXmittedOk_6_w 
regBytesRcvdOk_6_w 
regUpperFramesOk_6_b 
regFramesDeferred_6_b 
regFramesRecdOk_6_b 
regFramesXmittedOk_6_b 
regRxOverruns_6_b 
regLateCollisions_6_b 
regSingleCollisions_6_b 
regMultipleCollisions_6_b 
regSqeErrors_6_b 
regCarrierLost_6_b 

Definition at line 93 of file 3c90x.h.

93  {
94  regBytesXmittedOk_6_w = 0x0c, /* Universal */
95  regBytesRcvdOk_6_w = 0x0a, /* Universal */
96  regUpperFramesOk_6_b = 0x09, /* Universal */
97  regFramesDeferred_6_b = 0x08, /* Universal */
98  regFramesRecdOk_6_b = 0x07, /* Universal with Exceptions, pg 142 */
99  regFramesXmittedOk_6_b = 0x06, /* Universal */
100  regRxOverruns_6_b = 0x05, /* Universal */
101  regLateCollisions_6_b = 0x04, /* Universal */
102  regSingleCollisions_6_b = 0x03, /* Universal */
103  regMultipleCollisions_6_b = 0x02, /* Universal */
104  regSqeErrors_6_b = 0x01, /* Universal */
105  regCarrierLost_6_b = 0x00, /* Universal */
106 };

◆ Registers5

enum Registers5
Enumerator
regIndicationEnable_5_w 
regInterruptEnable_5_w 
regTxReclaimThresh_5_b 
regRxFilter_5_b 
regRxEarlyThresh_5_w 
regTxStartThresh_5_w 

Definition at line 108 of file 3c90x.h.

108  {
109  regIndicationEnable_5_w = 0x0c, /* Universal */
110  regInterruptEnable_5_w = 0x0a, /* Universal */
111  regTxReclaimThresh_5_b = 0x09, /* 905B Revision Only */
112  regRxFilter_5_b = 0x08, /* Universal */
113  regRxEarlyThresh_5_w = 0x06, /* Universal */
114  regTxStartThresh_5_w = 0x00, /* Universal */
115 };

◆ Registers4

enum Registers4
Enumerator
regUpperBytesOk_4_b 
regBadSSD_4_b 
regMediaStatus_4_w 
regPhysicalMgmt_4_w 
regNetworkDiagnostic_4_w 
regFifoDiagnostic_4_w 
regVcoDiagnostic_4_w 

Definition at line 117 of file 3c90x.h.

117  {
118  regUpperBytesOk_4_b = 0x0d, /* Universal */
119  regBadSSD_4_b = 0x0c, /* Universal */
120  regMediaStatus_4_w = 0x0a, /* Universal with Exceptions, pg 201 */
121  regPhysicalMgmt_4_w = 0x08, /* Universal */
122  regNetworkDiagnostic_4_w = 0x06, /* Universal with Exceptions, pg 203 */
123  regFifoDiagnostic_4_w = 0x04, /* Universal with Exceptions, pg 196 */
124  regVcoDiagnostic_4_w = 0x02, /* Undocumented? */
125 };

◆ Registers3

enum Registers3
Enumerator
regTxFree_3_w 
regRxFree_3_w 
regResetMediaOptions_3_w 
regMacControl_3_w 
regMaxPktSize_3_w 
regInternalConfig_3_l 

Definition at line 127 of file 3c90x.h.

127  {
128  regTxFree_3_w = 0x0c, /* Universal */
129  regRxFree_3_w = 0x0a, /* Universal with Exceptions, pg 125 */
130  regResetMediaOptions_3_w = 0x08, /* Media Options on B Revision, */
131  /* Reset Options on Non-B Revision */
132  regMacControl_3_w = 0x06, /* Universal with Exceptions, pg 199 */
133  regMaxPktSize_3_w = 0x04, /* 905B Revision Only */
134  regInternalConfig_3_l = 0x00, /* Universal, different bit */
135  /* definitions, pg 59 */
136 };

◆ Registers2

enum Registers2
Enumerator
regResetOptions_2_w 
regStationMask_2_3w 
regStationAddress_2_3w 

Definition at line 138 of file 3c90x.h.

138  {
139  regResetOptions_2_w = 0x0c, /* 905B Revision Only */
140  regStationMask_2_3w = 0x06, /* Universal with Exceptions, pg 127 */
141  regStationAddress_2_3w = 0x00, /* Universal with Exceptions, pg 127 */
142 };

◆ Registers1

enum Registers1
Enumerator
regRxStatus_1_w 

Definition at line 144 of file 3c90x.h.

144  {
145  regRxStatus_1_w = 0x0a, /* 90X Revision Only, Pg 126 */
146 };

◆ Registers0

enum Registers0
Enumerator
regEepromData_0_w 
regEepromCommand_0_w 
regBiosRomData_0_b 
regBiosRomAddr_0_l 

Definition at line 148 of file 3c90x.h.

148  {
149  regEepromData_0_w = 0x0c, /* Universal */
150  regEepromCommand_0_w = 0x0a, /* Universal */
151  regBiosRomData_0_b = 0x08, /* 905B Revision Only */
152  regBiosRomAddr_0_l = 0x04, /* 905B Revision Only */
153 };

◆ Windows

enum Windows
Enumerator
winNone 
winPowerVlan7 
winStatistics6 
winTxRxControl5 
winDiagnostics4 
winTxRxOptions3 
winAddressing2 
winUnused1 
winEepromBios0 

Definition at line 157 of file 3c90x.h.

157  {
158  winNone = 0xff,
159  winPowerVlan7 = 0x07,
160  winStatistics6 = 0x06,
161  winTxRxControl5 = 0x05,
162  winDiagnostics4 = 0x04,
163  winTxRxOptions3 = 0x03,
164  winAddressing2 = 0x02,
165  winUnused1 = 0x01,
166  winEepromBios0 = 0x00,
167 };
Definition: 3c90x.h:158

◆ Commands

enum Commands
Enumerator
cmdGlobalReset 
cmdSelectRegisterWindow 
cmdEnableDcConverter 
cmdRxDisable 
cmdRxEnable 
cmdRxReset 
cmdStallCtl 
cmdTxEnable 
cmdTxDisable 
cmdTxReset 
cmdRequestInterrupt 
cmdAcknowledgeInterrupt 
cmdSetInterruptEnable 
cmdSetIndicationEnable 
cmdSetRxFilter 
cmdSetRxEarlyThresh 
cmdSetTxStartThresh 
cmdStatisticsEnable 
cmdStatisticsDisable 
cmdDisableDcConverter 
cmdSetTxReclaimThresh 
cmdSetHashFilterBit 

Definition at line 171 of file 3c90x.h.

171  {
172  cmdGlobalReset = 0x00, /* Universal with Exceptions, pg 151 */
173  cmdSelectRegisterWindow = 0x01, /* Universal */
174  cmdEnableDcConverter = 0x02, /* */
175  cmdRxDisable = 0x03, /* */
176  cmdRxEnable = 0x04, /* Universal */
177  cmdRxReset = 0x05, /* Universal */
178  cmdStallCtl = 0x06, /* Universal */
179  cmdTxEnable = 0x09, /* Universal */
180  cmdTxDisable = 0x0A, /* */
181  cmdTxReset = 0x0B, /* Universal */
182  cmdRequestInterrupt = 0x0C, /* */
183  cmdAcknowledgeInterrupt = 0x0D, /* Universal */
184  cmdSetInterruptEnable = 0x0E, /* Universal */
185  cmdSetIndicationEnable = 0x0F, /* Universal */
186  cmdSetRxFilter = 0x10, /* Universal */
187  cmdSetRxEarlyThresh = 0x11, /* */
188  cmdSetTxStartThresh = 0x13, /* */
189  cmdStatisticsEnable = 0x15, /* */
190  cmdStatisticsDisable = 0x16, /* */
191  cmdDisableDcConverter = 0x17, /* */
192  cmdSetTxReclaimThresh = 0x18, /* */
193  cmdSetHashFilterBit = 0x19, /* */
194 };

◆ GlobalResetParams

Enumerator
globalResetAll 
globalResetMaskNetwork 
globalResetMaskAll 

Definition at line 196 of file 3c90x.h.

196  {
197  globalResetAll = 0,
198  globalResetMaskNetwork = (1<<2),
199  globalResetMaskAll = 0x1ff,
200 };

◆ FrameStartHeader

Enumerator
fshTxIndicate 
fshDnComplete 
fshRndupDefeat 

Definition at line 202 of file 3c90x.h.

202  {
203  fshTxIndicate = 0x8000,
204  fshDnComplete = 0x10000,
205  fshRndupDefeat = 0x10000000,
206 };

◆ UpDownDesc

enum UpDownDesc
Enumerator
upLastFrag 
downLastFrag 

Definition at line 208 of file 3c90x.h.

208  {
209  upLastFrag = (1 << 31),
210  downLastFrag = (1 << 31),
211 };

◆ UpPktStatus

Enumerator
upComplete 
upError 

Definition at line 213 of file 3c90x.h.

213  {
214  upComplete = (1 << 15),
215  upError = (1 << 14),
216 };
Definition: 3c90x.h:215

◆ Stalls

enum Stalls
Enumerator
upStall 
upUnStall 
dnStall 
dnUnStall 

Definition at line 218 of file 3c90x.h.

218  {
219  upStall = 0x00,
220  upUnStall = 0x01,
221 
222  dnStall = 0x02,
223  dnUnStall = 0x03,
224 };
Definition: 3c90x.h:222
Definition: 3c90x.h:219

◆ Resources

enum Resources
Enumerator
resRxRing 
resTxRing 
resRxIOBuf 

Definition at line 226 of file 3c90x.h.

226  {
227  resRxRing = 0x00,
228  resTxRing = 0x02,
229  resRxIOBuf = 0x04
230 };

◆ eeprom

enum eeprom
Enumerator
eepromBusy 
eepromRead 
eepromRead_556 
eepromHwAddrOffset 

Definition at line 232 of file 3c90x.h.

232  {
233  eepromBusy = (1 << 15),
234  eepromRead = ((0x02) << 6),
235  eepromRead_556 = 0x230,
236  eepromHwAddrOffset = 0x0a,
237 };

◆ linktype

enum linktype
Enumerator
link10BaseT 
linkAUI 
link10Base2 
link100BaseFX 
linkMII 
linkAutoneg 
linkExternalMII 

Definition at line 240 of file 3c90x.h.

240  {
241  link10BaseT = 0x00,
242  linkAUI = 0x01,
243  link10Base2 = 0x03,
244  link100BaseFX = 0x05,
245  linkMII = 0x06,
246  linkAutoneg = 0x08,
247  linkExternalMII = 0x09,
248 };
Definition: 3c90x.h:245
Definition: 3c90x.h:242

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( BSD2  )

◆ __attribute__()

struct TXD __attribute__ ( (aligned(8))  )

Variable Documentation

◆ a3c90x_operations

struct net_device_operations a3c90x_operations
static

Definition at line 53 of file 3c90x.h.

◆ DnNextPtr

volatile unsigned int DnNextPtr

Definition at line 49 of file 3c90x.h.

◆ FrameStartHeader

volatile unsigned int FrameStartHeader

Definition at line 50 of file 3c90x.h.

◆ DataAddr

volatile unsigned int DataAddr

Definition at line 51 of file 3c90x.h.

◆ DataLength

volatile unsigned int DataLength

Definition at line 52 of file 3c90x.h.

◆ UpNextPtr

volatile unsigned int UpNextPtr

Definition at line 49 of file 3c90x.h.

◆ UpPktStatus

volatile unsigned int UpPktStatus

Definition at line 50 of file 3c90x.h.

◆ __attribute__