Microchip LAN78xx USB Ethernet driver. More...

#include "smscusb.h"
#include "smsc75xx.h"

Macros
#define	LAN78XX_HW_CFG 0x0010
	Hardware configuration register.
#define	LAN78XX_HW_CFG_LED1_EN 0x00200000UL
	LED1 enable.
#define	LAN78XX_HW_CFG_LED0_EN 0x00100000UL
	LED1 enable.
#define	LAN78XX_HW_CFG_LRST 0x00000002UL
	Soft lite reset.
#define	LAN78XX_INT_EP_CTL 0x0098
	Interrupt endpoint control register.
#define	LAN78XX_INT_EP_CTL_RDFO_EN 0x00400000UL
	RX FIFO overflow.
#define	LAN78XX_INT_EP_CTL_PHY_EN 0x00020000UL
	PHY interrupt.
#define	LAN78XX_BULK_IN_DLY 0x0094
	Bulk IN delay register.
#define	LAN78XX_BULK_IN_DLY_SET(ticks)
	Delay / 16.7ns.
#define	LAN78XX_E2P_BASE 0x0040
	EEPROM register base.
#define	LAN78XX_USB_CFG0 0x0080
	USB configuration register 0.
#define	LAN78XX_USB_CFG0_BIR 0x00000040UL
	Bulk IN use NAK.
#define	LAN78XX_RFE_CTL 0x00b0
	Receive filtering engine control register.
#define	LAN78XX_RFE_CTL_AB 0x00000400UL
	Accept broadcast.
#define	LAN78XX_RFE_CTL_AM 0x00000200UL
	Accept multicast.
#define	LAN78XX_RFE_CTL_AU 0x00000100UL
	Accept unicast.
#define	LAN78XX_FCT_RX_CTL 0x00c0
	FIFO controller RX FIFO control register.
#define	LAN78XX_FCT_RX_CTL_EN 0x80000000UL
	FCT RX enable.
#define	LAN78XX_FCT_RX_CTL_BAD 0x02000000UL
	Store bad frames.
#define	LAN78XX_FCT_TX_CTL 0x00c4
	FIFO controller TX FIFO control register.
#define	LAN78XX_FCT_TX_CTL_EN 0x80000000UL
	FCT TX enable.
#define	LAN78XX_MAC_CR 0x0100
	MAC control register.
#define	LAN78XX_MAC_CR_ADP 0x00002000UL
	Duplex polarity.
#define	LAN78XX_MAC_CR_ADD 0x00001000UL
	Auto duplex.
#define	LAN78XX_MAC_CR_ASD 0x00000800UL
	Auto speed.
#define	LAN78XX_MAC_RX 0x0104
	MAC receive register.
#define	LAN78XX_MAC_RX_MAX_SIZE(mtu)
	Max frame size.
#define	LAN78XX_MAC_RX_MAX_SIZE_DEFAULT LAN78XX_MAC_RX_MAX_SIZE ( ETH_FRAME_LEN + 4 /* VLAN / + 4 / CRC */ )
#define	LAN78XX_MAC_RX_FCS 0x00000010UL
	FCS stripping.
#define	LAN78XX_MAC_RX_EN 0x00000001UL
	RX enable.
#define	LAN78XX_MAC_TX 0x0108
	MAC transmit register.
#define	LAN78XX_MAC_TX_EN 0x00000001UL
	TX enable.
#define	LAN78XX_RX_ADDR_BASE 0x0118
	MAC receive address register base.
#define	LAN78XX_MII_BASE 0x0120
	MII register base.
#define	LAN78XX_MII_PHY_INTR_MASK 25
	PHY interrupt mask MII register.
#define	LAN78XX_MII_PHY_INTR_SOURCE 26
	PHY interrupt source MII register.
#define	LAN78XX_PHY_INTR_ENABLE 0x8000
	PHY interrupt: global enable.
#define	LAN78XX_PHY_INTR_LINK 0x2000
	PHY interrupt: link state change.
#define	LAN78XX_PHY_INTR_ANEG_ERR 0x0800
	PHY interrupt: auto-negotiation failure.
#define	LAN78XX_PHY_INTR_ANEG_DONE 0x0400
	PHY interrupt: auto-negotiation complete.
#define	LAN78XX_ADDR_FILT_BASE 0x0400
	MAC address perfect filter register base.
#define	LAN78XX_OTP_BASE 0x1000
	OTP register base.
#define	LAN78XX_RESET_MAX_WAIT_MS 100
	Maximum time to wait for reset (in milliseconds)

Functions
	FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
	FILE_SECBOOT (PERMITTED)

Detailed Description

Microchip LAN78xx USB Ethernet driver.

Definition in file lan78xx.h.

Macro Definition Documentation

◆ LAN78XX_HW_CFG

#define LAN78XX_HW_CFG 0x0010

Hardware configuration register.

Definition at line 17 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac(), and lan78xx_reset().

◆ LAN78XX_HW_CFG_LED1_EN

#define LAN78XX_HW_CFG_LED1_EN 0x00200000UL

LED1 enable.

Definition at line 18 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac().

◆ LAN78XX_HW_CFG_LED0_EN

#define LAN78XX_HW_CFG_LED0_EN 0x00100000UL

LED1 enable.

Definition at line 19 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac().

◆ LAN78XX_HW_CFG_LRST

#define LAN78XX_HW_CFG_LRST 0x00000002UL

Soft lite reset.

Definition at line 20 of file lan78xx.h.

Referenced by lan78xx_reset().

◆ LAN78XX_INT_EP_CTL

#define LAN78XX_INT_EP_CTL 0x0098

Interrupt endpoint control register.

Definition at line 23 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_INT_EP_CTL_RDFO_EN

#define LAN78XX_INT_EP_CTL_RDFO_EN 0x00400000UL

RX FIFO overflow.

Definition at line 24 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_INT_EP_CTL_PHY_EN

#define LAN78XX_INT_EP_CTL_PHY_EN 0x00020000UL

PHY interrupt.

Definition at line 25 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_BULK_IN_DLY

#define LAN78XX_BULK_IN_DLY 0x0094

Bulk IN delay register.

Definition at line 28 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_BULK_IN_DLY_SET

#define LAN78XX_BULK_IN_DLY_SET ( ticks )

Value:

( (ticks) << 0 )

Delay / 16.7ns.

Definition at line 29 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_E2P_BASE

#define LAN78XX_E2P_BASE 0x0040

EEPROM register base.

Definition at line 32 of file lan78xx.h.

Referenced by lan78xx_eeprom_fetch_mac().

◆ LAN78XX_USB_CFG0

#define LAN78XX_USB_CFG0 0x0080

USB configuration register 0.

Definition at line 35 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_USB_CFG0_BIR

#define LAN78XX_USB_CFG0_BIR 0x00000040UL

Bulk IN use NAK.

Definition at line 36 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_RFE_CTL

#define LAN78XX_RFE_CTL 0x00b0

Receive filtering engine control register.

Definition at line 39 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_RFE_CTL_AB

#define LAN78XX_RFE_CTL_AB 0x00000400UL

Accept broadcast.

Definition at line 40 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_RFE_CTL_AM

#define LAN78XX_RFE_CTL_AM 0x00000200UL

Accept multicast.

Definition at line 41 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_RFE_CTL_AU

#define LAN78XX_RFE_CTL_AU 0x00000100UL

Accept unicast.

Definition at line 42 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_FCT_RX_CTL

#define LAN78XX_FCT_RX_CTL 0x00c0

FIFO controller RX FIFO control register.

Definition at line 45 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_FCT_RX_CTL_EN

#define LAN78XX_FCT_RX_CTL_EN 0x80000000UL

FCT RX enable.

Definition at line 46 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_FCT_RX_CTL_BAD

#define LAN78XX_FCT_RX_CTL_BAD 0x02000000UL

Store bad frames.

Definition at line 47 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_FCT_TX_CTL

#define LAN78XX_FCT_TX_CTL 0x00c4

FIFO controller TX FIFO control register.

Definition at line 50 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_FCT_TX_CTL_EN

#define LAN78XX_FCT_TX_CTL_EN 0x80000000UL

FCT TX enable.

Definition at line 51 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_CR

#define LAN78XX_MAC_CR 0x0100

MAC control register.

Definition at line 54 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_CR_ADP

#define LAN78XX_MAC_CR_ADP 0x00002000UL

Duplex polarity.

Definition at line 55 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_CR_ADD

#define LAN78XX_MAC_CR_ADD 0x00001000UL

Auto duplex.

Definition at line 56 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_CR_ASD

#define LAN78XX_MAC_CR_ASD 0x00000800UL

Auto speed.

Definition at line 57 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_RX

#define LAN78XX_MAC_RX 0x0104

MAC receive register.

Definition at line 60 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_RX_MAX_SIZE

#define LAN78XX_MAC_RX_MAX_SIZE ( mtu )

Value:

( (mtu) << 16 )

mtu

uint32_t mtu

Maximum MTU.

Definition ena.h:17

Max frame size.

Definition at line 61 of file lan78xx.h.

◆ LAN78XX_MAC_RX_MAX_SIZE_DEFAULT

#define LAN78XX_MAC_RX_MAX_SIZE_DEFAULT LAN78XX_MAC_RX_MAX_SIZE ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Definition at line 62 of file lan78xx.h.

62#define LAN78XX_MAC_RX_MAX_SIZE_DEFAULT \

63 LAN78XX_MAC_RX_MAX_SIZE ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Referenced by lan78xx_open().

◆ LAN78XX_MAC_RX_FCS

#define LAN78XX_MAC_RX_FCS 0x00000010UL

FCS stripping.

Definition at line 64 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_RX_EN

#define LAN78XX_MAC_RX_EN 0x00000001UL

RX enable.

Definition at line 65 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_TX

#define LAN78XX_MAC_TX 0x0108

MAC transmit register.

Definition at line 68 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MAC_TX_EN

#define LAN78XX_MAC_TX_EN 0x00000001UL

TX enable.

Definition at line 69 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_RX_ADDR_BASE

#define LAN78XX_RX_ADDR_BASE 0x0118

MAC receive address register base.

Definition at line 72 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MII_BASE

#define LAN78XX_MII_BASE 0x0120

MII register base.

Definition at line 75 of file lan78xx.h.

Referenced by lan78xx_probe().

◆ LAN78XX_MII_PHY_INTR_MASK

#define LAN78XX_MII_PHY_INTR_MASK 25

PHY interrupt mask MII register.

Definition at line 78 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_MII_PHY_INTR_SOURCE

#define LAN78XX_MII_PHY_INTR_SOURCE 26

PHY interrupt source MII register.

Definition at line 81 of file lan78xx.h.

Referenced by lan78xx_probe().

◆ LAN78XX_PHY_INTR_ENABLE

#define LAN78XX_PHY_INTR_ENABLE 0x8000

PHY interrupt: global enable.

Definition at line 84 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_PHY_INTR_LINK

#define LAN78XX_PHY_INTR_LINK 0x2000

PHY interrupt: link state change.

Definition at line 87 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_PHY_INTR_ANEG_ERR

#define LAN78XX_PHY_INTR_ANEG_ERR 0x0800

PHY interrupt: auto-negotiation failure.

Definition at line 90 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_PHY_INTR_ANEG_DONE

#define LAN78XX_PHY_INTR_ANEG_DONE 0x0400

PHY interrupt: auto-negotiation complete.

Definition at line 93 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_ADDR_FILT_BASE

#define LAN78XX_ADDR_FILT_BASE 0x0400

MAC address perfect filter register base.

Definition at line 96 of file lan78xx.h.

Referenced by lan78xx_open().

◆ LAN78XX_OTP_BASE

#define LAN78XX_OTP_BASE 0x1000

OTP register base.

Definition at line 99 of file lan78xx.h.

Referenced by lan78xx_fetch_mac().

◆ LAN78XX_RESET_MAX_WAIT_MS

#define LAN78XX_RESET_MAX_WAIT_MS 100

Maximum time to wait for reset (in milliseconds)

Definition at line 102 of file lan78xx.h.

Referenced by lan78xx_reset().

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )

◆ FILE_SECBOOT()

FILE_SECBOOT ( PERMITTED )

Macros

Functions

Detailed Description

Macro Definition Documentation

◆ LAN78XX_HW_CFG

◆ LAN78XX_HW_CFG_LED1_EN

◆ LAN78XX_HW_CFG_LED0_EN

◆ LAN78XX_HW_CFG_LRST

◆ LAN78XX_INT_EP_CTL

◆ LAN78XX_INT_EP_CTL_RDFO_EN

◆ LAN78XX_INT_EP_CTL_PHY_EN

◆ LAN78XX_BULK_IN_DLY

◆ LAN78XX_BULK_IN_DLY_SET

◆ LAN78XX_E2P_BASE

◆ LAN78XX_USB_CFG0

◆ LAN78XX_USB_CFG0_BIR

◆ LAN78XX_RFE_CTL

◆ LAN78XX_RFE_CTL_AB

◆ LAN78XX_RFE_CTL_AM

◆ LAN78XX_RFE_CTL_AU

◆ LAN78XX_FCT_RX_CTL

◆ LAN78XX_FCT_RX_CTL_EN

◆ LAN78XX_FCT_RX_CTL_BAD

◆ LAN78XX_FCT_TX_CTL

◆ LAN78XX_FCT_TX_CTL_EN

◆ LAN78XX_MAC_CR

◆ LAN78XX_MAC_CR_ADP

◆ LAN78XX_MAC_CR_ADD

◆ LAN78XX_MAC_CR_ASD

◆ LAN78XX_MAC_RX

◆ LAN78XX_MAC_RX_MAX_SIZE

◆ LAN78XX_MAC_RX_MAX_SIZE_DEFAULT

◆ LAN78XX_MAC_RX_FCS

◆ LAN78XX_MAC_RX_EN

◆ LAN78XX_MAC_TX

◆ LAN78XX_MAC_TX_EN

◆ LAN78XX_RX_ADDR_BASE

◆ LAN78XX_MII_BASE

◆ LAN78XX_MII_PHY_INTR_MASK

◆ LAN78XX_MII_PHY_INTR_SOURCE

◆ LAN78XX_PHY_INTR_ENABLE

◆ LAN78XX_PHY_INTR_LINK

◆ LAN78XX_PHY_INTR_ANEG_ERR

◆ LAN78XX_PHY_INTR_ANEG_DONE

◆ LAN78XX_ADDR_FILT_BASE

◆ LAN78XX_OTP_BASE

◆ LAN78XX_RESET_MAX_WAIT_MS

Function Documentation

◆ FILE_LICENCE()

◆ FILE_SECBOOT()