qib__7322__regs_8h_source.html

/*

 * Copyright (c) 2008, 2009 QLogic Corporation. All rights reserved.

 *

 * This software is available to you under a choice of one of two

 * licenses.  You may choose to be licensed under the terms of the GNU

 * General Public License (GPL) Version 2, available from the file

 * COPYING in the main directory of this source tree, or the

 * OpenIB.org BSD license below:

 *

 *     Redistribution and use in source and binary forms, with or

 *     without modification, are permitted provided that the following

 *     conditions are met:

 *

 *      - Redistributions of source code must retain the above

 *        copyright notice, this list of conditions and the following

 *        disclaimer.

 *

 *      - Redistributions in binary form must reproduce the above

 *        copyright notice, this list of conditions and the following

 *        disclaimer in the documentation and/or other materials

 *        provided with the distribution.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS

 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN

 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE

 * SOFTWARE.

 */

/* This file is mechanically generated from RTL. Any hand-edits will be lost! */


/* This file has been further processed by ./drivers/infiniband/qib_genbits.pl */


FILE_LICENCE ( GPL2_ONLY );


#define QIB_7322_Revision_offset 0x00000000UL


struct QIB_7322_Revision_pb {

        pseudo_bit_t R_ChipRevMinor[8];

        pseudo_bit_t R_ChipRevMajor[8];

        pseudo_bit_t R_Arch[8];

        pseudo_bit_t R_SW[8];

        pseudo_bit_t BoardID[8];

        pseudo_bit_t R_Emulation_Revcode[22];

        pseudo_bit_t R_Emulation[1];

        pseudo_bit_t R_Simulator[1];

};


struct QIB_7322_Revision {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_Revision_pb );

};


/* Default value: 0x0000000002010601 */


#define QIB_7322_Control_offset 0x00000008UL


struct QIB_7322_Control_pb {

        pseudo_bit_t SyncReset[1];

        pseudo_bit_t FreezeMode[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t PCIERetryBufDiagEn[1];

        pseudo_bit_t SDmaDescFetchPriorityEn[1];

        pseudo_bit_t PCIEPostQDiagEn[1];

        pseudo_bit_t PCIECplQDiagEn[1];

        pseudo_bit_t _unused_1[57];

};


struct QIB_7322_Control {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_Control_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PageAlign_offset 0x00000010UL

/* Default value: 0x0000000000001000 */


#define QIB_7322_ContextCnt_offset 0x00000018UL

/* Default value: 0x0000000000000012 */


#define QIB_7322_Scratch_offset 0x00000020UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_CntrRegBase_offset 0x00000028UL

/* Default value: 0x0000000000011000 */


#define QIB_7322_SendRegBase_offset 0x00000030UL

/* Default value: 0x0000000000003000 */


#define QIB_7322_UserRegBase_offset 0x00000038UL

/* Default value: 0x0000000000200000 */


#define QIB_7322_DebugPortSel_offset 0x00000040UL


struct QIB_7322_DebugPortSel_pb {

        pseudo_bit_t DebugOutMuxSel[2];

        pseudo_bit_t _unused_0[28];

        pseudo_bit_t SrcMuxSel0[8];

        pseudo_bit_t SrcMuxSel1[8];

        pseudo_bit_t DbgClkPortSel[5];

        pseudo_bit_t EnDbgPort[1];

        pseudo_bit_t EnEnhancedDebugMode[1];

        pseudo_bit_t EnhMode_SrcMuxSelIndex[10];

        pseudo_bit_t EnhMode_SrcMuxSelWrEn[1];

};


struct QIB_7322_DebugPortSel {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DebugPortSel_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DebugPortNibbleSel_offset 0x00000048UL


struct QIB_7322_DebugPortNibbleSel_pb {

        pseudo_bit_t NibbleSel0[4];

        pseudo_bit_t NibbleSel1[4];

        pseudo_bit_t NibbleSel2[4];

        pseudo_bit_t NibbleSel3[4];

        pseudo_bit_t NibbleSel4[4];

        pseudo_bit_t NibbleSel5[4];

        pseudo_bit_t NibbleSel6[4];

        pseudo_bit_t NibbleSel7[4];

        pseudo_bit_t NibbleSel8[4];

        pseudo_bit_t NibbleSel9[4];

        pseudo_bit_t NibbleSel10[4];

        pseudo_bit_t NibbleSel11[4];

        pseudo_bit_t NibbleSel12[4];

        pseudo_bit_t NibbleSel13[4];

        pseudo_bit_t NibbleSel14[4];

        pseudo_bit_t NibbleSel15[4];

};


struct QIB_7322_DebugPortNibbleSel {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DebugPortNibbleSel_pb );

};


/* Default value: 0xFEDCBA9876543210 */


#define QIB_7322_DebugSigsIntSel_offset 0x00000050UL


struct QIB_7322_DebugSigsIntSel_pb {

        pseudo_bit_t debug_port_sel_pcs_pipe_lane07[3];

        pseudo_bit_t debug_port_sel_pcs_pipe_lane815[3];

        pseudo_bit_t debug_port_sel_pcs_sdout[1];

        pseudo_bit_t debug_port_sel_pcs_symlock_elfifo_lane[4];

        pseudo_bit_t debug_port_sel_pcs_rxdet_encdec_lane[3];

        pseudo_bit_t EnableSDma_SelfDrain[1];

        pseudo_bit_t debug_port_sel_pcie_rx_tx[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t debug_port_sel_tx_ibport[1];

        pseudo_bit_t debug_port_sel_tx_sdma[1];

        pseudo_bit_t debug_port_sel_rx_ibport[1];

        pseudo_bit_t _unused_1[12];

        pseudo_bit_t debug_port_sel_xgxs_0[4];

        pseudo_bit_t debug_port_sel_credit_a_0[3];

        pseudo_bit_t debug_port_sel_credit_b_0[3];

        pseudo_bit_t debug_port_sel_xgxs_1[4];

        pseudo_bit_t debug_port_sel_credit_a_1[3];

        pseudo_bit_t debug_port_sel_credit_b_1[3];

        pseudo_bit_t _unused_2[12];

};


struct QIB_7322_DebugSigsIntSel {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DebugSigsIntSel_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DebugPortValueReg_offset 0x00000058UL


#define QIB_7322_IntBlocked_offset 0x00000060UL


struct QIB_7322_IntBlocked_pb {

        pseudo_bit_t RcvAvail0IntBlocked[1];

        pseudo_bit_t RcvAvail1IntBlocked[1];

        pseudo_bit_t RcvAvail2IntBlocked[1];

        pseudo_bit_t RcvAvail3IntBlocked[1];

        pseudo_bit_t RcvAvail4IntBlocked[1];

        pseudo_bit_t RcvAvail5IntBlocked[1];

        pseudo_bit_t RcvAvail6IntBlocked[1];

        pseudo_bit_t RcvAvail7IntBlocked[1];

        pseudo_bit_t RcvAvail8IntBlocked[1];

        pseudo_bit_t RcvAvail9IntBlocked[1];

        pseudo_bit_t RcvAvail10IntBlocked[1];

        pseudo_bit_t RcvAvail11IntBlocked[1];

        pseudo_bit_t RcvAvail12IntBlocked[1];

        pseudo_bit_t RcvAvail13IntBlocked[1];

        pseudo_bit_t RcvAvail14IntBlocked[1];

        pseudo_bit_t RcvAvail15IntBlocked[1];

        pseudo_bit_t RcvAvail16IntBlocked[1];

        pseudo_bit_t RcvAvail17IntBlocked[1];

        pseudo_bit_t _unused_0[5];

        pseudo_bit_t SendBufAvailIntBlocked[1];

        pseudo_bit_t SendDoneIntBlocked_0[1];

        pseudo_bit_t SendDoneIntBlocked_1[1];

        pseudo_bit_t _unused_1[2];

        pseudo_bit_t AssertGPIOIntBlocked[1];

        pseudo_bit_t ErrIntBlocked[1];

        pseudo_bit_t ErrIntBlocked_0[1];

        pseudo_bit_t ErrIntBlocked_1[1];

        pseudo_bit_t RcvUrg0IntBlocked[1];

        pseudo_bit_t RcvUrg1IntBlocked[1];

        pseudo_bit_t RcvUrg2IntBlocked[1];

        pseudo_bit_t RcvUrg3IntBlocked[1];

        pseudo_bit_t RcvUrg4IntBlocked[1];

        pseudo_bit_t RcvUrg5IntBlocked[1];

        pseudo_bit_t RcvUrg6IntBlocked[1];

        pseudo_bit_t RcvUrg7IntBlocked[1];

        pseudo_bit_t RcvUrg8IntBlocked[1];

        pseudo_bit_t RcvUrg9IntBlocked[1];

        pseudo_bit_t RcvUrg10IntBlocked[1];

        pseudo_bit_t RcvUrg11IntBlocked[1];

        pseudo_bit_t RcvUrg12IntBlocked[1];

        pseudo_bit_t RcvUrg13IntBlocked[1];

        pseudo_bit_t RcvUrg14IntBlocked[1];

        pseudo_bit_t RcvUrg15IntBlocked[1];

        pseudo_bit_t RcvUrg16IntBlocked[1];

        pseudo_bit_t RcvUrg17IntBlocked[1];

        pseudo_bit_t _unused_2[6];

        pseudo_bit_t SDmaCleanupDoneBlocked_0[1];

        pseudo_bit_t SDmaCleanupDoneBlocked_1[1];

        pseudo_bit_t SDmaIdleIntBlocked_0[1];

        pseudo_bit_t SDmaIdleIntBlocked_1[1];

        pseudo_bit_t SDmaProgressIntBlocked_0[1];

        pseudo_bit_t SDmaProgressIntBlocked_1[1];

        pseudo_bit_t SDmaIntBlocked_0[1];

        pseudo_bit_t SDmaIntBlocked_1[1];

};


struct QIB_7322_IntBlocked {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IntBlocked_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IntMask_offset 0x00000068UL


struct QIB_7322_IntMask_pb {

        pseudo_bit_t RcvAvail0IntMask[1];

        pseudo_bit_t RcvAvail1IntMask[1];

        pseudo_bit_t RcvAvail2IntMask[1];

        pseudo_bit_t RcvAvail3IntMask[1];

        pseudo_bit_t RcvAvail4IntMask[1];

        pseudo_bit_t RcvAvail5IntMask[1];

        pseudo_bit_t RcvAvail6IntMask[1];

        pseudo_bit_t RcvAvail7IntMask[1];

        pseudo_bit_t RcvAvail8IntMask[1];

        pseudo_bit_t RcvAvail9IntMask[1];

        pseudo_bit_t RcvAvail10IntMask[1];

        pseudo_bit_t RcvAvail11IntMask[1];

        pseudo_bit_t RcvAvail12IntMask[1];

        pseudo_bit_t RcvAvail13IntMask[1];

        pseudo_bit_t RcvAvail14IntMask[1];

        pseudo_bit_t RcvAvail15IntMask[1];

        pseudo_bit_t RcvAvail16IntMask[1];

        pseudo_bit_t RcvAvail17IntMask[1];

        pseudo_bit_t _unused_0[5];

        pseudo_bit_t SendBufAvailIntMask[1];

        pseudo_bit_t SendDoneIntMask_0[1];

        pseudo_bit_t SendDoneIntMask_1[1];

        pseudo_bit_t _unused_1[2];

        pseudo_bit_t AssertGPIOIntMask[1];

        pseudo_bit_t ErrIntMask[1];

        pseudo_bit_t ErrIntMask_0[1];

        pseudo_bit_t ErrIntMask_1[1];

        pseudo_bit_t RcvUrg0IntMask[1];

        pseudo_bit_t RcvUrg1IntMask[1];

        pseudo_bit_t RcvUrg2IntMask[1];

        pseudo_bit_t RcvUrg3IntMask[1];

        pseudo_bit_t RcvUrg4IntMask[1];

        pseudo_bit_t RcvUrg5IntMask[1];

        pseudo_bit_t RcvUrg6IntMask[1];

        pseudo_bit_t RcvUrg7IntMask[1];

        pseudo_bit_t RcvUrg8IntMask[1];

        pseudo_bit_t RcvUrg9IntMask[1];

        pseudo_bit_t RcvUrg10IntMask[1];

        pseudo_bit_t RcvUrg11IntMask[1];

        pseudo_bit_t RcvUrg12IntMask[1];

        pseudo_bit_t RcvUrg13IntMask[1];

        pseudo_bit_t RcvUrg14IntMask[1];

        pseudo_bit_t RcvUrg15IntMask[1];

        pseudo_bit_t RcvUrg16IntMask[1];

        pseudo_bit_t RcvUrg17IntMask[1];

        pseudo_bit_t _unused_2[6];

        pseudo_bit_t SDmaCleanupDoneMask_0[1];

        pseudo_bit_t SDmaCleanupDoneMask_1[1];

        pseudo_bit_t SDmaIdleIntMask_0[1];

        pseudo_bit_t SDmaIdleIntMask_1[1];

        pseudo_bit_t SDmaProgressIntMask_0[1];

        pseudo_bit_t SDmaProgressIntMask_1[1];

        pseudo_bit_t SDmaIntMask_0[1];

        pseudo_bit_t SDmaIntMask_1[1];

};


struct QIB_7322_IntMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IntMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IntStatus_offset 0x00000070UL


struct QIB_7322_IntStatus_pb {

        pseudo_bit_t RcvAvail0[1];

        pseudo_bit_t RcvAvail1[1];

        pseudo_bit_t RcvAvail2[1];

        pseudo_bit_t RcvAvail3[1];

        pseudo_bit_t RcvAvail4[1];

        pseudo_bit_t RcvAvail5[1];

        pseudo_bit_t RcvAvail6[1];

        pseudo_bit_t RcvAvail7[1];

        pseudo_bit_t RcvAvail8[1];

        pseudo_bit_t RcvAvail9[1];

        pseudo_bit_t RcvAvail10[1];

        pseudo_bit_t RcvAvail11[1];

        pseudo_bit_t RcvAvail12[1];

        pseudo_bit_t RcvAvail13[1];

        pseudo_bit_t RcvAvail14[1];

        pseudo_bit_t RcvAvail15[1];

        pseudo_bit_t RcvAvail16[1];

        pseudo_bit_t RcvAvail17[1];

        pseudo_bit_t _unused_0[5];

        pseudo_bit_t SendBufAvail[1];

        pseudo_bit_t SendDone_0[1];

        pseudo_bit_t SendDone_1[1];

        pseudo_bit_t _unused_1[2];

        pseudo_bit_t AssertGPIO[1];

        pseudo_bit_t Err[1];

        pseudo_bit_t Err_0[1];

        pseudo_bit_t Err_1[1];

        pseudo_bit_t RcvUrg0[1];

        pseudo_bit_t RcvUrg1[1];

        pseudo_bit_t RcvUrg2[1];

        pseudo_bit_t RcvUrg3[1];

        pseudo_bit_t RcvUrg4[1];

        pseudo_bit_t RcvUrg5[1];

        pseudo_bit_t RcvUrg6[1];

        pseudo_bit_t RcvUrg7[1];

        pseudo_bit_t RcvUrg8[1];

        pseudo_bit_t RcvUrg9[1];

        pseudo_bit_t RcvUrg10[1];

        pseudo_bit_t RcvUrg11[1];

        pseudo_bit_t RcvUrg12[1];

        pseudo_bit_t RcvUrg13[1];

        pseudo_bit_t RcvUrg14[1];

        pseudo_bit_t RcvUrg15[1];

        pseudo_bit_t RcvUrg16[1];

        pseudo_bit_t RcvUrg17[1];

        pseudo_bit_t _unused_2[6];

        pseudo_bit_t SDmaCleanupDone_0[1];

        pseudo_bit_t SDmaCleanupDone_1[1];

        pseudo_bit_t SDmaIdleInt_0[1];

        pseudo_bit_t SDmaIdleInt_1[1];

        pseudo_bit_t SDmaProgressInt_0[1];

        pseudo_bit_t SDmaProgressInt_1[1];

        pseudo_bit_t SDmaInt_0[1];

        pseudo_bit_t SDmaInt_1[1];

};


struct QIB_7322_IntStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IntStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IntClear_offset 0x00000078UL


struct QIB_7322_IntClear_pb {

        pseudo_bit_t RcvAvail0IntClear[1];

        pseudo_bit_t RcvAvail1IntClear[1];

        pseudo_bit_t RcvAvail2IntClear[1];

        pseudo_bit_t RcvAvail3IntClear[1];

        pseudo_bit_t RcvAvail4IntClear[1];

        pseudo_bit_t RcvAvail5IntClear[1];

        pseudo_bit_t RcvAvail6IntClear[1];

        pseudo_bit_t RcvAvail7IntClear[1];

        pseudo_bit_t RcvAvail8IntClear[1];

        pseudo_bit_t RcvAvail9IntClear[1];

        pseudo_bit_t RcvAvail10IntClear[1];

        pseudo_bit_t RcvAvail11IntClear[1];

        pseudo_bit_t RcvAvail12IntClear[1];

        pseudo_bit_t RcvAvail13IntClear[1];

        pseudo_bit_t RcvAvail14IntClear[1];

        pseudo_bit_t RcvAvail15IntClear[1];

        pseudo_bit_t RcvAvail16IntClear[1];

        pseudo_bit_t RcvAvail17IntClear[1];

        pseudo_bit_t _unused_0[5];

        pseudo_bit_t SendBufAvailIntClear[1];

        pseudo_bit_t SendDoneIntClear_0[1];

        pseudo_bit_t SendDoneIntClear_1[1];

        pseudo_bit_t _unused_1[2];

        pseudo_bit_t AssertGPIOIntClear[1];

        pseudo_bit_t ErrIntClear[1];

        pseudo_bit_t ErrIntClear_0[1];

        pseudo_bit_t ErrIntClear_1[1];

        pseudo_bit_t RcvUrg0IntClear[1];

        pseudo_bit_t RcvUrg1IntClear[1];

        pseudo_bit_t RcvUrg2IntClear[1];

        pseudo_bit_t RcvUrg3IntClear[1];

        pseudo_bit_t RcvUrg4IntClear[1];

        pseudo_bit_t RcvUrg5IntClear[1];

        pseudo_bit_t RcvUrg6IntClear[1];

        pseudo_bit_t RcvUrg7IntClear[1];

        pseudo_bit_t RcvUrg8IntClear[1];

        pseudo_bit_t RcvUrg9IntClear[1];

        pseudo_bit_t RcvUrg10IntClear[1];

        pseudo_bit_t RcvUrg11IntClear[1];

        pseudo_bit_t RcvUrg12IntClear[1];

        pseudo_bit_t RcvUrg13IntClear[1];

        pseudo_bit_t RcvUrg14IntClear[1];

        pseudo_bit_t RcvUrg15IntClear[1];

        pseudo_bit_t RcvUrg16IntClear[1];

        pseudo_bit_t RcvUrg17IntClear[1];

        pseudo_bit_t _unused_2[6];

        pseudo_bit_t SDmaCleanupDoneClear_0[1];

        pseudo_bit_t SDmaCleanupDoneClear_1[1];

        pseudo_bit_t SDmaIdleIntClear_0[1];

        pseudo_bit_t SDmaIdleIntClear_1[1];

        pseudo_bit_t SDmaProgressIntClear_0[1];

        pseudo_bit_t SDmaProgressIntClear_1[1];

        pseudo_bit_t SDmaIntClear_0[1];

        pseudo_bit_t SDmaIntClear_1[1];

};


struct QIB_7322_IntClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IntClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrMask_offset 0x00000080UL


struct QIB_7322_ErrMask_pb {

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t RcvEgrFullErrMask[1];

        pseudo_bit_t RcvHdrFullErrMask[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SDmaBufMaskDuplicateErrMask[1];

        pseudo_bit_t SDmaWrongPortErrMask[1];

        pseudo_bit_t SendSpecialTriggerErrMask[1];

        pseudo_bit_t _unused_2[7];

        pseudo_bit_t SendArmLaunchErrMask[1];

        pseudo_bit_t SendVLMismatchErrMask[1];

        pseudo_bit_t _unused_3[15];

        pseudo_bit_t RcvContextShareErrMask[1];

        pseudo_bit_t InvalidEEPCmdMask[1];

        pseudo_bit_t _unused_4[1];

        pseudo_bit_t SBufVL15MisUseErrMask[1];

        pseudo_bit_t SDmaVL15ErrMask[1];

        pseudo_bit_t _unused_5[4];

        pseudo_bit_t InvalidAddrErrMask[1];

        pseudo_bit_t HardwareErrMask[1];

        pseudo_bit_t ResetNegatedMask[1];

};


struct QIB_7322_ErrMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrStatus_offset 0x00000088UL


struct QIB_7322_ErrStatus_pb {

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t RcvEgrFullErr[1];

        pseudo_bit_t RcvHdrFullErr[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SDmaBufMaskDuplicateErr[1];

        pseudo_bit_t SDmaWrongPortErr[1];

        pseudo_bit_t SendSpecialTriggerErr[1];

        pseudo_bit_t _unused_2[7];

        pseudo_bit_t SendArmLaunchErr[1];

        pseudo_bit_t SendVLMismatchErr[1];

        pseudo_bit_t _unused_3[15];

        pseudo_bit_t RcvContextShareErr[1];

        pseudo_bit_t InvalidEEPCmdErr[1];

        pseudo_bit_t _unused_4[1];

        pseudo_bit_t SBufVL15MisUseErr[1];

        pseudo_bit_t SDmaVL15Err[1];

        pseudo_bit_t _unused_5[4];

        pseudo_bit_t InvalidAddrErr[1];

        pseudo_bit_t HardwareErr[1];

        pseudo_bit_t ResetNegated[1];

};


struct QIB_7322_ErrStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrClear_offset 0x00000090UL


struct QIB_7322_ErrClear_pb {

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t RcvEgrFullErrClear[1];

        pseudo_bit_t RcvHdrFullErrClear[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SDmaBufMaskDuplicateErrClear[1];

        pseudo_bit_t SDmaWrongPortErrClear[1];

        pseudo_bit_t SendSpecialTriggerErrClear[1];

        pseudo_bit_t _unused_2[7];

        pseudo_bit_t SendArmLaunchErrClear[1];

        pseudo_bit_t SendVLMismatchErrMask[1];

        pseudo_bit_t _unused_3[15];

        pseudo_bit_t RcvContextShareErrClear[1];

        pseudo_bit_t InvalidEEPCmdErrClear[1];

        pseudo_bit_t _unused_4[1];

        pseudo_bit_t SBufVL15MisUseErrClear[1];

        pseudo_bit_t SDmaVL15ErrClear[1];

        pseudo_bit_t _unused_5[4];

        pseudo_bit_t InvalidAddrErrClear[1];

        pseudo_bit_t HardwareErrClear[1];

        pseudo_bit_t ResetNegatedClear[1];

};


struct QIB_7322_ErrClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HwErrMask_offset 0x00000098UL


struct QIB_7322_HwErrMask_pb {

        pseudo_bit_t _unused_0[11];

        pseudo_bit_t LATriggeredMask[1];

        pseudo_bit_t statusValidNoEopMask_0[1];

        pseudo_bit_t IBCBusFromSPCParityErrMask_0[1];

        pseudo_bit_t statusValidNoEopMask_1[1];

        pseudo_bit_t IBCBusFromSPCParityErrMask_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SDmaMemReadErrMask_0[1];

        pseudo_bit_t SDmaMemReadErrMask_1[1];

        pseudo_bit_t PciePoisonedTLPMask[1];

        pseudo_bit_t PcieCplTimeoutMask[1];

        pseudo_bit_t PCIeBusParityErrMask[3];

        pseudo_bit_t pcie_phy_txParityErr[1];

        pseudo_bit_t _unused_2[13];

        pseudo_bit_t MemoryErrMask[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t TempsenseTholdReachedMask[1];

        pseudo_bit_t PowerOnBISTFailedMask[1];

        pseudo_bit_t PCIESerdesPClkNotDetectMask[1];

        pseudo_bit_t _unused_4[6];

        pseudo_bit_t IBSerdesPClkNotDetectMask_0[1];

        pseudo_bit_t IBSerdesPClkNotDetectMask_1[1];

};


struct QIB_7322_HwErrMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HwErrMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HwErrStatus_offset 0x000000a0UL


struct QIB_7322_HwErrStatus_pb {

        pseudo_bit_t _unused_0[11];

        pseudo_bit_t LATriggered[1];

        pseudo_bit_t statusValidNoEop_0[1];

        pseudo_bit_t IBCBusFromSPCParityErr_0[1];

        pseudo_bit_t statusValidNoEop_1[1];

        pseudo_bit_t IBCBusFromSPCParityErr_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SDmaMemReadErr_0[1];

        pseudo_bit_t SDmaMemReadErr_1[1];

        pseudo_bit_t PciePoisonedTLP[1];

        pseudo_bit_t PcieCplTimeout[1];

        pseudo_bit_t PCIeBusParity[3];

        pseudo_bit_t pcie_phy_txParityErr[1];

        pseudo_bit_t _unused_2[13];

        pseudo_bit_t MemoryErr[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t TempsenseTholdReached[1];

        pseudo_bit_t PowerOnBISTFailed[1];

        pseudo_bit_t PCIESerdesPClkNotDetect[1];

        pseudo_bit_t _unused_4[6];

        pseudo_bit_t IBSerdesPClkNotDetect_0[1];

        pseudo_bit_t IBSerdesPClkNotDetect_1[1];

};


struct QIB_7322_HwErrStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HwErrStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HwErrClear_offset 0x000000a8UL


struct QIB_7322_HwErrClear_pb {

        pseudo_bit_t _unused_0[11];

        pseudo_bit_t LATriggeredClear[1];

        pseudo_bit_t IBCBusToSPCparityErrClear_0[1];

        pseudo_bit_t IBCBusFromSPCParityErrClear_0[1];

        pseudo_bit_t IBCBusToSPCparityErrClear_1[1];

        pseudo_bit_t IBCBusFromSPCParityErrClear_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SDmaMemReadErrClear_0[1];

        pseudo_bit_t SDmaMemReadErrClear_1[1];

        pseudo_bit_t PciePoisonedTLPClear[1];

        pseudo_bit_t PcieCplTimeoutClear[1];

        pseudo_bit_t PCIeBusParityClear[3];

        pseudo_bit_t pcie_phy_txParityErr[1];

        pseudo_bit_t _unused_2[13];

        pseudo_bit_t MemoryErrClear[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t TempsenseTholdReachedClear[1];

        pseudo_bit_t PowerOnBISTFailedClear[1];

        pseudo_bit_t PCIESerdesPClkNotDetectClear[1];

        pseudo_bit_t _unused_4[6];

        pseudo_bit_t IBSerdesPClkNotDetectClear_0[1];

        pseudo_bit_t IBSerdesPClkNotDetectClear_1[1];

};


struct QIB_7322_HwErrClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HwErrClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HwDiagCtrl_offset 0x000000b0UL


struct QIB_7322_HwDiagCtrl_pb {

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t ForcestatusValidNoEop_0[1];

        pseudo_bit_t ForceIBCBusFromSPCParityErr_0[1];

        pseudo_bit_t ForcestatusValidNoEop_1[1];

        pseudo_bit_t ForceIBCBusFromSPCParityErr_1[1];

        pseudo_bit_t _unused_1[15];

        pseudo_bit_t forcePCIeBusParity[4];

        pseudo_bit_t _unused_2[25];

        pseudo_bit_t CounterDisable[1];

        pseudo_bit_t CounterWrEnable[1];

        pseudo_bit_t _unused_3[1];

        pseudo_bit_t Diagnostic[1];

};


struct QIB_7322_HwDiagCtrl {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HwDiagCtrl_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_EXTStatus_offset 0x000000c0UL


struct QIB_7322_EXTStatus_pb {

        pseudo_bit_t _unused_0[14];

        pseudo_bit_t MemBISTEndTest[1];

        pseudo_bit_t MemBISTDisabled[1];

        pseudo_bit_t _unused_1[32];

        pseudo_bit_t GPIOIn[16];

};


struct QIB_7322_EXTStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_EXTStatus_pb );

};


/* Default value: 0x000000000000X000 */


#define QIB_7322_EXTCtrl_offset 0x000000c8UL


struct QIB_7322_EXTCtrl_pb {

        pseudo_bit_t LEDPort0YellowOn[1];

        pseudo_bit_t LEDPort0GreenOn[1];

        pseudo_bit_t LEDPort1YellowOn[1];

        pseudo_bit_t LEDPort1GreenOn[1];

        pseudo_bit_t _unused_0[28];

        pseudo_bit_t GPIOInvert[16];

        pseudo_bit_t GPIOOe[16];

};


struct QIB_7322_EXTCtrl {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_EXTCtrl_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_GPIODebugSelReg_offset 0x000000d8UL


struct QIB_7322_GPIODebugSelReg_pb {

        pseudo_bit_t GPIOSourceSelDebug[16];

        pseudo_bit_t SelPulse[16];

        pseudo_bit_t _unused_0[32];

};


struct QIB_7322_GPIODebugSelReg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_GPIODebugSelReg_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_GPIOOut_offset 0x000000e0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_GPIOMask_offset 0x000000e8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_GPIOStatus_offset 0x000000f0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_GPIOClear_offset 0x000000f8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvCtrl_offset 0x00000100UL


struct QIB_7322_RcvCtrl_pb {

        pseudo_bit_t dontDropRHQFull[18];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t IntrAvail[18];

        pseudo_bit_t _unused_1[3];

        pseudo_bit_t ContextCfg[2];

        pseudo_bit_t TidFlowEnable[1];

        pseudo_bit_t XrcTypeCode[3];

        pseudo_bit_t TailUpd[1];

        pseudo_bit_t TidReDirect[16];

};


struct QIB_7322_RcvCtrl {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvCtrl_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrSize_offset 0x00000110UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrCnt_offset 0x00000118UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrEntSize_offset 0x00000120UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDBase_offset 0x00000128UL

/* Default value: 0x0000000000050000 */


#define QIB_7322_RcvTIDCnt_offset 0x00000130UL

/* Default value: 0x0000000000000200 */


#define QIB_7322_RcvEgrBase_offset 0x00000138UL

/* Default value: 0x0000000000014000 */


#define QIB_7322_RcvEgrCnt_offset 0x00000140UL

/* Default value: 0x0000000000001000 */


#define QIB_7322_RcvBufBase_offset 0x00000148UL

/* Default value: 0x0000000000080000 */


#define QIB_7322_RcvBufSize_offset 0x00000150UL

/* Default value: 0x0000000000005000 */


#define QIB_7322_RxIntMemBase_offset 0x00000158UL

/* Default value: 0x0000000000077000 */


#define QIB_7322_RxIntMemSize_offset 0x00000160UL

/* Default value: 0x0000000000007000 */


#define QIB_7322_encryption_key_low_offset 0x00000180UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_encryption_key_high_offset 0x00000188UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_feature_mask_offset 0x00000190UL

/* Default value: 0x00000000000000XX */


#define QIB_7322_active_feature_mask_offset 0x00000198UL


struct QIB_7322_active_feature_mask_pb {

        pseudo_bit_t Port0_SDR_Enabled[1];

        pseudo_bit_t Port0_DDR_Enabled[1];

        pseudo_bit_t Port0_QDR_Enabled[1];

        pseudo_bit_t Port1_SDR_Enabled[1];

        pseudo_bit_t Port1_DDR_Enabled[1];

        pseudo_bit_t Port1_QDR_Enabled[1];

        pseudo_bit_t _unused_0[58];

};


struct QIB_7322_active_feature_mask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_active_feature_mask_pb );

};


/* Default value: 0x00000000000000XX */


#define QIB_7322_SendCtrl_offset 0x000001c0UL


struct QIB_7322_SendCtrl_pb {

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t SendIntBufAvail[1];

        pseudo_bit_t SendBufAvailUpd[1];

        pseudo_bit_t _unused_1[1];

        pseudo_bit_t SpecialTriggerEn[1];

        pseudo_bit_t _unused_2[11];

        pseudo_bit_t DisarmSendBuf[8];

        pseudo_bit_t AvailUpdThld[5];

        pseudo_bit_t SendBufAvailPad64Byte[1];

        pseudo_bit_t _unused_3[1];

        pseudo_bit_t Disarm[1];

        pseudo_bit_t _unused_4[32];

};


struct QIB_7322_SendCtrl {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendCtrl_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufBase_offset 0x000001c8UL


struct QIB_7322_SendBufBase_pb {

        pseudo_bit_t BaseAddr_SmallPIO[21];

        pseudo_bit_t _unused_0[11];

        pseudo_bit_t BaseAddr_LargePIO[21];

        pseudo_bit_t _unused_1[11];

};


struct QIB_7322_SendBufBase {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendBufBase_pb );

};


/* Default value: 0x0018000000100000 */


#define QIB_7322_SendBufSize_offset 0x000001d0UL


struct QIB_7322_SendBufSize_pb {

        pseudo_bit_t Size_SmallPIO[12];

        pseudo_bit_t _unused_0[20];

        pseudo_bit_t Size_LargePIO[13];

        pseudo_bit_t _unused_1[19];

};


struct QIB_7322_SendBufSize {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendBufSize_pb );

};


/* Default value: 0x0000108000000880 */


#define QIB_7322_SendBufCnt_offset 0x000001d8UL


struct QIB_7322_SendBufCnt_pb {

        pseudo_bit_t Num_SmallBuffers[9];

        pseudo_bit_t _unused_0[23];

        pseudo_bit_t Num_LargeBuffers[6];

        pseudo_bit_t _unused_1[26];

};


struct QIB_7322_SendBufCnt {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendBufCnt_pb );

};


/* Default value: 0x0000002000000080 */


#define QIB_7322_SendBufAvailAddr_offset 0x000001e0UL


struct QIB_7322_SendBufAvailAddr_pb {

        pseudo_bit_t _unused_0[6];

        pseudo_bit_t SendBufAvailAddr[34];

        pseudo_bit_t _unused_1[24];

};


struct QIB_7322_SendBufAvailAddr {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendBufAvailAddr_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_TxIntMemBase_offset 0x000001e8UL

/* Default value: 0x0000000000064000 */


#define QIB_7322_TxIntMemSize_offset 0x000001f0UL

/* Default value: 0x000000000000C000 */


#define QIB_7322_SendBufErr0_offset 0x00000240UL


struct QIB_7322_SendBufErr0_pb {

        pseudo_bit_t SendBufErr_63_0[64];

};


struct QIB_7322_SendBufErr0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendBufErr0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_AvailUpdCount_offset 0x00000268UL


struct QIB_7322_AvailUpdCount_pb {

        pseudo_bit_t AvailUpdCount[5];

        pseudo_bit_t _unused_0[59];

};


struct QIB_7322_AvailUpdCount {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_AvailUpdCount_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrAddr0_offset 0x00000280UL


struct QIB_7322_RcvHdrAddr0_pb {

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvHdrAddr[38];

        pseudo_bit_t _unused_1[24];

};


struct QIB_7322_RcvHdrAddr0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrAddr0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTailAddr0_offset 0x00000340UL


struct QIB_7322_RcvHdrTailAddr0_pb {

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvHdrTailAddr[38];

        pseudo_bit_t _unused_1[24];

};


struct QIB_7322_RcvHdrTailAddr0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrTailAddr0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_EEPCtlStat_offset 0x000003e8UL


struct QIB_7322_EEPCtlStat_pb {

        pseudo_bit_t EPAccEn[2];

        pseudo_bit_t EPReset[1];

        pseudo_bit_t ByteProg[1];

        pseudo_bit_t PageMode[1];

        pseudo_bit_t LstDatWr[1];

        pseudo_bit_t CmdWrErr[1];

        pseudo_bit_t _unused_0[24];

        pseudo_bit_t CtlrStat[1];

        pseudo_bit_t _unused_1[32];

};


struct QIB_7322_EEPCtlStat {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_EEPCtlStat_pb );

};


/* Default value: 0x0000000000000002 */


#define QIB_7322_EEPAddrCmd_offset 0x000003f0UL


struct QIB_7322_EEPAddrCmd_pb {

        pseudo_bit_t EPAddr[24];

        pseudo_bit_t EPCmd[8];

        pseudo_bit_t _unused_0[32];

};


struct QIB_7322_EEPAddrCmd {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_EEPAddrCmd_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_EEPData_offset 0x000003f8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_efuse_control_reg_offset 0x00000410UL


struct QIB_7322_efuse_control_reg_pb {

        pseudo_bit_t address[11];

        pseudo_bit_t last_program_address[11];

        pseudo_bit_t operation[2];

        pseudo_bit_t start_operation[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t req_err[1];

        pseudo_bit_t read_data_valid[1];

        pseudo_bit_t rdy[1];

        pseudo_bit_t _unused_1[32];

};


struct QIB_7322_efuse_control_reg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_efuse_control_reg_pb );

};


/* Default value: 0x0000000080000000 */


#define QIB_7322_efuse_data_reg_offset 0x00000418UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_voltage_margin_reg_offset 0x00000428UL


struct QIB_7322_voltage_margin_reg_pb {

        pseudo_bit_t voltage_margin_settings_enable[1];

        pseudo_bit_t voltage_margin_settings[2];

        pseudo_bit_t _unused_0[61];

};


struct QIB_7322_voltage_margin_reg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_voltage_margin_reg_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_VTSense_reg_offset 0x00000430UL


struct QIB_7322_VTSense_reg_pb {

        pseudo_bit_t temp_sense_select[3];

        pseudo_bit_t adc_mode[1];

        pseudo_bit_t start_busy[1];

        pseudo_bit_t power_down[1];

        pseudo_bit_t threshold[10];

        pseudo_bit_t sensor_output_data[10];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t threshold_limbit[1];

        pseudo_bit_t _unused_1[3];

        pseudo_bit_t output_valid[1];

        pseudo_bit_t _unused_2[32];

};


struct QIB_7322_VTSense_reg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_VTSense_reg_pb );

};


/* Default value: 0x0000000000000020 */


#define QIB_7322_procmon_reg_offset 0x00000438UL


struct QIB_7322_procmon_reg_pb {

        pseudo_bit_t ring_osc_select[3];

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t start_counter[1];

        pseudo_bit_t procmon_count[12];

        pseudo_bit_t _unused_1[3];

        pseudo_bit_t procmon_count_valid[1];

        pseudo_bit_t _unused_2[32];

};


struct QIB_7322_procmon_reg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_procmon_reg_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRbufTestReg0_offset 0x00000440UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_ahb_access_ctrl_offset 0x00000460UL


struct QIB_7322_ahb_access_ctrl_pb {

        pseudo_bit_t sw_ahb_sel[1];

        pseudo_bit_t sw_sel_ahb_trgt[2];

        pseudo_bit_t _unused_0[61];

};


struct QIB_7322_ahb_access_ctrl {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ahb_access_ctrl_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ahb_transaction_reg_offset 0x00000468UL


struct QIB_7322_ahb_transaction_reg_pb {

        pseudo_bit_t _unused_0[16];

        pseudo_bit_t ahb_address[11];

        pseudo_bit_t write_not_read[1];

        pseudo_bit_t _unused_1[2];

        pseudo_bit_t ahb_req_err[1];

        pseudo_bit_t ahb_rdy[1];

        pseudo_bit_t ahb_data[32];

};


struct QIB_7322_ahb_transaction_reg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ahb_transaction_reg_pb );

};


/* Default value: 0x0000000080000000 */


#define QIB_7322_SPC_JTAG_ACCESS_REG_offset 0x00000470UL


struct QIB_7322_SPC_JTAG_ACCESS_REG_pb {

        pseudo_bit_t rdy[1];

        pseudo_bit_t tdo[1];

        pseudo_bit_t tdi[1];

        pseudo_bit_t opcode[2];

        pseudo_bit_t bist_en[5];

        pseudo_bit_t SPC_JTAG_ACCESS_EN[1];

        pseudo_bit_t _unused_0[53];

};


struct QIB_7322_SPC_JTAG_ACCESS_REG {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SPC_JTAG_ACCESS_REG_pb );

};


/* Default value: 0x0000000000000001 */


#define QIB_7322_LAControlReg_offset 0x00000478UL


struct QIB_7322_LAControlReg_pb {

        pseudo_bit_t Finished[1];

        pseudo_bit_t Address[9];

        pseudo_bit_t Mode[2];

        pseudo_bit_t Delay[20];

        pseudo_bit_t Finished_sc[1];

        pseudo_bit_t Address_sc[9];

        pseudo_bit_t Mode_sc[2];

        pseudo_bit_t Delay_sc[20];

};


struct QIB_7322_LAControlReg {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LAControlReg_pb );

};


/* Default value: 0x0000000100000001 */


#define QIB_7322_PcieRhdrTestReg0_offset 0x00000480UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendCheckMask0_offset 0x000004c0UL


struct QIB_7322_SendCheckMask0_pb {

        pseudo_bit_t SendCheckMask_63_32[64];

};


struct QIB_7322_SendCheckMask0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendCheckMask0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendGRHCheckMask0_offset 0x000004e0UL


struct QIB_7322_SendGRHCheckMask0_pb {

        pseudo_bit_t SendGRHCheckMask_63_32[64];

};


struct QIB_7322_SendGRHCheckMask0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendGRHCheckMask0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendIBPacketMask0_offset 0x00000500UL


struct QIB_7322_SendIBPacketMask0_pb {

        pseudo_bit_t SendIBPacketMask_63_32[64];

};


struct QIB_7322_SendIBPacketMask0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendIBPacketMask0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IntRedirect0_offset 0x00000540UL


struct QIB_7322_IntRedirect0_pb {

        pseudo_bit_t vec0[5];

        pseudo_bit_t vec1[5];

        pseudo_bit_t vec2[5];

        pseudo_bit_t vec3[5];

        pseudo_bit_t vec4[5];

        pseudo_bit_t vec5[5];

        pseudo_bit_t vec6[5];

        pseudo_bit_t vec7[5];

        pseudo_bit_t vec8[5];

        pseudo_bit_t vec9[5];

        pseudo_bit_t vec10[5];

        pseudo_bit_t vec11[5];

        pseudo_bit_t _unused_0[4];

};


struct QIB_7322_IntRedirect0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IntRedirect0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_Int_Granted_offset 0x00000570UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_vec_clr_without_int_offset 0x00000578UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_DCACtrlA_offset 0x00000580UL


struct QIB_7322_DCACtrlA_pb {

        pseudo_bit_t RcvHdrqDCAEnable[1];

        pseudo_bit_t EagerDCAEnable[1];

        pseudo_bit_t RcvTailUpdDCAEnable[1];

        pseudo_bit_t SendDMAHead0DCAEnable[1];

        pseudo_bit_t SendDMAHead1DCAEnable[1];

        pseudo_bit_t _unused_0[59];

};


struct QIB_7322_DCACtrlA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DCACtrlA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DCACtrlB_offset 0x00000588UL


struct QIB_7322_DCACtrlB_pb {

        pseudo_bit_t RcvHdrq0DCAOPH[8];

        pseudo_bit_t RcvHdrq0DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq1DCAOPH[8];

        pseudo_bit_t RcvHdrq1DCAXfrCnt[6];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t RcvHdrq2DCAOPH[8];

        pseudo_bit_t RcvHdrq2DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq3DCAOPH[8];

        pseudo_bit_t RcvHdrq3DCAXfrCnt[6];

        pseudo_bit_t _unused_1[4];

};


struct QIB_7322_DCACtrlB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DCACtrlB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DCACtrlC_offset 0x00000590UL


struct QIB_7322_DCACtrlC_pb {

        pseudo_bit_t RcvHdrq4DCAOPH[8];

        pseudo_bit_t RcvHdrq4DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq5DCAOPH[8];

        pseudo_bit_t RcvHdrq5DCAXfrCnt[6];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t RcvHdrq6DCAOPH[8];

        pseudo_bit_t RcvHdrq6DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq7DCAOPH[8];

        pseudo_bit_t RcvHdrq7DCAXfrCnt[6];

        pseudo_bit_t _unused_1[4];

};


struct QIB_7322_DCACtrlC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DCACtrlC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DCACtrlD_offset 0x00000598UL


struct QIB_7322_DCACtrlD_pb {

        pseudo_bit_t RcvHdrq8DCAOPH[8];

        pseudo_bit_t RcvHdrq8DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq9DCAOPH[8];

        pseudo_bit_t RcvHdrq9DCAXfrCnt[6];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t RcvHdrq10DCAOPH[8];

        pseudo_bit_t RcvHdrq10DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq11DCAOPH[8];

        pseudo_bit_t RcvHdrq11DCAXfrCnt[6];

        pseudo_bit_t _unused_1[4];

};


struct QIB_7322_DCACtrlD {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DCACtrlD_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DCACtrlE_offset 0x000005a0UL


struct QIB_7322_DCACtrlE_pb {

        pseudo_bit_t RcvHdrq12DCAOPH[8];

        pseudo_bit_t RcvHdrq12DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq13DCAOPH[8];

        pseudo_bit_t RcvHdrq13DCAXfrCnt[6];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t RcvHdrq14DCAOPH[8];

        pseudo_bit_t RcvHdrq14DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq15DCAOPH[8];

        pseudo_bit_t RcvHdrq15DCAXfrCnt[6];

        pseudo_bit_t _unused_1[4];

};


struct QIB_7322_DCACtrlE {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DCACtrlE_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_DCACtrlF_offset 0x000005a8UL


struct QIB_7322_DCACtrlF_pb {

        pseudo_bit_t RcvHdrq16DCAOPH[8];

        pseudo_bit_t RcvHdrq16DCAXfrCnt[6];

        pseudo_bit_t RcvHdrq17DCAOPH[8];

        pseudo_bit_t RcvHdrq17DCAXfrCnt[6];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SendDma0DCAOPH[8];

        pseudo_bit_t SendDma1DCAOPH[8];

        pseudo_bit_t _unused_1[16];

};


struct QIB_7322_DCACtrlF {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_DCACtrlF_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemErrCtrlA_offset 0x00000600UL


struct QIB_7322_MemErrCtrlA_pb {

        pseudo_bit_t FSSUncErrRcvBuf_0[1];

        pseudo_bit_t FSSUncErrRcvFlags_0[1];

        pseudo_bit_t FSSUncErrLookupiqBuf_0[1];

        pseudo_bit_t FSSUncErrRcvDMAHdrBuf_0[1];

        pseudo_bit_t FSSUncErrRcvDMADataBuf_0[1];

        pseudo_bit_t FSSUncErrRcvBuf_1[1];

        pseudo_bit_t FSSUncErrRcvFlags_1[1];

        pseudo_bit_t FSSUncErrLookupiqBuf_1[1];

        pseudo_bit_t FSSUncErrRcvDMAHdrBuf_1[1];

        pseudo_bit_t FSSUncErrRcvDMADataBuf_1[1];

        pseudo_bit_t FSSUncErrRcvTIDArray[1];

        pseudo_bit_t FSSUncErrRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t FSSUncErrSendBufVL15[1];

        pseudo_bit_t FSSUncErrSendBufMain[1];

        pseudo_bit_t FSSUncErrSendBufExtra[1];

        pseudo_bit_t FSSUncErrSendPbcArray[1];

        pseudo_bit_t FSSUncErrSendLaFIFO0_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO1_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO2_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO3_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO4_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO5_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO6_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO7_0[1];

        pseudo_bit_t FSSUncErrSendLaFIFO0_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO1_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO2_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO3_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO4_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO5_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO6_1[1];

        pseudo_bit_t FSSUncErrSendLaFIFO7_1[1];

        pseudo_bit_t FSSUncErrSendRmFIFO_0[1];

        pseudo_bit_t FSSUncErrSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t FSSUncErrPCIeRetryBuf[1];

        pseudo_bit_t FSSUncErrPCIePostHdrBuf[1];

        pseudo_bit_t FSSUncErrPCIePostDataBuf[1];

        pseudo_bit_t FSSUncErrPCIeCompHdrBuf[1];

        pseudo_bit_t FSSUncErrPCIeCompDataBuf[1];

        pseudo_bit_t FSSUncErrMsixTable0[1];

        pseudo_bit_t FSSUncErrMsixTable1[1];

        pseudo_bit_t FSSUncErrMsixTable2[1];

        pseudo_bit_t _unused_2[4];

        pseudo_bit_t SwapEccDataMsixBits[1];

        pseudo_bit_t SwapEccDataExtraBits[1];

        pseudo_bit_t DisableEccCorrection[1];

        pseudo_bit_t SwapEccDataBits[1];

};


struct QIB_7322_MemErrCtrlA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemErrCtrlA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemErrCtrlB_offset 0x00000608UL


struct QIB_7322_MemErrCtrlB_pb {

        pseudo_bit_t FSSCorErrRcvBuf_0[1];

        pseudo_bit_t FSSCorErrRcvFlags_0[1];

        pseudo_bit_t FSSCorErrLookupiqBuf_0[1];

        pseudo_bit_t FSSCorErrRcvDMAHdrBuf_0[1];

        pseudo_bit_t FSSCorErrRcvDMADataBuf_0[1];

        pseudo_bit_t FSSCorErrRcvBuf_1[1];

        pseudo_bit_t FSSCorErrRcvFlags_1[1];

        pseudo_bit_t FSSCorErrLookupiqBuf_1[1];

        pseudo_bit_t FSSCorErrRcvDMAHdrBuf_1[1];

        pseudo_bit_t FSSCorErrRcvDMADataBuf_1[1];

        pseudo_bit_t FSSCorErrRcvTIDArray[1];

        pseudo_bit_t FSSCorErrRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t FSSCorErrSendBufVL15[1];

        pseudo_bit_t FSSCorErrSendBufMain[1];

        pseudo_bit_t FSSCorErrSendBufExtra[1];

        pseudo_bit_t FSSCorErrSendPbcArray[1];

        pseudo_bit_t FSSCorErrSendLaFIFO0_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO1_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO2_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO3_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO4_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO5_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO6_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO7_0[1];

        pseudo_bit_t FSSCorErrSendLaFIFO0_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO1_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO2_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO3_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO4_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO5_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO6_1[1];

        pseudo_bit_t FSSCorErrSendLaFIFO7_1[1];

        pseudo_bit_t FSSCorErrSendRmFIFO_0[1];

        pseudo_bit_t FSSCorErrSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t FSSCorErrPCIeRetryBuf[1];

        pseudo_bit_t FSSCorErrPCIePostHdrBuf[1];

        pseudo_bit_t FSSCorErrPCIePostDataBuf[1];

        pseudo_bit_t FSSCorErrPCIeCompHdrBuf[1];

        pseudo_bit_t FSSCorErrPCIeCompDataBuf[1];

        pseudo_bit_t FSSCorErrMsixTable0[1];

        pseudo_bit_t FSSCorErrMsixTable1[1];

        pseudo_bit_t FSSCorErrMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemErrCtrlB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemErrCtrlB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemMultiUnCorErrMask_offset 0x00000610UL


struct QIB_7322_MemMultiUnCorErrMask_pb {

        pseudo_bit_t MulUncErrMskRcvBuf_0[1];

        pseudo_bit_t MulUncErrMskRcvFlags_0[1];

        pseudo_bit_t MulUncErrMskLookupiqBuf_0[1];

        pseudo_bit_t MulUncErrMskRcvDMAHdrBuf_0[1];

        pseudo_bit_t MulUncErrMskRcvDMADataBuf_0[1];

        pseudo_bit_t MulUncErrMskRcvBuf_1[1];

        pseudo_bit_t MulUncErrMskRcvFlags_1[1];

        pseudo_bit_t MulUncErrMskLookupiqBuf_1[1];

        pseudo_bit_t MulUncErrMskRcvDMAHdrBuf_1[1];

        pseudo_bit_t MulUncErrMskRcvDMADataBuf_1[1];

        pseudo_bit_t MulUncErrMskRcvTIDArray[1];

        pseudo_bit_t MulUncErrMskRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t MulUncErrMskSendBufVL15[1];

        pseudo_bit_t MulUncErrMskSendBufMain[1];

        pseudo_bit_t MulUncErrMskSendBufExtra[1];

        pseudo_bit_t MulUncErrMskSendPbcArray[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO0_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO1_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO2_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO3_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO4_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO5_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO6_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO7_0[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO0_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO1_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO2_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO3_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO4_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO5_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO6_1[1];

        pseudo_bit_t MulUncErrMskSendLaFIFO7_1[1];

        pseudo_bit_t MulUncErrMskSendRmFIFO_0[1];

        pseudo_bit_t MulUncErrMskSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t MulUncErrMskPCIeRetryBuf[1];

        pseudo_bit_t MulUncErrMskPCIePostHdrBuf[1];

        pseudo_bit_t MulUncErrMskPCIePostDataBuf[1];

        pseudo_bit_t MulUncErrMskPCIeCompHdrBuf[1];

        pseudo_bit_t MulUncErrMskPCIeCompDataBuf[1];

        pseudo_bit_t MulUncErrMskMsixTable0[1];

        pseudo_bit_t MulUncErrMskMsixTable1[1];

        pseudo_bit_t MulUncErrMskMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemMultiUnCorErrMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemMultiUnCorErrMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemMultiUnCorErrStatus_offset 0x00000618UL


struct QIB_7322_MemMultiUnCorErrStatus_pb {

        pseudo_bit_t MulUncErrStatusRcvBuf_0[1];

        pseudo_bit_t MulUncErrStatusRcvFlags_0[1];

        pseudo_bit_t MulUncErrStatusLookupiqBuf_0[1];

        pseudo_bit_t MulUncErrStatusRcvDMAHdrBuf_0[1];

        pseudo_bit_t MulUncErrStatusRcvDMADataBuf_0[1];

        pseudo_bit_t MulUncErrStatusRcvBuf_1[1];

        pseudo_bit_t MulUncErrStatusRcvFlags_1[1];

        pseudo_bit_t MulUncErrStatusLookupiqBuf_1[1];

        pseudo_bit_t MulUncErrStatusRcvDMAHdrBuf_1[1];

        pseudo_bit_t MulUncErrStatusRcvDMADataBuf_1[1];

        pseudo_bit_t MulUncErrStatusRcvTIDArray[1];

        pseudo_bit_t MulUncErrStatusRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t MulUncErrStatusSendBufVL15[1];

        pseudo_bit_t MulUncErrStatusSendBufMain[1];

        pseudo_bit_t MulUncErrStatusSendBufExtra[1];

        pseudo_bit_t MulUncErrStatusSendPbcArray[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO0_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO1_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO2_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO3_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO4_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO5_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO6_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO7_0[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO0_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO1_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO2_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO3_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO4_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO5_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO6_1[1];

        pseudo_bit_t MulUncErrStatusSendLaFIFO7_1[1];

        pseudo_bit_t MulUncErrStatusSendRmFIFO_0[1];

        pseudo_bit_t MulUncErrStatusSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t MulUncErrStatusPCIeRetryBuf[1];

        pseudo_bit_t MulUncErrStatusPCIePostHdrBuf[1];

        pseudo_bit_t MulUncErrStatusPCIePostDataBuf[1];

        pseudo_bit_t MulUncErrStatusPCIeCompHdrBuf[1];

        pseudo_bit_t MulUncErrStatusPCIeCompDataBuf[1];

        pseudo_bit_t MulUncErrStatusMsixTable0[1];

        pseudo_bit_t MulUncErrStatusMsixTable1[1];

        pseudo_bit_t MulUncErrStatusMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemMultiUnCorErrStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemMultiUnCorErrStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemMultiUnCorErrClear_offset 0x00000620UL


struct QIB_7322_MemMultiUnCorErrClear_pb {

        pseudo_bit_t MulUncErrClearRcvBuf_0[1];

        pseudo_bit_t MulUncErrClearRcvFlags_0[1];

        pseudo_bit_t MulUncErrClearLookupiqBuf_0[1];

        pseudo_bit_t MulUncErrClearRcvDMAHdrBuf_0[1];

        pseudo_bit_t MulUncErrClearRcvDMADataBuf_0[1];

        pseudo_bit_t MulUncErrClearRcvBuf_1[1];

        pseudo_bit_t MulUncErrClearRcvFlags_1[1];

        pseudo_bit_t MulUncErrClearLookupiqBuf_1[1];

        pseudo_bit_t MulUncErrClearRcvDMAHdrBuf_1[1];

        pseudo_bit_t MulUncErrClearRcvDMADataBuf_1[1];

        pseudo_bit_t MulUncErrClearRcvTIDArray[1];

        pseudo_bit_t MulUncErrClearRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t MulUncErrClearSendBufVL15[1];

        pseudo_bit_t MulUncErrClearSendBufMain[1];

        pseudo_bit_t MulUncErrClearSendBufExtra[1];

        pseudo_bit_t MulUncErrClearSendPbcArray[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO0_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO1_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO2_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO3_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO4_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO5_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO6_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO7_0[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO0_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO1_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO2_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO3_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO4_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO5_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO6_1[1];

        pseudo_bit_t MulUncErrClearSendLaFIFO7_1[1];

        pseudo_bit_t MulUncErrClearSendRmFIFO_0[1];

        pseudo_bit_t MulUncErrClearSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t MulUncErrClearPCIeRetryBuf[1];

        pseudo_bit_t MulUncErrClearPCIePostHdrBuf[1];

        pseudo_bit_t MulUncErrClearPCIePostDataBuf[1];

        pseudo_bit_t MulUncErrClearPCIeCompHdrBuf[1];

        pseudo_bit_t MulUncErrClearPCIeCompDataBuf[1];

        pseudo_bit_t MulUncErrClearMsixTable0[1];

        pseudo_bit_t MulUncErrClearMsixTable1[1];

        pseudo_bit_t MulUncErrClearMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemMultiUnCorErrClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemMultiUnCorErrClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemUnCorErrMask_offset 0x00000628UL


struct QIB_7322_MemUnCorErrMask_pb {

        pseudo_bit_t UncErrMskRcvBuf_0[1];

        pseudo_bit_t UncErrMskRcvFlags_0[1];

        pseudo_bit_t UncErrMskLookupiqBuf_0[1];

        pseudo_bit_t UncErrMskRcvDMAHdrBuf_0[1];

        pseudo_bit_t UncErrMskRcvDMADataBuf_0[1];

        pseudo_bit_t UncErrMskRcvBuf_1[1];

        pseudo_bit_t UncErrMskRcvFlags_1[1];

        pseudo_bit_t UncErrMskLookupiqBuf_1[1];

        pseudo_bit_t UncErrMskRcvDMAHdrBuf_1[1];

        pseudo_bit_t UncErrMskRcvDMADataBuf_1[1];

        pseudo_bit_t UncErrMskRcvTIDArray[1];

        pseudo_bit_t UncErrMskRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t UncErrMskSendBufVL15[1];

        pseudo_bit_t UncErrMskSendBufMain[1];

        pseudo_bit_t UncErrMskSendBufExtra[1];

        pseudo_bit_t UncErrMskSendPbcArray[1];

        pseudo_bit_t UncErrMskSendLaFIFO0_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO1_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO2_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO3_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO4_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO5_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO6_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO7_0[1];

        pseudo_bit_t UncErrMskSendLaFIFO0_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO1_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO2_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO3_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO4_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO5_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO6_1[1];

        pseudo_bit_t UncErrMskSendLaFIFO7_1[1];

        pseudo_bit_t UncErrMskSendRmFIFO_0[1];

        pseudo_bit_t UncErrMskSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t UncErrMskPCIeRetryBuf[1];

        pseudo_bit_t UncErrMskPCIePostHdrBuf[1];

        pseudo_bit_t UncErrMskPCIePostDataBuf[1];

        pseudo_bit_t UncErrMskPCIeCompHdrBuf[1];

        pseudo_bit_t UncErrMskPCIeCompDataBuf[1];

        pseudo_bit_t UncErrMskMsixTable0[1];

        pseudo_bit_t UncErrMskMsixTable1[1];

        pseudo_bit_t UncErrMskMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemUnCorErrMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemUnCorErrMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemUnCorErrStatus_offset 0x00000630UL


struct QIB_7322_MemUnCorErrStatus_pb {

        pseudo_bit_t UncErrStatusRcvBuf_0[1];

        pseudo_bit_t UncErrStatusRcvFlags_0[1];

        pseudo_bit_t UncErrStatusLookupiqBuf_0[1];

        pseudo_bit_t UncErrStatusRcvDMAHdrBuf_0[1];

        pseudo_bit_t UncErrStatusRcvDMADataBuf_0[1];

        pseudo_bit_t UncErrStatusRcvBuf_1[1];

        pseudo_bit_t UncErrStatusRcvFlags_1[1];

        pseudo_bit_t UncErrStatusLookupiqBuf_1[1];

        pseudo_bit_t UncErrStatusRcvDMAHdrBuf_1[1];

        pseudo_bit_t UncErrStatusRcvDMADataBuf_1[1];

        pseudo_bit_t UncErrStatusRcvTIDArray[1];

        pseudo_bit_t UncErrStatusRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t UncErrStatusSendBufVL15[1];

        pseudo_bit_t UncErrStatusSendBufMain[1];

        pseudo_bit_t UncErrStatusSendBufExtra[1];

        pseudo_bit_t UncErrStatusSendPbcArray[1];

        pseudo_bit_t UncErrStatusSendLaFIFO0_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO1_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO2_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO3_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO4_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO5_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO6_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO7_0[1];

        pseudo_bit_t UncErrStatusSendLaFIFO0_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO1_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO2_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO3_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO4_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO5_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO6_1[1];

        pseudo_bit_t UncErrStatusSendLaFIFO7_1[1];

        pseudo_bit_t UncErrStatusSendRmFIFO_0[1];

        pseudo_bit_t UncErrStatusSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t UncErrStatusPCIeRetryBuf[1];

        pseudo_bit_t UncErrStatusPCIePostHdrBuf[1];

        pseudo_bit_t UncErrStatusPCIePostDataBuf[1];

        pseudo_bit_t UncErrStatusPCIeCompHdrBuf[1];

        pseudo_bit_t UncErrStatusPCIeCompDataBuf[1];

        pseudo_bit_t UncErrStatusMsixTable0[1];

        pseudo_bit_t UncErrStatusMsixTable1[1];

        pseudo_bit_t UncErrStatusMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemUnCorErrStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemUnCorErrStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemUnCorErrClear_offset 0x00000638UL


struct QIB_7322_MemUnCorErrClear_pb {

        pseudo_bit_t UncErrClearRcvBuf_0[1];

        pseudo_bit_t UncErrClearRcvFlags_0[1];

        pseudo_bit_t UncErrClearLookupiqBuf_0[1];

        pseudo_bit_t UncErrClearRcvDMAHdrBuf_0[1];

        pseudo_bit_t UncErrClearRcvDMADataBuf_0[1];

        pseudo_bit_t UncErrClearRcvBuf_1[1];

        pseudo_bit_t UncErrClearRcvFlags_1[1];

        pseudo_bit_t UncErrClearLookupiqBuf_1[1];

        pseudo_bit_t UncErrClearRcvDMAHdrBuf_1[1];

        pseudo_bit_t UncErrClearRcvDMADataBuf_1[1];

        pseudo_bit_t UncErrClearRcvTIDArray[1];

        pseudo_bit_t UncErrClearRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t UncErrClearSendBufVL15[1];

        pseudo_bit_t UncErrClearSendBufMain[1];

        pseudo_bit_t UncErrClearSendBufExtra[1];

        pseudo_bit_t UncErrClearSendPbcArray[1];

        pseudo_bit_t UncErrClearSendLaFIFO0_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO1_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO2_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO3_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO4_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO5_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO6_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO7_0[1];

        pseudo_bit_t UncErrClearSendLaFIFO0_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO1_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO2_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO3_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO4_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO5_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO6_1[1];

        pseudo_bit_t UncErrClearSendLaFIFO7_1[1];

        pseudo_bit_t UncErrClearSendRmFIFO_0[1];

        pseudo_bit_t UncErrClearSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t UncErrClearPCIeRetryBuf[1];

        pseudo_bit_t UncErrClearPCIePostHdrBuf[1];

        pseudo_bit_t UncErrClearPCIePostDataBuf[1];

        pseudo_bit_t UncErrClearPCIeCompHdrBuf[1];

        pseudo_bit_t UncErrClearPCIeCompDataBuf[1];

        pseudo_bit_t UncErrClearMsixTable0[1];

        pseudo_bit_t UncErrClearMsixTable1[1];

        pseudo_bit_t UncErrClearMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemUnCorErrClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemUnCorErrClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemMultiCorErrMask_offset 0x00000640UL


struct QIB_7322_MemMultiCorErrMask_pb {

        pseudo_bit_t MulCorErrMskRcvBuf_0[1];

        pseudo_bit_t MulCorErrMskRcvFlags_0[1];

        pseudo_bit_t MulCorErrMskLookupiqBuf_0[1];

        pseudo_bit_t MulCorErrMskRcvDMAHdrBuf_0[1];

        pseudo_bit_t MulCorErrMskRcvDMADataBuf_0[1];

        pseudo_bit_t MulCorErrMskRcvBuf_1[1];

        pseudo_bit_t MulCorErrMskRcvFlags_1[1];

        pseudo_bit_t MulCorErrMskLookupiqBuf_1[1];

        pseudo_bit_t MulCorErrMskRcvDMAHdrBuf_1[1];

        pseudo_bit_t MulCorErrMskRcvDMADataBuf_1[1];

        pseudo_bit_t MulCorErrMskRcvTIDArray[1];

        pseudo_bit_t MulCorErrMskRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t MulCorErrMskSendBufVL15[1];

        pseudo_bit_t MulCorErrMskSendBufMain[1];

        pseudo_bit_t MulCorErrMskSendBufExtra[1];

        pseudo_bit_t MulCorErrMskSendPbcArray[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO0_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO1_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO2_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO3_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO4_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO5_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO6_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO7_0[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO0_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO1_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO2_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO3_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO4_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO5_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO6_1[1];

        pseudo_bit_t MulCorErrMskSendLaFIFO7_1[1];

        pseudo_bit_t MulCorErrMskSendRmFIFO_0[1];

        pseudo_bit_t MulCorErrMskSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t MulCorErrMskPCIeRetryBuf[1];

        pseudo_bit_t MulCorErrMskPCIePostHdrBuf[1];

        pseudo_bit_t MulCorErrMskPCIePostDataBuf[1];

        pseudo_bit_t MulCorErrMskPCIeCompHdrBuf[1];

        pseudo_bit_t MulCorErrMskPCIeCompDataBuf[1];

        pseudo_bit_t MulCorErrMskMsixTable0[1];

        pseudo_bit_t MulCorErrMskMsixTable1[1];

        pseudo_bit_t MulCorErrMskMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemMultiCorErrMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemMultiCorErrMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemMultiCorErrStatus_offset 0x00000648UL


struct QIB_7322_MemMultiCorErrStatus_pb {

        pseudo_bit_t MulCorErrStatusRcvBuf_0[1];

        pseudo_bit_t MulCorErrStatusRcvFlags_0[1];

        pseudo_bit_t MulCorErrStatusLookupiqBuf_0[1];

        pseudo_bit_t MulCorErrStatusRcvDMAHdrBuf_0[1];

        pseudo_bit_t MulCorErrStatusRcvDMADataBuf_0[1];

        pseudo_bit_t MulCorErrStatusRcvBuf_1[1];

        pseudo_bit_t MulCorErrStatusRcvFlags_1[1];

        pseudo_bit_t MulCorErrStatusLookupiqBuf_1[1];

        pseudo_bit_t MulCorErrStatusRcvDMAHdrBuf_1[1];

        pseudo_bit_t MulCorErrStatusRcvDMADataBuf_1[1];

        pseudo_bit_t MulCorErrStatusRcvTIDArray[1];

        pseudo_bit_t MulCorErrStatusRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t MulCorErrStatusSendBufVL15[1];

        pseudo_bit_t MulCorErrStatusSendBufMain[1];

        pseudo_bit_t MulCorErrStatusSendBufExtra[1];

        pseudo_bit_t MulCorErrStatusSendPbcArray[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO0_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO1_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO2_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO3_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO4_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO5_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO6_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO7_0[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO0_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO1_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO2_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO3_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO4_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO5_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO6_1[1];

        pseudo_bit_t MulCorErrStatusSendLaFIFO7_1[1];

        pseudo_bit_t MulCorErrStatusSendRmFIFO_0[1];

        pseudo_bit_t MulCorErrStatusSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t MulCorErrStatusPCIeRetryBuf[1];

        pseudo_bit_t MulCorErrStatusPCIePostHdrBuf[1];

        pseudo_bit_t MulCorErrStatusPCIePostDataBuf[1];

        pseudo_bit_t MulCorErrStatusPCIeCompHdrBuf[1];

        pseudo_bit_t MulCorErrStatusPCIeCompDataBuf[1];

        pseudo_bit_t MulCorErrStatusMsixTable0[1];

        pseudo_bit_t MulCorErrStatusMsixTable1[1];

        pseudo_bit_t MulCorErrStatusMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemMultiCorErrStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemMultiCorErrStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemMultiCorErrClear_offset 0x00000650UL


struct QIB_7322_MemMultiCorErrClear_pb {

        pseudo_bit_t MulCorErrClearRcvBuf_0[1];

        pseudo_bit_t MulCorErrClearRcvFlags_0[1];

        pseudo_bit_t MulCorErrClearLookupiqBuf_0[1];

        pseudo_bit_t MulCorErrClearRcvDMAHdrBuf_0[1];

        pseudo_bit_t MulCorErrClearRcvDMADataBuf_0[1];

        pseudo_bit_t MulCorErrClearRcvBuf_1[1];

        pseudo_bit_t MulCorErrClearRcvFlags_1[1];

        pseudo_bit_t MulCorErrClearLookupiqBuf_1[1];

        pseudo_bit_t MulCorErrClearRcvDMAHdrBuf_1[1];

        pseudo_bit_t MulCorErrClearRcvDMADataBuf_1[1];

        pseudo_bit_t MulCorErrClearRcvTIDArray[1];

        pseudo_bit_t MulCorErrClearRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t MulCorErrClearSendBufVL15[1];

        pseudo_bit_t MulCorErrClearSendBufMain[1];

        pseudo_bit_t MulCorErrClearSendBufExtra[1];

        pseudo_bit_t MulCorErrClearSendPbcArray[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO0_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO1_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO2_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO3_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO4_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO5_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO6_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO7_0[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO0_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO1_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO2_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO3_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO4_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO5_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO6_1[1];

        pseudo_bit_t MulCorErrClearSendLaFIFO7_1[1];

        pseudo_bit_t MulCorErrClearSendRmFIFO_0[1];

        pseudo_bit_t MulCorErrClearSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t MulCorErrClearPCIeRetryBuf[1];

        pseudo_bit_t MulCorErrClearPCIePostHdrBuf[1];

        pseudo_bit_t MulCorErrClearPCIePostDataBuf[1];

        pseudo_bit_t MulCorErrClearPCIeCompHdrBuf[1];

        pseudo_bit_t MulCorErrClearPCIeCompDataBuf[1];

        pseudo_bit_t MulCorErrClearMsixTable0[1];

        pseudo_bit_t MulCorErrClearMsixTable1[1];

        pseudo_bit_t MulCorErrClearMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemMultiCorErrClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemMultiCorErrClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemCorErrMask_offset 0x00000658UL


struct QIB_7322_MemCorErrMask_pb {

        pseudo_bit_t CorErrMskRcvBuf_0[1];

        pseudo_bit_t CorErrMskRcvFlags_0[1];

        pseudo_bit_t CorErrMskLookupiqBuf_0[1];

        pseudo_bit_t CorErrMskRcvDMAHdrBuf_0[1];

        pseudo_bit_t CorErrMskRcvDMADataBuf_0[1];

        pseudo_bit_t CorErrMskRcvBuf_1[1];

        pseudo_bit_t CorErrMskRcvFlags_1[1];

        pseudo_bit_t CorErrMskLookupiqBuf_1[1];

        pseudo_bit_t CorErrMskRcvDMAHdrBuf_1[1];

        pseudo_bit_t CorErrMskRcvDMADataBuf_1[1];

        pseudo_bit_t CorErrMskRcvTIDArray[1];

        pseudo_bit_t CorErrMskRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t CorErrMskSendBufVL15[1];

        pseudo_bit_t CorErrMskSendBufMain[1];

        pseudo_bit_t CorErrMskSendBufExtra[1];

        pseudo_bit_t CorErrMskSendPbcArray[1];

        pseudo_bit_t CorErrMskSendLaFIFO0_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO1_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO2_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO3_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO4_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO5_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO6_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO7_0[1];

        pseudo_bit_t CorErrMskSendLaFIFO0_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO1_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO2_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO3_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO4_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO5_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO6_1[1];

        pseudo_bit_t CorErrMskSendLaFIFO7_1[1];

        pseudo_bit_t CorErrMskSendRmFIFO_0[1];

        pseudo_bit_t CorErrMskSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t CorErrMskPCIeRetryBuf[1];

        pseudo_bit_t CorErrMskPCIePostHdrBuf[1];

        pseudo_bit_t CorErrMskPCIePostDataBuf[1];

        pseudo_bit_t CorErrMskPCIeCompHdrBuf[1];

        pseudo_bit_t CorErrMskPCIeCompDataBuf[1];

        pseudo_bit_t CorErrMskMsixTable0[1];

        pseudo_bit_t CorErrMskMsixTable1[1];

        pseudo_bit_t CorErrMskMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemCorErrMask {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemCorErrMask_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemCorErrStatus_offset 0x00000660UL


struct QIB_7322_MemCorErrStatus_pb {

        pseudo_bit_t CorErrStatusRcvBuf_0[1];

        pseudo_bit_t CorErrStatusRcvFlags_0[1];

        pseudo_bit_t CorErrStatusLookupiqBuf_0[1];

        pseudo_bit_t CorErrStatusRcvDMAHdrBuf_0[1];

        pseudo_bit_t CorErrStatusRcvDMADataBuf_0[1];

        pseudo_bit_t CorErrStatusRcvBuf_1[1];

        pseudo_bit_t CorErrStatusRcvFlags_1[1];

        pseudo_bit_t CorErrStatusLookupiqBuf_1[1];

        pseudo_bit_t CorErrStatusRcvDMAHdrBuf_1[1];

        pseudo_bit_t CorErrStatusRcvDMADataBuf_1[1];

        pseudo_bit_t CorErrStatusRcvTIDArray[1];

        pseudo_bit_t CorErrStatusRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t CorErrStatusSendBufVL15[1];

        pseudo_bit_t CorErrStatusSendBufMain[1];

        pseudo_bit_t CorErrStatusSendBufExtra[1];

        pseudo_bit_t CorErrStatusSendPbcArray[1];

        pseudo_bit_t CorErrStatusSendLaFIFO0_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO1_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO2_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO3_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO4_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO5_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO6_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO7_0[1];

        pseudo_bit_t CorErrStatusSendLaFIFO0_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO1_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO2_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO3_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO4_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO5_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO6_1[1];

        pseudo_bit_t CorErrStatusSendLaFIFO7_1[1];

        pseudo_bit_t CorErrStatusSendRmFIFO_0[1];

        pseudo_bit_t CorErrStatusSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t CorErrStatusPCIeRetryBuf[1];

        pseudo_bit_t CorErrStatusPCIePostHdrBuf[1];

        pseudo_bit_t CorErrStatusPCIePostDataBuf[1];

        pseudo_bit_t CorErrStatusPCIeCompHdrBuf[1];

        pseudo_bit_t CorErrStatusPCIeCompDataBuf[1];

        pseudo_bit_t CorErrStatusMsixTable0[1];

        pseudo_bit_t CorErrStatusMsixTable1[1];

        pseudo_bit_t CorErrStatusMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemCorErrStatus {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemCorErrStatus_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MemCorErrClear_offset 0x00000668UL


struct QIB_7322_MemCorErrClear_pb {

        pseudo_bit_t CorErrClearRcvBuf_0[1];

        pseudo_bit_t CorErrClearRcvFlags_0[1];

        pseudo_bit_t CorErrClearLookupiqBuf_0[1];

        pseudo_bit_t CorErrClearRcvDMAHdrBuf_0[1];

        pseudo_bit_t CorErrClearRcvDMADataBuf_0[1];

        pseudo_bit_t CorErrClearRcvBuf_1[1];

        pseudo_bit_t CorErrClearRcvFlags_1[1];

        pseudo_bit_t CorErrClearLookupiqBuf_1[1];

        pseudo_bit_t CorErrClearRcvDMAHdrBuf_1[1];

        pseudo_bit_t CorErrClearRcvDMADataBuf_1[1];

        pseudo_bit_t CorErrClearRcvTIDArray[1];

        pseudo_bit_t CorErrClearRcvEgrArray[1];

        pseudo_bit_t _unused_0[3];

        pseudo_bit_t CorErrClearSendBufVL15[1];

        pseudo_bit_t CorErrClearSendBufMain[1];

        pseudo_bit_t CorErrClearSendBufExtra[1];

        pseudo_bit_t CorErrClearSendPbcArray[1];

        pseudo_bit_t CorErrClearSendLaFIFO0_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO1_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO2_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO3_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO4_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO5_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO6_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO7_0[1];

        pseudo_bit_t CorErrClearSendLaFIFO0_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO1_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO2_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO3_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO4_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO5_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO6_1[1];

        pseudo_bit_t CorErrClearSendLaFIFO7_1[1];

        pseudo_bit_t CorErrClearSendRmFIFO_0[1];

        pseudo_bit_t CorErrClearSendRmFIFO_1[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t CorErrClearPCIeRetryBuf[1];

        pseudo_bit_t CorErrClearPCIePostHdrBuf[1];

        pseudo_bit_t CorErrClearPCIePostDataBuf[1];

        pseudo_bit_t CorErrClearPCIeCompHdrBuf[1];

        pseudo_bit_t CorErrClearPCIeCompDataBuf[1];

        pseudo_bit_t CorErrClearMsixTable0[1];

        pseudo_bit_t CorErrClearMsixTable1[1];

        pseudo_bit_t CorErrClearMsixTable2[1];

        pseudo_bit_t _unused_2[8];

};


struct QIB_7322_MemCorErrClear {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MemCorErrClear_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTableUnCorErrLogA_offset 0x00000680UL


struct QIB_7322_MsixTableUnCorErrLogA_pb {

        pseudo_bit_t MsixTable_1_0_UnCorErrData[64];

};


struct QIB_7322_MsixTableUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MsixTableUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTableUnCorErrLogB_offset 0x00000688UL


struct QIB_7322_MsixTableUnCorErrLogB_pb {

        pseudo_bit_t MsixTable_2_UnCorErrData[32];

        pseudo_bit_t MsixTable_0_UnCorErrCheckBits[7];

        pseudo_bit_t MsixTable_1_UnCorErrCheckBits[7];

        pseudo_bit_t MsixTable_2_UnCorErrCheckBits[7];

        pseudo_bit_t _unused_0[11];

};


struct QIB_7322_MsixTableUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MsixTableUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTableUnCorErrLogC_offset 0x00000690UL


struct QIB_7322_MsixTableUnCorErrLogC_pb {

        pseudo_bit_t MsixTable_0_UnCorErrAddr[7];

        pseudo_bit_t MsixTable_1_UnCorErrAddr[7];

        pseudo_bit_t MsixTable_2_UnCorErrAddr[7];

        pseudo_bit_t _unused_0[43];

};


struct QIB_7322_MsixTableUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MsixTableUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixEntryWithUncorErr_offset 0x00000698UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTableCorErrLogA_offset 0x000006a0UL


struct QIB_7322_MsixTableCorErrLogA_pb {

        pseudo_bit_t MsixTable_1_0_CorErrData[64];

};


struct QIB_7322_MsixTableCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MsixTableCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTableCorErrLogB_offset 0x000006a8UL


struct QIB_7322_MsixTableCorErrLogB_pb {

        pseudo_bit_t MsixTable_2_CorErrData[32];

        pseudo_bit_t MsixTable_0_CorErrCheckBits[7];

        pseudo_bit_t MsixTable_1_CorErrCheckBits[7];

        pseudo_bit_t MsixTable_2_CorErrCheckBits[7];

        pseudo_bit_t _unused_0[11];

};


struct QIB_7322_MsixTableCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MsixTableCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTableCorErrLogC_offset 0x000006b0UL


struct QIB_7322_MsixTableCorErrLogC_pb {

        pseudo_bit_t MsixTable_0_CorErrAddr[7];

        pseudo_bit_t MsixTable_1_CorErrAddr[7];

        pseudo_bit_t MsixTable_2_CorErrAddr[7];

        pseudo_bit_t _unused_0[43];

};


struct QIB_7322_MsixTableCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_MsixTableCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplDataBufrUnCorErrLogA_offset 0x00000700UL


struct QIB_7322_PcieCplDataBufrUnCorErrLogA_pb {

        pseudo_bit_t PcieCplDataBufrUnCorErrData_63_0[64];

};


struct QIB_7322_PcieCplDataBufrUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplDataBufrUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplDataBufrUnCorErrLogB_offset 0x00000708UL


struct QIB_7322_PcieCplDataBufrUnCorErrLogB_pb {

        pseudo_bit_t PcieCplDataBufrUnCorErrData_127_64[64];

};


struct QIB_7322_PcieCplDataBufrUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplDataBufrUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplDataBufrUnCorErrLogC_offset 0x00000710UL


struct QIB_7322_PcieCplDataBufrUnCorErrLogC_pb {

        pseudo_bit_t PcieCplDataBufrUnCorErrData_136_128[9];

        pseudo_bit_t PcieCplDataBufrUnCorErrCheckBit_21_0[22];

        pseudo_bit_t PcieCplDataBufrUnCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[19];

};


struct QIB_7322_PcieCplDataBufrUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplDataBufrUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplHdrBufrUnCorErrLogA_offset 0x00000720UL


struct QIB_7322_PcieCplHdrBufrUnCorErrLogA_pb {

        pseudo_bit_t PcieCplHdrBufrUnCorErrHdr_63_0[64];

};


struct QIB_7322_PcieCplHdrBufrUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplHdrBufrUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplHdrBufrUnCorErrLogB_offset 0x00000728UL


struct QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb {

        pseudo_bit_t PcieCplHdrBufrUnCorErrHdr_103_64[40];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_PcieCplHdrBufrUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplHdrBufrUnCorErrLogC_offset 0x00000730UL


struct QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb {

        pseudo_bit_t PcieCplHdrBufrUnCorErrCheckBit_15_0[16];

        pseudo_bit_t PcieCplHdrBufrUnCorErrAddr_8_0[9];

        pseudo_bit_t _unused_0[39];

};


struct QIB_7322_PcieCplHdrBufrUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePDataBufrUnCorErrLogA_offset 0x00000740UL


struct QIB_7322_PciePDataBufrUnCorErrLogA_pb {

        pseudo_bit_t PciePDataBufrUnCorErrData_63_0[64];

};


struct QIB_7322_PciePDataBufrUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePDataBufrUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePDataBufrUnCorErrLogB_offset 0x00000748UL


struct QIB_7322_PciePDataBufrUnCorErrLogB_pb {

        pseudo_bit_t PciePDataBufrUnCorErrData_127_64[64];

};


struct QIB_7322_PciePDataBufrUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePDataBufrUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePDataBufrUnCorErrLogC_offset 0x00000750UL


struct QIB_7322_PciePDataBufrUnCorErrLogC_pb {

        pseudo_bit_t PciePDataBufrUnCorErrData_136_128[9];

        pseudo_bit_t PciePDataBufrUnCorErrCheckBit_21_0[22];

        pseudo_bit_t PciePDataBufrUnCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[19];

};


struct QIB_7322_PciePDataBufrUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePDataBufrUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePHdrBufrUnCorErrLogA_offset 0x00000760UL


struct QIB_7322_PciePHdrBufrUnCorErrLogA_pb {

        pseudo_bit_t PciePHdrBufrUnCorErrData_63_0[64];

};


struct QIB_7322_PciePHdrBufrUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePHdrBufrUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePHdrBufrUnCorErrLogB_offset 0x00000768UL


struct QIB_7322_PciePHdrBufrUnCorErrLogB_pb {

        pseudo_bit_t PciePHdrBufrUnCorErrData_107_64[44];

        pseudo_bit_t _unused_0[20];

};


struct QIB_7322_PciePHdrBufrUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePHdrBufrUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePHdrBufrUnCorErrLogC_offset 0x00000770UL


struct QIB_7322_PciePHdrBufrUnCorErrLogC_pb {

        pseudo_bit_t PciePHdrBufrUnCorErrCheckBit_15_0[16];

        pseudo_bit_t PciePHdrBufrUnCorErrAddr_8_0[9];

        pseudo_bit_t _unused_0[39];

};


struct QIB_7322_PciePHdrBufrUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePHdrBufrUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufrUnCorErrLogA_offset 0x00000780UL


struct QIB_7322_PcieRetryBufrUnCorErrLogA_pb {

        pseudo_bit_t PcieRetryBufrUnCorErrData_63_0[64];

};


struct QIB_7322_PcieRetryBufrUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieRetryBufrUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufrUnCorErrLogB_offset 0x00000788UL


struct QIB_7322_PcieRetryBufrUnCorErrLogB_pb {

        pseudo_bit_t PcieRetryBufrUnCorErrData_127_64[64];

};


struct QIB_7322_PcieRetryBufrUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieRetryBufrUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufrUnCorErrLogC_offset 0x00000790UL


struct QIB_7322_PcieRetryBufrUnCorErrLogC_pb {

        pseudo_bit_t PcieRetryBufrUnCorErrData_133_128[6];

        pseudo_bit_t PcieRetryBufrUnCorErrCheckBit_20_0[21];

        pseudo_bit_t PcieRetryBufrUnCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[23];

};


struct QIB_7322_PcieRetryBufrUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieRetryBufrUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTIDArrayUnCorErrLogA_offset 0x00000800UL


struct QIB_7322_RxTIDArrayUnCorErrLogA_pb {

        pseudo_bit_t RxTIDArrayUnCorErrData_39_0[40];

        pseudo_bit_t RxTIDArrayUnCorErrCheckBit_11_0[12];

        pseudo_bit_t _unused_0[12];

};


struct QIB_7322_RxTIDArrayUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxTIDArrayUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTIDArrayUnCorErrLogB_offset 0x00000808UL


struct QIB_7322_RxTIDArrayUnCorErrLogB_pb {

        pseudo_bit_t RxTIDArrayUnCorErrAddr_16_0[17];

        pseudo_bit_t _unused_0[47];

};


struct QIB_7322_RxTIDArrayUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxTIDArrayUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxEagerArrayUnCorErrLogA_offset 0x00000810UL


struct QIB_7322_RxEagerArrayUnCorErrLogA_pb {

        pseudo_bit_t RxEagerArrayUnCorErrData_39_0[40];

        pseudo_bit_t RxEagerArrayUnCorErrCheckBit_11_0[12];

        pseudo_bit_t _unused_0[12];

};


struct QIB_7322_RxEagerArrayUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxEagerArrayUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxEagerArrayUnCorErrLogB_offset 0x00000818UL


struct QIB_7322_RxEagerArrayUnCorErrLogB_pb {

        pseudo_bit_t RxEagerArrayUnCorErrAddr_17_0[18];

        pseudo_bit_t _unused_0[46];

};


struct QIB_7322_RxEagerArrayUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxEagerArrayUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufMainArrayUnCorErrLogA_offset 0x00000880UL


struct QIB_7322_SBufMainArrayUnCorErrLogA_pb {

        pseudo_bit_t SBufMainArrayUnCorErrData_63_0[64];

};


struct QIB_7322_SBufMainArrayUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufMainArrayUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufMainArrayUnCorErrLogB_offset 0x00000888UL


struct QIB_7322_SBufMainArrayUnCorErrLogB_pb {

        pseudo_bit_t SBufMainArrayUnCorErrData_127_64[64];

};


struct QIB_7322_SBufMainArrayUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufMainArrayUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufMainArrayUnCorErrLogC_offset 0x00000890UL


struct QIB_7322_SBufMainArrayUnCorErrLogC_pb {

        pseudo_bit_t SBufMainArrayUnCorErrCheckBit_27_0[28];

        pseudo_bit_t SBufMainArrayUnCorErrAddr_18_0[19];

        pseudo_bit_t _unused_0[13];

        pseudo_bit_t SBufMainArrayUnCorErrDword_3_0[4];

};


struct QIB_7322_SBufMainArrayUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufMainArrayUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufExtraArrayUnCorErrLogA_offset 0x00000898UL


struct QIB_7322_SBufExtraArrayUnCorErrLogA_pb {

        pseudo_bit_t SBufExtraArrayUnCorErrData_63_0[64];

};


struct QIB_7322_SBufExtraArrayUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufExtraArrayUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufExtraArrayUnCorErrLogB_offset 0x000008a0UL


struct QIB_7322_SBufExtraArrayUnCorErrLogB_pb {

        pseudo_bit_t SBufExtraArrayUnCorErrData_127_64[64];

};


struct QIB_7322_SBufExtraArrayUnCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufExtraArrayUnCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufExtraArrayUnCorErrLogC_offset 0x000008a8UL


struct QIB_7322_SBufExtraArrayUnCorErrLogC_pb {

        pseudo_bit_t SBufExtraArrayUnCorErrCheckBit_27_0[28];

        pseudo_bit_t SBufExtraArrayUnCorErrAddr_14_0[15];

        pseudo_bit_t _unused_0[17];

        pseudo_bit_t SBufExtraArrayUnCorErrAdd_3_0[4];

};


struct QIB_7322_SBufExtraArrayUnCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufExtraArrayUnCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendPbcArrayUnCorErrLog_offset 0x000008b0UL


struct QIB_7322_SendPbcArrayUnCorErrLog_pb {

        pseudo_bit_t SendPbcArrayUnCorErrData_21_0[22];

        pseudo_bit_t SendPbcArrayUnCorErrCheckBit_6_0[7];

        pseudo_bit_t SendPbcArrayUnCorErrAddr_9_0[10];

        pseudo_bit_t _unused_0[25];

};


struct QIB_7322_SendPbcArrayUnCorErrLog {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendPbcArrayUnCorErrLog_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufVL15ArrayUnCorErrLogA_offset 0x000008c0UL


struct QIB_7322_SBufVL15ArrayUnCorErrLogA_pb {

        pseudo_bit_t SBufVL15ArrayUnCorErrData_63_0[64];

};


struct QIB_7322_SBufVL15ArrayUnCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufVL15ArrayUnCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplDataBufrCorErrLogA_offset 0x00000900UL


struct QIB_7322_PcieCplDataBufrCorErrLogA_pb {

        pseudo_bit_t PcieCplDataBufrCorErrData_63_0[64];

};


struct QIB_7322_PcieCplDataBufrCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplDataBufrCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplDataBufrCorErrLogB_offset 0x00000908UL


struct QIB_7322_PcieCplDataBufrCorErrLogB_pb {

        pseudo_bit_t PcieCplDataBufrCorErrData_127_64[64];

};


struct QIB_7322_PcieCplDataBufrCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplDataBufrCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplDataBufrCorErrLogC_offset 0x00000910UL


struct QIB_7322_PcieCplDataBufrCorErrLogC_pb {

        pseudo_bit_t PcieCplDataBufrCorErrData_136_128[9];

        pseudo_bit_t PcieCplDataBufrCorErrCheckBit_21_0[22];

        pseudo_bit_t PcieCplDataBufrCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[19];

};


struct QIB_7322_PcieCplDataBufrCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplDataBufrCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplHdrBufrCorErrLogA_offset 0x00000920UL


struct QIB_7322_PcieCplHdrBufrCorErrLogA_pb {

        pseudo_bit_t PcieCplHdrBufrCorErrHdr_63_0[64];

};


struct QIB_7322_PcieCplHdrBufrCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplHdrBufrCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplHdrBufrCorErrLogB_offset 0x00000928UL


struct QIB_7322_PcieCplHdrBufrCorErrLogB_pb {

        pseudo_bit_t PcieCplHdrBufrCorErrHdr_103_64[40];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_PcieCplHdrBufrCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplHdrBufrCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieCplHdrBufrCorErrLogC_offset 0x00000930UL


struct QIB_7322_PcieCplHdrBufrCorErrLogC_pb {

        pseudo_bit_t PcieCplHdrBufrCorErrCheckBit_15_0[16];

        pseudo_bit_t PcieCplHdrBufrCorErrAddr_8_0[9];

        pseudo_bit_t _unused_0[39];

};


struct QIB_7322_PcieCplHdrBufrCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieCplHdrBufrCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePDataBufrCorErrLogA_offset 0x00000940UL


struct QIB_7322_PciePDataBufrCorErrLogA_pb {

        pseudo_bit_t PciePDataBufrCorErrData_63_0[64];

};


struct QIB_7322_PciePDataBufrCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePDataBufrCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePDataBufrCorErrLogB_offset 0x00000948UL


struct QIB_7322_PciePDataBufrCorErrLogB_pb {

        pseudo_bit_t PciePDataBufrCorErrData_127_64[64];

};


struct QIB_7322_PciePDataBufrCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePDataBufrCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePDataBufrCorErrLogC_offset 0x00000950UL


struct QIB_7322_PciePDataBufrCorErrLogC_pb {

        pseudo_bit_t PciePDataBufrCorErrData_136_128[9];

        pseudo_bit_t PciePDataBufrCorErrCheckBit_21_0[22];

        pseudo_bit_t PciePDataBufrCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[19];

};


struct QIB_7322_PciePDataBufrCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePDataBufrCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePHdrBufrCorErrLogA_offset 0x00000960UL


struct QIB_7322_PciePHdrBufrCorErrLogA_pb {

        pseudo_bit_t PciePHdrBufrCorErrData_63_0[64];

};


struct QIB_7322_PciePHdrBufrCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePHdrBufrCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePHdrBufrCorErrLogB_offset 0x00000968UL


struct QIB_7322_PciePHdrBufrCorErrLogB_pb {

        pseudo_bit_t PciePHdrBufrCorErrData_107_64[44];

        pseudo_bit_t _unused_0[20];

};


struct QIB_7322_PciePHdrBufrCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePHdrBufrCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PciePHdrBufrCorErrLogC_offset 0x00000970UL


struct QIB_7322_PciePHdrBufrCorErrLogC_pb {

        pseudo_bit_t PciePHdrBufrCorErrCheckBit_15_0[16];

        pseudo_bit_t PciePHdrBufrCorErrAddr_8_0[9];

        pseudo_bit_t _unused_0[39];

};


struct QIB_7322_PciePHdrBufrCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PciePHdrBufrCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufrCorErrLogA_offset 0x00000980UL


struct QIB_7322_PcieRetryBufrCorErrLogA_pb {

        pseudo_bit_t PcieRetryBufrCorErrData_63_0[64];

};


struct QIB_7322_PcieRetryBufrCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieRetryBufrCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufrCorErrLogB_offset 0x00000988UL


struct QIB_7322_PcieRetryBufrCorErrLogB_pb {

        pseudo_bit_t PcieRetryBufrCorErrData_127_64[64];

};


struct QIB_7322_PcieRetryBufrCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieRetryBufrCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufrCorErrLogC_offset 0x00000990UL


struct QIB_7322_PcieRetryBufrCorErrLogC_pb {

        pseudo_bit_t PcieRetryBufrCorErrData_133_128[6];

        pseudo_bit_t PcieRetryBufrCorErrCheckBit_20_0[21];

        pseudo_bit_t PcieRetryBufrCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[23];

};


struct QIB_7322_PcieRetryBufrCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_PcieRetryBufrCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTIDArrayCorErrLogA_offset 0x00000a00UL


struct QIB_7322_RxTIDArrayCorErrLogA_pb {

        pseudo_bit_t RxTIDArrayCorErrData_39_0[40];

        pseudo_bit_t RxTIDArrayCorErrCheckBit_11_0[12];

        pseudo_bit_t _unused_0[12];

};


struct QIB_7322_RxTIDArrayCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxTIDArrayCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTIDArrayCorErrLogB_offset 0x00000a08UL


struct QIB_7322_RxTIDArrayCorErrLogB_pb {

        pseudo_bit_t RxTIDArrayCorErrAddr_16_0[17];

        pseudo_bit_t _unused_0[47];

};


struct QIB_7322_RxTIDArrayCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxTIDArrayCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxEagerArrayCorErrLogA_offset 0x00000a10UL


struct QIB_7322_RxEagerArrayCorErrLogA_pb {

        pseudo_bit_t RxEagerArrayCorErrData_39_0[40];

        pseudo_bit_t RxEagerArrayCorErrCheckBit_11_0[12];

        pseudo_bit_t _unused_0[12];

};


struct QIB_7322_RxEagerArrayCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxEagerArrayCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxEagerArrayCorErrLogB_offset 0x00000a18UL


struct QIB_7322_RxEagerArrayCorErrLogB_pb {

        pseudo_bit_t RxEagerArrayCorErrAddr_17_0[18];

        pseudo_bit_t _unused_0[46];

};


struct QIB_7322_RxEagerArrayCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxEagerArrayCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufMainArrayCorErrLogA_offset 0x00000a80UL


struct QIB_7322_SBufMainArrayCorErrLogA_pb {

        pseudo_bit_t SBufMainArrayCorErrData_63_0[64];

};


struct QIB_7322_SBufMainArrayCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufMainArrayCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufMainArrayCorErrLogB_offset 0x00000a88UL


struct QIB_7322_SBufMainArrayCorErrLogB_pb {

        pseudo_bit_t SBufMainArrayCorErrData_127_64[64];

};


struct QIB_7322_SBufMainArrayCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufMainArrayCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufMainArrayCorErrLogC_offset 0x00000a90UL


struct QIB_7322_SBufMainArrayCorErrLogC_pb {

        pseudo_bit_t SBufMainArrayCorErrCheckBit_27_0[28];

        pseudo_bit_t SBufMainArrayCorErrAddr_18_0[19];

        pseudo_bit_t _unused_0[13];

        pseudo_bit_t SBufMainArrayCorErrDword_3_0[4];

};


struct QIB_7322_SBufMainArrayCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufMainArrayCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufExtraArrayCorErrLogA_offset 0x00000a98UL


struct QIB_7322_SBufExtraArrayCorErrLogA_pb {

        pseudo_bit_t SBufExtraArrayCorErrData_63_0[64];

};


struct QIB_7322_SBufExtraArrayCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufExtraArrayCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufExtraArrayCorErrLogB_offset 0x00000aa0UL


struct QIB_7322_SBufExtraArrayCorErrLogB_pb {

        pseudo_bit_t SBufExtraArrayCorErrData_127_64[64];

};


struct QIB_7322_SBufExtraArrayCorErrLogB {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufExtraArrayCorErrLogB_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufExtraArrayCorErrLogC_offset 0x00000aa8UL


struct QIB_7322_SBufExtraArrayCorErrLogC_pb {

        pseudo_bit_t SBufExtraArrayCorErrCheckBit_27_0[28];

        pseudo_bit_t SBufExtraArrayCorErrAddr_14_0[15];

        pseudo_bit_t _unused_0[17];

        pseudo_bit_t SBufExtraArrayCorErrAdd_3_0[4];

};


struct QIB_7322_SBufExtraArrayCorErrLogC {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufExtraArrayCorErrLogC_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendPbcArrayCorErrLog_offset 0x00000ab0UL


struct QIB_7322_SendPbcArrayCorErrLog_pb {

        pseudo_bit_t SendPbcArrayCorErrData_21_0[22];

        pseudo_bit_t SendPbcArrayCorErrCheckBit_6_0[7];

        pseudo_bit_t SendPbcArrayCorErrAddr_9_0[10];

        pseudo_bit_t _unused_0[25];

};


struct QIB_7322_SendPbcArrayCorErrLog {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendPbcArrayCorErrLog_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SBufVL15ArrayCorErrLogA_offset 0x00000ac0UL


struct QIB_7322_SBufVL15ArrayCorErrLogA_pb {

        pseudo_bit_t SBufVL15ArrayCorErrData_63_0[64];

};


struct QIB_7322_SBufVL15ArrayCorErrLogA {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SBufVL15ArrayCorErrLogA_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvAvailTimeOut0_offset 0x00000c00UL


struct QIB_7322_RcvAvailTimeOut0_pb {

        pseudo_bit_t RcvAvailTOReload[16];

        pseudo_bit_t RcvAvailTOCount[16];

        pseudo_bit_t _unused_0[32];

};


struct QIB_7322_RcvAvailTimeOut0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvAvailTimeOut0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_CntrRegBase_0_offset 0x00001028UL

/* Default value: 0x0000000000012000 */


#define QIB_7322_ErrMask_0_offset 0x00001080UL


struct QIB_7322_ErrMask_0_pb {

        pseudo_bit_t RcvFormatErrMask[1];

        pseudo_bit_t RcvVCRCErrMask[1];

        pseudo_bit_t RcvICRCErrMask[1];

        pseudo_bit_t RcvMinPktLenErrMask[1];

        pseudo_bit_t RcvMaxPktLenErrMask[1];

        pseudo_bit_t RcvLongPktLenErrMask[1];

        pseudo_bit_t RcvShortPktLenErrMask[1];

        pseudo_bit_t RcvUnexpectedCharErrMask[1];

        pseudo_bit_t RcvUnsupportedVLErrMask[1];

        pseudo_bit_t RcvEBPErrMask[1];

        pseudo_bit_t RcvIBFlowErrMask[1];

        pseudo_bit_t RcvBadVersionErrMask[1];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvBadTidErrMask[1];

        pseudo_bit_t RcvHdrLenErrMask[1];

        pseudo_bit_t RcvHdrErrMask[1];

        pseudo_bit_t RcvIBLostLinkErrMask[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SendMinPktLenErrMask[1];

        pseudo_bit_t SendMaxPktLenErrMask[1];

        pseudo_bit_t SendUnderRunErrMask[1];

        pseudo_bit_t SendPktLenErrMask[1];

        pseudo_bit_t SendDroppedSmpPktErrMask[1];

        pseudo_bit_t SendDroppedDataPktErrMask[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t SendUnexpectedPktNumErrMask[1];

        pseudo_bit_t SendUnsupportedVLErrMask[1];

        pseudo_bit_t SendBufMisuseErrMask[1];

        pseudo_bit_t SDmaGenMismatchErrMask[1];

        pseudo_bit_t SDmaOutOfBoundErrMask[1];

        pseudo_bit_t SDmaTailOutOfBoundErrMask[1];

        pseudo_bit_t SDmaBaseErrMask[1];

        pseudo_bit_t SDma1stDescErrMask[1];

        pseudo_bit_t SDmaRpyTagErrMask[1];

        pseudo_bit_t SDmaDwEnErrMask[1];

        pseudo_bit_t SDmaMissingDwErrMask[1];

        pseudo_bit_t SDmaUnexpDataErrMask[1];

        pseudo_bit_t SDmaDescAddrMisalignErrMask[1];

        pseudo_bit_t SDmaHaltErrMask[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t VL15BufMisuseErrMask[1];

        pseudo_bit_t _unused_4[2];

        pseudo_bit_t SHeadersErrMask[1];

        pseudo_bit_t IBStatusChangedMask[1];

        pseudo_bit_t _unused_5[5];

};


struct QIB_7322_ErrMask_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrMask_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrStatus_0_offset 0x00001088UL


struct QIB_7322_ErrStatus_0_pb {

        pseudo_bit_t RcvFormatErr[1];

        pseudo_bit_t RcvVCRCErr[1];

        pseudo_bit_t RcvICRCErr[1];

        pseudo_bit_t RcvMinPktLenErr[1];

        pseudo_bit_t RcvMaxPktLenErr[1];

        pseudo_bit_t RcvLongPktLenErr[1];

        pseudo_bit_t RcvShortPktLenErr[1];

        pseudo_bit_t RcvUnexpectedCharErr[1];

        pseudo_bit_t RcvUnsupportedVLErr[1];

        pseudo_bit_t RcvEBPErr[1];

        pseudo_bit_t RcvIBFlowErr[1];

        pseudo_bit_t RcvBadVersionErr[1];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvBadTidErr[1];

        pseudo_bit_t RcvHdrLenErr[1];

        pseudo_bit_t RcvHdrErr[1];

        pseudo_bit_t RcvIBLostLinkErr[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SendMinPktLenErr[1];

        pseudo_bit_t SendMaxPktLenErr[1];

        pseudo_bit_t SendUnderRunErr[1];

        pseudo_bit_t SendPktLenErr[1];

        pseudo_bit_t SendDroppedSmpPktErr[1];

        pseudo_bit_t SendDroppedDataPktErr[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t SendUnexpectedPktNumErr[1];

        pseudo_bit_t SendUnsupportedVLErr[1];

        pseudo_bit_t SendBufMisuseErr[1];

        pseudo_bit_t SDmaGenMismatchErr[1];

        pseudo_bit_t SDmaOutOfBoundErr[1];

        pseudo_bit_t SDmaTailOutOfBoundErr[1];

        pseudo_bit_t SDmaBaseErr[1];

        pseudo_bit_t SDma1stDescErr[1];

        pseudo_bit_t SDmaRpyTagErr[1];

        pseudo_bit_t SDmaDwEnErr[1];

        pseudo_bit_t SDmaMissingDwErr[1];

        pseudo_bit_t SDmaUnexpDataErr[1];

        pseudo_bit_t SDmaDescAddrMisalignErr[1];

        pseudo_bit_t SDmaHaltErr[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t VL15BufMisuseErr[1];

        pseudo_bit_t _unused_4[2];

        pseudo_bit_t SHeadersErr[1];

        pseudo_bit_t IBStatusChanged[1];

        pseudo_bit_t _unused_5[5];

};


struct QIB_7322_ErrStatus_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrStatus_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrClear_0_offset 0x00001090UL


struct QIB_7322_ErrClear_0_pb {

        pseudo_bit_t RcvFormatErrClear[1];

        pseudo_bit_t RcvVCRCErrClear[1];

        pseudo_bit_t RcvICRCErrClear[1];

        pseudo_bit_t RcvMinPktLenErrClear[1];

        pseudo_bit_t RcvMaxPktLenErrClear[1];

        pseudo_bit_t RcvLongPktLenErrClear[1];

        pseudo_bit_t RcvShortPktLenErrClear[1];

        pseudo_bit_t RcvUnexpectedCharErrClear[1];

        pseudo_bit_t RcvUnsupportedVLErrClear[1];

        pseudo_bit_t RcvEBPErrClear[1];

        pseudo_bit_t RcvIBFlowErrClear[1];

        pseudo_bit_t RcvBadVersionErrClear[1];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvBadTidErrClear[1];

        pseudo_bit_t RcvHdrLenErrClear[1];

        pseudo_bit_t RcvHdrErrClear[1];

        pseudo_bit_t RcvIBLostLinkErrClear[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SendMinPktLenErrClear[1];

        pseudo_bit_t SendMaxPktLenErrClear[1];

        pseudo_bit_t SendUnderRunErrClear[1];

        pseudo_bit_t SendPktLenErrClear[1];

        pseudo_bit_t SendDroppedSmpPktErrClear[1];

        pseudo_bit_t SendDroppedDataPktErrClear[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t SendUnexpectedPktNumErrClear[1];

        pseudo_bit_t SendUnsupportedVLErrClear[1];

        pseudo_bit_t SendBufMisuseErrClear[1];

        pseudo_bit_t SDmaGenMismatchErrClear[1];

        pseudo_bit_t SDmaOutOfBoundErrClear[1];

        pseudo_bit_t SDmaTailOutOfBoundErrClear[1];

        pseudo_bit_t SDmaBaseErrClear[1];

        pseudo_bit_t SDma1stDescErrClear[1];

        pseudo_bit_t SDmaRpyTagErrClear[1];

        pseudo_bit_t SDmaDwEnErrClear[1];

        pseudo_bit_t SDmaMissingDwErrClear[1];

        pseudo_bit_t SDmaUnexpDataErrClear[1];

        pseudo_bit_t SDmaDescAddrMisalignErrClear[1];

        pseudo_bit_t SDmaHaltErrClear[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t VL15BufMisuseErrClear[1];

        pseudo_bit_t _unused_4[2];

        pseudo_bit_t SHeadersErrClear[1];

        pseudo_bit_t IBStatusChangedClear[1];

        pseudo_bit_t _unused_5[5];

};


struct QIB_7322_ErrClear_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrClear_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_TXEStatus_0_offset 0x000010b8UL


struct QIB_7322_TXEStatus_0_pb {

        pseudo_bit_t LaFifoEmpty_VL0[1];

        pseudo_bit_t LaFifoEmpty_VL1[1];

        pseudo_bit_t LaFifoEmpty_VL2[1];

        pseudo_bit_t LaFifoEmpty_VL3[1];

        pseudo_bit_t LaFifoEmpty_VL4[1];

        pseudo_bit_t LaFifoEmpty_VL5[1];

        pseudo_bit_t LaFifoEmpty_VL6[1];

        pseudo_bit_t LaFifoEmpty_VL7[1];

        pseudo_bit_t _unused_0[7];

        pseudo_bit_t LaFifoEmpty_VL15[1];

        pseudo_bit_t _unused_1[14];

        pseudo_bit_t RmFifoEmpty[1];

        pseudo_bit_t TXE_IBC_Idle[1];

        pseudo_bit_t _unused_2[32];

};


struct QIB_7322_TXEStatus_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_TXEStatus_0_pb );

};


/* Default value: 0x0000000XC00080FF */


#define QIB_7322_RcvCtrl_0_offset 0x00001100UL


struct QIB_7322_RcvCtrl_0_pb {

        pseudo_bit_t ContextEnableKernel[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t ContextEnableUser[16];

        pseudo_bit_t _unused_1[21];

        pseudo_bit_t RcvIBPortEnable[1];

        pseudo_bit_t RcvQPMapEnable[1];

        pseudo_bit_t RcvPartitionKeyDisable[1];

        pseudo_bit_t RcvResetCredit[1];

        pseudo_bit_t _unused_2[21];

};


struct QIB_7322_RcvCtrl_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvCtrl_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvBTHQP_0_offset 0x00001108UL


struct QIB_7322_RcvBTHQP_0_pb {

        pseudo_bit_t RcvBTHQP[24];

        pseudo_bit_t _unused_0[40];

};


struct QIB_7322_RcvBTHQP_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvBTHQP_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableA_0_offset 0x00001110UL


struct QIB_7322_RcvQPMapTableA_0_pb {

        pseudo_bit_t RcvQPMapContext0[5];

        pseudo_bit_t RcvQPMapContext1[5];

        pseudo_bit_t RcvQPMapContext2[5];

        pseudo_bit_t RcvQPMapContext3[5];

        pseudo_bit_t RcvQPMapContext4[5];

        pseudo_bit_t RcvQPMapContext5[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableB_0_offset 0x00001118UL


struct QIB_7322_RcvQPMapTableB_0_pb {

        pseudo_bit_t RcvQPMapContext6[5];

        pseudo_bit_t RcvQPMapContext7[5];

        pseudo_bit_t RcvQPMapContext8[5];

        pseudo_bit_t RcvQPMapContext9[5];

        pseudo_bit_t RcvQPMapContext10[5];

        pseudo_bit_t RcvQPMapContext11[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableC_0_offset 0x00001120UL


struct QIB_7322_RcvQPMapTableC_0_pb {

        pseudo_bit_t RcvQPMapContext12[5];

        pseudo_bit_t RcvQPMapContext13[5];

        pseudo_bit_t RcvQPMapContext14[5];

        pseudo_bit_t RcvQPMapContext15[5];

        pseudo_bit_t RcvQPMapContext16[5];

        pseudo_bit_t RcvQPMapContext17[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableD_0_offset 0x00001128UL


struct QIB_7322_RcvQPMapTableD_0_pb {

        pseudo_bit_t RcvQPMapContext18[5];

        pseudo_bit_t RcvQPMapContext19[5];

        pseudo_bit_t RcvQPMapContext20[5];

        pseudo_bit_t RcvQPMapContext21[5];

        pseudo_bit_t RcvQPMapContext22[5];

        pseudo_bit_t RcvQPMapContext23[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableD_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableD_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableE_0_offset 0x00001130UL


struct QIB_7322_RcvQPMapTableE_0_pb {

        pseudo_bit_t RcvQPMapContext24[5];

        pseudo_bit_t RcvQPMapContext25[5];

        pseudo_bit_t RcvQPMapContext26[5];

        pseudo_bit_t RcvQPMapContext27[5];

        pseudo_bit_t RcvQPMapContext28[5];

        pseudo_bit_t RcvQPMapContext29[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableE_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableE_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableF_0_offset 0x00001138UL


struct QIB_7322_RcvQPMapTableF_0_pb {

        pseudo_bit_t RcvQPMapContext30[5];

        pseudo_bit_t RcvQPMapContext31[5];

        pseudo_bit_t _unused_0[54];

};


struct QIB_7322_RcvQPMapTableF_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableF_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PSStat_0_offset 0x00001140UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSStart_0_offset 0x00001148UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSInterval_0_offset 0x00001150UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvStatus_0_offset 0x00001160UL


struct QIB_7322_RcvStatus_0_pb {

        pseudo_bit_t RxPktInProgress[1];

        pseudo_bit_t DmaeqBlockingContext[5];

        pseudo_bit_t _unused_0[58];

};


struct QIB_7322_RcvStatus_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvStatus_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvPartitionKey_0_offset 0x00001168UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMulticastContext_0_offset 0x00001170UL


struct QIB_7322_RcvQPMulticastContext_0_pb {

        pseudo_bit_t RcvQpMcContext[5];

        pseudo_bit_t _unused_0[59];

};


struct QIB_7322_RcvQPMulticastContext_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMulticastContext_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvPktLEDCnt_0_offset 0x00001178UL


struct QIB_7322_RcvPktLEDCnt_0_pb {

        pseudo_bit_t OFFperiod[32];

        pseudo_bit_t ONperiod[32];

};


struct QIB_7322_RcvPktLEDCnt_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvPktLEDCnt_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaIdleCnt_0_offset 0x00001180UL


struct QIB_7322_SendDmaIdleCnt_0_pb {

        pseudo_bit_t SendDmaIdleCnt[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaIdleCnt_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaIdleCnt_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaReloadCnt_0_offset 0x00001188UL


struct QIB_7322_SendDmaReloadCnt_0_pb {

        pseudo_bit_t SendDmaReloadCnt[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaReloadCnt_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaReloadCnt_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaDescCnt_0_offset 0x00001190UL


struct QIB_7322_SendDmaDescCnt_0_pb {

        pseudo_bit_t SendDmaDescCnt[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaDescCnt_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaDescCnt_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendCtrl_0_offset 0x000011c0UL


struct QIB_7322_SendCtrl_0_pb {

        pseudo_bit_t TxeAbortIbc[1];

        pseudo_bit_t TxeBypassIbc[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t SendEnable[1];

        pseudo_bit_t _unused_1[3];

        pseudo_bit_t ForceCreditUpToDate[1];

        pseudo_bit_t SDmaCleanup[1];

        pseudo_bit_t SDmaIntEnable[1];

        pseudo_bit_t SDmaSingleDescriptor[1];

        pseudo_bit_t SDmaEnable[1];

        pseudo_bit_t SDmaHalt[1];

        pseudo_bit_t TxeDrainLaFifo[1];

        pseudo_bit_t TxeDrainRmFifo[1];

        pseudo_bit_t IBVLArbiterEn[1];

        pseudo_bit_t _unused_2[48];

};


struct QIB_7322_SendCtrl_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendCtrl_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaBase_0_offset 0x000011f8UL


struct QIB_7322_SendDmaBase_0_pb {

        pseudo_bit_t SendDmaBase[48];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_SendDmaBase_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaBase_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaLenGen_0_offset 0x00001200UL


struct QIB_7322_SendDmaLenGen_0_pb {

        pseudo_bit_t Length[16];

        pseudo_bit_t Generation[3];

        pseudo_bit_t _unused_0[45];

};


struct QIB_7322_SendDmaLenGen_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaLenGen_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaTail_0_offset 0x00001208UL


struct QIB_7322_SendDmaTail_0_pb {

        pseudo_bit_t SendDmaTail[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaTail_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaTail_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaHead_0_offset 0x00001210UL


struct QIB_7322_SendDmaHead_0_pb {

        pseudo_bit_t SendDmaHead[16];

        pseudo_bit_t _unused_0[16];

        pseudo_bit_t InternalSendDmaHead[16];

        pseudo_bit_t _unused_1[16];

};


struct QIB_7322_SendDmaHead_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaHead_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaHeadAddr_0_offset 0x00001218UL


struct QIB_7322_SendDmaHeadAddr_0_pb {

        pseudo_bit_t SendDmaHeadAddr[48];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_SendDmaHeadAddr_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaHeadAddr_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaBufMask0_0_offset 0x00001220UL


struct QIB_7322_SendDmaBufMask0_0_pb {

        pseudo_bit_t BufMask_63_0[64];

};


struct QIB_7322_SendDmaBufMask0_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaBufMask0_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaStatus_0_offset 0x00001238UL


struct QIB_7322_SendDmaStatus_0_pb {

        pseudo_bit_t SplFifoDescIndex[16];

        pseudo_bit_t SplFifoBufNum[8];

        pseudo_bit_t SplFifoFull[1];

        pseudo_bit_t SplFifoEmpty[1];

        pseudo_bit_t SplFifoDisarmed[1];

        pseudo_bit_t SplFifoReadyToGo[1];

        pseudo_bit_t ScbFetchDescFlag[1];

        pseudo_bit_t ScbEntryValid[1];

        pseudo_bit_t ScbEmpty[1];

        pseudo_bit_t ScbFull[1];

        pseudo_bit_t RpyTag_7_0[8];

        pseudo_bit_t RpyLowAddr_6_0[7];

        pseudo_bit_t ScbDescIndex_13_0[14];

        pseudo_bit_t InternalSDmaHalt[1];

        pseudo_bit_t HaltInProg[1];

        pseudo_bit_t ScoreBoardDrainInProg[1];

};


struct QIB_7322_SendDmaStatus_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaStatus_0_pb );

};


/* Default value: 0x0000000042000000 */


#define QIB_7322_SendDmaPriorityThld_0_offset 0x00001258UL


struct QIB_7322_SendDmaPriorityThld_0_pb {

        pseudo_bit_t PriorityThreshold[4];

        pseudo_bit_t _unused_0[60];

};


struct QIB_7322_SendDmaPriorityThld_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaPriorityThld_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendHdrErrSymptom_0_offset 0x00001260UL


struct QIB_7322_SendHdrErrSymptom_0_pb {

        pseudo_bit_t PacketTooSmall[1];

        pseudo_bit_t RawIPV6[1];

        pseudo_bit_t SLIDFail[1];

        pseudo_bit_t QPFail[1];

        pseudo_bit_t PkeyFail[1];

        pseudo_bit_t GRHFail[1];

        pseudo_bit_t NonKeyPacket[1];

        pseudo_bit_t _unused_0[57];

};


struct QIB_7322_SendHdrErrSymptom_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendHdrErrSymptom_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxCreditVL0_0_offset 0x00001280UL


struct QIB_7322_RxCreditVL0_0_pb {

        pseudo_bit_t RxMaxCreditVL[12];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t RxBufrConsumedVL[12];

        pseudo_bit_t _unused_1[36];

};


struct QIB_7322_RxCreditVL0_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxCreditVL0_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaBufUsed0_0_offset 0x00001480UL


struct QIB_7322_SendDmaBufUsed0_0_pb {

        pseudo_bit_t BufUsed_63_0[64];

};


struct QIB_7322_SendDmaBufUsed0_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaBufUsed0_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaReqTagUsed_0_offset 0x00001498UL


struct QIB_7322_SendDmaReqTagUsed_0_pb {

        pseudo_bit_t ReqTagUsed_7_0[8];

        pseudo_bit_t _unused_0[56];

};


struct QIB_7322_SendDmaReqTagUsed_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaReqTagUsed_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendCheckControl_0_offset 0x000014a8UL


struct QIB_7322_SendCheckControl_0_pb {

        pseudo_bit_t PacketTooSmall_En[1];

        pseudo_bit_t RawIPV6_En[1];

        pseudo_bit_t SLID_En[1];

        pseudo_bit_t BTHQP_En[1];

        pseudo_bit_t PKey_En[1];

        pseudo_bit_t _unused_0[59];

};


struct QIB_7322_SendCheckControl_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendCheckControl_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendIBSLIDMask_0_offset 0x000014b0UL


struct QIB_7322_SendIBSLIDMask_0_pb {

        pseudo_bit_t SendIBSLIDMask_15_0[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendIBSLIDMask_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendIBSLIDMask_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendIBSLIDAssign_0_offset 0x000014b8UL


struct QIB_7322_SendIBSLIDAssign_0_pb {

        pseudo_bit_t SendIBSLIDAssign_15_0[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendIBSLIDAssign_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendIBSLIDAssign_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBCStatusA_0_offset 0x00001540UL


struct QIB_7322_IBCStatusA_0_pb {

        pseudo_bit_t LinkTrainingState[5];

        pseudo_bit_t LinkState[3];

        pseudo_bit_t LinkSpeedActive[1];

        pseudo_bit_t LinkWidthActive[1];

        pseudo_bit_t DDS_RXEQ_FAIL[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t IBRxLaneReversed[1];

        pseudo_bit_t IBTxLaneReversed[1];

        pseudo_bit_t ScrambleEn[1];

        pseudo_bit_t ScrambleCapRemote[1];

        pseudo_bit_t _unused_1[13];

        pseudo_bit_t LinkSpeedQDR[1];

        pseudo_bit_t TxReady[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t TxCreditOk_VL0[1];

        pseudo_bit_t TxCreditOk_VL1[1];

        pseudo_bit_t TxCreditOk_VL2[1];

        pseudo_bit_t TxCreditOk_VL3[1];

        pseudo_bit_t TxCreditOk_VL4[1];

        pseudo_bit_t TxCreditOk_VL5[1];

        pseudo_bit_t TxCreditOk_VL6[1];

        pseudo_bit_t TxCreditOk_VL7[1];

        pseudo_bit_t _unused_3[24];

};


struct QIB_7322_IBCStatusA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCStatusA_0_pb );

};


/* Default value: 0x0000000000000X02 */


#define QIB_7322_IBCStatusB_0_offset 0x00001548UL


struct QIB_7322_IBCStatusB_0_pb {

        pseudo_bit_t LinkRoundTripLatency[26];

        pseudo_bit_t ReqDDSLocalFromRmt[4];

        pseudo_bit_t RxEqLocalDevice[2];

        pseudo_bit_t heartbeat_crosstalk[4];

        pseudo_bit_t heartbeat_timed_out[1];

        pseudo_bit_t ibsd_adaptation_timer_started[1];

        pseudo_bit_t ibsd_adaptation_timer_reached_threshold[1];

        pseudo_bit_t ibsd_adaptation_timer_debug[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_IBCStatusB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCStatusB_0_pb );

};


/* Default value: 0x00000000XXXXXXXX */


#define QIB_7322_IBCCtrlA_0_offset 0x00001560UL


struct QIB_7322_IBCCtrlA_0_pb {

        pseudo_bit_t FlowCtrlPeriod[8];

        pseudo_bit_t FlowCtrlWaterMark[8];

        pseudo_bit_t LinkInitCmd[3];

        pseudo_bit_t LinkCmd[2];

        pseudo_bit_t MaxPktLen[11];

        pseudo_bit_t PhyerrThreshold[4];

        pseudo_bit_t OverrunThreshold[4];

        pseudo_bit_t _unused_0[8];

        pseudo_bit_t NumVLane[3];

        pseudo_bit_t _unused_1[9];

        pseudo_bit_t IBStatIntReductionEn[1];

        pseudo_bit_t IBLinkEn[1];

        pseudo_bit_t LinkDownDefaultState[1];

        pseudo_bit_t Loopback[1];

};


struct QIB_7322_IBCCtrlA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCCtrlA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBCCtrlB_0_offset 0x00001568UL


struct QIB_7322_IBCCtrlB_0_pb {

        pseudo_bit_t IB_ENHANCED_MODE[1];

        pseudo_bit_t SD_SPEED[1];

        pseudo_bit_t SD_SPEED_SDR[1];

        pseudo_bit_t SD_SPEED_DDR[1];

        pseudo_bit_t SD_SPEED_QDR[1];

        pseudo_bit_t IB_NUM_CHANNELS[2];

        pseudo_bit_t IB_POLARITY_REV_SUPP[1];

        pseudo_bit_t IB_LANE_REV_SUPPORTED[1];

        pseudo_bit_t SD_RX_EQUAL_ENABLE[1];

        pseudo_bit_t SD_ADD_ENB[1];

        pseudo_bit_t SD_DDSV[1];

        pseudo_bit_t SD_DDS[4];

        pseudo_bit_t HRTBT_ENB[1];

        pseudo_bit_t HRTBT_AUTO[1];

        pseudo_bit_t HRTBT_PORT[8];

        pseudo_bit_t HRTBT_REQ[1];

        pseudo_bit_t IB_ENABLE_FILT_DPKT[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t IB_DLID[16];

        pseudo_bit_t IB_DLID_MASK[16];

};


struct QIB_7322_IBCCtrlB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCCtrlB_0_pb );

};


/* Default value: 0x00000000000305FF */


#define QIB_7322_IBCCtrlC_0_offset 0x00001570UL


struct QIB_7322_IBCCtrlC_0_pb {

        pseudo_bit_t IB_FRONT_PORCH[5];

        pseudo_bit_t IB_BACK_PORCH[5];

        pseudo_bit_t _unused_0[54];

};


struct QIB_7322_IBCCtrlC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCCtrlC_0_pb );

};


/* Default value: 0x0000000000000301 */


#define QIB_7322_HRTBT_GUID_0_offset 0x00001588UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IB_SDTEST_IF_TX_0_offset 0x00001590UL


struct QIB_7322_IB_SDTEST_IF_TX_0_pb {

        pseudo_bit_t TS_T_TX_VALID[1];

        pseudo_bit_t TS_3_TX_VALID[1];

        pseudo_bit_t VL_CAP[2];

        pseudo_bit_t CREDIT_CHANGE[1];

        pseudo_bit_t _unused_0[6];

        pseudo_bit_t TS_TX_OPCODE[2];

        pseudo_bit_t TS_TX_SPEED[3];

        pseudo_bit_t _unused_1[16];

        pseudo_bit_t TS_TX_TX_CFG[16];

        pseudo_bit_t TS_TX_RX_CFG[16];

};


struct QIB_7322_IB_SDTEST_IF_TX_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IB_SDTEST_IF_TX_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IB_SDTEST_IF_RX_0_offset 0x00001598UL


struct QIB_7322_IB_SDTEST_IF_RX_0_pb {

        pseudo_bit_t TS_T_RX_VALID[1];

        pseudo_bit_t TS_3_RX_VALID[1];

        pseudo_bit_t _unused_0[14];

        pseudo_bit_t TS_RX_A[8];

        pseudo_bit_t TS_RX_B[8];

        pseudo_bit_t TS_RX_TX_CFG[16];

        pseudo_bit_t TS_RX_RX_CFG[16];

};


struct QIB_7322_IB_SDTEST_IF_RX_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IB_SDTEST_IF_RX_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBNCModeCtrl_0_offset 0x000015b8UL


struct QIB_7322_IBNCModeCtrl_0_pb {

        pseudo_bit_t TSMEnable_send_TS1[1];

        pseudo_bit_t TSMEnable_send_TS2[1];

        pseudo_bit_t TSMEnable_ignore_TSM_on_rx[1];

        pseudo_bit_t _unused_0[5];

        pseudo_bit_t TSMCode_TS1[9];

        pseudo_bit_t TSMCode_TS2[9];

        pseudo_bit_t _unused_1[6];

        pseudo_bit_t ScrambleCapLocal[1];

        pseudo_bit_t ScrambleCapRemoteMask[1];

        pseudo_bit_t ScrambleCapRemoteForce[1];

        pseudo_bit_t _unused_2[29];

};


struct QIB_7322_IBNCModeCtrl_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBNCModeCtrl_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBSerdesStatus_0_offset 0x000015d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBPCSConfig_0_offset 0x000015d8UL


struct QIB_7322_IBPCSConfig_0_pb {

        pseudo_bit_t tx_rx_reset[1];

        pseudo_bit_t xcv_treset[1];

        pseudo_bit_t xcv_rreset[1];

        pseudo_bit_t _unused_0[6];

        pseudo_bit_t link_sync_mask[10];

        pseudo_bit_t _unused_1[45];

};


struct QIB_7322_IBPCSConfig_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBPCSConfig_0_pb );

};


/* Default value: 0x0000000000000007 */


#define QIB_7322_IBSerdesCtrl_0_offset 0x000015e0UL


struct QIB_7322_IBSerdesCtrl_0_pb {

        pseudo_bit_t CMODE[7];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t TXIDLE[1];

        pseudo_bit_t RXPD[1];

        pseudo_bit_t TXPD[1];

        pseudo_bit_t PLLPD[1];

        pseudo_bit_t LPEN[1];

        pseudo_bit_t RXLOSEN[1];

        pseudo_bit_t _unused_1[1];

        pseudo_bit_t IB_LAT_MODE[1];

        pseudo_bit_t CGMODE[4];

        pseudo_bit_t CHANNEL_RESET_N[4];

        pseudo_bit_t DISABLE_RXLATOFF_SDR[1];

        pseudo_bit_t DISABLE_RXLATOFF_DDR[1];

        pseudo_bit_t DISABLE_RXLATOFF_QDR[1];

        pseudo_bit_t _unused_2[37];

};


struct QIB_7322_IBSerdesCtrl_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBSerdesCtrl_0_pb );

};


/* Default value: 0x0000000000FFA00F */


#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_offset 0x00001600UL


struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb {

        pseudo_bit_t txcn1_ena[3];

        pseudo_bit_t txcn1_xtra_emph0[2];

        pseudo_bit_t txcp1_ena[4];

        pseudo_bit_t txc0_ena[5];

        pseudo_bit_t txampcntl_d2a[4];

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t reset_tx_deemphasis_override[1];

        pseudo_bit_t tx_override_deemphasis_select[1];

        pseudo_bit_t _unused_1[32];

};


struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_offset 0x00001640UL


struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb {

        pseudo_bit_t static_disable_rxenadfe_sdr_ch0[8];

        pseudo_bit_t static_disable_rxenadfe_sdr_ch1[8];

        pseudo_bit_t static_disable_rxenadfe_sdr_ch2[8];

        pseudo_bit_t static_disable_rxenadfe_sdr_ch3[8];

        pseudo_bit_t static_disable_rxenale_sdr_ch0[1];

        pseudo_bit_t static_disable_rxenale_sdr_ch1[1];

        pseudo_bit_t static_disable_rxenale_sdr_ch2[1];

        pseudo_bit_t static_disable_rxenale_sdr_ch3[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch0[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch1[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch2[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_offset 0x00001648UL


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb {

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch0[8];

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch1[8];

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch2[8];

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch3[8];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch3[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_offset 0x00001650UL


struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb {

        pseudo_bit_t static_disable_rxenadfe_ddr_ch0[8];

        pseudo_bit_t static_disable_rxenadfe_ddr_ch1[8];

        pseudo_bit_t static_disable_rxenadfe_ddr_ch2[8];

        pseudo_bit_t static_disable_rxenadfe_ddr_ch3[8];

        pseudo_bit_t static_disable_rxenale_ddr_ch0[1];

        pseudo_bit_t static_disable_rxenale_ddr_ch1[1];

        pseudo_bit_t static_disable_rxenale_ddr_ch2[1];

        pseudo_bit_t static_disable_rxenale_ddr_ch3[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch0[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch1[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch2[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_offset 0x00001658UL


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb {

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch0[8];

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch1[8];

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch2[8];

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch3[8];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch0[1];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch1[1];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch2[1];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch3[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch0[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch1[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch2[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_offset 0x00001660UL


struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb {

        pseudo_bit_t static_disable_rxenadfe_qdr_ch0[8];

        pseudo_bit_t static_disable_rxenadfe_qdr_ch1[8];

        pseudo_bit_t static_disable_rxenadfe_qdr_ch2[8];

        pseudo_bit_t static_disable_rxenadfe_qdr_ch3[8];

        pseudo_bit_t static_disable_rxenale_qdr_ch0[1];

        pseudo_bit_t static_disable_rxenale_qdr_ch1[1];

        pseudo_bit_t static_disable_rxenale_qdr_ch2[1];

        pseudo_bit_t static_disable_rxenale_qdr_ch3[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch0[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch1[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch2[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_offset 0x00001668UL


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb {

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch0[8];

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch1[8];

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch2[8];

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch3[8];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch3[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_0_offset 0x00001670UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogA_0_offset 0x00001800UL


struct QIB_7322_RxBufrUnCorErrLogA_0_pb {

        pseudo_bit_t RxBufrUnCorErrData_63_0[64];

};


struct QIB_7322_RxBufrUnCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogB_0_offset 0x00001808UL


struct QIB_7322_RxBufrUnCorErrLogB_0_pb {

        pseudo_bit_t RxBufrUnCorErrData_127_64[64];

};


struct QIB_7322_RxBufrUnCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogC_0_offset 0x00001810UL


struct QIB_7322_RxBufrUnCorErrLogC_0_pb {

        pseudo_bit_t RxBufrUnCorErrData_191_128[64];

};


struct QIB_7322_RxBufrUnCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogD_0_offset 0x00001818UL


struct QIB_7322_RxBufrUnCorErrLogD_0_pb {

        pseudo_bit_t RxBufrUnCorErrData_255_192[64];

};


struct QIB_7322_RxBufrUnCorErrLogD_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogD_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogE_0_offset 0x00001820UL


struct QIB_7322_RxBufrUnCorErrLogE_0_pb {

        pseudo_bit_t RxBufrUnCorErrData_258_256[3];

        pseudo_bit_t RxBufrUnCorErrCheckBit_36_0[37];

        pseudo_bit_t RxBufrUnCorErrAddr_15_0[16];

        pseudo_bit_t _unused_0[8];

};


struct QIB_7322_RxBufrUnCorErrLogE_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogE_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagUnCorErrLogA_0_offset 0x00001828UL


struct QIB_7322_RxFlagUnCorErrLogA_0_pb {

        pseudo_bit_t RxFlagUnCorErrData_63_0[64];

};


struct QIB_7322_RxFlagUnCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagUnCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagUnCorErrLogB_0_offset 0x00001830UL


struct QIB_7322_RxFlagUnCorErrLogB_0_pb {

        pseudo_bit_t RxFlagUnCorErrCheckBit_7_0[8];

        pseudo_bit_t RxFlagUnCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[43];

};


struct QIB_7322_RxFlagUnCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagUnCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqUnCorErrLogA_0_offset 0x00001840UL


struct QIB_7322_RxLkupiqUnCorErrLogA_0_pb {

        pseudo_bit_t RxLkupiqUnCorErrData_45_0[46];

        pseudo_bit_t RxLkupiqUnCorErrCheckBit_7_0[8];

        pseudo_bit_t _unused_0[10];

};


struct QIB_7322_RxLkupiqUnCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqUnCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqUnCorErrLogB_0_offset 0x00001848UL


struct QIB_7322_RxLkupiqUnCorErrLogB_0_pb {

        pseudo_bit_t RxLkupiqUnCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[51];

};


struct QIB_7322_RxLkupiqUnCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqUnCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoUnCorErrLogA_0_offset 0x00001850UL


struct QIB_7322_RxHdrFifoUnCorErrLogA_0_pb {

        pseudo_bit_t RxHdrFifoUnCorErrData_63_0[64];

};


struct QIB_7322_RxHdrFifoUnCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoUnCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoUnCorErrLogB_0_offset 0x00001858UL


struct QIB_7322_RxHdrFifoUnCorErrLogB_0_pb {

        pseudo_bit_t RxHdrFifoUnCorErrData_127_64[64];

};


struct QIB_7322_RxHdrFifoUnCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoUnCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoUnCorErrLogC_0_offset 0x00001860UL


struct QIB_7322_RxHdrFifoUnCorErrLogC_0_pb {

        pseudo_bit_t RxHdrFifoUnCorErrCheckBit_15_0[16];

        pseudo_bit_t RxHdrFifoUnCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxHdrFifoUnCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoUnCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoUnCorErrLogA_0_offset 0x00001868UL


struct QIB_7322_RxDataFifoUnCorErrLogA_0_pb {

        pseudo_bit_t RxDataFifoUnCorErrData_63_0[64];

};


struct QIB_7322_RxDataFifoUnCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoUnCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoUnCorErrLogB_0_offset 0x00001870UL


struct QIB_7322_RxDataFifoUnCorErrLogB_0_pb {

        pseudo_bit_t RxDataFifoUnCorErrData_127_64[64];

};


struct QIB_7322_RxDataFifoUnCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoUnCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoUnCorErrLogC_0_offset 0x00001878UL


struct QIB_7322_RxDataFifoUnCorErrLogC_0_pb {

        pseudo_bit_t RxDataFifoUnCorErrCheckBit_15_0[16];

        pseudo_bit_t RxDataFifoUnCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxDataFifoUnCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoUnCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_LaFifoArray0UnCorErrLog_0_offset 0x00001880UL


struct QIB_7322_LaFifoArray0UnCorErrLog_0_pb {

        pseudo_bit_t LaFifoArray0UnCorErrData_34_0[35];

        pseudo_bit_t LaFifoArray0UnCorErrCheckBit_10_0[11];

        pseudo_bit_t LaFifoArray0UnCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[7];

};


struct QIB_7322_LaFifoArray0UnCorErrLog_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LaFifoArray0UnCorErrLog_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayUnCorErrLogA_0_offset 0x000018c0UL


struct QIB_7322_RmFifoArrayUnCorErrLogA_0_pb {

        pseudo_bit_t RmFifoArrayUnCorErrData_63_0[64];

};


struct QIB_7322_RmFifoArrayUnCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayUnCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayUnCorErrLogB_0_offset 0x000018c8UL


struct QIB_7322_RmFifoArrayUnCorErrLogB_0_pb {

        pseudo_bit_t RmFifoArrayUnCorErrData_127_64[64];

};


struct QIB_7322_RmFifoArrayUnCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayUnCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayUnCorErrLogC_0_offset 0x000018d0UL


struct QIB_7322_RmFifoArrayUnCorErrLogC_0_pb {

        pseudo_bit_t RmFifoArrayUnCorErrCheckBit_27_0[28];

        pseudo_bit_t RmFifoArrayUnCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[18];

        pseudo_bit_t RmFifoArrayUnCorErrDword_3_0[4];

};


struct QIB_7322_RmFifoArrayUnCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayUnCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogA_0_offset 0x00001900UL


struct QIB_7322_RxBufrCorErrLogA_0_pb {

        pseudo_bit_t RxBufrCorErrData_63_0[64];

};


struct QIB_7322_RxBufrCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogB_0_offset 0x00001908UL


struct QIB_7322_RxBufrCorErrLogB_0_pb {

        pseudo_bit_t RxBufrCorErrData_127_64[64];

};


struct QIB_7322_RxBufrCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogC_0_offset 0x00001910UL


struct QIB_7322_RxBufrCorErrLogC_0_pb {

        pseudo_bit_t RxBufrCorErrData_191_128[64];

};


struct QIB_7322_RxBufrCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogD_0_offset 0x00001918UL


struct QIB_7322_RxBufrCorErrLogD_0_pb {

        pseudo_bit_t RxBufrCorErrData_255_192[64];

};


struct QIB_7322_RxBufrCorErrLogD_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogD_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogE_0_offset 0x00001920UL


struct QIB_7322_RxBufrCorErrLogE_0_pb {

        pseudo_bit_t RxBufrCorErrData_258_256[3];

        pseudo_bit_t RxBufrCorErrCheckBit_36_0[37];

        pseudo_bit_t RxBufrCorErrAddr_15_0[16];

        pseudo_bit_t _unused_0[8];

};


struct QIB_7322_RxBufrCorErrLogE_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogE_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagCorErrLogA_0_offset 0x00001928UL


struct QIB_7322_RxFlagCorErrLogA_0_pb {

        pseudo_bit_t RxFlagCorErrData_63_0[64];

};


struct QIB_7322_RxFlagCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagCorErrLogB_0_offset 0x00001930UL


struct QIB_7322_RxFlagCorErrLogB_0_pb {

        pseudo_bit_t RxFlagCorErrCheckBit_7_0[8];

        pseudo_bit_t RxFlagCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[43];

};


struct QIB_7322_RxFlagCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqCorErrLogA_0_offset 0x00001940UL


struct QIB_7322_RxLkupiqCorErrLogA_0_pb {

        pseudo_bit_t RxLkupiqCorErrData_45_0[46];

        pseudo_bit_t RxLkupiqCorErrCheckBit_7_0[8];

        pseudo_bit_t _unused_0[10];

};


struct QIB_7322_RxLkupiqCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqCorErrLogB_0_offset 0x00001948UL


struct QIB_7322_RxLkupiqCorErrLogB_0_pb {

        pseudo_bit_t RxLkupiqCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[51];

};


struct QIB_7322_RxLkupiqCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoCorErrLogA_0_offset 0x00001950UL


struct QIB_7322_RxHdrFifoCorErrLogA_0_pb {

        pseudo_bit_t RxHdrFifoCorErrData_63_0[64];

};


struct QIB_7322_RxHdrFifoCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoCorErrLogB_0_offset 0x00001958UL


struct QIB_7322_RxHdrFifoCorErrLogB_0_pb {

        pseudo_bit_t RxHdrFifoCorErrData_127_64[64];

};


struct QIB_7322_RxHdrFifoCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoCorErrLogC_0_offset 0x00001960UL


struct QIB_7322_RxHdrFifoCorErrLogC_0_pb {

        pseudo_bit_t RxHdrFifoCorErrCheckBit_15_0[16];

        pseudo_bit_t RxHdrFifoCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxHdrFifoCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoCorErrLogA_0_offset 0x00001968UL


struct QIB_7322_RxDataFifoCorErrLogA_0_pb {

        pseudo_bit_t RxDataFifoCorErrData_63_0[64];

};


struct QIB_7322_RxDataFifoCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoCorErrLogB_0_offset 0x00001970UL


struct QIB_7322_RxDataFifoCorErrLogB_0_pb {

        pseudo_bit_t RxDataFifoCorErrData_127_64[64];

};


struct QIB_7322_RxDataFifoCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoCorErrLogC_0_offset 0x00001978UL


struct QIB_7322_RxDataFifoCorErrLogC_0_pb {

        pseudo_bit_t RxDataFifoCorErrCheckBit_15_0[16];

        pseudo_bit_t RxDataFifoCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxDataFifoCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_LaFifoArray0CorErrLog_0_offset 0x00001980UL


struct QIB_7322_LaFifoArray0CorErrLog_0_pb {

        pseudo_bit_t LaFifoArray0CorErrData_34_0[35];

        pseudo_bit_t LaFifoArray0CorErrCheckBit_10_0[11];

        pseudo_bit_t LaFifoArray0CorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[7];

};


struct QIB_7322_LaFifoArray0CorErrLog_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LaFifoArray0CorErrLog_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayCorErrLogA_0_offset 0x000019c0UL


struct QIB_7322_RmFifoArrayCorErrLogA_0_pb {

        pseudo_bit_t RmFifoArrayCorErrData_63_0[64];

};


struct QIB_7322_RmFifoArrayCorErrLogA_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayCorErrLogA_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayCorErrLogB_0_offset 0x000019c8UL


struct QIB_7322_RmFifoArrayCorErrLogB_0_pb {

        pseudo_bit_t RmFifoArrayCorErrData_127_64[64];

};


struct QIB_7322_RmFifoArrayCorErrLogB_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayCorErrLogB_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayCorErrLogC_0_offset 0x000019d0UL


struct QIB_7322_RmFifoArrayCorErrLogC_0_pb {

        pseudo_bit_t RmFifoArrayCorErrCheckBit_27_0[28];

        pseudo_bit_t RmFifoArrayCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[18];

        pseudo_bit_t RmFifoArrayCorErrDword_3_0[4];

};


struct QIB_7322_RmFifoArrayCorErrLogC_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayCorErrLogC_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HighPriorityLimit_0_offset 0x00001bc0UL


struct QIB_7322_HighPriorityLimit_0_pb {

        pseudo_bit_t Limit[8];

        pseudo_bit_t _unused_0[56];

};


struct QIB_7322_HighPriorityLimit_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HighPriorityLimit_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_LowPriority0_0_offset 0x00001c00UL


struct QIB_7322_LowPriority0_0_pb {

        pseudo_bit_t Weight[8];

        pseudo_bit_t _unused_0[8];

        pseudo_bit_t VirtualLane[3];

        pseudo_bit_t _unused_1[45];

};


struct QIB_7322_LowPriority0_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LowPriority0_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HighPriority0_0_offset 0x00001e00UL


struct QIB_7322_HighPriority0_0_pb {

        pseudo_bit_t Weight[8];

        pseudo_bit_t _unused_0[8];

        pseudo_bit_t VirtualLane[3];

        pseudo_bit_t _unused_1[45];

};


struct QIB_7322_HighPriority0_0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HighPriority0_0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_CntrRegBase_1_offset 0x00002028UL

/* Default value: 0x0000000000013000 */


#define QIB_7322_ErrMask_1_offset 0x00002080UL


struct QIB_7322_ErrMask_1_pb {

        pseudo_bit_t RcvFormatErrMask[1];

        pseudo_bit_t RcvVCRCErrMask[1];

        pseudo_bit_t RcvICRCErrMask[1];

        pseudo_bit_t RcvMinPktLenErrMask[1];

        pseudo_bit_t RcvMaxPktLenErrMask[1];

        pseudo_bit_t RcvLongPktLenErrMask[1];

        pseudo_bit_t RcvShortPktLenErrMask[1];

        pseudo_bit_t RcvUnexpectedCharErrMask[1];

        pseudo_bit_t RcvUnsupportedVLErrMask[1];

        pseudo_bit_t RcvEBPErrMask[1];

        pseudo_bit_t RcvIBFlowErrMask[1];

        pseudo_bit_t RcvBadVersionErrMask[1];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvBadTidErrMask[1];

        pseudo_bit_t RcvHdrLenErrMask[1];

        pseudo_bit_t RcvHdrErrMask[1];

        pseudo_bit_t RcvIBLostLinkErrMask[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SendMinPktLenErrMask[1];

        pseudo_bit_t SendMaxPktLenErrMask[1];

        pseudo_bit_t SendUnderRunErrMask[1];

        pseudo_bit_t SendPktLenErrMask[1];

        pseudo_bit_t SendDroppedSmpPktErrMask[1];

        pseudo_bit_t SendDroppedDataPktErrMask[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t SendUnexpectedPktNumErrMask[1];

        pseudo_bit_t SendUnsupportedVLErrMask[1];

        pseudo_bit_t SendBufMisuseErrMask[1];

        pseudo_bit_t SDmaGenMismatchErrMask[1];

        pseudo_bit_t SDmaOutOfBoundErrMask[1];

        pseudo_bit_t SDmaTailOutOfBoundErrMask[1];

        pseudo_bit_t SDmaBaseErrMask[1];

        pseudo_bit_t SDma1stDescErrMask[1];

        pseudo_bit_t SDmaRpyTagErrMask[1];

        pseudo_bit_t SDmaDwEnErrMask[1];

        pseudo_bit_t SDmaMissingDwErrMask[1];

        pseudo_bit_t SDmaUnexpDataErrMask[1];

        pseudo_bit_t SDmaDescAddrMisalignErrMask[1];

        pseudo_bit_t SDmaHaltErrMask[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t VL15BufMisuseErrMask[1];

        pseudo_bit_t _unused_4[2];

        pseudo_bit_t SHeadersErrMask[1];

        pseudo_bit_t IBStatusChangedMask[1];

        pseudo_bit_t _unused_5[5];

};


struct QIB_7322_ErrMask_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrMask_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrStatus_1_offset 0x00002088UL


struct QIB_7322_ErrStatus_1_pb {

        pseudo_bit_t RcvFormatErr[1];

        pseudo_bit_t RcvVCRCErr[1];

        pseudo_bit_t RcvICRCErr[1];

        pseudo_bit_t RcvMinPktLenErr[1];

        pseudo_bit_t RcvMaxPktLenErr[1];

        pseudo_bit_t RcvLongPktLenErr[1];

        pseudo_bit_t RcvShortPktLenErr[1];

        pseudo_bit_t RcvUnexpectedCharErr[1];

        pseudo_bit_t RcvUnsupportedVLErr[1];

        pseudo_bit_t RcvEBPErr[1];

        pseudo_bit_t RcvIBFlowErr[1];

        pseudo_bit_t RcvBadVersionErr[1];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvBadTidErr[1];

        pseudo_bit_t RcvHdrLenErr[1];

        pseudo_bit_t RcvHdrErr[1];

        pseudo_bit_t RcvIBLostLinkErr[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SendMinPktLenErr[1];

        pseudo_bit_t SendMaxPktLenErr[1];

        pseudo_bit_t SendUnderRunErr[1];

        pseudo_bit_t SendPktLenErr[1];

        pseudo_bit_t SendDroppedSmpPktErr[1];

        pseudo_bit_t SendDroppedDataPktErr[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t SendUnexpectedPktNumErr[1];

        pseudo_bit_t SendUnsupportedVLErr[1];

        pseudo_bit_t SendBufMisuseErr[1];

        pseudo_bit_t SDmaGenMismatchErr[1];

        pseudo_bit_t SDmaOutOfBoundErr[1];

        pseudo_bit_t SDmaTailOutOfBoundErr[1];

        pseudo_bit_t SDmaBaseErr[1];

        pseudo_bit_t SDma1stDescErr[1];

        pseudo_bit_t SDmaRpyTagErr[1];

        pseudo_bit_t SDmaDwEnErr[1];

        pseudo_bit_t SDmaMissingDwErr[1];

        pseudo_bit_t SDmaUnexpDataErr[1];

        pseudo_bit_t SDmaDescAddrMisalignErr[1];

        pseudo_bit_t SDmaHaltErr[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t VL15BufMisuseErr[1];

        pseudo_bit_t _unused_4[2];

        pseudo_bit_t SHeadersErr[1];

        pseudo_bit_t IBStatusChanged[1];

        pseudo_bit_t _unused_5[5];

};


struct QIB_7322_ErrStatus_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrStatus_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ErrClear_1_offset 0x00002090UL


struct QIB_7322_ErrClear_1_pb {

        pseudo_bit_t RcvFormatErrClear[1];

        pseudo_bit_t RcvVCRCErrClear[1];

        pseudo_bit_t RcvICRCErrClear[1];

        pseudo_bit_t RcvMinPktLenErrClear[1];

        pseudo_bit_t RcvMaxPktLenErrClear[1];

        pseudo_bit_t RcvLongPktLenErrClear[1];

        pseudo_bit_t RcvShortPktLenErrClear[1];

        pseudo_bit_t RcvUnexpectedCharErrClear[1];

        pseudo_bit_t RcvUnsupportedVLErrClear[1];

        pseudo_bit_t RcvEBPErrClear[1];

        pseudo_bit_t RcvIBFlowErrClear[1];

        pseudo_bit_t RcvBadVersionErrClear[1];

        pseudo_bit_t _unused_0[2];

        pseudo_bit_t RcvBadTidErrClear[1];

        pseudo_bit_t RcvHdrLenErrClear[1];

        pseudo_bit_t RcvHdrErrClear[1];

        pseudo_bit_t RcvIBLostLinkErrClear[1];

        pseudo_bit_t _unused_1[11];

        pseudo_bit_t SendMinPktLenErrClear[1];

        pseudo_bit_t SendMaxPktLenErrClear[1];

        pseudo_bit_t SendUnderRunErrClear[1];

        pseudo_bit_t SendPktLenErrClear[1];

        pseudo_bit_t SendDroppedSmpPktErrClear[1];

        pseudo_bit_t SendDroppedDataPktErrClear[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t SendUnexpectedPktNumErrClear[1];

        pseudo_bit_t SendUnsupportedVLErrClear[1];

        pseudo_bit_t SendBufMisuseErrClear[1];

        pseudo_bit_t SDmaGenMismatchErrClear[1];

        pseudo_bit_t SDmaOutOfBoundErrClear[1];

        pseudo_bit_t SDmaTailOutOfBoundErrClear[1];

        pseudo_bit_t SDmaBaseErrClear[1];

        pseudo_bit_t SDma1stDescErrClear[1];

        pseudo_bit_t SDmaRpyTagErrClear[1];

        pseudo_bit_t SDmaDwEnErrClear[1];

        pseudo_bit_t SDmaMissingDwErrClear[1];

        pseudo_bit_t SDmaUnexpDataErrClear[1];

        pseudo_bit_t SDmaDescAddrMisalignErrClear[1];

        pseudo_bit_t SDmaHaltErrClear[1];

        pseudo_bit_t _unused_3[4];

        pseudo_bit_t VL15BufMisuseErrClear[1];

        pseudo_bit_t _unused_4[2];

        pseudo_bit_t SHeadersErrClear[1];

        pseudo_bit_t IBStatusChangedClear[1];

        pseudo_bit_t _unused_5[5];

};


struct QIB_7322_ErrClear_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ErrClear_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_TXEStatus_1_offset 0x000020b8UL


struct QIB_7322_TXEStatus_1_pb {

        pseudo_bit_t LaFifoEmpty_VL0[1];

        pseudo_bit_t LaFifoEmpty_VL1[1];

        pseudo_bit_t LaFifoEmpty_VL2[1];

        pseudo_bit_t LaFifoEmpty_VL3[1];

        pseudo_bit_t LaFifoEmpty_VL4[1];

        pseudo_bit_t LaFifoEmpty_VL5[1];

        pseudo_bit_t LaFifoEmpty_VL6[1];

        pseudo_bit_t LaFifoEmpty_VL7[1];

        pseudo_bit_t _unused_0[7];

        pseudo_bit_t LaFifoEmpty_VL15[1];

        pseudo_bit_t _unused_1[14];

        pseudo_bit_t RmFifoEmpty[1];

        pseudo_bit_t TXE_IBC_Idle[1];

        pseudo_bit_t _unused_2[32];

};


struct QIB_7322_TXEStatus_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_TXEStatus_1_pb );

};


/* Default value: 0x0000000XC00080FF */


#define QIB_7322_RcvCtrl_1_offset 0x00002100UL


struct QIB_7322_RcvCtrl_1_pb {

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t ContextEnableKernel[1];

        pseudo_bit_t ContextEnableUser[16];

        pseudo_bit_t _unused_1[21];

        pseudo_bit_t RcvIBPortEnable[1];

        pseudo_bit_t RcvQPMapEnable[1];

        pseudo_bit_t RcvPartitionKeyDisable[1];

        pseudo_bit_t RcvResetCredit[1];

        pseudo_bit_t _unused_2[21];

};


struct QIB_7322_RcvCtrl_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvCtrl_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvBTHQP_1_offset 0x00002108UL


struct QIB_7322_RcvBTHQP_1_pb {

        pseudo_bit_t RcvBTHQP[24];

        pseudo_bit_t _unused_0[40];

};


struct QIB_7322_RcvBTHQP_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvBTHQP_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableA_1_offset 0x00002110UL


struct QIB_7322_RcvQPMapTableA_1_pb {

        pseudo_bit_t RcvQPMapContext0[5];

        pseudo_bit_t RcvQPMapContext1[5];

        pseudo_bit_t RcvQPMapContext2[5];

        pseudo_bit_t RcvQPMapContext3[5];

        pseudo_bit_t RcvQPMapContext4[5];

        pseudo_bit_t RcvQPMapContext5[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableB_1_offset 0x00002118UL


struct QIB_7322_RcvQPMapTableB_1_pb {

        pseudo_bit_t RcvQPMapContext6[5];

        pseudo_bit_t RcvQPMapContext7[5];

        pseudo_bit_t RcvQPMapContext8[5];

        pseudo_bit_t RcvQPMapContext9[5];

        pseudo_bit_t RcvQPMapContext10[5];

        pseudo_bit_t RcvQPMapContext11[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableC_1_offset 0x00002120UL


struct QIB_7322_RcvQPMapTableC_1_pb {

        pseudo_bit_t RcvQPMapContext12[5];

        pseudo_bit_t RcvQPMapContext13[5];

        pseudo_bit_t RcvQPMapContext14[5];

        pseudo_bit_t RcvQPMapContext15[5];

        pseudo_bit_t RcvQPMapContext16[5];

        pseudo_bit_t RcvQPMapContext17[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableD_1_offset 0x00002128UL


struct QIB_7322_RcvQPMapTableD_1_pb {

        pseudo_bit_t RcvQPMapContext18[5];

        pseudo_bit_t RcvQPMapContext19[5];

        pseudo_bit_t RcvQPMapContext20[5];

        pseudo_bit_t RcvQPMapContext21[5];

        pseudo_bit_t RcvQPMapContext22[5];

        pseudo_bit_t RcvQPMapContext23[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableD_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableD_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableE_1_offset 0x00002130UL


struct QIB_7322_RcvQPMapTableE_1_pb {

        pseudo_bit_t RcvQPMapContext24[5];

        pseudo_bit_t RcvQPMapContext25[5];

        pseudo_bit_t RcvQPMapContext26[5];

        pseudo_bit_t RcvQPMapContext27[5];

        pseudo_bit_t RcvQPMapContext28[5];

        pseudo_bit_t RcvQPMapContext29[5];

        pseudo_bit_t _unused_0[34];

};


struct QIB_7322_RcvQPMapTableE_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableE_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMapTableF_1_offset 0x00002138UL


struct QIB_7322_RcvQPMapTableF_1_pb {

        pseudo_bit_t RcvQPMapContext30[5];

        pseudo_bit_t RcvQPMapContext31[5];

        pseudo_bit_t _unused_0[54];

};


struct QIB_7322_RcvQPMapTableF_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMapTableF_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_PSStat_1_offset 0x00002140UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSStart_1_offset 0x00002148UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSInterval_1_offset 0x00002150UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvStatus_1_offset 0x00002160UL


struct QIB_7322_RcvStatus_1_pb {

        pseudo_bit_t RxPktInProgress[1];

        pseudo_bit_t DmaeqBlockingContext[5];

        pseudo_bit_t _unused_0[58];

};


struct QIB_7322_RcvStatus_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvStatus_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvPartitionKey_1_offset 0x00002168UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvQPMulticastContext_1_offset 0x00002170UL


struct QIB_7322_RcvQPMulticastContext_1_pb {

        pseudo_bit_t RcvQpMcContext[5];

        pseudo_bit_t _unused_0[59];

};


struct QIB_7322_RcvQPMulticastContext_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvQPMulticastContext_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvPktLEDCnt_1_offset 0x00002178UL


struct QIB_7322_RcvPktLEDCnt_1_pb {

        pseudo_bit_t OFFperiod[32];

        pseudo_bit_t ONperiod[32];

};


struct QIB_7322_RcvPktLEDCnt_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvPktLEDCnt_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaIdleCnt_1_offset 0x00002180UL


struct QIB_7322_SendDmaIdleCnt_1_pb {

        pseudo_bit_t SendDmaIdleCnt[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaIdleCnt_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaIdleCnt_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaReloadCnt_1_offset 0x00002188UL


struct QIB_7322_SendDmaReloadCnt_1_pb {

        pseudo_bit_t SendDmaReloadCnt[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaReloadCnt_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaReloadCnt_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaDescCnt_1_offset 0x00002190UL


struct QIB_7322_SendDmaDescCnt_1_pb {

        pseudo_bit_t SendDmaDescCnt[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaDescCnt_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaDescCnt_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendCtrl_1_offset 0x000021c0UL


struct QIB_7322_SendCtrl_1_pb {

        pseudo_bit_t TxeAbortIbc[1];

        pseudo_bit_t TxeBypassIbc[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t SendEnable[1];

        pseudo_bit_t _unused_1[3];

        pseudo_bit_t ForceCreditUpToDate[1];

        pseudo_bit_t SDmaCleanup[1];

        pseudo_bit_t SDmaIntEnable[1];

        pseudo_bit_t SDmaSingleDescriptor[1];

        pseudo_bit_t SDmaEnable[1];

        pseudo_bit_t SDmaHalt[1];

        pseudo_bit_t TxeDrainLaFifo[1];

        pseudo_bit_t TxeDrainRmFifo[1];

        pseudo_bit_t IBVLArbiterEn[1];

        pseudo_bit_t _unused_2[48];

};


struct QIB_7322_SendCtrl_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendCtrl_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaBase_1_offset 0x000021f8UL


struct QIB_7322_SendDmaBase_1_pb {

        pseudo_bit_t SendDmaBase[48];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_SendDmaBase_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaBase_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaLenGen_1_offset 0x00002200UL


struct QIB_7322_SendDmaLenGen_1_pb {

        pseudo_bit_t Length[16];

        pseudo_bit_t Generation[3];

        pseudo_bit_t _unused_0[45];

};


struct QIB_7322_SendDmaLenGen_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaLenGen_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaTail_1_offset 0x00002208UL


struct QIB_7322_SendDmaTail_1_pb {

        pseudo_bit_t SendDmaTail[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendDmaTail_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaTail_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaHead_1_offset 0x00002210UL


struct QIB_7322_SendDmaHead_1_pb {

        pseudo_bit_t SendDmaHead[16];

        pseudo_bit_t _unused_0[16];

        pseudo_bit_t InternalSendDmaHead[16];

        pseudo_bit_t _unused_1[16];

};


struct QIB_7322_SendDmaHead_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaHead_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaHeadAddr_1_offset 0x00002218UL


struct QIB_7322_SendDmaHeadAddr_1_pb {

        pseudo_bit_t SendDmaHeadAddr[48];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_SendDmaHeadAddr_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaHeadAddr_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaBufMask0_1_offset 0x00002220UL


struct QIB_7322_SendDmaBufMask0_1_pb {

        pseudo_bit_t BufMask_63_0[64];

};


struct QIB_7322_SendDmaBufMask0_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaBufMask0_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaStatus_1_offset 0x00002238UL


struct QIB_7322_SendDmaStatus_1_pb {

        pseudo_bit_t SplFifoDescIndex[16];

        pseudo_bit_t SplFifoBufNum[8];

        pseudo_bit_t SplFifoFull[1];

        pseudo_bit_t SplFifoEmpty[1];

        pseudo_bit_t SplFifoDisarmed[1];

        pseudo_bit_t SplFifoReadyToGo[1];

        pseudo_bit_t ScbFetchDescFlag[1];

        pseudo_bit_t ScbEntryValid[1];

        pseudo_bit_t ScbEmpty[1];

        pseudo_bit_t ScbFull[1];

        pseudo_bit_t RpyTag_7_0[8];

        pseudo_bit_t RpyLowAddr_6_0[7];

        pseudo_bit_t ScbDescIndex_13_0[14];

        pseudo_bit_t InternalSDmaHalt[1];

        pseudo_bit_t HaltInProg[1];

        pseudo_bit_t ScoreBoardDrainInProg[1];

};


struct QIB_7322_SendDmaStatus_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaStatus_1_pb );

};


/* Default value: 0x0000000042000000 */


#define QIB_7322_SendDmaPriorityThld_1_offset 0x00002258UL


struct QIB_7322_SendDmaPriorityThld_1_pb {

        pseudo_bit_t PriorityThreshold[4];

        pseudo_bit_t _unused_0[60];

};


struct QIB_7322_SendDmaPriorityThld_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaPriorityThld_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendHdrErrSymptom_1_offset 0x00002260UL


struct QIB_7322_SendHdrErrSymptom_1_pb {

        pseudo_bit_t PacketTooSmall[1];

        pseudo_bit_t RawIPV6[1];

        pseudo_bit_t SLIDFail[1];

        pseudo_bit_t QPFail[1];

        pseudo_bit_t PkeyFail[1];

        pseudo_bit_t GRHFail[1];

        pseudo_bit_t NonKeyPacket[1];

        pseudo_bit_t _unused_0[57];

};


struct QIB_7322_SendHdrErrSymptom_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendHdrErrSymptom_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxCreditVL0_1_offset 0x00002280UL


struct QIB_7322_RxCreditVL0_1_pb {

        pseudo_bit_t RxMaxCreditVL[12];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t RxBufrConsumedVL[12];

        pseudo_bit_t _unused_1[36];

};


struct QIB_7322_RxCreditVL0_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxCreditVL0_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaBufUsed0_1_offset 0x00002480UL


struct QIB_7322_SendDmaBufUsed0_1_pb {

        pseudo_bit_t BufUsed_63_0[64];

};


struct QIB_7322_SendDmaBufUsed0_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaBufUsed0_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendDmaReqTagUsed_1_offset 0x00002498UL


struct QIB_7322_SendDmaReqTagUsed_1_pb {

        pseudo_bit_t ReqTagUsed_7_0[8];

        pseudo_bit_t _unused_0[56];

};


struct QIB_7322_SendDmaReqTagUsed_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendDmaReqTagUsed_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendCheckControl_1_offset 0x000024a8UL


struct QIB_7322_SendCheckControl_1_pb {

        pseudo_bit_t PacketTooSmall_En[1];

        pseudo_bit_t RawIPV6_En[1];

        pseudo_bit_t SLID_En[1];

        pseudo_bit_t BTHQP_En[1];

        pseudo_bit_t PKey_En[1];

        pseudo_bit_t _unused_0[59];

};


struct QIB_7322_SendCheckControl_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendCheckControl_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendIBSLIDMask_1_offset 0x000024b0UL


struct QIB_7322_SendIBSLIDMask_1_pb {

        pseudo_bit_t SendIBSLIDMask_15_0[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendIBSLIDMask_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendIBSLIDMask_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendIBSLIDAssign_1_offset 0x000024b8UL


struct QIB_7322_SendIBSLIDAssign_1_pb {

        pseudo_bit_t SendIBSLIDAssign_15_0[16];

        pseudo_bit_t _unused_0[48];

};


struct QIB_7322_SendIBSLIDAssign_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendIBSLIDAssign_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBCStatusA_1_offset 0x00002540UL


struct QIB_7322_IBCStatusA_1_pb {

        pseudo_bit_t LinkTrainingState[5];

        pseudo_bit_t LinkState[3];

        pseudo_bit_t LinkSpeedActive[1];

        pseudo_bit_t LinkWidthActive[1];

        pseudo_bit_t DDS_RXEQ_FAIL[1];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t IBRxLaneReversed[1];

        pseudo_bit_t IBTxLaneReversed[1];

        pseudo_bit_t ScrambleEn[1];

        pseudo_bit_t ScrambleCapRemote[1];

        pseudo_bit_t _unused_1[13];

        pseudo_bit_t LinkSpeedQDR[1];

        pseudo_bit_t TxReady[1];

        pseudo_bit_t _unused_2[1];

        pseudo_bit_t TxCreditOk_VL0[1];

        pseudo_bit_t TxCreditOk_VL1[1];

        pseudo_bit_t TxCreditOk_VL2[1];

        pseudo_bit_t TxCreditOk_VL3[1];

        pseudo_bit_t TxCreditOk_VL4[1];

        pseudo_bit_t TxCreditOk_VL5[1];

        pseudo_bit_t TxCreditOk_VL6[1];

        pseudo_bit_t TxCreditOk_VL7[1];

        pseudo_bit_t _unused_3[24];

};


struct QIB_7322_IBCStatusA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCStatusA_1_pb );

};


/* Default value: 0x0000000000000X02 */


#define QIB_7322_IBCStatusB_1_offset 0x00002548UL


struct QIB_7322_IBCStatusB_1_pb {

        pseudo_bit_t LinkRoundTripLatency[26];

        pseudo_bit_t ReqDDSLocalFromRmt[4];

        pseudo_bit_t RxEqLocalDevice[2];

        pseudo_bit_t heartbeat_crosstalk[4];

        pseudo_bit_t heartbeat_timed_out[1];

        pseudo_bit_t _unused_0[27];

};


struct QIB_7322_IBCStatusB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCStatusB_1_pb );

};


/* Default value: 0x00000000XXXXXXXX */


#define QIB_7322_IBCCtrlA_1_offset 0x00002560UL


struct QIB_7322_IBCCtrlA_1_pb {

        pseudo_bit_t FlowCtrlPeriod[8];

        pseudo_bit_t FlowCtrlWaterMark[8];

        pseudo_bit_t LinkInitCmd[3];

        pseudo_bit_t LinkCmd[2];

        pseudo_bit_t MaxPktLen[11];

        pseudo_bit_t PhyerrThreshold[4];

        pseudo_bit_t OverrunThreshold[4];

        pseudo_bit_t _unused_0[8];

        pseudo_bit_t NumVLane[3];

        pseudo_bit_t _unused_1[9];

        pseudo_bit_t IBStatIntReductionEn[1];

        pseudo_bit_t IBLinkEn[1];

        pseudo_bit_t LinkDownDefaultState[1];

        pseudo_bit_t Loopback[1];

};


struct QIB_7322_IBCCtrlA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCCtrlA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBCCtrlB_1_offset 0x00002568UL


struct QIB_7322_IBCCtrlB_1_pb {

        pseudo_bit_t IB_ENHANCED_MODE[1];

        pseudo_bit_t SD_SPEED[1];

        pseudo_bit_t SD_SPEED_SDR[1];

        pseudo_bit_t SD_SPEED_DDR[1];

        pseudo_bit_t SD_SPEED_QDR[1];

        pseudo_bit_t IB_NUM_CHANNELS[2];

        pseudo_bit_t IB_POLARITY_REV_SUPP[1];

        pseudo_bit_t IB_LANE_REV_SUPPORTED[1];

        pseudo_bit_t SD_RX_EQUAL_ENABLE[1];

        pseudo_bit_t SD_ADD_ENB[1];

        pseudo_bit_t SD_DDSV[1];

        pseudo_bit_t SD_DDS[4];

        pseudo_bit_t HRTBT_ENB[1];

        pseudo_bit_t HRTBT_AUTO[1];

        pseudo_bit_t HRTBT_PORT[8];

        pseudo_bit_t HRTBT_REQ[1];

        pseudo_bit_t IB_ENABLE_FILT_DPKT[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t IB_DLID[16];

        pseudo_bit_t IB_DLID_MASK[16];

};


struct QIB_7322_IBCCtrlB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCCtrlB_1_pb );

};


/* Default value: 0x00000000000305FF */


#define QIB_7322_IBCCtrlC_1_offset 0x00002570UL


struct QIB_7322_IBCCtrlC_1_pb {

        pseudo_bit_t IB_FRONT_PORCH[5];

        pseudo_bit_t IB_BACK_PORCH[5];

        pseudo_bit_t _unused_0[54];

};


struct QIB_7322_IBCCtrlC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBCCtrlC_1_pb );

};


/* Default value: 0x0000000000000301 */


#define QIB_7322_HRTBT_GUID_1_offset 0x00002588UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IB_SDTEST_IF_TX_1_offset 0x00002590UL


struct QIB_7322_IB_SDTEST_IF_TX_1_pb {

        pseudo_bit_t TS_T_TX_VALID[1];

        pseudo_bit_t TS_3_TX_VALID[1];

        pseudo_bit_t VL_CAP[2];

        pseudo_bit_t CREDIT_CHANGE[1];

        pseudo_bit_t _unused_0[6];

        pseudo_bit_t TS_TX_OPCODE[2];

        pseudo_bit_t TS_TX_SPEED[3];

        pseudo_bit_t _unused_1[16];

        pseudo_bit_t TS_TX_TX_CFG[16];

        pseudo_bit_t TS_TX_RX_CFG[16];

};


struct QIB_7322_IB_SDTEST_IF_TX_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IB_SDTEST_IF_TX_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IB_SDTEST_IF_RX_1_offset 0x00002598UL


struct QIB_7322_IB_SDTEST_IF_RX_1_pb {

        pseudo_bit_t TS_T_RX_VALID[1];

        pseudo_bit_t TS_3_RX_VALID[1];

        pseudo_bit_t _unused_0[14];

        pseudo_bit_t TS_RX_A[8];

        pseudo_bit_t TS_RX_B[8];

        pseudo_bit_t TS_RX_TX_CFG[16];

        pseudo_bit_t TS_RX_RX_CFG[16];

};


struct QIB_7322_IB_SDTEST_IF_RX_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IB_SDTEST_IF_RX_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBNCModeCtrl_1_offset 0x000025b8UL


struct QIB_7322_IBNCModeCtrl_1_pb {

        pseudo_bit_t TSMEnable_send_TS1[1];

        pseudo_bit_t TSMEnable_send_TS2[1];

        pseudo_bit_t TSMEnable_ignore_TSM_on_rx[1];

        pseudo_bit_t _unused_0[5];

        pseudo_bit_t TSMCode_TS1[9];

        pseudo_bit_t TSMCode_TS2[9];

        pseudo_bit_t _unused_1[6];

        pseudo_bit_t ScrambleCapLocal[1];

        pseudo_bit_t ScrambleCapRemoteMask[1];

        pseudo_bit_t ScrambleCapRemoteForce[1];

        pseudo_bit_t _unused_2[29];

};


struct QIB_7322_IBNCModeCtrl_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBNCModeCtrl_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_IBSerdesStatus_1_offset 0x000025d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBPCSConfig_1_offset 0x000025d8UL


struct QIB_7322_IBPCSConfig_1_pb {

        pseudo_bit_t tx_rx_reset[1];

        pseudo_bit_t xcv_treset[1];

        pseudo_bit_t xcv_rreset[1];

        pseudo_bit_t _unused_0[6];

        pseudo_bit_t link_sync_mask[10];

        pseudo_bit_t _unused_1[45];

};


struct QIB_7322_IBPCSConfig_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBPCSConfig_1_pb );

};


/* Default value: 0x0000000000000007 */


#define QIB_7322_IBSerdesCtrl_1_offset 0x000025e0UL


struct QIB_7322_IBSerdesCtrl_1_pb {

        pseudo_bit_t CMODE[7];

        pseudo_bit_t _unused_0[1];

        pseudo_bit_t TXIDLE[1];

        pseudo_bit_t RXPD[1];

        pseudo_bit_t TXPD[1];

        pseudo_bit_t PLLPD[1];

        pseudo_bit_t LPEN[1];

        pseudo_bit_t RXLOSEN[1];

        pseudo_bit_t _unused_1[1];

        pseudo_bit_t IB_LAT_MODE[1];

        pseudo_bit_t CGMODE[4];

        pseudo_bit_t CHANNEL_RESET_N[4];

        pseudo_bit_t DISABLE_RXLATOFF_SDR[1];

        pseudo_bit_t DISABLE_RXLATOFF_DDR[1];

        pseudo_bit_t DISABLE_RXLATOFF_QDR[1];

        pseudo_bit_t _unused_2[37];

};


struct QIB_7322_IBSerdesCtrl_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBSerdesCtrl_1_pb );

};


/* Default value: 0x0000000000FFA00F */


#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_offset 0x00002600UL


struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb {

        pseudo_bit_t txcn1_ena[3];

        pseudo_bit_t txcn1_xtra_emph0[2];

        pseudo_bit_t txcp1_ena[4];

        pseudo_bit_t txc0_ena[5];

        pseudo_bit_t txampcntl_d2a[4];

        pseudo_bit_t _unused_0[12];

        pseudo_bit_t reset_tx_deemphasis_override[1];

        pseudo_bit_t tx_override_deemphasis_select[1];

        pseudo_bit_t _unused_1[32];

};


struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_offset 0x00002640UL


struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb {

        pseudo_bit_t static_disable_rxenadfe_sdr_ch0[8];

        pseudo_bit_t static_disable_rxenadfe_sdr_ch1[8];

        pseudo_bit_t static_disable_rxenadfe_sdr_ch2[8];

        pseudo_bit_t static_disable_rxenadfe_sdr_ch3[8];

        pseudo_bit_t static_disable_rxenale_sdr_ch0[1];

        pseudo_bit_t static_disable_rxenale_sdr_ch1[1];

        pseudo_bit_t static_disable_rxenale_sdr_ch2[1];

        pseudo_bit_t static_disable_rxenale_sdr_ch3[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch0[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch1[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch2[1];

        pseudo_bit_t static_disable_rxenagain_sdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_offset 0x00002648UL


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb {

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch0[8];

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch1[8];

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch2[8];

        pseudo_bit_t dyn_disable_rxenadfe_sdr_ch3[8];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenale_sdr_ch3[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenagain_sdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_offset 0x00002650UL


struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb {

        pseudo_bit_t static_disable_rxenadfe_ddr_ch0[8];

        pseudo_bit_t static_disable_rxenadfe_ddr_ch1[8];

        pseudo_bit_t static_disable_rxenadfe_ddr_ch2[8];

        pseudo_bit_t static_disable_rxenadfe_ddr_ch3[8];

        pseudo_bit_t static_disable_rxenale_ddr_ch0[1];

        pseudo_bit_t static_disable_rxenale_ddr_ch1[1];

        pseudo_bit_t static_disable_rxenale_ddr_ch2[1];

        pseudo_bit_t static_disable_rxenale_ddr_ch3[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch0[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch1[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch2[1];

        pseudo_bit_t static_disable_rxenagain_ddr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_offset 0x00002658UL


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb {

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch0[8];

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch1[8];

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch2[8];

        pseudo_bit_t dyn_disable_rxenadfe_ddr_ch3[8];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch0[1];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch1[1];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch2[1];

        pseudo_bit_t dyn_disable_rxenale_ddr_ch3[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch0[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch1[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch2[1];

        pseudo_bit_t dyn_disable_rxenagain_ddr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_offset 0x00002660UL


struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb {

        pseudo_bit_t static_disable_rxenadfe_qdr_ch0[8];

        pseudo_bit_t static_disable_rxenadfe_qdr_ch1[8];

        pseudo_bit_t static_disable_rxenadfe_qdr_ch2[8];

        pseudo_bit_t static_disable_rxenadfe_qdr_ch3[8];

        pseudo_bit_t static_disable_rxenale_qdr_ch0[1];

        pseudo_bit_t static_disable_rxenale_qdr_ch1[1];

        pseudo_bit_t static_disable_rxenale_qdr_ch2[1];

        pseudo_bit_t static_disable_rxenale_qdr_ch3[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch0[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch1[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch2[1];

        pseudo_bit_t static_disable_rxenagain_qdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_offset 0x00002668UL


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb {

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch0[8];

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch1[8];

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch2[8];

        pseudo_bit_t dyn_disable_rxenadfe_qdr_ch3[8];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenale_qdr_ch3[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch0[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch1[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch2[1];

        pseudo_bit_t dyn_disable_rxenagain_qdr_ch3[1];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_1_offset 0x00002670UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogA_1_offset 0x00002800UL


struct QIB_7322_RxBufrUnCorErrLogA_1_pb {

        pseudo_bit_t RxBufrUnCorErrData_63_0[64];

};


struct QIB_7322_RxBufrUnCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogB_1_offset 0x00002808UL


struct QIB_7322_RxBufrUnCorErrLogB_1_pb {

        pseudo_bit_t RxBufrUnCorErrData_127_64[64];

};


struct QIB_7322_RxBufrUnCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogC_1_offset 0x00002810UL


struct QIB_7322_RxBufrUnCorErrLogC_1_pb {

        pseudo_bit_t RxBufrUnCorErrData_191_128[64];

};


struct QIB_7322_RxBufrUnCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogD_1_offset 0x00002818UL


struct QIB_7322_RxBufrUnCorErrLogD_1_pb {

        pseudo_bit_t RxBufrUnCorErrData_255_192[64];

};


struct QIB_7322_RxBufrUnCorErrLogD_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogD_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrUnCorErrLogE_1_offset 0x00002820UL


struct QIB_7322_RxBufrUnCorErrLogE_1_pb {

        pseudo_bit_t RxBufrUnCorErrData_258_256[3];

        pseudo_bit_t RxBufrUnCorErrCheckBit_36_0[37];

        pseudo_bit_t RxBufrUnCorErrAddr_15_0[16];

        pseudo_bit_t _unused_0[8];

};


struct QIB_7322_RxBufrUnCorErrLogE_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrUnCorErrLogE_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagUnCorErrLogA_1_offset 0x00002828UL


struct QIB_7322_RxFlagUnCorErrLogA_1_pb {

        pseudo_bit_t RxFlagUnCorErrData_63_0[64];

};


struct QIB_7322_RxFlagUnCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagUnCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagUnCorErrLogB_1_offset 0x00002830UL


struct QIB_7322_RxFlagUnCorErrLogB_1_pb {

        pseudo_bit_t RxFlagUnCorErrCheckBit_7_0[8];

        pseudo_bit_t RxFlagUnCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[43];

};


struct QIB_7322_RxFlagUnCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagUnCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqUnCorErrLogA_1_offset 0x00002840UL


struct QIB_7322_RxLkupiqUnCorErrLogA_1_pb {

        pseudo_bit_t RxLkupiqUnCorErrData_45_0[46];

        pseudo_bit_t RxLkupiqUnCorErrCheckBit_7_0[8];

        pseudo_bit_t _unused_0[10];

};


struct QIB_7322_RxLkupiqUnCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqUnCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqUnCorErrLogB_1_offset 0x00002848UL


struct QIB_7322_RxLkupiqUnCorErrLogB_1_pb {

        pseudo_bit_t RxLkupiqUnCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[51];

};


struct QIB_7322_RxLkupiqUnCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqUnCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoUnCorErrLogA_1_offset 0x00002850UL


struct QIB_7322_RxHdrFifoUnCorErrLogA_1_pb {

        pseudo_bit_t RxHdrFifoUnCorErrData_63_0[64];

};


struct QIB_7322_RxHdrFifoUnCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoUnCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoUnCorErrLogB_1_offset 0x00002858UL


struct QIB_7322_RxHdrFifoUnCorErrLogB_1_pb {

        pseudo_bit_t RxHdrFifoUnCorErrData_127_64[64];

};


struct QIB_7322_RxHdrFifoUnCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoUnCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoUnCorErrLogC_1_offset 0x00002860UL


struct QIB_7322_RxHdrFifoUnCorErrLogC_1_pb {

        pseudo_bit_t RxHdrFifoUnCorErrCheckBit_15_0[16];

        pseudo_bit_t RxHdrFifoUnCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxHdrFifoUnCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoUnCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoUnCorErrLogA_1_offset 0x00002868UL


struct QIB_7322_RxDataFifoUnCorErrLogA_1_pb {

        pseudo_bit_t RxDataFifoUnCorErrData_63_0[64];

};


struct QIB_7322_RxDataFifoUnCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoUnCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoUnCorErrLogB_1_offset 0x00002870UL


struct QIB_7322_RxDataFifoUnCorErrLogB_1_pb {

        pseudo_bit_t RxDataFifoUnCorErrData_127_64[64];

};


struct QIB_7322_RxDataFifoUnCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoUnCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoUnCorErrLogC_1_offset 0x00002878UL


struct QIB_7322_RxDataFifoUnCorErrLogC_1_pb {

        pseudo_bit_t RxDataFifoUnCorErrCheckBit_15_0[16];

        pseudo_bit_t RxDataFifoUnCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxDataFifoUnCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoUnCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_LaFifoArray0UnCorErrLog_1_offset 0x00002880UL


struct QIB_7322_LaFifoArray0UnCorErrLog_1_pb {

        pseudo_bit_t LaFifoArray0UnCorErrData_34_0[35];

        pseudo_bit_t LaFifoArray0UnCorErrCheckBit_10_0[11];

        pseudo_bit_t LaFifoArray0UnCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[7];

};


struct QIB_7322_LaFifoArray0UnCorErrLog_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LaFifoArray0UnCorErrLog_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayUnCorErrLogA_1_offset 0x000028c0UL


struct QIB_7322_RmFifoArrayUnCorErrLogA_1_pb {

        pseudo_bit_t RmFifoArrayUnCorErrData_63_0[64];

};


struct QIB_7322_RmFifoArrayUnCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayUnCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayUnCorErrLogB_1_offset 0x000028c8UL


struct QIB_7322_RmFifoArrayUnCorErrLogB_1_pb {

        pseudo_bit_t RmFifoArrayUnCorErrData_127_64[64];

};


struct QIB_7322_RmFifoArrayUnCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayUnCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayUnCorErrLogC_1_offset 0x000028d0UL


struct QIB_7322_RmFifoArrayUnCorErrLogC_1_pb {

        pseudo_bit_t RmFifoArrayUnCorErrCheckBit_27_0[28];

        pseudo_bit_t RmFifoArrayUnCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[18];

        pseudo_bit_t RmFifoArrayUnCorErrDword_3_0[4];

};


struct QIB_7322_RmFifoArrayUnCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayUnCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogA_1_offset 0x00002900UL


struct QIB_7322_RxBufrCorErrLogA_1_pb {

        pseudo_bit_t RxBufrCorErrData_63_0[64];

};


struct QIB_7322_RxBufrCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogB_1_offset 0x00002908UL


struct QIB_7322_RxBufrCorErrLogB_1_pb {

        pseudo_bit_t RxBufrCorErrData_127_64[64];

};


struct QIB_7322_RxBufrCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogC_1_offset 0x00002910UL


struct QIB_7322_RxBufrCorErrLogC_1_pb {

        pseudo_bit_t RxBufrCorErrData_191_128[64];

};


struct QIB_7322_RxBufrCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogD_1_offset 0x00002918UL


struct QIB_7322_RxBufrCorErrLogD_1_pb {

        pseudo_bit_t RxBufrCorErrData_255_192[64];

};


struct QIB_7322_RxBufrCorErrLogD_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogD_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufrCorErrLogE_1_offset 0x00002920UL


struct QIB_7322_RxBufrCorErrLogE_1_pb {

        pseudo_bit_t RxBufrCorErrData_258_256[3];

        pseudo_bit_t RxBufrCorErrCheckBit_36_0[37];

        pseudo_bit_t RxBufrCorErrAddr_15_0[16];

        pseudo_bit_t _unused_0[8];

};


struct QIB_7322_RxBufrCorErrLogE_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxBufrCorErrLogE_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagCorErrLogA_1_offset 0x00002928UL


struct QIB_7322_RxFlagCorErrLogA_1_pb {

        pseudo_bit_t RxFlagCorErrData_63_0[64];

};


struct QIB_7322_RxFlagCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlagCorErrLogB_1_offset 0x00002930UL


struct QIB_7322_RxFlagCorErrLogB_1_pb {

        pseudo_bit_t RxFlagCorErrCheckBit_7_0[8];

        pseudo_bit_t RxFlagCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[43];

};


struct QIB_7322_RxFlagCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxFlagCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqCorErrLogA_1_offset 0x00002940UL


struct QIB_7322_RxLkupiqCorErrLogA_1_pb {

        pseudo_bit_t RxLkupiqCorErrData_45_0[46];

        pseudo_bit_t RxLkupiqCorErrCheckBit_7_0[8];

        pseudo_bit_t _unused_0[10];

};


struct QIB_7322_RxLkupiqCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLkupiqCorErrLogB_1_offset 0x00002948UL


struct QIB_7322_RxLkupiqCorErrLogB_1_pb {

        pseudo_bit_t RxLkupiqCorErrAddr_12_0[13];

        pseudo_bit_t _unused_0[51];

};


struct QIB_7322_RxLkupiqCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxLkupiqCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoCorErrLogA_1_offset 0x00002950UL


struct QIB_7322_RxHdrFifoCorErrLogA_1_pb {

        pseudo_bit_t RxHdrFifoCorErrData_63_0[64];

};


struct QIB_7322_RxHdrFifoCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoCorErrLogB_1_offset 0x00002958UL


struct QIB_7322_RxHdrFifoCorErrLogB_1_pb {

        pseudo_bit_t RxHdrFifoCorErrData_127_64[64];

};


struct QIB_7322_RxHdrFifoCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxHdrFifoCorErrLogC_1_offset 0x00002960UL


struct QIB_7322_RxHdrFifoCorErrLogC_1_pb {

        pseudo_bit_t RxHdrFifoCorErrCheckBit_15_0[16];

        pseudo_bit_t RxHdrFifoCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxHdrFifoCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxHdrFifoCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoCorErrLogA_1_offset 0x00002968UL


struct QIB_7322_RxDataFifoCorErrLogA_1_pb {

        pseudo_bit_t RxDataFifoCorErrData_63_0[64];

};


struct QIB_7322_RxDataFifoCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoCorErrLogB_1_offset 0x00002970UL


struct QIB_7322_RxDataFifoCorErrLogB_1_pb {

        pseudo_bit_t RxDataFifoCorErrData_127_64[64];

};


struct QIB_7322_RxDataFifoCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataFifoCorErrLogC_1_offset 0x00002978UL


struct QIB_7322_RxDataFifoCorErrLogC_1_pb {

        pseudo_bit_t RxDataFifoCorErrCheckBit_15_0[16];

        pseudo_bit_t RxDataFifoCorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[37];

};


struct QIB_7322_RxDataFifoCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RxDataFifoCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_LaFifoArray0CorErrLog_1_offset 0x00002980UL


struct QIB_7322_LaFifoArray0CorErrLog_1_pb {

        pseudo_bit_t LaFifoArray0CorErrData_34_0[35];

        pseudo_bit_t LaFifoArray0CorErrCheckBit_10_0[11];

        pseudo_bit_t LaFifoArray0CorErrAddr_10_0[11];

        pseudo_bit_t _unused_0[7];

};


struct QIB_7322_LaFifoArray0CorErrLog_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LaFifoArray0CorErrLog_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayCorErrLogA_1_offset 0x000029c0UL


struct QIB_7322_RmFifoArrayCorErrLogA_1_pb {

        pseudo_bit_t RmFifoArrayCorErrData_63_0[64];

};


struct QIB_7322_RmFifoArrayCorErrLogA_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayCorErrLogA_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayCorErrLogB_1_offset 0x000029c8UL


struct QIB_7322_RmFifoArrayCorErrLogB_1_pb {

        pseudo_bit_t RmFifoArrayCorErrData_127_64[64];

};


struct QIB_7322_RmFifoArrayCorErrLogB_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayCorErrLogB_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RmFifoArrayCorErrLogC_1_offset 0x000029d0UL


struct QIB_7322_RmFifoArrayCorErrLogC_1_pb {

        pseudo_bit_t RmFifoArrayCorErrCheckBit_27_0[28];

        pseudo_bit_t RmFifoArrayCorErrAddr_13_0[14];

        pseudo_bit_t _unused_0[18];

        pseudo_bit_t RmFifoArrayCorErrDword_3_0[4];

};


struct QIB_7322_RmFifoArrayCorErrLogC_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RmFifoArrayCorErrLogC_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HighPriorityLimit_1_offset 0x00002bc0UL


struct QIB_7322_HighPriorityLimit_1_pb {

        pseudo_bit_t Limit[8];

        pseudo_bit_t _unused_0[56];

};


struct QIB_7322_HighPriorityLimit_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HighPriorityLimit_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_LowPriority0_1_offset 0x00002c00UL


struct QIB_7322_LowPriority0_1_pb {

        pseudo_bit_t Weight[8];

        pseudo_bit_t _unused_0[8];

        pseudo_bit_t VirtualLane[3];

        pseudo_bit_t _unused_1[45];

};


struct QIB_7322_LowPriority0_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_LowPriority0_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_HighPriority0_1_offset 0x00002e00UL


struct QIB_7322_HighPriority0_1_pb {

        pseudo_bit_t Weight[8];

        pseudo_bit_t _unused_0[8];

        pseudo_bit_t VirtualLane[3];

        pseudo_bit_t _unused_1[45];

};


struct QIB_7322_HighPriority0_1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_HighPriority0_1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufAvail0_offset 0x00003000UL


struct QIB_7322_SendBufAvail0_pb {

        pseudo_bit_t SendBuf_31_0[64];

};


struct QIB_7322_SendBufAvail0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_SendBufAvail0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixTable_offset 0x00008000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_MsixPba_offset 0x00009000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LAMemory_offset 0x0000a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LBIntCnt_offset 0x00011000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LBFlowStallCnt_offset 0x00011008UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTIDFullErrCnt_offset 0x000110d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTIDValidErrCnt_offset 0x000110d8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxP0HdrEgrOvflCnt_offset 0x000110e8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PcieRetryBufDiagQwordCnt_offset 0x000111a0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxTidFlowDropCnt_offset 0x000111e0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LBIntCnt_0_offset 0x00012000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxCreditUpToDateTimeOut_0_offset 0x00012008UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxSDmaDescCnt_0_offset 0x00012010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxUnsupVLErrCnt_0_offset 0x00012018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxDataPktCnt_0_offset 0x00012020UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxFlowPktCnt_0_offset 0x00012028UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxDwordCnt_0_offset 0x00012030UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxLenErrCnt_0_offset 0x00012038UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxMaxMinLenErrCnt_0_offset 0x00012040UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxUnderrunCnt_0_offset 0x00012048UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxFlowStallCnt_0_offset 0x00012050UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxDroppedPktCnt_0_offset 0x00012058UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDroppedPktCnt_0_offset 0x00012060UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataPktCnt_0_offset 0x00012068UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlowPktCnt_0_offset 0x00012070UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDwordCnt_0_offset 0x00012078UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLenErrCnt_0_offset 0x00012080UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxMaxMinLenErrCnt_0_offset 0x00012088UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxICRCErrCnt_0_offset 0x00012090UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVCRCErrCnt_0_offset 0x00012098UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlowCtrlViolCnt_0_offset 0x000120a0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVersionErrCnt_0_offset 0x000120a8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLinkMalformCnt_0_offset 0x000120b0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxEBPCnt_0_offset 0x000120b8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLPCRCErrCnt_0_offset 0x000120c0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufOvflCnt_0_offset 0x000120c8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLenTruncateCnt_0_offset 0x000120d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxPKeyMismatchCnt_0_offset 0x000120e0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBLinkDownedCnt_0_offset 0x00012180UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBSymbolErrCnt_0_offset 0x00012188UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBStatusChangeCnt_0_offset 0x00012190UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBLinkErrRecoveryCnt_0_offset 0x00012198UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_ExcessBufferOvflCnt_0_offset 0x000121a8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LocalLinkIntegrityErrCnt_0_offset 0x000121b0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVlErrCnt_0_offset 0x000121b8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDlidFltrCnt_0_offset 0x000121c0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVL15DroppedPktCnt_0_offset 0x000121c8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxOtherLocalPhyErrCnt_0_offset 0x000121d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxQPInvalidContextCnt_0_offset 0x000121d8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxHeadersErrCnt_0_offset 0x000121f8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSRcvDataCount_0_offset 0x00012218UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSRcvPktsCount_0_offset 0x00012220UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSXmitDataCount_0_offset 0x00012228UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSXmitPktsCount_0_offset 0x00012230UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSXmitWaitCount_0_offset 0x00012238UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LBIntCnt_1_offset 0x00013000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxCreditUpToDateTimeOut_1_offset 0x00013008UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxSDmaDescCnt_1_offset 0x00013010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxUnsupVLErrCnt_1_offset 0x00013018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxDataPktCnt_1_offset 0x00013020UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxFlowPktCnt_1_offset 0x00013028UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxDwordCnt_1_offset 0x00013030UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxLenErrCnt_1_offset 0x00013038UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxMaxMinLenErrCnt_1_offset 0x00013040UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxUnderrunCnt_1_offset 0x00013048UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxFlowStallCnt_1_offset 0x00013050UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxDroppedPktCnt_1_offset 0x00013058UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDroppedPktCnt_1_offset 0x00013060UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDataPktCnt_1_offset 0x00013068UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlowPktCnt_1_offset 0x00013070UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDwordCnt_1_offset 0x00013078UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLenErrCnt_1_offset 0x00013080UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxMaxMinLenErrCnt_1_offset 0x00013088UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxICRCErrCnt_1_offset 0x00013090UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVCRCErrCnt_1_offset 0x00013098UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxFlowCtrlViolCnt_1_offset 0x000130a0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVersionErrCnt_1_offset 0x000130a8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLinkMalformCnt_1_offset 0x000130b0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxEBPCnt_1_offset 0x000130b8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLPCRCErrCnt_1_offset 0x000130c0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxBufOvflCnt_1_offset 0x000130c8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxLenTruncateCnt_1_offset 0x000130d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxPKeyMismatchCnt_1_offset 0x000130e0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBLinkDownedCnt_1_offset 0x00013180UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBSymbolErrCnt_1_offset 0x00013188UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBStatusChangeCnt_1_offset 0x00013190UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBLinkErrRecoveryCnt_1_offset 0x00013198UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_ExcessBufferOvflCnt_1_offset 0x000131a8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LocalLinkIntegrityErrCnt_1_offset 0x000131b0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVlErrCnt_1_offset 0x000131b8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxDlidFltrCnt_1_offset 0x000131c0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxVL15DroppedPktCnt_1_offset 0x000131c8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxOtherLocalPhyErrCnt_1_offset 0x000131d0UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RxQPInvalidContextCnt_1_offset 0x000131d8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_TxHeadersErrCnt_1_offset 0x000131f8UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSRcvDataCount_1_offset 0x00013218UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSRcvPktsCount_1_offset 0x00013220UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSXmitDataCount_1_offset 0x00013228UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSXmitPktsCount_1_offset 0x00013230UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PSXmitWaitCount_1_offset 0x00013238UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrArray_offset 0x00014000UL


struct QIB_7322_RcvEgrArray_pb {

        pseudo_bit_t RT_Addr[37];

        pseudo_bit_t RT_BufSize[3];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_RcvEgrArray {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvEgrArray_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDArray0_offset 0x00050000UL


struct QIB_7322_RcvTIDArray0_pb {

        pseudo_bit_t RT_Addr[37];

        pseudo_bit_t RT_BufSize[3];

        pseudo_bit_t _unused_0[24];

};


struct QIB_7322_RcvTIDArray0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDArray0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_SendPbcCache_offset 0x00070000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LaunchFIFO_v0p0_offset 0x00072000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LaunchElement_v15p0_offset 0x00076000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PreLaunchFIFO_0_offset 0x00076100UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_ScoreBoard_0_offset 0x00076200UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_DescriptorFIFO_0_offset 0x00076300UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LaunchFIFO_v0p1_offset 0x00078000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_LaunchElement_v15p1_offset 0x0007c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PreLaunchFIFO_1_offset 0x0007c100UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_ScoreBoard_1_offset 0x0007c200UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_DescriptorFIFO_1_offset 0x0007c300UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvBufA_0_offset 0x00080000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvBufB_0_offset 0x00088000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvFlags_0_offset 0x0008a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvLookupiqBuf_0_offset 0x0008c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvDMADatBuf_0_offset 0x0008e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvDMAHdrBuf_0_offset 0x0008e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvBufA_1_offset 0x00090000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvBufB_1_offset 0x00098000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvFlags_1_offset 0x0009a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvLookupiqBuf_1_offset 0x0009c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvDMADatBuf_1_offset 0x0009e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvDMAHdrBuf_1_offset 0x0009e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIERcvBuf_offset 0x000a0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIERetryBuf_offset 0x000a4000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIERcvBufRdToWrAddr_offset 0x000a8000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIERcvHdrRdToWrAddr_offset 0x000b0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIECplBuf_offset 0x000b8000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIECplHdr_offset 0x000bc000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_PCIERcvHdr_offset 0x000bc200UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_IBSD_DDS_MAP_TABLE_0_offset 0x000d0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_0_offset 0x00100000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_0_offset 0x00100800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_1_offset 0x00101000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_1_offset 0x00101800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_2_offset 0x00102000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_2_offset 0x00102800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_3_offset 0x00103000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_3_offset 0x00103800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_4_offset 0x00104000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_4_offset 0x00104800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_5_offset 0x00105000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_5_offset 0x00105800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_6_offset 0x00106000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_6_offset 0x00106800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_7_offset 0x00107000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_7_offset 0x00107800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_8_offset 0x00108000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_8_offset 0x00108800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_9_offset 0x00109000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_9_offset 0x00109800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_10_offset 0x0010a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_10_offset 0x0010a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_11_offset 0x0010b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_11_offset 0x0010b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_12_offset 0x0010c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_12_offset 0x0010c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_13_offset 0x0010d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_13_offset 0x0010d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_14_offset 0x0010e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_14_offset 0x0010e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_15_offset 0x0010f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_15_offset 0x0010f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_16_offset 0x00110000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_16_offset 0x00110800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_17_offset 0x00111000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_17_offset 0x00111800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_18_offset 0x00112000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_18_offset 0x00112800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_19_offset 0x00113000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_19_offset 0x00113800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_20_offset 0x00114000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_20_offset 0x00114800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_21_offset 0x00115000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_21_offset 0x00115800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_22_offset 0x00116000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_22_offset 0x00116800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_23_offset 0x00117000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_23_offset 0x00117800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_24_offset 0x00118000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_24_offset 0x00118800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_25_offset 0x00119000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_25_offset 0x00119800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_26_offset 0x0011a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_26_offset 0x0011a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_27_offset 0x0011b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_27_offset 0x0011b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_28_offset 0x0011c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_28_offset 0x0011c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_29_offset 0x0011d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_29_offset 0x0011d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_30_offset 0x0011e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_30_offset 0x0011e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_31_offset 0x0011f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_31_offset 0x0011f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_32_offset 0x00120000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_32_offset 0x00120800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_33_offset 0x00121000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_33_offset 0x00121800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_34_offset 0x00122000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_34_offset 0x00122800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_35_offset 0x00123000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_35_offset 0x00123800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_36_offset 0x00124000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_36_offset 0x00124800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_37_offset 0x00125000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_37_offset 0x00125800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_38_offset 0x00126000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_38_offset 0x00126800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_39_offset 0x00127000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_39_offset 0x00127800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_40_offset 0x00128000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_40_offset 0x00128800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_41_offset 0x00129000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_41_offset 0x00129800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_42_offset 0x0012a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_42_offset 0x0012a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_43_offset 0x0012b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_43_offset 0x0012b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_44_offset 0x0012c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_44_offset 0x0012c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_45_offset 0x0012d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_45_offset 0x0012d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_46_offset 0x0012e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_46_offset 0x0012e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_47_offset 0x0012f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_47_offset 0x0012f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_48_offset 0x00130000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_48_offset 0x00130800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_49_offset 0x00131000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_49_offset 0x00131800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_50_offset 0x00132000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_50_offset 0x00132800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_51_offset 0x00133000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_51_offset 0x00133800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_52_offset 0x00134000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_52_offset 0x00134800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_53_offset 0x00135000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_53_offset 0x00135800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_54_offset 0x00136000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_54_offset 0x00136800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_55_offset 0x00137000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_55_offset 0x00137800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_56_offset 0x00138000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_56_offset 0x00138800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_57_offset 0x00139000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_57_offset 0x00139800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_58_offset 0x0013a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_58_offset 0x0013a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_59_offset 0x0013b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_59_offset 0x0013b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_60_offset 0x0013c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_60_offset 0x0013c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_61_offset 0x0013d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_61_offset 0x0013d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_62_offset 0x0013e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_62_offset 0x0013e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_63_offset 0x0013f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_63_offset 0x0013f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_64_offset 0x00140000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_64_offset 0x00140800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_65_offset 0x00141000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_65_offset 0x00141800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_66_offset 0x00142000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_66_offset 0x00142800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_67_offset 0x00143000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_67_offset 0x00143800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_68_offset 0x00144000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_68_offset 0x00144800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_69_offset 0x00145000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_69_offset 0x00145800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_70_offset 0x00146000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_70_offset 0x00146800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_71_offset 0x00147000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_71_offset 0x00147800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_72_offset 0x00148000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_72_offset 0x00148800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_73_offset 0x00149000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_73_offset 0x00149800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_74_offset 0x0014a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_74_offset 0x0014a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_75_offset 0x0014b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_75_offset 0x0014b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_76_offset 0x0014c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_76_offset 0x0014c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_77_offset 0x0014d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_77_offset 0x0014d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_78_offset 0x0014e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_78_offset 0x0014e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_79_offset 0x0014f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_79_offset 0x0014f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_80_offset 0x00150000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_80_offset 0x00150800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_81_offset 0x00151000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_81_offset 0x00151800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_82_offset 0x00152000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_82_offset 0x00152800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_83_offset 0x00153000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_83_offset 0x00153800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_84_offset 0x00154000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_84_offset 0x00154800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_85_offset 0x00155000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_85_offset 0x00155800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_86_offset 0x00156000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_86_offset 0x00156800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_87_offset 0x00157000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_87_offset 0x00157800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_88_offset 0x00158000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_88_offset 0x00158800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_89_offset 0x00159000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_89_offset 0x00159800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_90_offset 0x0015a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_90_offset 0x0015a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_91_offset 0x0015b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_91_offset 0x0015b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_92_offset 0x0015c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_92_offset 0x0015c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_93_offset 0x0015d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_93_offset 0x0015d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_94_offset 0x0015e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_94_offset 0x0015e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_95_offset 0x0015f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_95_offset 0x0015f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_96_offset 0x00160000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_96_offset 0x00160800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_97_offset 0x00161000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_97_offset 0x00161800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_98_offset 0x00162000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_98_offset 0x00162800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_99_offset 0x00163000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_99_offset 0x00163800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_100_offset 0x00164000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_100_offset 0x00164800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_101_offset 0x00165000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_101_offset 0x00165800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_102_offset 0x00166000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_102_offset 0x00166800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_103_offset 0x00167000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_103_offset 0x00167800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_104_offset 0x00168000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_104_offset 0x00168800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_105_offset 0x00169000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_105_offset 0x00169800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_106_offset 0x0016a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_106_offset 0x0016a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_107_offset 0x0016b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_107_offset 0x0016b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_108_offset 0x0016c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_108_offset 0x0016c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_109_offset 0x0016d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_109_offset 0x0016d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_110_offset 0x0016e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_110_offset 0x0016e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_111_offset 0x0016f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_111_offset 0x0016f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_112_offset 0x00170000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_112_offset 0x00170800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_113_offset 0x00171000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_113_offset 0x00171800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_114_offset 0x00172000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_114_offset 0x00172800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_115_offset 0x00173000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_115_offset 0x00173800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_116_offset 0x00174000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_116_offset 0x00174800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_117_offset 0x00175000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_117_offset 0x00175800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_118_offset 0x00176000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_118_offset 0x00176800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_119_offset 0x00177000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_119_offset 0x00177800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_120_offset 0x00178000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_120_offset 0x00178800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_121_offset 0x00179000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_121_offset 0x00179800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_122_offset 0x0017a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_122_offset 0x0017a800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_123_offset 0x0017b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_123_offset 0x0017b800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_124_offset 0x0017c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_124_offset 0x0017c800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_125_offset 0x0017d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_125_offset 0x0017d800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_126_offset 0x0017e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_126_offset 0x0017e800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_127_offset 0x0017f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_127_offset 0x0017f800UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_128_offset 0x00180000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_128_offset 0x00181000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_129_offset 0x00182000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_129_offset 0x00183000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_130_offset 0x00184000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_130_offset 0x00185000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_131_offset 0x00186000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_131_offset 0x00187000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_132_offset 0x00188000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_132_offset 0x00189000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_133_offset 0x0018a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_133_offset 0x0018b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_134_offset 0x0018c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_134_offset 0x0018d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_135_offset 0x0018e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_135_offset 0x0018f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_136_offset 0x00190000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_136_offset 0x00191000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_137_offset 0x00192000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_137_offset 0x00193000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_138_offset 0x00194000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_138_offset 0x00195000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_139_offset 0x00196000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_139_offset 0x00197000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_140_offset 0x00198000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_140_offset 0x00199000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_141_offset 0x0019a000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_141_offset 0x0019b000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_142_offset 0x0019c000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_142_offset 0x0019d000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_143_offset 0x0019e000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_143_offset 0x0019f000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_144_offset 0x001a0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_144_offset 0x001a1000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_145_offset 0x001a2000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_145_offset 0x001a3000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_146_offset 0x001a4000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_146_offset 0x001a5000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_147_offset 0x001a6000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_147_offset 0x001a7000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_148_offset 0x001a8000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_148_offset 0x001a9000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_149_offset 0x001aa000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_149_offset 0x001ab000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_150_offset 0x001ac000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_150_offset 0x001ad000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_151_offset 0x001ae000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_151_offset 0x001af000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_152_offset 0x001b0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_152_offset 0x001b1000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_153_offset 0x001b2000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_153_offset 0x001b3000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_154_offset 0x001b4000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_154_offset 0x001b5000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_155_offset 0x001b6000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_155_offset 0x001b7000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_156_offset 0x001b8000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_156_offset 0x001b9000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_157_offset 0x001ba000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_157_offset 0x001bb000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_158_offset 0x001bc000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_158_offset 0x001bd000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufMA_159_offset 0x001be000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufEA_159_offset 0x001bf000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_SendBufVL15_0_offset 0x001c0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail0_offset 0x00200000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead0_offset 0x00200008UL


struct QIB_7322_RcvHdrHead0_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail0_offset 0x00200010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead0_offset 0x00200018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable0_offset 0x00201000UL


struct QIB_7322_RcvTIDFlowTable0_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable0 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable0_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail1_offset 0x00210000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead1_offset 0x00210008UL


struct QIB_7322_RcvHdrHead1_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail1_offset 0x00210010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead1_offset 0x00210018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable1_offset 0x00211000UL


struct QIB_7322_RcvTIDFlowTable1_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable1 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable1_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail2_offset 0x00220000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead2_offset 0x00220008UL


struct QIB_7322_RcvHdrHead2_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead2 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead2_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail2_offset 0x00220010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead2_offset 0x00220018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable2_offset 0x00221000UL


struct QIB_7322_RcvTIDFlowTable2_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable2 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable2_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail3_offset 0x00230000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead3_offset 0x00230008UL


struct QIB_7322_RcvHdrHead3_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead3 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead3_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail3_offset 0x00230010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead3_offset 0x00230018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable3_offset 0x00231000UL


struct QIB_7322_RcvTIDFlowTable3_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable3 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable3_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail4_offset 0x00240000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead4_offset 0x00240008UL


struct QIB_7322_RcvHdrHead4_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead4 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead4_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail4_offset 0x00240010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead4_offset 0x00240018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable4_offset 0x00241000UL


struct QIB_7322_RcvTIDFlowTable4_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable4 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable4_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail5_offset 0x00250000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead5_offset 0x00250008UL


struct QIB_7322_RcvHdrHead5_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead5 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead5_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail5_offset 0x00250010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead5_offset 0x00250018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable5_offset 0x00251000UL


struct QIB_7322_RcvTIDFlowTable5_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable5 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable5_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail6_offset 0x00260000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead6_offset 0x00260008UL


struct QIB_7322_RcvHdrHead6_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead6 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead6_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail6_offset 0x00260010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead6_offset 0x00260018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable6_offset 0x00261000UL


struct QIB_7322_RcvTIDFlowTable6_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable6 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable6_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail7_offset 0x00270000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead7_offset 0x00270008UL


struct QIB_7322_RcvHdrHead7_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead7 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead7_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail7_offset 0x00270010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead7_offset 0x00270018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable7_offset 0x00271000UL


struct QIB_7322_RcvTIDFlowTable7_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable7 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable7_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail8_offset 0x00280000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead8_offset 0x00280008UL


struct QIB_7322_RcvHdrHead8_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead8 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead8_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail8_offset 0x00280010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead8_offset 0x00280018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable8_offset 0x00281000UL


struct QIB_7322_RcvTIDFlowTable8_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable8 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable8_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail9_offset 0x00290000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead9_offset 0x00290008UL


struct QIB_7322_RcvHdrHead9_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead9 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead9_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail9_offset 0x00290010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead9_offset 0x00290018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable9_offset 0x00291000UL


struct QIB_7322_RcvTIDFlowTable9_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable9 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable9_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail10_offset 0x002a0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead10_offset 0x002a0008UL


struct QIB_7322_RcvHdrHead10_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead10 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead10_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail10_offset 0x002a0010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead10_offset 0x002a0018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable10_offset 0x002a1000UL


struct QIB_7322_RcvTIDFlowTable10_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable10 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable10_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail11_offset 0x002b0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead11_offset 0x002b0008UL


struct QIB_7322_RcvHdrHead11_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead11 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead11_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail11_offset 0x002b0010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead11_offset 0x002b0018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable11_offset 0x002b1000UL


struct QIB_7322_RcvTIDFlowTable11_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable11 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable11_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail12_offset 0x002c0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead12_offset 0x002c0008UL


struct QIB_7322_RcvHdrHead12_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead12 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead12_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail12_offset 0x002c0010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead12_offset 0x002c0018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable12_offset 0x002c1000UL


struct QIB_7322_RcvTIDFlowTable12_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable12 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable12_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail13_offset 0x002d0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead13_offset 0x002d0008UL


struct QIB_7322_RcvHdrHead13_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead13 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead13_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail13_offset 0x002d0010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead13_offset 0x002d0018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable13_offset 0x002d1000UL


struct QIB_7322_RcvTIDFlowTable13_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable13 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable13_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail14_offset 0x002e0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead14_offset 0x002e0008UL


struct QIB_7322_RcvHdrHead14_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead14 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead14_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail14_offset 0x002e0010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead14_offset 0x002e0018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable14_offset 0x002e1000UL


struct QIB_7322_RcvTIDFlowTable14_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable14 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable14_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail15_offset 0x002f0000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead15_offset 0x002f0008UL


struct QIB_7322_RcvHdrHead15_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead15 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead15_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail15_offset 0x002f0010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead15_offset 0x002f0018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable15_offset 0x002f1000UL


struct QIB_7322_RcvTIDFlowTable15_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable15 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable15_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail16_offset 0x00300000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead16_offset 0x00300008UL


struct QIB_7322_RcvHdrHead16_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead16 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead16_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail16_offset 0x00300010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead16_offset 0x00300018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable16_offset 0x00301000UL


struct QIB_7322_RcvTIDFlowTable16_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable16 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable16_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrTail17_offset 0x00310000UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvHdrHead17_offset 0x00310008UL


struct QIB_7322_RcvHdrHead17_pb {

        pseudo_bit_t RcvHeadPointer[32];

        pseudo_bit_t counter[16];

        pseudo_bit_t _unused_0[16];

};


struct QIB_7322_RcvHdrHead17 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvHdrHead17_pb );

};


/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexTail17_offset 0x00310010UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvEgrIndexHead17_offset 0x00310018UL

/* Default value: 0x0000000000000000 */


#define QIB_7322_RcvTIDFlowTable17_offset 0x00311000UL


struct QIB_7322_RcvTIDFlowTable17_pb {

        pseudo_bit_t SeqNum[11];

        pseudo_bit_t GenVal[8];

        pseudo_bit_t FlowValid[1];

        pseudo_bit_t HdrSuppEnabled[1];

        pseudo_bit_t KeepAfterSeqErr[1];

        pseudo_bit_t KeepOnGenErr[1];

        pseudo_bit_t _unused_0[4];

        pseudo_bit_t SeqMismatch[1];

        pseudo_bit_t GenMismatch[1];

        pseudo_bit_t _unused_1[35];

};


struct QIB_7322_RcvTIDFlowTable17 {

        PSEUDO_BIT_STRUCT ( struct QIB_7322_RcvTIDFlowTable17_pb );

};


/* Default value: 0x0000000000000000 */


FILE_LICENCE
#define FILE_LICENCE(_licence)
Declare a particular licence as applying to a file.
Definition compiler.h:896

pseudo_bit_t
unsigned char pseudo_bit_t
Datatype used to represent a bit in the pseudo-structures.
Definition nx_bitops.h:37

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb
Definition qib_7322_regs.h:3384

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenale_ddr_ch2
pseudo_bit_t dyn_disable_rxenale_ddr_ch2[1]
Definition qib_7322_regs.h:3391

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenadfe_ddr_ch3
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch3[8]
Definition qib_7322_regs.h:3388

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenale_ddr_ch1
pseudo_bit_t dyn_disable_rxenale_ddr_ch1[1]
Definition qib_7322_regs.h:3390

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenagain_ddr_ch0
pseudo_bit_t dyn_disable_rxenagain_ddr_ch0[1]
Definition qib_7322_regs.h:3393

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenale_ddr_ch0
pseudo_bit_t dyn_disable_rxenale_ddr_ch0[1]
Definition qib_7322_regs.h:3389

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3397

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenadfe_ddr_ch2
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch2[8]
Definition qib_7322_regs.h:3387

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenagain_ddr_ch2
pseudo_bit_t dyn_disable_rxenagain_ddr_ch2[1]
Definition qib_7322_regs.h:3395

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenagain_ddr_ch1
pseudo_bit_t dyn_disable_rxenagain_ddr_ch1[1]
Definition qib_7322_regs.h:3394

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenadfe_ddr_ch1
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch1[8]
Definition qib_7322_regs.h:3386

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenale_ddr_ch3
pseudo_bit_t dyn_disable_rxenale_ddr_ch3[1]
Definition qib_7322_regs.h:3392

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenagain_ddr_ch3
pseudo_bit_t dyn_disable_rxenagain_ddr_ch3[1]
Definition qib_7322_regs.h:3396

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb::dyn_disable_rxenadfe_ddr_ch0
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch0[8]
Definition qib_7322_regs.h:3385

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0
Definition qib_7322_regs.h:3399

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_pb)

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb
Definition qib_7322_regs.h:4714

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:4727

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenadfe_ddr_ch0
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch0[8]
Definition qib_7322_regs.h:4715

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenale_ddr_ch3
pseudo_bit_t dyn_disable_rxenale_ddr_ch3[1]
Definition qib_7322_regs.h:4722

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenadfe_ddr_ch2
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch2[8]
Definition qib_7322_regs.h:4717

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenale_ddr_ch0
pseudo_bit_t dyn_disable_rxenale_ddr_ch0[1]
Definition qib_7322_regs.h:4719

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenale_ddr_ch1
pseudo_bit_t dyn_disable_rxenale_ddr_ch1[1]
Definition qib_7322_regs.h:4720

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenagain_ddr_ch3
pseudo_bit_t dyn_disable_rxenagain_ddr_ch3[1]
Definition qib_7322_regs.h:4726

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenagain_ddr_ch1
pseudo_bit_t dyn_disable_rxenagain_ddr_ch1[1]
Definition qib_7322_regs.h:4724

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenale_ddr_ch2
pseudo_bit_t dyn_disable_rxenale_ddr_ch2[1]
Definition qib_7322_regs.h:4721

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenadfe_ddr_ch3
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch3[8]
Definition qib_7322_regs.h:4718

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenagain_ddr_ch0
pseudo_bit_t dyn_disable_rxenagain_ddr_ch0[1]
Definition qib_7322_regs.h:4723

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenadfe_ddr_ch1
pseudo_bit_t dyn_disable_rxenadfe_ddr_ch1[8]
Definition qib_7322_regs.h:4716

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb::dyn_disable_rxenagain_ddr_ch2
pseudo_bit_t dyn_disable_rxenagain_ddr_ch2[1]
Definition qib_7322_regs.h:4725

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1
Definition qib_7322_regs.h:4729

QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_1_pb)

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb
Definition qib_7322_regs.h:3426

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenadfe_qdr_ch2
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch2[8]
Definition qib_7322_regs.h:3429

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenagain_qdr_ch3
pseudo_bit_t dyn_disable_rxenagain_qdr_ch3[1]
Definition qib_7322_regs.h:3438

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenale_qdr_ch2
pseudo_bit_t dyn_disable_rxenale_qdr_ch2[1]
Definition qib_7322_regs.h:3433

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenagain_qdr_ch0
pseudo_bit_t dyn_disable_rxenagain_qdr_ch0[1]
Definition qib_7322_regs.h:3435

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenadfe_qdr_ch1
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch1[8]
Definition qib_7322_regs.h:3428

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenale_qdr_ch3
pseudo_bit_t dyn_disable_rxenale_qdr_ch3[1]
Definition qib_7322_regs.h:3434

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenadfe_qdr_ch0
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch0[8]
Definition qib_7322_regs.h:3427

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenadfe_qdr_ch3
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch3[8]
Definition qib_7322_regs.h:3430

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenagain_qdr_ch2
pseudo_bit_t dyn_disable_rxenagain_qdr_ch2[1]
Definition qib_7322_regs.h:3437

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenale_qdr_ch1
pseudo_bit_t dyn_disable_rxenale_qdr_ch1[1]
Definition qib_7322_regs.h:3432

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenale_qdr_ch0
pseudo_bit_t dyn_disable_rxenale_qdr_ch0[1]
Definition qib_7322_regs.h:3431

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3439

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb::dyn_disable_rxenagain_qdr_ch1
pseudo_bit_t dyn_disable_rxenagain_qdr_ch1[1]
Definition qib_7322_regs.h:3436

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0
Definition qib_7322_regs.h:3441

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_pb)

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb
Definition qib_7322_regs.h:4756

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenale_qdr_ch3
pseudo_bit_t dyn_disable_rxenale_qdr_ch3[1]
Definition qib_7322_regs.h:4764

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenale_qdr_ch2
pseudo_bit_t dyn_disable_rxenale_qdr_ch2[1]
Definition qib_7322_regs.h:4763

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenadfe_qdr_ch1
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch1[8]
Definition qib_7322_regs.h:4758

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenagain_qdr_ch1
pseudo_bit_t dyn_disable_rxenagain_qdr_ch1[1]
Definition qib_7322_regs.h:4766

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenagain_qdr_ch0
pseudo_bit_t dyn_disable_rxenagain_qdr_ch0[1]
Definition qib_7322_regs.h:4765

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:4769

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenale_qdr_ch0
pseudo_bit_t dyn_disable_rxenale_qdr_ch0[1]
Definition qib_7322_regs.h:4761

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenadfe_qdr_ch3
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch3[8]
Definition qib_7322_regs.h:4760

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenagain_qdr_ch3
pseudo_bit_t dyn_disable_rxenagain_qdr_ch3[1]
Definition qib_7322_regs.h:4768

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenagain_qdr_ch2
pseudo_bit_t dyn_disable_rxenagain_qdr_ch2[1]
Definition qib_7322_regs.h:4767

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenadfe_qdr_ch0
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch0[8]
Definition qib_7322_regs.h:4757

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenale_qdr_ch1
pseudo_bit_t dyn_disable_rxenale_qdr_ch1[1]
Definition qib_7322_regs.h:4762

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb::dyn_disable_rxenadfe_qdr_ch2
pseudo_bit_t dyn_disable_rxenadfe_qdr_ch2[8]
Definition qib_7322_regs.h:4759

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1
Definition qib_7322_regs.h:4771

QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_1_pb)

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb
Definition qib_7322_regs.h:3342

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenale_sdr_ch0
pseudo_bit_t dyn_disable_rxenale_sdr_ch0[1]
Definition qib_7322_regs.h:3347

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenagain_sdr_ch1
pseudo_bit_t dyn_disable_rxenagain_sdr_ch1[1]
Definition qib_7322_regs.h:3352

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenadfe_sdr_ch0
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch0[8]
Definition qib_7322_regs.h:3343

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenale_sdr_ch3
pseudo_bit_t dyn_disable_rxenale_sdr_ch3[1]
Definition qib_7322_regs.h:3350

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenadfe_sdr_ch2
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch2[8]
Definition qib_7322_regs.h:3345

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3355

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenadfe_sdr_ch3
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch3[8]
Definition qib_7322_regs.h:3346

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenagain_sdr_ch3
pseudo_bit_t dyn_disable_rxenagain_sdr_ch3[1]
Definition qib_7322_regs.h:3354

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenale_sdr_ch1
pseudo_bit_t dyn_disable_rxenale_sdr_ch1[1]
Definition qib_7322_regs.h:3348

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenale_sdr_ch2
pseudo_bit_t dyn_disable_rxenale_sdr_ch2[1]
Definition qib_7322_regs.h:3349

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenagain_sdr_ch0
pseudo_bit_t dyn_disable_rxenagain_sdr_ch0[1]
Definition qib_7322_regs.h:3351

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenagain_sdr_ch2
pseudo_bit_t dyn_disable_rxenagain_sdr_ch2[1]
Definition qib_7322_regs.h:3353

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb::dyn_disable_rxenadfe_sdr_ch1
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch1[8]
Definition qib_7322_regs.h:3344

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0
Definition qib_7322_regs.h:3357

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_pb)

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb
Definition qib_7322_regs.h:4672

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenale_sdr_ch2
pseudo_bit_t dyn_disable_rxenale_sdr_ch2[1]
Definition qib_7322_regs.h:4679

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenale_sdr_ch3
pseudo_bit_t dyn_disable_rxenale_sdr_ch3[1]
Definition qib_7322_regs.h:4680

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenadfe_sdr_ch1
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch1[8]
Definition qib_7322_regs.h:4674

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenagain_sdr_ch3
pseudo_bit_t dyn_disable_rxenagain_sdr_ch3[1]
Definition qib_7322_regs.h:4684

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenagain_sdr_ch2
pseudo_bit_t dyn_disable_rxenagain_sdr_ch2[1]
Definition qib_7322_regs.h:4683

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenadfe_sdr_ch0
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch0[8]
Definition qib_7322_regs.h:4673

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenagain_sdr_ch0
pseudo_bit_t dyn_disable_rxenagain_sdr_ch0[1]
Definition qib_7322_regs.h:4681

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenale_sdr_ch0
pseudo_bit_t dyn_disable_rxenale_sdr_ch0[1]
Definition qib_7322_regs.h:4677

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenagain_sdr_ch1
pseudo_bit_t dyn_disable_rxenagain_sdr_ch1[1]
Definition qib_7322_regs.h:4682

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenale_sdr_ch1
pseudo_bit_t dyn_disable_rxenale_sdr_ch1[1]
Definition qib_7322_regs.h:4678

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenadfe_sdr_ch2
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch2[8]
Definition qib_7322_regs.h:4675

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::dyn_disable_rxenadfe_sdr_ch3
pseudo_bit_t dyn_disable_rxenadfe_sdr_ch3[8]
Definition qib_7322_regs.h:4676

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:4685

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1
Definition qib_7322_regs.h:4687

QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_1_pb)

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb
Definition qib_7322_regs.h:3363

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenagain_ddr_ch1
pseudo_bit_t static_disable_rxenagain_ddr_ch1[1]
Definition qib_7322_regs.h:3373

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenale_ddr_ch2
pseudo_bit_t static_disable_rxenale_ddr_ch2[1]
Definition qib_7322_regs.h:3370

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenale_ddr_ch1
pseudo_bit_t static_disable_rxenale_ddr_ch1[1]
Definition qib_7322_regs.h:3369

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenagain_ddr_ch0
pseudo_bit_t static_disable_rxenagain_ddr_ch0[1]
Definition qib_7322_regs.h:3372

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenadfe_ddr_ch2
pseudo_bit_t static_disable_rxenadfe_ddr_ch2[8]
Definition qib_7322_regs.h:3366

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenale_ddr_ch3
pseudo_bit_t static_disable_rxenale_ddr_ch3[1]
Definition qib_7322_regs.h:3371

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenadfe_ddr_ch3
pseudo_bit_t static_disable_rxenadfe_ddr_ch3[8]
Definition qib_7322_regs.h:3367

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenadfe_ddr_ch1
pseudo_bit_t static_disable_rxenadfe_ddr_ch1[8]
Definition qib_7322_regs.h:3365

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenadfe_ddr_ch0
pseudo_bit_t static_disable_rxenadfe_ddr_ch0[8]
Definition qib_7322_regs.h:3364

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3376

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenagain_ddr_ch3
pseudo_bit_t static_disable_rxenagain_ddr_ch3[1]
Definition qib_7322_regs.h:3375

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenagain_ddr_ch2
pseudo_bit_t static_disable_rxenagain_ddr_ch2[1]
Definition qib_7322_regs.h:3374

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb::static_disable_rxenale_ddr_ch0
pseudo_bit_t static_disable_rxenale_ddr_ch0[1]
Definition qib_7322_regs.h:3368

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0
Definition qib_7322_regs.h:3378

QIB_7322_ADAPT_DISABLE_STATIC_DDR_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_pb)

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb
Definition qib_7322_regs.h:4693

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenagain_ddr_ch0
pseudo_bit_t static_disable_rxenagain_ddr_ch0[1]
Definition qib_7322_regs.h:4702

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenadfe_ddr_ch0
pseudo_bit_t static_disable_rxenadfe_ddr_ch0[8]
Definition qib_7322_regs.h:4694

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenale_ddr_ch1
pseudo_bit_t static_disable_rxenale_ddr_ch1[1]
Definition qib_7322_regs.h:4699

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenagain_ddr_ch1
pseudo_bit_t static_disable_rxenagain_ddr_ch1[1]
Definition qib_7322_regs.h:4703

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenagain_ddr_ch3
pseudo_bit_t static_disable_rxenagain_ddr_ch3[1]
Definition qib_7322_regs.h:4705

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:4706

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenale_ddr_ch0
pseudo_bit_t static_disable_rxenale_ddr_ch0[1]
Definition qib_7322_regs.h:4698

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenagain_ddr_ch2
pseudo_bit_t static_disable_rxenagain_ddr_ch2[1]
Definition qib_7322_regs.h:4704

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenadfe_ddr_ch2
pseudo_bit_t static_disable_rxenadfe_ddr_ch2[8]
Definition qib_7322_regs.h:4696

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenale_ddr_ch2
pseudo_bit_t static_disable_rxenale_ddr_ch2[1]
Definition qib_7322_regs.h:4700

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenadfe_ddr_ch3
pseudo_bit_t static_disable_rxenadfe_ddr_ch3[8]
Definition qib_7322_regs.h:4697

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenale_ddr_ch3
pseudo_bit_t static_disable_rxenale_ddr_ch3[1]
Definition qib_7322_regs.h:4701

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb::static_disable_rxenadfe_ddr_ch1
pseudo_bit_t static_disable_rxenadfe_ddr_ch1[8]
Definition qib_7322_regs.h:4695

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1
Definition qib_7322_regs.h:4708

QIB_7322_ADAPT_DISABLE_STATIC_DDR_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_DDR_1_pb)

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb
Definition qib_7322_regs.h:3405

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenale_qdr_ch1
pseudo_bit_t static_disable_rxenale_qdr_ch1[1]
Definition qib_7322_regs.h:3411

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenale_qdr_ch0
pseudo_bit_t static_disable_rxenale_qdr_ch0[1]
Definition qib_7322_regs.h:3410

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenagain_qdr_ch2
pseudo_bit_t static_disable_rxenagain_qdr_ch2[1]
Definition qib_7322_regs.h:3416

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenadfe_qdr_ch1
pseudo_bit_t static_disable_rxenadfe_qdr_ch1[8]
Definition qib_7322_regs.h:3407

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenagain_qdr_ch1
pseudo_bit_t static_disable_rxenagain_qdr_ch1[1]
Definition qib_7322_regs.h:3415

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenadfe_qdr_ch3
pseudo_bit_t static_disable_rxenadfe_qdr_ch3[8]
Definition qib_7322_regs.h:3409

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenadfe_qdr_ch2
pseudo_bit_t static_disable_rxenadfe_qdr_ch2[8]
Definition qib_7322_regs.h:3408

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3418

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenale_qdr_ch2
pseudo_bit_t static_disable_rxenale_qdr_ch2[1]
Definition qib_7322_regs.h:3412

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenadfe_qdr_ch0
pseudo_bit_t static_disable_rxenadfe_qdr_ch0[8]
Definition qib_7322_regs.h:3406

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenagain_qdr_ch3
pseudo_bit_t static_disable_rxenagain_qdr_ch3[1]
Definition qib_7322_regs.h:3417

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenagain_qdr_ch0
pseudo_bit_t static_disable_rxenagain_qdr_ch0[1]
Definition qib_7322_regs.h:3414

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb::static_disable_rxenale_qdr_ch3
pseudo_bit_t static_disable_rxenale_qdr_ch3[1]
Definition qib_7322_regs.h:3413

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0
Definition qib_7322_regs.h:3420

QIB_7322_ADAPT_DISABLE_STATIC_QDR_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_pb)

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb
Definition qib_7322_regs.h:4735

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenadfe_qdr_ch2
pseudo_bit_t static_disable_rxenadfe_qdr_ch2[8]
Definition qib_7322_regs.h:4738

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenale_qdr_ch0
pseudo_bit_t static_disable_rxenale_qdr_ch0[1]
Definition qib_7322_regs.h:4740

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenagain_qdr_ch1
pseudo_bit_t static_disable_rxenagain_qdr_ch1[1]
Definition qib_7322_regs.h:4745

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenagain_qdr_ch3
pseudo_bit_t static_disable_rxenagain_qdr_ch3[1]
Definition qib_7322_regs.h:4747

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenadfe_qdr_ch3
pseudo_bit_t static_disable_rxenadfe_qdr_ch3[8]
Definition qib_7322_regs.h:4739

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenagain_qdr_ch0
pseudo_bit_t static_disable_rxenagain_qdr_ch0[1]
Definition qib_7322_regs.h:4744

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenadfe_qdr_ch0
pseudo_bit_t static_disable_rxenadfe_qdr_ch0[8]
Definition qib_7322_regs.h:4736

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenagain_qdr_ch2
pseudo_bit_t static_disable_rxenagain_qdr_ch2[1]
Definition qib_7322_regs.h:4746

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenadfe_qdr_ch1
pseudo_bit_t static_disable_rxenadfe_qdr_ch1[8]
Definition qib_7322_regs.h:4737

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenale_qdr_ch2
pseudo_bit_t static_disable_rxenale_qdr_ch2[1]
Definition qib_7322_regs.h:4742

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenale_qdr_ch3
pseudo_bit_t static_disable_rxenale_qdr_ch3[1]
Definition qib_7322_regs.h:4743

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:4748

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb::static_disable_rxenale_qdr_ch1
pseudo_bit_t static_disable_rxenale_qdr_ch1[1]
Definition qib_7322_regs.h:4741

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1
Definition qib_7322_regs.h:4750

QIB_7322_ADAPT_DISABLE_STATIC_QDR_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_QDR_1_pb)

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb
Definition qib_7322_regs.h:3321

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenadfe_sdr_ch3
pseudo_bit_t static_disable_rxenadfe_sdr_ch3[8]
Definition qib_7322_regs.h:3325

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenale_sdr_ch2
pseudo_bit_t static_disable_rxenale_sdr_ch2[1]
Definition qib_7322_regs.h:3328

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenagain_sdr_ch3
pseudo_bit_t static_disable_rxenagain_sdr_ch3[1]
Definition qib_7322_regs.h:3333

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenadfe_sdr_ch0
pseudo_bit_t static_disable_rxenadfe_sdr_ch0[8]
Definition qib_7322_regs.h:3322

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenagain_sdr_ch2
pseudo_bit_t static_disable_rxenagain_sdr_ch2[1]
Definition qib_7322_regs.h:3332

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3334

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenale_sdr_ch1
pseudo_bit_t static_disable_rxenale_sdr_ch1[1]
Definition qib_7322_regs.h:3327

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenadfe_sdr_ch1
pseudo_bit_t static_disable_rxenadfe_sdr_ch1[8]
Definition qib_7322_regs.h:3323

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenadfe_sdr_ch2
pseudo_bit_t static_disable_rxenadfe_sdr_ch2[8]
Definition qib_7322_regs.h:3324

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenagain_sdr_ch0
pseudo_bit_t static_disable_rxenagain_sdr_ch0[1]
Definition qib_7322_regs.h:3330

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenagain_sdr_ch1
pseudo_bit_t static_disable_rxenagain_sdr_ch1[1]
Definition qib_7322_regs.h:3331

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenale_sdr_ch3
pseudo_bit_t static_disable_rxenale_sdr_ch3[1]
Definition qib_7322_regs.h:3329

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb::static_disable_rxenale_sdr_ch0
pseudo_bit_t static_disable_rxenale_sdr_ch0[1]
Definition qib_7322_regs.h:3326

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0
Definition qib_7322_regs.h:3336

QIB_7322_ADAPT_DISABLE_STATIC_SDR_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_pb)

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb
Definition qib_7322_regs.h:4651

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenale_sdr_ch3
pseudo_bit_t static_disable_rxenale_sdr_ch3[1]
Definition qib_7322_regs.h:4659

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenagain_sdr_ch0
pseudo_bit_t static_disable_rxenagain_sdr_ch0[1]
Definition qib_7322_regs.h:4660

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:4664

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenadfe_sdr_ch2
pseudo_bit_t static_disable_rxenadfe_sdr_ch2[8]
Definition qib_7322_regs.h:4654

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenale_sdr_ch2
pseudo_bit_t static_disable_rxenale_sdr_ch2[1]
Definition qib_7322_regs.h:4658

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenale_sdr_ch0
pseudo_bit_t static_disable_rxenale_sdr_ch0[1]
Definition qib_7322_regs.h:4656

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenadfe_sdr_ch0
pseudo_bit_t static_disable_rxenadfe_sdr_ch0[8]
Definition qib_7322_regs.h:4652

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenadfe_sdr_ch3
pseudo_bit_t static_disable_rxenadfe_sdr_ch3[8]
Definition qib_7322_regs.h:4655

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenagain_sdr_ch3
pseudo_bit_t static_disable_rxenagain_sdr_ch3[1]
Definition qib_7322_regs.h:4663

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenagain_sdr_ch2
pseudo_bit_t static_disable_rxenagain_sdr_ch2[1]
Definition qib_7322_regs.h:4662

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenadfe_sdr_ch1
pseudo_bit_t static_disable_rxenadfe_sdr_ch1[8]
Definition qib_7322_regs.h:4653

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenale_sdr_ch1
pseudo_bit_t static_disable_rxenale_sdr_ch1[1]
Definition qib_7322_regs.h:4657

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb::static_disable_rxenagain_sdr_ch1
pseudo_bit_t static_disable_rxenagain_sdr_ch1[1]
Definition qib_7322_regs.h:4661

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1
Definition qib_7322_regs.h:4666

QIB_7322_ADAPT_DISABLE_STATIC_SDR_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ADAPT_DISABLE_STATIC_SDR_1_pb)

QIB_7322_AvailUpdCount_pb
Definition qib_7322_regs.h:808

QIB_7322_AvailUpdCount_pb::_unused_0
pseudo_bit_t _unused_0[59]
Definition qib_7322_regs.h:810

QIB_7322_AvailUpdCount_pb::AvailUpdCount
pseudo_bit_t AvailUpdCount[5]
Definition qib_7322_regs.h:809

QIB_7322_AvailUpdCount
Definition qib_7322_regs.h:812

QIB_7322_AvailUpdCount::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_AvailUpdCount_pb)

QIB_7322_Control_pb
Definition qib_7322_regs.h:55

QIB_7322_Control_pb::PCIERetryBufDiagEn
pseudo_bit_t PCIERetryBufDiagEn[1]
Definition qib_7322_regs.h:59

QIB_7322_Control_pb::FreezeMode
pseudo_bit_t FreezeMode[1]
Definition qib_7322_regs.h:57

QIB_7322_Control_pb::PCIECplQDiagEn
pseudo_bit_t PCIECplQDiagEn[1]
Definition qib_7322_regs.h:62

QIB_7322_Control_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:58

QIB_7322_Control_pb::PCIEPostQDiagEn
pseudo_bit_t PCIEPostQDiagEn[1]
Definition qib_7322_regs.h:61

QIB_7322_Control_pb::_unused_1
pseudo_bit_t _unused_1[57]
Definition qib_7322_regs.h:63

QIB_7322_Control_pb::SDmaDescFetchPriorityEn
pseudo_bit_t SDmaDescFetchPriorityEn[1]
Definition qib_7322_regs.h:60

QIB_7322_Control_pb::SyncReset
pseudo_bit_t SyncReset[1]
Definition qib_7322_regs.h:56

QIB_7322_Control
Definition qib_7322_regs.h:65

QIB_7322_Control::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_Control_pb)

QIB_7322_DCACtrlA_pb
Definition qib_7322_regs.h:1053

QIB_7322_DCACtrlA_pb::SendDMAHead0DCAEnable
pseudo_bit_t SendDMAHead0DCAEnable[1]
Definition qib_7322_regs.h:1057

QIB_7322_DCACtrlA_pb::RcvHdrqDCAEnable
pseudo_bit_t RcvHdrqDCAEnable[1]
Definition qib_7322_regs.h:1054

QIB_7322_DCACtrlA_pb::SendDMAHead1DCAEnable
pseudo_bit_t SendDMAHead1DCAEnable[1]
Definition qib_7322_regs.h:1058

QIB_7322_DCACtrlA_pb::RcvTailUpdDCAEnable
pseudo_bit_t RcvTailUpdDCAEnable[1]
Definition qib_7322_regs.h:1056

QIB_7322_DCACtrlA_pb::EagerDCAEnable
pseudo_bit_t EagerDCAEnable[1]
Definition qib_7322_regs.h:1055

QIB_7322_DCACtrlA_pb::_unused_0
pseudo_bit_t _unused_0[59]
Definition qib_7322_regs.h:1059

QIB_7322_DCACtrlA
Definition qib_7322_regs.h:1061

QIB_7322_DCACtrlA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlA_pb)

QIB_7322_DCACtrlB_pb
Definition qib_7322_regs.h:1067

QIB_7322_DCACtrlB_pb::RcvHdrq0DCAOPH
pseudo_bit_t RcvHdrq0DCAOPH[8]
Definition qib_7322_regs.h:1068

QIB_7322_DCACtrlB_pb::RcvHdrq3DCAOPH
pseudo_bit_t RcvHdrq3DCAOPH[8]
Definition qib_7322_regs.h:1075

QIB_7322_DCACtrlB_pb::RcvHdrq0DCAXfrCnt
pseudo_bit_t RcvHdrq0DCAXfrCnt[6]
Definition qib_7322_regs.h:1069

QIB_7322_DCACtrlB_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:1072

QIB_7322_DCACtrlB_pb::_unused_1
pseudo_bit_t _unused_1[4]
Definition qib_7322_regs.h:1077

QIB_7322_DCACtrlB_pb::RcvHdrq3DCAXfrCnt
pseudo_bit_t RcvHdrq3DCAXfrCnt[6]
Definition qib_7322_regs.h:1076

QIB_7322_DCACtrlB_pb::RcvHdrq2DCAXfrCnt
pseudo_bit_t RcvHdrq2DCAXfrCnt[6]
Definition qib_7322_regs.h:1074

QIB_7322_DCACtrlB_pb::RcvHdrq1DCAOPH
pseudo_bit_t RcvHdrq1DCAOPH[8]
Definition qib_7322_regs.h:1070

QIB_7322_DCACtrlB_pb::RcvHdrq1DCAXfrCnt
pseudo_bit_t RcvHdrq1DCAXfrCnt[6]
Definition qib_7322_regs.h:1071

QIB_7322_DCACtrlB_pb::RcvHdrq2DCAOPH
pseudo_bit_t RcvHdrq2DCAOPH[8]
Definition qib_7322_regs.h:1073

QIB_7322_DCACtrlB
Definition qib_7322_regs.h:1079

QIB_7322_DCACtrlB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlB_pb)

QIB_7322_DCACtrlC_pb
Definition qib_7322_regs.h:1085

QIB_7322_DCACtrlC_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:1090

QIB_7322_DCACtrlC_pb::RcvHdrq4DCAOPH
pseudo_bit_t RcvHdrq4DCAOPH[8]
Definition qib_7322_regs.h:1086

QIB_7322_DCACtrlC_pb::RcvHdrq7DCAOPH
pseudo_bit_t RcvHdrq7DCAOPH[8]
Definition qib_7322_regs.h:1093

QIB_7322_DCACtrlC_pb::RcvHdrq5DCAXfrCnt
pseudo_bit_t RcvHdrq5DCAXfrCnt[6]
Definition qib_7322_regs.h:1089

QIB_7322_DCACtrlC_pb::_unused_1
pseudo_bit_t _unused_1[4]
Definition qib_7322_regs.h:1095

QIB_7322_DCACtrlC_pb::RcvHdrq4DCAXfrCnt
pseudo_bit_t RcvHdrq4DCAXfrCnt[6]
Definition qib_7322_regs.h:1087

QIB_7322_DCACtrlC_pb::RcvHdrq6DCAXfrCnt
pseudo_bit_t RcvHdrq6DCAXfrCnt[6]
Definition qib_7322_regs.h:1092

QIB_7322_DCACtrlC_pb::RcvHdrq5DCAOPH
pseudo_bit_t RcvHdrq5DCAOPH[8]
Definition qib_7322_regs.h:1088

QIB_7322_DCACtrlC_pb::RcvHdrq7DCAXfrCnt
pseudo_bit_t RcvHdrq7DCAXfrCnt[6]
Definition qib_7322_regs.h:1094

QIB_7322_DCACtrlC_pb::RcvHdrq6DCAOPH
pseudo_bit_t RcvHdrq6DCAOPH[8]
Definition qib_7322_regs.h:1091

QIB_7322_DCACtrlC
Definition qib_7322_regs.h:1097

QIB_7322_DCACtrlC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlC_pb)

QIB_7322_DCACtrlD_pb
Definition qib_7322_regs.h:1103

QIB_7322_DCACtrlD_pb::RcvHdrq11DCAXfrCnt
pseudo_bit_t RcvHdrq11DCAXfrCnt[6]
Definition qib_7322_regs.h:1112

QIB_7322_DCACtrlD_pb::RcvHdrq9DCAXfrCnt
pseudo_bit_t RcvHdrq9DCAXfrCnt[6]
Definition qib_7322_regs.h:1107

QIB_7322_DCACtrlD_pb::RcvHdrq9DCAOPH
pseudo_bit_t RcvHdrq9DCAOPH[8]
Definition qib_7322_regs.h:1106

QIB_7322_DCACtrlD_pb::RcvHdrq8DCAOPH
pseudo_bit_t RcvHdrq8DCAOPH[8]
Definition qib_7322_regs.h:1104

QIB_7322_DCACtrlD_pb::RcvHdrq10DCAXfrCnt
pseudo_bit_t RcvHdrq10DCAXfrCnt[6]
Definition qib_7322_regs.h:1110

QIB_7322_DCACtrlD_pb::RcvHdrq8DCAXfrCnt
pseudo_bit_t RcvHdrq8DCAXfrCnt[6]
Definition qib_7322_regs.h:1105

QIB_7322_DCACtrlD_pb::_unused_1
pseudo_bit_t _unused_1[4]
Definition qib_7322_regs.h:1113

QIB_7322_DCACtrlD_pb::RcvHdrq11DCAOPH
pseudo_bit_t RcvHdrq11DCAOPH[8]
Definition qib_7322_regs.h:1111

QIB_7322_DCACtrlD_pb::RcvHdrq10DCAOPH
pseudo_bit_t RcvHdrq10DCAOPH[8]
Definition qib_7322_regs.h:1109

QIB_7322_DCACtrlD_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:1108

QIB_7322_DCACtrlD
Definition qib_7322_regs.h:1115

QIB_7322_DCACtrlD::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlD_pb)

QIB_7322_DCACtrlE_pb
Definition qib_7322_regs.h:1121

QIB_7322_DCACtrlE_pb::RcvHdrq12DCAOPH
pseudo_bit_t RcvHdrq12DCAOPH[8]
Definition qib_7322_regs.h:1122

QIB_7322_DCACtrlE_pb::RcvHdrq13DCAOPH
pseudo_bit_t RcvHdrq13DCAOPH[8]
Definition qib_7322_regs.h:1124

QIB_7322_DCACtrlE_pb::RcvHdrq15DCAOPH
pseudo_bit_t RcvHdrq15DCAOPH[8]
Definition qib_7322_regs.h:1129

QIB_7322_DCACtrlE_pb::RcvHdrq15DCAXfrCnt
pseudo_bit_t RcvHdrq15DCAXfrCnt[6]
Definition qib_7322_regs.h:1130

QIB_7322_DCACtrlE_pb::_unused_1
pseudo_bit_t _unused_1[4]
Definition qib_7322_regs.h:1131

QIB_7322_DCACtrlE_pb::RcvHdrq14DCAOPH
pseudo_bit_t RcvHdrq14DCAOPH[8]
Definition qib_7322_regs.h:1127

QIB_7322_DCACtrlE_pb::RcvHdrq13DCAXfrCnt
pseudo_bit_t RcvHdrq13DCAXfrCnt[6]
Definition qib_7322_regs.h:1125

QIB_7322_DCACtrlE_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:1126

QIB_7322_DCACtrlE_pb::RcvHdrq12DCAXfrCnt
pseudo_bit_t RcvHdrq12DCAXfrCnt[6]
Definition qib_7322_regs.h:1123

QIB_7322_DCACtrlE_pb::RcvHdrq14DCAXfrCnt
pseudo_bit_t RcvHdrq14DCAXfrCnt[6]
Definition qib_7322_regs.h:1128

QIB_7322_DCACtrlE
Definition qib_7322_regs.h:1133

QIB_7322_DCACtrlE::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlE_pb)

QIB_7322_DCACtrlF_pb
Definition qib_7322_regs.h:1139

QIB_7322_DCACtrlF_pb::RcvHdrq17DCAOPH
pseudo_bit_t RcvHdrq17DCAOPH[8]
Definition qib_7322_regs.h:1142

QIB_7322_DCACtrlF_pb::SendDma0DCAOPH
pseudo_bit_t SendDma0DCAOPH[8]
Definition qib_7322_regs.h:1145

QIB_7322_DCACtrlF_pb::RcvHdrq16DCAOPH
pseudo_bit_t RcvHdrq16DCAOPH[8]
Definition qib_7322_regs.h:1140

QIB_7322_DCACtrlF_pb::RcvHdrq16DCAXfrCnt
pseudo_bit_t RcvHdrq16DCAXfrCnt[6]
Definition qib_7322_regs.h:1141

QIB_7322_DCACtrlF_pb::_unused_1
pseudo_bit_t _unused_1[16]
Definition qib_7322_regs.h:1147

QIB_7322_DCACtrlF_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:1144

QIB_7322_DCACtrlF_pb::RcvHdrq17DCAXfrCnt
pseudo_bit_t RcvHdrq17DCAXfrCnt[6]
Definition qib_7322_regs.h:1143

QIB_7322_DCACtrlF_pb::SendDma1DCAOPH
pseudo_bit_t SendDma1DCAOPH[8]
Definition qib_7322_regs.h:1146

QIB_7322_DCACtrlF
Definition qib_7322_regs.h:1149

QIB_7322_DCACtrlF::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DCACtrlF_pb)

QIB_7322_DebugPortNibbleSel_pb
Definition qib_7322_regs.h:106

QIB_7322_DebugPortNibbleSel_pb::NibbleSel5
pseudo_bit_t NibbleSel5[4]
Definition qib_7322_regs.h:112

QIB_7322_DebugPortNibbleSel_pb::NibbleSel4
pseudo_bit_t NibbleSel4[4]
Definition qib_7322_regs.h:111

QIB_7322_DebugPortNibbleSel_pb::NibbleSel13
pseudo_bit_t NibbleSel13[4]
Definition qib_7322_regs.h:120

QIB_7322_DebugPortNibbleSel_pb::NibbleSel12
pseudo_bit_t NibbleSel12[4]
Definition qib_7322_regs.h:119

QIB_7322_DebugPortNibbleSel_pb::NibbleSel15
pseudo_bit_t NibbleSel15[4]
Definition qib_7322_regs.h:122

QIB_7322_DebugPortNibbleSel_pb::NibbleSel6
pseudo_bit_t NibbleSel6[4]
Definition qib_7322_regs.h:113

QIB_7322_DebugPortNibbleSel_pb::NibbleSel0
pseudo_bit_t NibbleSel0[4]
Definition qib_7322_regs.h:107

QIB_7322_DebugPortNibbleSel_pb::NibbleSel10
pseudo_bit_t NibbleSel10[4]
Definition qib_7322_regs.h:117

QIB_7322_DebugPortNibbleSel_pb::NibbleSel1
pseudo_bit_t NibbleSel1[4]
Definition qib_7322_regs.h:108

QIB_7322_DebugPortNibbleSel_pb::NibbleSel3
pseudo_bit_t NibbleSel3[4]
Definition qib_7322_regs.h:110

QIB_7322_DebugPortNibbleSel_pb::NibbleSel8
pseudo_bit_t NibbleSel8[4]
Definition qib_7322_regs.h:115

QIB_7322_DebugPortNibbleSel_pb::NibbleSel7
pseudo_bit_t NibbleSel7[4]
Definition qib_7322_regs.h:114

QIB_7322_DebugPortNibbleSel_pb::NibbleSel11
pseudo_bit_t NibbleSel11[4]
Definition qib_7322_regs.h:118

QIB_7322_DebugPortNibbleSel_pb::NibbleSel14
pseudo_bit_t NibbleSel14[4]
Definition qib_7322_regs.h:121

QIB_7322_DebugPortNibbleSel_pb::NibbleSel9
pseudo_bit_t NibbleSel9[4]
Definition qib_7322_regs.h:116

QIB_7322_DebugPortNibbleSel_pb::NibbleSel2
pseudo_bit_t NibbleSel2[4]
Definition qib_7322_regs.h:109

QIB_7322_DebugPortNibbleSel
Definition qib_7322_regs.h:124

QIB_7322_DebugPortNibbleSel::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DebugPortNibbleSel_pb)

QIB_7322_DebugPortSel_pb
Definition qib_7322_regs.h:89

QIB_7322_DebugPortSel_pb::SrcMuxSel0
pseudo_bit_t SrcMuxSel0[8]
Definition qib_7322_regs.h:92

QIB_7322_DebugPortSel_pb::SrcMuxSel1
pseudo_bit_t SrcMuxSel1[8]
Definition qib_7322_regs.h:93

QIB_7322_DebugPortSel_pb::EnhMode_SrcMuxSelIndex
pseudo_bit_t EnhMode_SrcMuxSelIndex[10]
Definition qib_7322_regs.h:97

QIB_7322_DebugPortSel_pb::EnhMode_SrcMuxSelWrEn
pseudo_bit_t EnhMode_SrcMuxSelWrEn[1]
Definition qib_7322_regs.h:98

QIB_7322_DebugPortSel_pb::_unused_0
pseudo_bit_t _unused_0[28]
Definition qib_7322_regs.h:91

QIB_7322_DebugPortSel_pb::DebugOutMuxSel
pseudo_bit_t DebugOutMuxSel[2]
Definition qib_7322_regs.h:90

QIB_7322_DebugPortSel_pb::EnDbgPort
pseudo_bit_t EnDbgPort[1]
Definition qib_7322_regs.h:95

QIB_7322_DebugPortSel_pb::EnEnhancedDebugMode
pseudo_bit_t EnEnhancedDebugMode[1]
Definition qib_7322_regs.h:96

QIB_7322_DebugPortSel_pb::DbgClkPortSel
pseudo_bit_t DbgClkPortSel[5]
Definition qib_7322_regs.h:94

QIB_7322_DebugPortSel
Definition qib_7322_regs.h:100

QIB_7322_DebugPortSel::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DebugPortSel_pb)

QIB_7322_DebugSigsIntSel_pb
Definition qib_7322_regs.h:130

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_tx_sdma
pseudo_bit_t debug_port_sel_tx_sdma[1]
Definition qib_7322_regs.h:140

QIB_7322_DebugSigsIntSel_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:138

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_xgxs_1
pseudo_bit_t debug_port_sel_xgxs_1[4]
Definition qib_7322_regs.h:146

QIB_7322_DebugSigsIntSel_pb::_unused_2
pseudo_bit_t _unused_2[12]
Definition qib_7322_regs.h:149

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_rx_ibport
pseudo_bit_t debug_port_sel_rx_ibport[1]
Definition qib_7322_regs.h:141

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_pcie_rx_tx
pseudo_bit_t debug_port_sel_pcie_rx_tx[1]
Definition qib_7322_regs.h:137

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_tx_ibport
pseudo_bit_t debug_port_sel_tx_ibport[1]
Definition qib_7322_regs.h:139

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_pcs_rxdet_encdec_lane
pseudo_bit_t debug_port_sel_pcs_rxdet_encdec_lane[3]
Definition qib_7322_regs.h:135

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_credit_b_0
pseudo_bit_t debug_port_sel_credit_b_0[3]
Definition qib_7322_regs.h:145

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_pcs_pipe_lane815
pseudo_bit_t debug_port_sel_pcs_pipe_lane815[3]
Definition qib_7322_regs.h:132

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_credit_b_1
pseudo_bit_t debug_port_sel_credit_b_1[3]
Definition qib_7322_regs.h:148

QIB_7322_DebugSigsIntSel_pb::_unused_1
pseudo_bit_t _unused_1[12]
Definition qib_7322_regs.h:142

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_xgxs_0
pseudo_bit_t debug_port_sel_xgxs_0[4]
Definition qib_7322_regs.h:143

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_pcs_sdout
pseudo_bit_t debug_port_sel_pcs_sdout[1]
Definition qib_7322_regs.h:133

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_credit_a_1
pseudo_bit_t debug_port_sel_credit_a_1[3]
Definition qib_7322_regs.h:147

QIB_7322_DebugSigsIntSel_pb::EnableSDma_SelfDrain
pseudo_bit_t EnableSDma_SelfDrain[1]
Definition qib_7322_regs.h:136

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_pcs_pipe_lane07
pseudo_bit_t debug_port_sel_pcs_pipe_lane07[3]
Definition qib_7322_regs.h:131

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_pcs_symlock_elfifo_lane
pseudo_bit_t debug_port_sel_pcs_symlock_elfifo_lane[4]
Definition qib_7322_regs.h:134

QIB_7322_DebugSigsIntSel_pb::debug_port_sel_credit_a_0
pseudo_bit_t debug_port_sel_credit_a_0[3]
Definition qib_7322_regs.h:144

QIB_7322_DebugSigsIntSel
Definition qib_7322_regs.h:151

QIB_7322_DebugSigsIntSel::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_DebugSigsIntSel_pb)

QIB_7322_EEPAddrCmd_pb
Definition qib_7322_regs.h:857

QIB_7322_EEPAddrCmd_pb::EPAddr
pseudo_bit_t EPAddr[24]
Definition qib_7322_regs.h:858

QIB_7322_EEPAddrCmd_pb::_unused_0
pseudo_bit_t _unused_0[32]
Definition qib_7322_regs.h:860

QIB_7322_EEPAddrCmd_pb::EPCmd
pseudo_bit_t EPCmd[8]
Definition qib_7322_regs.h:859

QIB_7322_EEPAddrCmd
Definition qib_7322_regs.h:862

QIB_7322_EEPAddrCmd::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_EEPAddrCmd_pb)

QIB_7322_EEPCtlStat_pb
Definition qib_7322_regs.h:840

QIB_7322_EEPCtlStat_pb::EPAccEn
pseudo_bit_t EPAccEn[2]
Definition qib_7322_regs.h:841

QIB_7322_EEPCtlStat_pb::EPReset
pseudo_bit_t EPReset[1]
Definition qib_7322_regs.h:842

QIB_7322_EEPCtlStat_pb::LstDatWr
pseudo_bit_t LstDatWr[1]
Definition qib_7322_regs.h:845

QIB_7322_EEPCtlStat_pb::PageMode
pseudo_bit_t PageMode[1]
Definition qib_7322_regs.h:844

QIB_7322_EEPCtlStat_pb::ByteProg
pseudo_bit_t ByteProg[1]
Definition qib_7322_regs.h:843

QIB_7322_EEPCtlStat_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:847

QIB_7322_EEPCtlStat_pb::_unused_1
pseudo_bit_t _unused_1[32]
Definition qib_7322_regs.h:849

QIB_7322_EEPCtlStat_pb::CmdWrErr
pseudo_bit_t CmdWrErr[1]
Definition qib_7322_regs.h:846

QIB_7322_EEPCtlStat_pb::CtlrStat
pseudo_bit_t CtlrStat[1]
Definition qib_7322_regs.h:848

QIB_7322_EEPCtlStat
Definition qib_7322_regs.h:851

QIB_7322_EEPCtlStat::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_EEPCtlStat_pb)

QIB_7322_EXTCtrl_pb
Definition qib_7322_regs.h:614

QIB_7322_EXTCtrl_pb::GPIOOe
pseudo_bit_t GPIOOe[16]
Definition qib_7322_regs.h:621

QIB_7322_EXTCtrl_pb::LEDPort1GreenOn
pseudo_bit_t LEDPort1GreenOn[1]
Definition qib_7322_regs.h:618

QIB_7322_EXTCtrl_pb::GPIOInvert
pseudo_bit_t GPIOInvert[16]
Definition qib_7322_regs.h:620

QIB_7322_EXTCtrl_pb::LEDPort0GreenOn
pseudo_bit_t LEDPort0GreenOn[1]
Definition qib_7322_regs.h:616

QIB_7322_EXTCtrl_pb::LEDPort0YellowOn
pseudo_bit_t LEDPort0YellowOn[1]
Definition qib_7322_regs.h:615

QIB_7322_EXTCtrl_pb::LEDPort1YellowOn
pseudo_bit_t LEDPort1YellowOn[1]
Definition qib_7322_regs.h:617

QIB_7322_EXTCtrl_pb::_unused_0
pseudo_bit_t _unused_0[28]
Definition qib_7322_regs.h:619

QIB_7322_EXTCtrl
Definition qib_7322_regs.h:623

QIB_7322_EXTCtrl::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_EXTCtrl_pb)

QIB_7322_EXTStatus_pb
Definition qib_7322_regs.h:601

QIB_7322_EXTStatus_pb::GPIOIn
pseudo_bit_t GPIOIn[16]
Definition qib_7322_regs.h:606

QIB_7322_EXTStatus_pb::MemBISTDisabled
pseudo_bit_t MemBISTDisabled[1]
Definition qib_7322_regs.h:604

QIB_7322_EXTStatus_pb::MemBISTEndTest
pseudo_bit_t MemBISTEndTest[1]
Definition qib_7322_regs.h:603

QIB_7322_EXTStatus_pb::_unused_0
pseudo_bit_t _unused_0[14]
Definition qib_7322_regs.h:602

QIB_7322_EXTStatus_pb::_unused_1
pseudo_bit_t _unused_1[32]
Definition qib_7322_regs.h:605

QIB_7322_EXTStatus
Definition qib_7322_regs.h:608

QIB_7322_EXTStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_EXTStatus_pb)

QIB_7322_ErrClear_0_pb
Definition qib_7322_regs.h:2638

QIB_7322_ErrClear_0_pb::RcvIBLostLinkErrClear
pseudo_bit_t RcvIBLostLinkErrClear[1]
Definition qib_7322_regs.h:2655

QIB_7322_ErrClear_0_pb::_unused_4
pseudo_bit_t _unused_4[2]
Definition qib_7322_regs.h:2680

QIB_7322_ErrClear_0_pb::SendMaxPktLenErrClear
pseudo_bit_t SendMaxPktLenErrClear[1]
Definition qib_7322_regs.h:2658

QIB_7322_ErrClear_0_pb::RcvUnexpectedCharErrClear
pseudo_bit_t RcvUnexpectedCharErrClear[1]
Definition qib_7322_regs.h:2646

QIB_7322_ErrClear_0_pb::RcvMaxPktLenErrClear
pseudo_bit_t RcvMaxPktLenErrClear[1]
Definition qib_7322_regs.h:2643

QIB_7322_ErrClear_0_pb::RcvUnsupportedVLErrClear
pseudo_bit_t RcvUnsupportedVLErrClear[1]
Definition qib_7322_regs.h:2647

QIB_7322_ErrClear_0_pb::SendPktLenErrClear
pseudo_bit_t SendPktLenErrClear[1]
Definition qib_7322_regs.h:2660

QIB_7322_ErrClear_0_pb::SendUnsupportedVLErrClear
pseudo_bit_t SendUnsupportedVLErrClear[1]
Definition qib_7322_regs.h:2665

QIB_7322_ErrClear_0_pb::RcvHdrErrClear
pseudo_bit_t RcvHdrErrClear[1]
Definition qib_7322_regs.h:2654

QIB_7322_ErrClear_0_pb::SDmaHaltErrClear
pseudo_bit_t SDmaHaltErrClear[1]
Definition qib_7322_regs.h:2677

QIB_7322_ErrClear_0_pb::RcvEBPErrClear
pseudo_bit_t RcvEBPErrClear[1]
Definition qib_7322_regs.h:2648

QIB_7322_ErrClear_0_pb::SDmaBaseErrClear
pseudo_bit_t SDmaBaseErrClear[1]
Definition qib_7322_regs.h:2670

QIB_7322_ErrClear_0_pb::SDmaDwEnErrClear
pseudo_bit_t SDmaDwEnErrClear[1]
Definition qib_7322_regs.h:2673

QIB_7322_ErrClear_0_pb::RcvIBFlowErrClear
pseudo_bit_t RcvIBFlowErrClear[1]
Definition qib_7322_regs.h:2649

QIB_7322_ErrClear_0_pb::RcvBadVersionErrClear
pseudo_bit_t RcvBadVersionErrClear[1]
Definition qib_7322_regs.h:2650

QIB_7322_ErrClear_0_pb::RcvShortPktLenErrClear
pseudo_bit_t RcvShortPktLenErrClear[1]
Definition qib_7322_regs.h:2645

QIB_7322_ErrClear_0_pb::SDmaTailOutOfBoundErrClear
pseudo_bit_t SDmaTailOutOfBoundErrClear[1]
Definition qib_7322_regs.h:2669

QIB_7322_ErrClear_0_pb::SDma1stDescErrClear
pseudo_bit_t SDma1stDescErrClear[1]
Definition qib_7322_regs.h:2671

QIB_7322_ErrClear_0_pb::RcvMinPktLenErrClear
pseudo_bit_t RcvMinPktLenErrClear[1]
Definition qib_7322_regs.h:2642

QIB_7322_ErrClear_0_pb::SendDroppedDataPktErrClear
pseudo_bit_t SendDroppedDataPktErrClear[1]
Definition qib_7322_regs.h:2662

QIB_7322_ErrClear_0_pb::SHeadersErrClear
pseudo_bit_t SHeadersErrClear[1]
Definition qib_7322_regs.h:2681

QIB_7322_ErrClear_0_pb::RcvHdrLenErrClear
pseudo_bit_t RcvHdrLenErrClear[1]
Definition qib_7322_regs.h:2653

QIB_7322_ErrClear_0_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:2678

QIB_7322_ErrClear_0_pb::SDmaGenMismatchErrClear
pseudo_bit_t SDmaGenMismatchErrClear[1]
Definition qib_7322_regs.h:2667

QIB_7322_ErrClear_0_pb::SDmaOutOfBoundErrClear
pseudo_bit_t SDmaOutOfBoundErrClear[1]
Definition qib_7322_regs.h:2668

QIB_7322_ErrClear_0_pb::RcvVCRCErrClear
pseudo_bit_t RcvVCRCErrClear[1]
Definition qib_7322_regs.h:2640

QIB_7322_ErrClear_0_pb::SendDroppedSmpPktErrClear
pseudo_bit_t SendDroppedSmpPktErrClear[1]
Definition qib_7322_regs.h:2661

QIB_7322_ErrClear_0_pb::_unused_5
pseudo_bit_t _unused_5[5]
Definition qib_7322_regs.h:2683

QIB_7322_ErrClear_0_pb::SDmaMissingDwErrClear
pseudo_bit_t SDmaMissingDwErrClear[1]
Definition qib_7322_regs.h:2674

QIB_7322_ErrClear_0_pb::RcvICRCErrClear
pseudo_bit_t RcvICRCErrClear[1]
Definition qib_7322_regs.h:2641

QIB_7322_ErrClear_0_pb::SendBufMisuseErrClear
pseudo_bit_t SendBufMisuseErrClear[1]
Definition qib_7322_regs.h:2666

QIB_7322_ErrClear_0_pb::RcvBadTidErrClear
pseudo_bit_t RcvBadTidErrClear[1]
Definition qib_7322_regs.h:2652

QIB_7322_ErrClear_0_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:2656

QIB_7322_ErrClear_0_pb::SDmaRpyTagErrClear
pseudo_bit_t SDmaRpyTagErrClear[1]
Definition qib_7322_regs.h:2672

QIB_7322_ErrClear_0_pb::SendMinPktLenErrClear
pseudo_bit_t SendMinPktLenErrClear[1]
Definition qib_7322_regs.h:2657

QIB_7322_ErrClear_0_pb::VL15BufMisuseErrClear
pseudo_bit_t VL15BufMisuseErrClear[1]
Definition qib_7322_regs.h:2679

QIB_7322_ErrClear_0_pb::IBStatusChangedClear
pseudo_bit_t IBStatusChangedClear[1]
Definition qib_7322_regs.h:2682

QIB_7322_ErrClear_0_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:2651

QIB_7322_ErrClear_0_pb::SendUnexpectedPktNumErrClear
pseudo_bit_t SendUnexpectedPktNumErrClear[1]
Definition qib_7322_regs.h:2664

QIB_7322_ErrClear_0_pb::RcvFormatErrClear
pseudo_bit_t RcvFormatErrClear[1]
Definition qib_7322_regs.h:2639

QIB_7322_ErrClear_0_pb::SDmaUnexpDataErrClear
pseudo_bit_t SDmaUnexpDataErrClear[1]
Definition qib_7322_regs.h:2675

QIB_7322_ErrClear_0_pb::SDmaDescAddrMisalignErrClear
pseudo_bit_t SDmaDescAddrMisalignErrClear[1]
Definition qib_7322_regs.h:2676

QIB_7322_ErrClear_0_pb::SendUnderRunErrClear
pseudo_bit_t SendUnderRunErrClear[1]
Definition qib_7322_regs.h:2659

QIB_7322_ErrClear_0_pb::RcvLongPktLenErrClear
pseudo_bit_t RcvLongPktLenErrClear[1]
Definition qib_7322_regs.h:2644

QIB_7322_ErrClear_0_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:2663

QIB_7322_ErrClear_0
Definition qib_7322_regs.h:2685

QIB_7322_ErrClear_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrClear_0_pb)

QIB_7322_ErrClear_1_pb
Definition qib_7322_regs.h:3971

QIB_7322_ErrClear_1_pb::SendMinPktLenErrClear
pseudo_bit_t SendMinPktLenErrClear[1]
Definition qib_7322_regs.h:3990

QIB_7322_ErrClear_1_pb::RcvBadVersionErrClear
pseudo_bit_t RcvBadVersionErrClear[1]
Definition qib_7322_regs.h:3983

QIB_7322_ErrClear_1_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:3984

QIB_7322_ErrClear_1_pb::RcvFormatErrClear
pseudo_bit_t RcvFormatErrClear[1]
Definition qib_7322_regs.h:3972

QIB_7322_ErrClear_1_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:4011

QIB_7322_ErrClear_1_pb::VL15BufMisuseErrClear
pseudo_bit_t VL15BufMisuseErrClear[1]
Definition qib_7322_regs.h:4012

QIB_7322_ErrClear_1_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:3989

QIB_7322_ErrClear_1_pb::SDmaUnexpDataErrClear
pseudo_bit_t SDmaUnexpDataErrClear[1]
Definition qib_7322_regs.h:4008

QIB_7322_ErrClear_1_pb::SDmaHaltErrClear
pseudo_bit_t SDmaHaltErrClear[1]
Definition qib_7322_regs.h:4010

QIB_7322_ErrClear_1_pb::SDmaOutOfBoundErrClear
pseudo_bit_t SDmaOutOfBoundErrClear[1]
Definition qib_7322_regs.h:4001

QIB_7322_ErrClear_1_pb::RcvUnsupportedVLErrClear
pseudo_bit_t RcvUnsupportedVLErrClear[1]
Definition qib_7322_regs.h:3980

QIB_7322_ErrClear_1_pb::SendUnexpectedPktNumErrClear
pseudo_bit_t SendUnexpectedPktNumErrClear[1]
Definition qib_7322_regs.h:3997

QIB_7322_ErrClear_1_pb::RcvMinPktLenErrClear
pseudo_bit_t RcvMinPktLenErrClear[1]
Definition qib_7322_regs.h:3975

QIB_7322_ErrClear_1_pb::SendBufMisuseErrClear
pseudo_bit_t SendBufMisuseErrClear[1]
Definition qib_7322_regs.h:3999

QIB_7322_ErrClear_1_pb::_unused_4
pseudo_bit_t _unused_4[2]
Definition qib_7322_regs.h:4013

QIB_7322_ErrClear_1_pb::SDmaMissingDwErrClear
pseudo_bit_t SDmaMissingDwErrClear[1]
Definition qib_7322_regs.h:4007

QIB_7322_ErrClear_1_pb::SDmaDwEnErrClear
pseudo_bit_t SDmaDwEnErrClear[1]
Definition qib_7322_regs.h:4006

QIB_7322_ErrClear_1_pb::RcvMaxPktLenErrClear
pseudo_bit_t RcvMaxPktLenErrClear[1]
Definition qib_7322_regs.h:3976

QIB_7322_ErrClear_1_pb::SendDroppedDataPktErrClear
pseudo_bit_t SendDroppedDataPktErrClear[1]
Definition qib_7322_regs.h:3995

QIB_7322_ErrClear_1_pb::_unused_5
pseudo_bit_t _unused_5[5]
Definition qib_7322_regs.h:4016

QIB_7322_ErrClear_1_pb::SDmaRpyTagErrClear
pseudo_bit_t SDmaRpyTagErrClear[1]
Definition qib_7322_regs.h:4005

QIB_7322_ErrClear_1_pb::RcvUnexpectedCharErrClear
pseudo_bit_t RcvUnexpectedCharErrClear[1]
Definition qib_7322_regs.h:3979

QIB_7322_ErrClear_1_pb::RcvShortPktLenErrClear
pseudo_bit_t RcvShortPktLenErrClear[1]
Definition qib_7322_regs.h:3978

QIB_7322_ErrClear_1_pb::SendDroppedSmpPktErrClear
pseudo_bit_t SendDroppedSmpPktErrClear[1]
Definition qib_7322_regs.h:3994

QIB_7322_ErrClear_1_pb::RcvHdrErrClear
pseudo_bit_t RcvHdrErrClear[1]
Definition qib_7322_regs.h:3987

QIB_7322_ErrClear_1_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:3996

QIB_7322_ErrClear_1_pb::RcvHdrLenErrClear
pseudo_bit_t RcvHdrLenErrClear[1]
Definition qib_7322_regs.h:3986

QIB_7322_ErrClear_1_pb::SendUnderRunErrClear
pseudo_bit_t SendUnderRunErrClear[1]
Definition qib_7322_regs.h:3992

QIB_7322_ErrClear_1_pb::RcvEBPErrClear
pseudo_bit_t RcvEBPErrClear[1]
Definition qib_7322_regs.h:3981

QIB_7322_ErrClear_1_pb::SDmaDescAddrMisalignErrClear
pseudo_bit_t SDmaDescAddrMisalignErrClear[1]
Definition qib_7322_regs.h:4009

QIB_7322_ErrClear_1_pb::IBStatusChangedClear
pseudo_bit_t IBStatusChangedClear[1]
Definition qib_7322_regs.h:4015

QIB_7322_ErrClear_1_pb::RcvIBLostLinkErrClear
pseudo_bit_t RcvIBLostLinkErrClear[1]
Definition qib_7322_regs.h:3988

QIB_7322_ErrClear_1_pb::RcvLongPktLenErrClear
pseudo_bit_t RcvLongPktLenErrClear[1]
Definition qib_7322_regs.h:3977

QIB_7322_ErrClear_1_pb::SendMaxPktLenErrClear
pseudo_bit_t SendMaxPktLenErrClear[1]
Definition qib_7322_regs.h:3991

QIB_7322_ErrClear_1_pb::RcvICRCErrClear
pseudo_bit_t RcvICRCErrClear[1]
Definition qib_7322_regs.h:3974

QIB_7322_ErrClear_1_pb::RcvBadTidErrClear
pseudo_bit_t RcvBadTidErrClear[1]
Definition qib_7322_regs.h:3985

QIB_7322_ErrClear_1_pb::RcvVCRCErrClear
pseudo_bit_t RcvVCRCErrClear[1]
Definition qib_7322_regs.h:3973

QIB_7322_ErrClear_1_pb::SHeadersErrClear
pseudo_bit_t SHeadersErrClear[1]
Definition qib_7322_regs.h:4014

QIB_7322_ErrClear_1_pb::RcvIBFlowErrClear
pseudo_bit_t RcvIBFlowErrClear[1]
Definition qib_7322_regs.h:3982

QIB_7322_ErrClear_1_pb::SDmaGenMismatchErrClear
pseudo_bit_t SDmaGenMismatchErrClear[1]
Definition qib_7322_regs.h:4000

QIB_7322_ErrClear_1_pb::SDmaTailOutOfBoundErrClear
pseudo_bit_t SDmaTailOutOfBoundErrClear[1]
Definition qib_7322_regs.h:4002

QIB_7322_ErrClear_1_pb::SendUnsupportedVLErrClear
pseudo_bit_t SendUnsupportedVLErrClear[1]
Definition qib_7322_regs.h:3998

QIB_7322_ErrClear_1_pb::SDma1stDescErrClear
pseudo_bit_t SDma1stDescErrClear[1]
Definition qib_7322_regs.h:4004

QIB_7322_ErrClear_1_pb::SDmaBaseErrClear
pseudo_bit_t SDmaBaseErrClear[1]
Definition qib_7322_regs.h:4003

QIB_7322_ErrClear_1_pb::SendPktLenErrClear
pseudo_bit_t SendPktLenErrClear[1]
Definition qib_7322_regs.h:3993

QIB_7322_ErrClear_1
Definition qib_7322_regs.h:4018

QIB_7322_ErrClear_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrClear_1_pb)

QIB_7322_ErrClear_pb
Definition qib_7322_regs.h:463

QIB_7322_ErrClear_pb::_unused_3
pseudo_bit_t _unused_3[15]
Definition qib_7322_regs.h:474

QIB_7322_ErrClear_pb::SBufVL15MisUseErrClear
pseudo_bit_t SBufVL15MisUseErrClear[1]
Definition qib_7322_regs.h:478

QIB_7322_ErrClear_pb::SDmaBufMaskDuplicateErrClear
pseudo_bit_t SDmaBufMaskDuplicateErrClear[1]
Definition qib_7322_regs.h:468

QIB_7322_ErrClear_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:464

QIB_7322_ErrClear_pb::SendArmLaunchErrClear
pseudo_bit_t SendArmLaunchErrClear[1]
Definition qib_7322_regs.h:472

QIB_7322_ErrClear_pb::_unused_4
pseudo_bit_t _unused_4[1]
Definition qib_7322_regs.h:477

QIB_7322_ErrClear_pb::SendVLMismatchErrMask
pseudo_bit_t SendVLMismatchErrMask[1]
Definition qib_7322_regs.h:473

QIB_7322_ErrClear_pb::HardwareErrClear
pseudo_bit_t HardwareErrClear[1]
Definition qib_7322_regs.h:482

QIB_7322_ErrClear_pb::RcvContextShareErrClear
pseudo_bit_t RcvContextShareErrClear[1]
Definition qib_7322_regs.h:475

QIB_7322_ErrClear_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:467

QIB_7322_ErrClear_pb::RcvHdrFullErrClear
pseudo_bit_t RcvHdrFullErrClear[1]
Definition qib_7322_regs.h:466

QIB_7322_ErrClear_pb::SDmaVL15ErrClear
pseudo_bit_t SDmaVL15ErrClear[1]
Definition qib_7322_regs.h:479

QIB_7322_ErrClear_pb::SendSpecialTriggerErrClear
pseudo_bit_t SendSpecialTriggerErrClear[1]
Definition qib_7322_regs.h:470

QIB_7322_ErrClear_pb::ResetNegatedClear
pseudo_bit_t ResetNegatedClear[1]
Definition qib_7322_regs.h:483

QIB_7322_ErrClear_pb::SDmaWrongPortErrClear
pseudo_bit_t SDmaWrongPortErrClear[1]
Definition qib_7322_regs.h:469

QIB_7322_ErrClear_pb::RcvEgrFullErrClear
pseudo_bit_t RcvEgrFullErrClear[1]
Definition qib_7322_regs.h:465

QIB_7322_ErrClear_pb::InvalidAddrErrClear
pseudo_bit_t InvalidAddrErrClear[1]
Definition qib_7322_regs.h:481

QIB_7322_ErrClear_pb::_unused_5
pseudo_bit_t _unused_5[4]
Definition qib_7322_regs.h:480

QIB_7322_ErrClear_pb::InvalidEEPCmdErrClear
pseudo_bit_t InvalidEEPCmdErrClear[1]
Definition qib_7322_regs.h:476

QIB_7322_ErrClear_pb::_unused_2
pseudo_bit_t _unused_2[7]
Definition qib_7322_regs.h:471

QIB_7322_ErrClear
Definition qib_7322_regs.h:485

QIB_7322_ErrClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrClear_pb)

QIB_7322_ErrMask_0_pb
Definition qib_7322_regs.h:2532

QIB_7322_ErrMask_0_pb::SendBufMisuseErrMask
pseudo_bit_t SendBufMisuseErrMask[1]
Definition qib_7322_regs.h:2560

QIB_7322_ErrMask_0_pb::SDmaUnexpDataErrMask
pseudo_bit_t SDmaUnexpDataErrMask[1]
Definition qib_7322_regs.h:2569

QIB_7322_ErrMask_0_pb::SDmaRpyTagErrMask
pseudo_bit_t SDmaRpyTagErrMask[1]
Definition qib_7322_regs.h:2566

QIB_7322_ErrMask_0_pb::SDmaBaseErrMask
pseudo_bit_t SDmaBaseErrMask[1]
Definition qib_7322_regs.h:2564

QIB_7322_ErrMask_0_pb::IBStatusChangedMask
pseudo_bit_t IBStatusChangedMask[1]
Definition qib_7322_regs.h:2576

QIB_7322_ErrMask_0_pb::RcvIBLostLinkErrMask
pseudo_bit_t RcvIBLostLinkErrMask[1]
Definition qib_7322_regs.h:2549

QIB_7322_ErrMask_0_pb::RcvBadTidErrMask
pseudo_bit_t RcvBadTidErrMask[1]
Definition qib_7322_regs.h:2546

QIB_7322_ErrMask_0_pb::SendMaxPktLenErrMask
pseudo_bit_t SendMaxPktLenErrMask[1]
Definition qib_7322_regs.h:2552

QIB_7322_ErrMask_0_pb::RcvICRCErrMask
pseudo_bit_t RcvICRCErrMask[1]
Definition qib_7322_regs.h:2535

QIB_7322_ErrMask_0_pb::SDmaHaltErrMask
pseudo_bit_t SDmaHaltErrMask[1]
Definition qib_7322_regs.h:2571

QIB_7322_ErrMask_0_pb::SDmaGenMismatchErrMask
pseudo_bit_t SDmaGenMismatchErrMask[1]
Definition qib_7322_regs.h:2561

QIB_7322_ErrMask_0_pb::SendDroppedSmpPktErrMask
pseudo_bit_t SendDroppedSmpPktErrMask[1]
Definition qib_7322_regs.h:2555

QIB_7322_ErrMask_0_pb::RcvBadVersionErrMask
pseudo_bit_t RcvBadVersionErrMask[1]
Definition qib_7322_regs.h:2544

QIB_7322_ErrMask_0_pb::SendUnderRunErrMask
pseudo_bit_t SendUnderRunErrMask[1]
Definition qib_7322_regs.h:2553

QIB_7322_ErrMask_0_pb::_unused_5
pseudo_bit_t _unused_5[5]
Definition qib_7322_regs.h:2577

QIB_7322_ErrMask_0_pb::SDmaOutOfBoundErrMask
pseudo_bit_t SDmaOutOfBoundErrMask[1]
Definition qib_7322_regs.h:2562

QIB_7322_ErrMask_0_pb::RcvHdrLenErrMask
pseudo_bit_t RcvHdrLenErrMask[1]
Definition qib_7322_regs.h:2547

QIB_7322_ErrMask_0_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:2572

QIB_7322_ErrMask_0_pb::SendMinPktLenErrMask
pseudo_bit_t SendMinPktLenErrMask[1]
Definition qib_7322_regs.h:2551

QIB_7322_ErrMask_0_pb::SendUnsupportedVLErrMask
pseudo_bit_t SendUnsupportedVLErrMask[1]
Definition qib_7322_regs.h:2559

QIB_7322_ErrMask_0_pb::RcvShortPktLenErrMask
pseudo_bit_t RcvShortPktLenErrMask[1]
Definition qib_7322_regs.h:2539

QIB_7322_ErrMask_0_pb::SendPktLenErrMask
pseudo_bit_t SendPktLenErrMask[1]
Definition qib_7322_regs.h:2554

QIB_7322_ErrMask_0_pb::RcvEBPErrMask
pseudo_bit_t RcvEBPErrMask[1]
Definition qib_7322_regs.h:2542

QIB_7322_ErrMask_0_pb::SDma1stDescErrMask
pseudo_bit_t SDma1stDescErrMask[1]
Definition qib_7322_regs.h:2565

QIB_7322_ErrMask_0_pb::VL15BufMisuseErrMask
pseudo_bit_t VL15BufMisuseErrMask[1]
Definition qib_7322_regs.h:2573

QIB_7322_ErrMask_0_pb::SendDroppedDataPktErrMask
pseudo_bit_t SendDroppedDataPktErrMask[1]
Definition qib_7322_regs.h:2556

QIB_7322_ErrMask_0_pb::SHeadersErrMask
pseudo_bit_t SHeadersErrMask[1]
Definition qib_7322_regs.h:2575

QIB_7322_ErrMask_0_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:2550

QIB_7322_ErrMask_0_pb::SendUnexpectedPktNumErrMask
pseudo_bit_t SendUnexpectedPktNumErrMask[1]
Definition qib_7322_regs.h:2558

QIB_7322_ErrMask_0_pb::SDmaMissingDwErrMask
pseudo_bit_t SDmaMissingDwErrMask[1]
Definition qib_7322_regs.h:2568

QIB_7322_ErrMask_0_pb::RcvHdrErrMask
pseudo_bit_t RcvHdrErrMask[1]
Definition qib_7322_regs.h:2548

QIB_7322_ErrMask_0_pb::RcvLongPktLenErrMask
pseudo_bit_t RcvLongPktLenErrMask[1]
Definition qib_7322_regs.h:2538

QIB_7322_ErrMask_0_pb::SDmaTailOutOfBoundErrMask
pseudo_bit_t SDmaTailOutOfBoundErrMask[1]
Definition qib_7322_regs.h:2563

QIB_7322_ErrMask_0_pb::SDmaDescAddrMisalignErrMask
pseudo_bit_t SDmaDescAddrMisalignErrMask[1]
Definition qib_7322_regs.h:2570

QIB_7322_ErrMask_0_pb::_unused_4
pseudo_bit_t _unused_4[2]
Definition qib_7322_regs.h:2574

QIB_7322_ErrMask_0_pb::SDmaDwEnErrMask
pseudo_bit_t SDmaDwEnErrMask[1]
Definition qib_7322_regs.h:2567

QIB_7322_ErrMask_0_pb::RcvUnsupportedVLErrMask
pseudo_bit_t RcvUnsupportedVLErrMask[1]
Definition qib_7322_regs.h:2541

QIB_7322_ErrMask_0_pb::RcvFormatErrMask
pseudo_bit_t RcvFormatErrMask[1]
Definition qib_7322_regs.h:2533

QIB_7322_ErrMask_0_pb::RcvMaxPktLenErrMask
pseudo_bit_t RcvMaxPktLenErrMask[1]
Definition qib_7322_regs.h:2537

QIB_7322_ErrMask_0_pb::RcvVCRCErrMask
pseudo_bit_t RcvVCRCErrMask[1]
Definition qib_7322_regs.h:2534

QIB_7322_ErrMask_0_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:2545

QIB_7322_ErrMask_0_pb::RcvMinPktLenErrMask
pseudo_bit_t RcvMinPktLenErrMask[1]
Definition qib_7322_regs.h:2536

QIB_7322_ErrMask_0_pb::RcvUnexpectedCharErrMask
pseudo_bit_t RcvUnexpectedCharErrMask[1]
Definition qib_7322_regs.h:2540

QIB_7322_ErrMask_0_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:2557

QIB_7322_ErrMask_0_pb::RcvIBFlowErrMask
pseudo_bit_t RcvIBFlowErrMask[1]
Definition qib_7322_regs.h:2543

QIB_7322_ErrMask_0
Definition qib_7322_regs.h:2579

QIB_7322_ErrMask_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrMask_0_pb)

QIB_7322_ErrMask_1_pb
Definition qib_7322_regs.h:3865

QIB_7322_ErrMask_1_pb::SDmaMissingDwErrMask
pseudo_bit_t SDmaMissingDwErrMask[1]
Definition qib_7322_regs.h:3901

QIB_7322_ErrMask_1_pb::SDmaUnexpDataErrMask
pseudo_bit_t SDmaUnexpDataErrMask[1]
Definition qib_7322_regs.h:3902

QIB_7322_ErrMask_1_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:3883

QIB_7322_ErrMask_1_pb::SDmaDescAddrMisalignErrMask
pseudo_bit_t SDmaDescAddrMisalignErrMask[1]
Definition qib_7322_regs.h:3903

QIB_7322_ErrMask_1_pb::RcvEBPErrMask
pseudo_bit_t RcvEBPErrMask[1]
Definition qib_7322_regs.h:3875

QIB_7322_ErrMask_1_pb::SDmaGenMismatchErrMask
pseudo_bit_t SDmaGenMismatchErrMask[1]
Definition qib_7322_regs.h:3894

QIB_7322_ErrMask_1_pb::SHeadersErrMask
pseudo_bit_t SHeadersErrMask[1]
Definition qib_7322_regs.h:3908

QIB_7322_ErrMask_1_pb::RcvHdrErrMask
pseudo_bit_t RcvHdrErrMask[1]
Definition qib_7322_regs.h:3881

QIB_7322_ErrMask_1_pb::RcvShortPktLenErrMask
pseudo_bit_t RcvShortPktLenErrMask[1]
Definition qib_7322_regs.h:3872

QIB_7322_ErrMask_1_pb::SDmaRpyTagErrMask
pseudo_bit_t SDmaRpyTagErrMask[1]
Definition qib_7322_regs.h:3899

QIB_7322_ErrMask_1_pb::SendDroppedDataPktErrMask
pseudo_bit_t SendDroppedDataPktErrMask[1]
Definition qib_7322_regs.h:3889

QIB_7322_ErrMask_1_pb::RcvMaxPktLenErrMask
pseudo_bit_t RcvMaxPktLenErrMask[1]
Definition qib_7322_regs.h:3870

QIB_7322_ErrMask_1_pb::RcvBadTidErrMask
pseudo_bit_t RcvBadTidErrMask[1]
Definition qib_7322_regs.h:3879

QIB_7322_ErrMask_1_pb::SDmaOutOfBoundErrMask
pseudo_bit_t SDmaOutOfBoundErrMask[1]
Definition qib_7322_regs.h:3895

QIB_7322_ErrMask_1_pb::SendPktLenErrMask
pseudo_bit_t SendPktLenErrMask[1]
Definition qib_7322_regs.h:3887

QIB_7322_ErrMask_1_pb::RcvHdrLenErrMask
pseudo_bit_t RcvHdrLenErrMask[1]
Definition qib_7322_regs.h:3880

QIB_7322_ErrMask_1_pb::IBStatusChangedMask
pseudo_bit_t IBStatusChangedMask[1]
Definition qib_7322_regs.h:3909

QIB_7322_ErrMask_1_pb::RcvVCRCErrMask
pseudo_bit_t RcvVCRCErrMask[1]
Definition qib_7322_regs.h:3867

QIB_7322_ErrMask_1_pb::RcvBadVersionErrMask
pseudo_bit_t RcvBadVersionErrMask[1]
Definition qib_7322_regs.h:3877

QIB_7322_ErrMask_1_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:3905

QIB_7322_ErrMask_1_pb::VL15BufMisuseErrMask
pseudo_bit_t VL15BufMisuseErrMask[1]
Definition qib_7322_regs.h:3906

QIB_7322_ErrMask_1_pb::_unused_5
pseudo_bit_t _unused_5[5]
Definition qib_7322_regs.h:3910

QIB_7322_ErrMask_1_pb::SendUnexpectedPktNumErrMask
pseudo_bit_t SendUnexpectedPktNumErrMask[1]
Definition qib_7322_regs.h:3891

QIB_7322_ErrMask_1_pb::RcvMinPktLenErrMask
pseudo_bit_t RcvMinPktLenErrMask[1]
Definition qib_7322_regs.h:3869

QIB_7322_ErrMask_1_pb::SendMinPktLenErrMask
pseudo_bit_t SendMinPktLenErrMask[1]
Definition qib_7322_regs.h:3884

QIB_7322_ErrMask_1_pb::SendUnsupportedVLErrMask
pseudo_bit_t SendUnsupportedVLErrMask[1]
Definition qib_7322_regs.h:3892

QIB_7322_ErrMask_1_pb::SDmaTailOutOfBoundErrMask
pseudo_bit_t SDmaTailOutOfBoundErrMask[1]
Definition qib_7322_regs.h:3896

QIB_7322_ErrMask_1_pb::RcvUnexpectedCharErrMask
pseudo_bit_t RcvUnexpectedCharErrMask[1]
Definition qib_7322_regs.h:3873

QIB_7322_ErrMask_1_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:3878

QIB_7322_ErrMask_1_pb::RcvIBLostLinkErrMask
pseudo_bit_t RcvIBLostLinkErrMask[1]
Definition qib_7322_regs.h:3882

QIB_7322_ErrMask_1_pb::SendMaxPktLenErrMask
pseudo_bit_t SendMaxPktLenErrMask[1]
Definition qib_7322_regs.h:3885

QIB_7322_ErrMask_1_pb::SDmaDwEnErrMask
pseudo_bit_t SDmaDwEnErrMask[1]
Definition qib_7322_regs.h:3900

QIB_7322_ErrMask_1_pb::SDmaBaseErrMask
pseudo_bit_t SDmaBaseErrMask[1]
Definition qib_7322_regs.h:3897

QIB_7322_ErrMask_1_pb::RcvICRCErrMask
pseudo_bit_t RcvICRCErrMask[1]
Definition qib_7322_regs.h:3868

QIB_7322_ErrMask_1_pb::SDmaHaltErrMask
pseudo_bit_t SDmaHaltErrMask[1]
Definition qib_7322_regs.h:3904

QIB_7322_ErrMask_1_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:3890

QIB_7322_ErrMask_1_pb::SendUnderRunErrMask
pseudo_bit_t SendUnderRunErrMask[1]
Definition qib_7322_regs.h:3886

QIB_7322_ErrMask_1_pb::RcvFormatErrMask
pseudo_bit_t RcvFormatErrMask[1]
Definition qib_7322_regs.h:3866

QIB_7322_ErrMask_1_pb::RcvUnsupportedVLErrMask
pseudo_bit_t RcvUnsupportedVLErrMask[1]
Definition qib_7322_regs.h:3874

QIB_7322_ErrMask_1_pb::SendDroppedSmpPktErrMask
pseudo_bit_t SendDroppedSmpPktErrMask[1]
Definition qib_7322_regs.h:3888

QIB_7322_ErrMask_1_pb::RcvIBFlowErrMask
pseudo_bit_t RcvIBFlowErrMask[1]
Definition qib_7322_regs.h:3876

QIB_7322_ErrMask_1_pb::SendBufMisuseErrMask
pseudo_bit_t SendBufMisuseErrMask[1]
Definition qib_7322_regs.h:3893

QIB_7322_ErrMask_1_pb::_unused_4
pseudo_bit_t _unused_4[2]
Definition qib_7322_regs.h:3907

QIB_7322_ErrMask_1_pb::RcvLongPktLenErrMask
pseudo_bit_t RcvLongPktLenErrMask[1]
Definition qib_7322_regs.h:3871

QIB_7322_ErrMask_1_pb::SDma1stDescErrMask
pseudo_bit_t SDma1stDescErrMask[1]
Definition qib_7322_regs.h:3898

QIB_7322_ErrMask_1
Definition qib_7322_regs.h:3912

QIB_7322_ErrMask_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrMask_1_pb)

QIB_7322_ErrMask_pb
Definition qib_7322_regs.h:407

QIB_7322_ErrMask_pb::_unused_3
pseudo_bit_t _unused_3[15]
Definition qib_7322_regs.h:418

QIB_7322_ErrMask_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:411

QIB_7322_ErrMask_pb::SendArmLaunchErrMask
pseudo_bit_t SendArmLaunchErrMask[1]
Definition qib_7322_regs.h:416

QIB_7322_ErrMask_pb::_unused_4
pseudo_bit_t _unused_4[1]
Definition qib_7322_regs.h:421

QIB_7322_ErrMask_pb::RcvEgrFullErrMask
pseudo_bit_t RcvEgrFullErrMask[1]
Definition qib_7322_regs.h:409

QIB_7322_ErrMask_pb::SDmaVL15ErrMask
pseudo_bit_t SDmaVL15ErrMask[1]
Definition qib_7322_regs.h:423

QIB_7322_ErrMask_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:408

QIB_7322_ErrMask_pb::_unused_2
pseudo_bit_t _unused_2[7]
Definition qib_7322_regs.h:415

QIB_7322_ErrMask_pb::InvalidEEPCmdMask
pseudo_bit_t InvalidEEPCmdMask[1]
Definition qib_7322_regs.h:420

QIB_7322_ErrMask_pb::SendSpecialTriggerErrMask
pseudo_bit_t SendSpecialTriggerErrMask[1]
Definition qib_7322_regs.h:414

QIB_7322_ErrMask_pb::SBufVL15MisUseErrMask
pseudo_bit_t SBufVL15MisUseErrMask[1]
Definition qib_7322_regs.h:422

QIB_7322_ErrMask_pb::InvalidAddrErrMask
pseudo_bit_t InvalidAddrErrMask[1]
Definition qib_7322_regs.h:425

QIB_7322_ErrMask_pb::RcvHdrFullErrMask
pseudo_bit_t RcvHdrFullErrMask[1]
Definition qib_7322_regs.h:410

QIB_7322_ErrMask_pb::_unused_5
pseudo_bit_t _unused_5[4]
Definition qib_7322_regs.h:424

QIB_7322_ErrMask_pb::SDmaWrongPortErrMask
pseudo_bit_t SDmaWrongPortErrMask[1]
Definition qib_7322_regs.h:413

QIB_7322_ErrMask_pb::SendVLMismatchErrMask
pseudo_bit_t SendVLMismatchErrMask[1]
Definition qib_7322_regs.h:417

QIB_7322_ErrMask_pb::HardwareErrMask
pseudo_bit_t HardwareErrMask[1]
Definition qib_7322_regs.h:426

QIB_7322_ErrMask_pb::ResetNegatedMask
pseudo_bit_t ResetNegatedMask[1]
Definition qib_7322_regs.h:427

QIB_7322_ErrMask_pb::RcvContextShareErrMask
pseudo_bit_t RcvContextShareErrMask[1]
Definition qib_7322_regs.h:419

QIB_7322_ErrMask_pb::SDmaBufMaskDuplicateErrMask
pseudo_bit_t SDmaBufMaskDuplicateErrMask[1]
Definition qib_7322_regs.h:412

QIB_7322_ErrMask
Definition qib_7322_regs.h:429

QIB_7322_ErrMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrMask_pb)

QIB_7322_ErrStatus_0_pb
Definition qib_7322_regs.h:2585

QIB_7322_ErrStatus_0_pb::RcvUnsupportedVLErr
pseudo_bit_t RcvUnsupportedVLErr[1]
Definition qib_7322_regs.h:2594

QIB_7322_ErrStatus_0_pb::RcvIBLostLinkErr
pseudo_bit_t RcvIBLostLinkErr[1]
Definition qib_7322_regs.h:2602

QIB_7322_ErrStatus_0_pb::SDmaDwEnErr
pseudo_bit_t SDmaDwEnErr[1]
Definition qib_7322_regs.h:2620

QIB_7322_ErrStatus_0_pb::SDmaGenMismatchErr
pseudo_bit_t SDmaGenMismatchErr[1]
Definition qib_7322_regs.h:2614

QIB_7322_ErrStatus_0_pb::IBStatusChanged
pseudo_bit_t IBStatusChanged[1]
Definition qib_7322_regs.h:2629

QIB_7322_ErrStatus_0_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:2610

QIB_7322_ErrStatus_0_pb::RcvBadTidErr
pseudo_bit_t RcvBadTidErr[1]
Definition qib_7322_regs.h:2599

QIB_7322_ErrStatus_0_pb::RcvVCRCErr
pseudo_bit_t RcvVCRCErr[1]
Definition qib_7322_regs.h:2587

QIB_7322_ErrStatus_0_pb::SDmaUnexpDataErr
pseudo_bit_t SDmaUnexpDataErr[1]
Definition qib_7322_regs.h:2622

QIB_7322_ErrStatus_0_pb::RcvICRCErr
pseudo_bit_t RcvICRCErr[1]
Definition qib_7322_regs.h:2588

QIB_7322_ErrStatus_0_pb::SendPktLenErr
pseudo_bit_t SendPktLenErr[1]
Definition qib_7322_regs.h:2607

QIB_7322_ErrStatus_0_pb::_unused_4
pseudo_bit_t _unused_4[2]
Definition qib_7322_regs.h:2627

QIB_7322_ErrStatus_0_pb::RcvHdrLenErr
pseudo_bit_t RcvHdrLenErr[1]
Definition qib_7322_regs.h:2600

QIB_7322_ErrStatus_0_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:2603

QIB_7322_ErrStatus_0_pb::SendMinPktLenErr
pseudo_bit_t SendMinPktLenErr[1]
Definition qib_7322_regs.h:2604

QIB_7322_ErrStatus_0_pb::SDmaRpyTagErr
pseudo_bit_t SDmaRpyTagErr[1]
Definition qib_7322_regs.h:2619

QIB_7322_ErrStatus_0_pb::SendUnderRunErr
pseudo_bit_t SendUnderRunErr[1]
Definition qib_7322_regs.h:2606

QIB_7322_ErrStatus_0_pb::SDmaTailOutOfBoundErr
pseudo_bit_t SDmaTailOutOfBoundErr[1]
Definition qib_7322_regs.h:2616

QIB_7322_ErrStatus_0_pb::SDmaOutOfBoundErr
pseudo_bit_t SDmaOutOfBoundErr[1]
Definition qib_7322_regs.h:2615

QIB_7322_ErrStatus_0_pb::SDma1stDescErr
pseudo_bit_t SDma1stDescErr[1]
Definition qib_7322_regs.h:2618

QIB_7322_ErrStatus_0_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:2625

QIB_7322_ErrStatus_0_pb::SendDroppedDataPktErr
pseudo_bit_t SendDroppedDataPktErr[1]
Definition qib_7322_regs.h:2609

QIB_7322_ErrStatus_0_pb::RcvHdrErr
pseudo_bit_t RcvHdrErr[1]
Definition qib_7322_regs.h:2601

QIB_7322_ErrStatus_0_pb::SDmaHaltErr
pseudo_bit_t SDmaHaltErr[1]
Definition qib_7322_regs.h:2624

QIB_7322_ErrStatus_0_pb::SendMaxPktLenErr
pseudo_bit_t SendMaxPktLenErr[1]
Definition qib_7322_regs.h:2605

QIB_7322_ErrStatus_0_pb::_unused_5
pseudo_bit_t _unused_5[5]
Definition qib_7322_regs.h:2630

QIB_7322_ErrStatus_0_pb::SDmaBaseErr
pseudo_bit_t SDmaBaseErr[1]
Definition qib_7322_regs.h:2617

QIB_7322_ErrStatus_0_pb::RcvMinPktLenErr
pseudo_bit_t RcvMinPktLenErr[1]
Definition qib_7322_regs.h:2589

QIB_7322_ErrStatus_0_pb::RcvIBFlowErr
pseudo_bit_t RcvIBFlowErr[1]
Definition qib_7322_regs.h:2596

QIB_7322_ErrStatus_0_pb::VL15BufMisuseErr
pseudo_bit_t VL15BufMisuseErr[1]
Definition qib_7322_regs.h:2626

QIB_7322_ErrStatus_0_pb::SendUnexpectedPktNumErr
pseudo_bit_t SendUnexpectedPktNumErr[1]
Definition qib_7322_regs.h:2611

QIB_7322_ErrStatus_0_pb::RcvFormatErr
pseudo_bit_t RcvFormatErr[1]
Definition qib_7322_regs.h:2586

QIB_7322_ErrStatus_0_pb::RcvEBPErr
pseudo_bit_t RcvEBPErr[1]
Definition qib_7322_regs.h:2595

QIB_7322_ErrStatus_0_pb::RcvLongPktLenErr
pseudo_bit_t RcvLongPktLenErr[1]
Definition qib_7322_regs.h:2591

QIB_7322_ErrStatus_0_pb::SendUnsupportedVLErr
pseudo_bit_t SendUnsupportedVLErr[1]
Definition qib_7322_regs.h:2612

QIB_7322_ErrStatus_0_pb::RcvShortPktLenErr
pseudo_bit_t RcvShortPktLenErr[1]
Definition qib_7322_regs.h:2592

QIB_7322_ErrStatus_0_pb::SendBufMisuseErr
pseudo_bit_t SendBufMisuseErr[1]
Definition qib_7322_regs.h:2613

QIB_7322_ErrStatus_0_pb::SDmaDescAddrMisalignErr
pseudo_bit_t SDmaDescAddrMisalignErr[1]
Definition qib_7322_regs.h:2623

QIB_7322_ErrStatus_0_pb::RcvMaxPktLenErr
pseudo_bit_t RcvMaxPktLenErr[1]
Definition qib_7322_regs.h:2590

QIB_7322_ErrStatus_0_pb::RcvUnexpectedCharErr
pseudo_bit_t RcvUnexpectedCharErr[1]
Definition qib_7322_regs.h:2593

QIB_7322_ErrStatus_0_pb::RcvBadVersionErr
pseudo_bit_t RcvBadVersionErr[1]
Definition qib_7322_regs.h:2597

QIB_7322_ErrStatus_0_pb::SendDroppedSmpPktErr
pseudo_bit_t SendDroppedSmpPktErr[1]
Definition qib_7322_regs.h:2608

QIB_7322_ErrStatus_0_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:2598

QIB_7322_ErrStatus_0_pb::SDmaMissingDwErr
pseudo_bit_t SDmaMissingDwErr[1]
Definition qib_7322_regs.h:2621

QIB_7322_ErrStatus_0_pb::SHeadersErr
pseudo_bit_t SHeadersErr[1]
Definition qib_7322_regs.h:2628

QIB_7322_ErrStatus_0
Definition qib_7322_regs.h:2632

QIB_7322_ErrStatus_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrStatus_0_pb)

QIB_7322_ErrStatus_1_pb
Definition qib_7322_regs.h:3918

QIB_7322_ErrStatus_1_pb::RcvUnexpectedCharErr
pseudo_bit_t RcvUnexpectedCharErr[1]
Definition qib_7322_regs.h:3926

QIB_7322_ErrStatus_1_pb::SendUnexpectedPktNumErr
pseudo_bit_t SendUnexpectedPktNumErr[1]
Definition qib_7322_regs.h:3944

QIB_7322_ErrStatus_1_pb::RcvHdrLenErr
pseudo_bit_t RcvHdrLenErr[1]
Definition qib_7322_regs.h:3933

QIB_7322_ErrStatus_1_pb::RcvLongPktLenErr
pseudo_bit_t RcvLongPktLenErr[1]
Definition qib_7322_regs.h:3924

QIB_7322_ErrStatus_1_pb::RcvICRCErr
pseudo_bit_t RcvICRCErr[1]
Definition qib_7322_regs.h:3921

QIB_7322_ErrStatus_1_pb::RcvIBLostLinkErr
pseudo_bit_t RcvIBLostLinkErr[1]
Definition qib_7322_regs.h:3935

QIB_7322_ErrStatus_1_pb::_unused_5
pseudo_bit_t _unused_5[5]
Definition qib_7322_regs.h:3963

QIB_7322_ErrStatus_1_pb::SDmaRpyTagErr
pseudo_bit_t SDmaRpyTagErr[1]
Definition qib_7322_regs.h:3952

QIB_7322_ErrStatus_1_pb::RcvUnsupportedVLErr
pseudo_bit_t RcvUnsupportedVLErr[1]
Definition qib_7322_regs.h:3927

QIB_7322_ErrStatus_1_pb::SendDroppedDataPktErr
pseudo_bit_t SendDroppedDataPktErr[1]
Definition qib_7322_regs.h:3942

QIB_7322_ErrStatus_1_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:3931

QIB_7322_ErrStatus_1_pb::SendUnsupportedVLErr
pseudo_bit_t SendUnsupportedVLErr[1]
Definition qib_7322_regs.h:3945

QIB_7322_ErrStatus_1_pb::SDmaMissingDwErr
pseudo_bit_t SDmaMissingDwErr[1]
Definition qib_7322_regs.h:3954

QIB_7322_ErrStatus_1_pb::RcvMinPktLenErr
pseudo_bit_t RcvMinPktLenErr[1]
Definition qib_7322_regs.h:3922

QIB_7322_ErrStatus_1_pb::SendBufMisuseErr
pseudo_bit_t SendBufMisuseErr[1]
Definition qib_7322_regs.h:3946

QIB_7322_ErrStatus_1_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:3958

QIB_7322_ErrStatus_1_pb::SDmaBaseErr
pseudo_bit_t SDmaBaseErr[1]
Definition qib_7322_regs.h:3950

QIB_7322_ErrStatus_1_pb::VL15BufMisuseErr
pseudo_bit_t VL15BufMisuseErr[1]
Definition qib_7322_regs.h:3959

QIB_7322_ErrStatus_1_pb::IBStatusChanged
pseudo_bit_t IBStatusChanged[1]
Definition qib_7322_regs.h:3962

QIB_7322_ErrStatus_1_pb::SDma1stDescErr
pseudo_bit_t SDma1stDescErr[1]
Definition qib_7322_regs.h:3951

QIB_7322_ErrStatus_1_pb::SendMaxPktLenErr
pseudo_bit_t SendMaxPktLenErr[1]
Definition qib_7322_regs.h:3938

QIB_7322_ErrStatus_1_pb::SDmaTailOutOfBoundErr
pseudo_bit_t SDmaTailOutOfBoundErr[1]
Definition qib_7322_regs.h:3949

QIB_7322_ErrStatus_1_pb::SDmaGenMismatchErr
pseudo_bit_t SDmaGenMismatchErr[1]
Definition qib_7322_regs.h:3947

QIB_7322_ErrStatus_1_pb::RcvIBFlowErr
pseudo_bit_t RcvIBFlowErr[1]
Definition qib_7322_regs.h:3929

QIB_7322_ErrStatus_1_pb::RcvFormatErr
pseudo_bit_t RcvFormatErr[1]
Definition qib_7322_regs.h:3919

QIB_7322_ErrStatus_1_pb::SDmaDescAddrMisalignErr
pseudo_bit_t SDmaDescAddrMisalignErr[1]
Definition qib_7322_regs.h:3956

QIB_7322_ErrStatus_1_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:3943

QIB_7322_ErrStatus_1_pb::SDmaDwEnErr
pseudo_bit_t SDmaDwEnErr[1]
Definition qib_7322_regs.h:3953

QIB_7322_ErrStatus_1_pb::SDmaUnexpDataErr
pseudo_bit_t SDmaUnexpDataErr[1]
Definition qib_7322_regs.h:3955

QIB_7322_ErrStatus_1_pb::RcvShortPktLenErr
pseudo_bit_t RcvShortPktLenErr[1]
Definition qib_7322_regs.h:3925

QIB_7322_ErrStatus_1_pb::RcvHdrErr
pseudo_bit_t RcvHdrErr[1]
Definition qib_7322_regs.h:3934

QIB_7322_ErrStatus_1_pb::RcvBadTidErr
pseudo_bit_t RcvBadTidErr[1]
Definition qib_7322_regs.h:3932

QIB_7322_ErrStatus_1_pb::SendPktLenErr
pseudo_bit_t SendPktLenErr[1]
Definition qib_7322_regs.h:3940

QIB_7322_ErrStatus_1_pb::SendMinPktLenErr
pseudo_bit_t SendMinPktLenErr[1]
Definition qib_7322_regs.h:3937

QIB_7322_ErrStatus_1_pb::RcvMaxPktLenErr
pseudo_bit_t RcvMaxPktLenErr[1]
Definition qib_7322_regs.h:3923

QIB_7322_ErrStatus_1_pb::RcvVCRCErr
pseudo_bit_t RcvVCRCErr[1]
Definition qib_7322_regs.h:3920

QIB_7322_ErrStatus_1_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:3936

QIB_7322_ErrStatus_1_pb::SHeadersErr
pseudo_bit_t SHeadersErr[1]
Definition qib_7322_regs.h:3961

QIB_7322_ErrStatus_1_pb::_unused_4
pseudo_bit_t _unused_4[2]
Definition qib_7322_regs.h:3960

QIB_7322_ErrStatus_1_pb::RcvEBPErr
pseudo_bit_t RcvEBPErr[1]
Definition qib_7322_regs.h:3928

QIB_7322_ErrStatus_1_pb::SDmaHaltErr
pseudo_bit_t SDmaHaltErr[1]
Definition qib_7322_regs.h:3957

QIB_7322_ErrStatus_1_pb::SendUnderRunErr
pseudo_bit_t SendUnderRunErr[1]
Definition qib_7322_regs.h:3939

QIB_7322_ErrStatus_1_pb::SDmaOutOfBoundErr
pseudo_bit_t SDmaOutOfBoundErr[1]
Definition qib_7322_regs.h:3948

QIB_7322_ErrStatus_1_pb::SendDroppedSmpPktErr
pseudo_bit_t SendDroppedSmpPktErr[1]
Definition qib_7322_regs.h:3941

QIB_7322_ErrStatus_1_pb::RcvBadVersionErr
pseudo_bit_t RcvBadVersionErr[1]
Definition qib_7322_regs.h:3930

QIB_7322_ErrStatus_1
Definition qib_7322_regs.h:3965

QIB_7322_ErrStatus_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrStatus_1_pb)

QIB_7322_ErrStatus_pb
Definition qib_7322_regs.h:435

QIB_7322_ErrStatus_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:436

QIB_7322_ErrStatus_pb::_unused_3
pseudo_bit_t _unused_3[15]
Definition qib_7322_regs.h:446

QIB_7322_ErrStatus_pb::SDmaWrongPortErr
pseudo_bit_t SDmaWrongPortErr[1]
Definition qib_7322_regs.h:441

QIB_7322_ErrStatus_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:439

QIB_7322_ErrStatus_pb::SBufVL15MisUseErr
pseudo_bit_t SBufVL15MisUseErr[1]
Definition qib_7322_regs.h:450

QIB_7322_ErrStatus_pb::RcvEgrFullErr
pseudo_bit_t RcvEgrFullErr[1]
Definition qib_7322_regs.h:437

QIB_7322_ErrStatus_pb::SendVLMismatchErr
pseudo_bit_t SendVLMismatchErr[1]
Definition qib_7322_regs.h:445

QIB_7322_ErrStatus_pb::RcvContextShareErr
pseudo_bit_t RcvContextShareErr[1]
Definition qib_7322_regs.h:447

QIB_7322_ErrStatus_pb::SendArmLaunchErr
pseudo_bit_t SendArmLaunchErr[1]
Definition qib_7322_regs.h:444

QIB_7322_ErrStatus_pb::RcvHdrFullErr
pseudo_bit_t RcvHdrFullErr[1]
Definition qib_7322_regs.h:438

QIB_7322_ErrStatus_pb::HardwareErr
pseudo_bit_t HardwareErr[1]
Definition qib_7322_regs.h:454

QIB_7322_ErrStatus_pb::SDmaVL15Err
pseudo_bit_t SDmaVL15Err[1]
Definition qib_7322_regs.h:451

QIB_7322_ErrStatus_pb::_unused_2
pseudo_bit_t _unused_2[7]
Definition qib_7322_regs.h:443

QIB_7322_ErrStatus_pb::_unused_5
pseudo_bit_t _unused_5[4]
Definition qib_7322_regs.h:452

QIB_7322_ErrStatus_pb::_unused_4
pseudo_bit_t _unused_4[1]
Definition qib_7322_regs.h:449

QIB_7322_ErrStatus_pb::InvalidAddrErr
pseudo_bit_t InvalidAddrErr[1]
Definition qib_7322_regs.h:453

QIB_7322_ErrStatus_pb::ResetNegated
pseudo_bit_t ResetNegated[1]
Definition qib_7322_regs.h:455

QIB_7322_ErrStatus_pb::SendSpecialTriggerErr
pseudo_bit_t SendSpecialTriggerErr[1]
Definition qib_7322_regs.h:442

QIB_7322_ErrStatus_pb::SDmaBufMaskDuplicateErr
pseudo_bit_t SDmaBufMaskDuplicateErr[1]
Definition qib_7322_regs.h:440

QIB_7322_ErrStatus_pb::InvalidEEPCmdErr
pseudo_bit_t InvalidEEPCmdErr[1]
Definition qib_7322_regs.h:448

QIB_7322_ErrStatus
Definition qib_7322_regs.h:457

QIB_7322_ErrStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ErrStatus_pb)

QIB_7322_GPIODebugSelReg_pb
Definition qib_7322_regs.h:629

QIB_7322_GPIODebugSelReg_pb::GPIOSourceSelDebug
pseudo_bit_t GPIOSourceSelDebug[16]
Definition qib_7322_regs.h:630

QIB_7322_GPIODebugSelReg_pb::SelPulse
pseudo_bit_t SelPulse[16]
Definition qib_7322_regs.h:631

QIB_7322_GPIODebugSelReg_pb::_unused_0
pseudo_bit_t _unused_0[32]
Definition qib_7322_regs.h:632

QIB_7322_GPIODebugSelReg
Definition qib_7322_regs.h:634

QIB_7322_GPIODebugSelReg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_GPIODebugSelReg_pb)

QIB_7322_HighPriority0_0_pb
Definition qib_7322_regs.h:3850

QIB_7322_HighPriority0_0_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:3852

QIB_7322_HighPriority0_0_pb::_unused_1
pseudo_bit_t _unused_1[45]
Definition qib_7322_regs.h:3854

QIB_7322_HighPriority0_0_pb::Weight
pseudo_bit_t Weight[8]
Definition qib_7322_regs.h:3851

QIB_7322_HighPriority0_0_pb::VirtualLane
pseudo_bit_t VirtualLane[3]
Definition qib_7322_regs.h:3853

QIB_7322_HighPriority0_0
Definition qib_7322_regs.h:3856

QIB_7322_HighPriority0_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriority0_0_pb)

QIB_7322_HighPriority0_1_pb
Definition qib_7322_regs.h:5180

QIB_7322_HighPriority0_1_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:5182

QIB_7322_HighPriority0_1_pb::_unused_1
pseudo_bit_t _unused_1[45]
Definition qib_7322_regs.h:5184

QIB_7322_HighPriority0_1_pb::Weight
pseudo_bit_t Weight[8]
Definition qib_7322_regs.h:5181

QIB_7322_HighPriority0_1_pb::VirtualLane
pseudo_bit_t VirtualLane[3]
Definition qib_7322_regs.h:5183

QIB_7322_HighPriority0_1
Definition qib_7322_regs.h:5186

QIB_7322_HighPriority0_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriority0_1_pb)

QIB_7322_HighPriorityLimit_0_pb
Definition qib_7322_regs.h:3828

QIB_7322_HighPriorityLimit_0_pb::_unused_0
pseudo_bit_t _unused_0[56]
Definition qib_7322_regs.h:3830

QIB_7322_HighPriorityLimit_0_pb::Limit
pseudo_bit_t Limit[8]
Definition qib_7322_regs.h:3829

QIB_7322_HighPriorityLimit_0
Definition qib_7322_regs.h:3832

QIB_7322_HighPriorityLimit_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriorityLimit_0_pb)

QIB_7322_HighPriorityLimit_1_pb
Definition qib_7322_regs.h:5158

QIB_7322_HighPriorityLimit_1_pb::Limit
pseudo_bit_t Limit[8]
Definition qib_7322_regs.h:5159

QIB_7322_HighPriorityLimit_1_pb::_unused_0
pseudo_bit_t _unused_0[56]
Definition qib_7322_regs.h:5160

QIB_7322_HighPriorityLimit_1
Definition qib_7322_regs.h:5162

QIB_7322_HighPriorityLimit_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HighPriorityLimit_1_pb)

QIB_7322_HwDiagCtrl_pb
Definition qib_7322_regs.h:581

QIB_7322_HwDiagCtrl_pb::Diagnostic
pseudo_bit_t Diagnostic[1]
Definition qib_7322_regs.h:593

QIB_7322_HwDiagCtrl_pb::ForceIBCBusFromSPCParityErr_1
pseudo_bit_t ForceIBCBusFromSPCParityErr_1[1]
Definition qib_7322_regs.h:586

QIB_7322_HwDiagCtrl_pb::ForceIBCBusFromSPCParityErr_0
pseudo_bit_t ForceIBCBusFromSPCParityErr_0[1]
Definition qib_7322_regs.h:584

QIB_7322_HwDiagCtrl_pb::forcePCIeBusParity
pseudo_bit_t forcePCIeBusParity[4]
Definition qib_7322_regs.h:588

QIB_7322_HwDiagCtrl_pb::_unused_3
pseudo_bit_t _unused_3[1]
Definition qib_7322_regs.h:592

QIB_7322_HwDiagCtrl_pb::CounterWrEnable
pseudo_bit_t CounterWrEnable[1]
Definition qib_7322_regs.h:591

QIB_7322_HwDiagCtrl_pb::_unused_1
pseudo_bit_t _unused_1[15]
Definition qib_7322_regs.h:587

QIB_7322_HwDiagCtrl_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:582

QIB_7322_HwDiagCtrl_pb::_unused_2
pseudo_bit_t _unused_2[25]
Definition qib_7322_regs.h:589

QIB_7322_HwDiagCtrl_pb::ForcestatusValidNoEop_0
pseudo_bit_t ForcestatusValidNoEop_0[1]
Definition qib_7322_regs.h:583

QIB_7322_HwDiagCtrl_pb::ForcestatusValidNoEop_1
pseudo_bit_t ForcestatusValidNoEop_1[1]
Definition qib_7322_regs.h:585

QIB_7322_HwDiagCtrl_pb::CounterDisable
pseudo_bit_t CounterDisable[1]
Definition qib_7322_regs.h:590

QIB_7322_HwDiagCtrl
Definition qib_7322_regs.h:595

QIB_7322_HwDiagCtrl::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HwDiagCtrl_pb)

QIB_7322_HwErrClear_pb
Definition qib_7322_regs.h:551

QIB_7322_HwErrClear_pb::LATriggeredClear
pseudo_bit_t LATriggeredClear[1]
Definition qib_7322_regs.h:553

QIB_7322_HwErrClear_pb::SDmaMemReadErrClear_0
pseudo_bit_t SDmaMemReadErrClear_0[1]
Definition qib_7322_regs.h:559

QIB_7322_HwErrClear_pb::MemoryErrClear
pseudo_bit_t MemoryErrClear[1]
Definition qib_7322_regs.h:566

QIB_7322_HwErrClear_pb::PowerOnBISTFailedClear
pseudo_bit_t PowerOnBISTFailedClear[1]
Definition qib_7322_regs.h:569

QIB_7322_HwErrClear_pb::PciePoisonedTLPClear
pseudo_bit_t PciePoisonedTLPClear[1]
Definition qib_7322_regs.h:561

QIB_7322_HwErrClear_pb::_unused_2
pseudo_bit_t _unused_2[13]
Definition qib_7322_regs.h:565

QIB_7322_HwErrClear_pb::SDmaMemReadErrClear_1
pseudo_bit_t SDmaMemReadErrClear_1[1]
Definition qib_7322_regs.h:560

QIB_7322_HwErrClear_pb::PcieCplTimeoutClear
pseudo_bit_t PcieCplTimeoutClear[1]
Definition qib_7322_regs.h:562

QIB_7322_HwErrClear_pb::IBCBusFromSPCParityErrClear_0
pseudo_bit_t IBCBusFromSPCParityErrClear_0[1]
Definition qib_7322_regs.h:555

QIB_7322_HwErrClear_pb::TempsenseTholdReachedClear
pseudo_bit_t TempsenseTholdReachedClear[1]
Definition qib_7322_regs.h:568

QIB_7322_HwErrClear_pb::IBCBusToSPCparityErrClear_0
pseudo_bit_t IBCBusToSPCparityErrClear_0[1]
Definition qib_7322_regs.h:554

QIB_7322_HwErrClear_pb::pcie_phy_txParityErr
pseudo_bit_t pcie_phy_txParityErr[1]
Definition qib_7322_regs.h:564

QIB_7322_HwErrClear_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:567

QIB_7322_HwErrClear_pb::IBSerdesPClkNotDetectClear_0
pseudo_bit_t IBSerdesPClkNotDetectClear_0[1]
Definition qib_7322_regs.h:572

QIB_7322_HwErrClear_pb::IBCBusToSPCparityErrClear_1
pseudo_bit_t IBCBusToSPCparityErrClear_1[1]
Definition qib_7322_regs.h:556

QIB_7322_HwErrClear_pb::PCIeBusParityClear
pseudo_bit_t PCIeBusParityClear[3]
Definition qib_7322_regs.h:563

QIB_7322_HwErrClear_pb::_unused_4
pseudo_bit_t _unused_4[6]
Definition qib_7322_regs.h:571

QIB_7322_HwErrClear_pb::IBCBusFromSPCParityErrClear_1
pseudo_bit_t IBCBusFromSPCParityErrClear_1[1]
Definition qib_7322_regs.h:557

QIB_7322_HwErrClear_pb::IBSerdesPClkNotDetectClear_1
pseudo_bit_t IBSerdesPClkNotDetectClear_1[1]
Definition qib_7322_regs.h:573

QIB_7322_HwErrClear_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:558

QIB_7322_HwErrClear_pb::_unused_0
pseudo_bit_t _unused_0[11]
Definition qib_7322_regs.h:552

QIB_7322_HwErrClear_pb::PCIESerdesPClkNotDetectClear
pseudo_bit_t PCIESerdesPClkNotDetectClear[1]
Definition qib_7322_regs.h:570

QIB_7322_HwErrClear
Definition qib_7322_regs.h:575

QIB_7322_HwErrClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HwErrClear_pb)

QIB_7322_HwErrMask_pb
Definition qib_7322_regs.h:491

QIB_7322_HwErrMask_pb::_unused_4
pseudo_bit_t _unused_4[6]
Definition qib_7322_regs.h:511

QIB_7322_HwErrMask_pb::MemoryErrMask
pseudo_bit_t MemoryErrMask[1]
Definition qib_7322_regs.h:506

QIB_7322_HwErrMask_pb::IBCBusFromSPCParityErrMask_1
pseudo_bit_t IBCBusFromSPCParityErrMask_1[1]
Definition qib_7322_regs.h:497

QIB_7322_HwErrMask_pb::IBSerdesPClkNotDetectMask_0
pseudo_bit_t IBSerdesPClkNotDetectMask_0[1]
Definition qib_7322_regs.h:512

QIB_7322_HwErrMask_pb::PCIESerdesPClkNotDetectMask
pseudo_bit_t PCIESerdesPClkNotDetectMask[1]
Definition qib_7322_regs.h:510

QIB_7322_HwErrMask_pb::LATriggeredMask
pseudo_bit_t LATriggeredMask[1]
Definition qib_7322_regs.h:493

QIB_7322_HwErrMask_pb::IBCBusFromSPCParityErrMask_0
pseudo_bit_t IBCBusFromSPCParityErrMask_0[1]
Definition qib_7322_regs.h:495

QIB_7322_HwErrMask_pb::SDmaMemReadErrMask_0
pseudo_bit_t SDmaMemReadErrMask_0[1]
Definition qib_7322_regs.h:499

QIB_7322_HwErrMask_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:507

QIB_7322_HwErrMask_pb::pcie_phy_txParityErr
pseudo_bit_t pcie_phy_txParityErr[1]
Definition qib_7322_regs.h:504

QIB_7322_HwErrMask_pb::IBSerdesPClkNotDetectMask_1
pseudo_bit_t IBSerdesPClkNotDetectMask_1[1]
Definition qib_7322_regs.h:513

QIB_7322_HwErrMask_pb::PciePoisonedTLPMask
pseudo_bit_t PciePoisonedTLPMask[1]
Definition qib_7322_regs.h:501

QIB_7322_HwErrMask_pb::statusValidNoEopMask_0
pseudo_bit_t statusValidNoEopMask_0[1]
Definition qib_7322_regs.h:494

QIB_7322_HwErrMask_pb::_unused_2
pseudo_bit_t _unused_2[13]
Definition qib_7322_regs.h:505

QIB_7322_HwErrMask_pb::PowerOnBISTFailedMask
pseudo_bit_t PowerOnBISTFailedMask[1]
Definition qib_7322_regs.h:509

QIB_7322_HwErrMask_pb::statusValidNoEopMask_1
pseudo_bit_t statusValidNoEopMask_1[1]
Definition qib_7322_regs.h:496

QIB_7322_HwErrMask_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:498

QIB_7322_HwErrMask_pb::PcieCplTimeoutMask
pseudo_bit_t PcieCplTimeoutMask[1]
Definition qib_7322_regs.h:502

QIB_7322_HwErrMask_pb::_unused_0
pseudo_bit_t _unused_0[11]
Definition qib_7322_regs.h:492

QIB_7322_HwErrMask_pb::SDmaMemReadErrMask_1
pseudo_bit_t SDmaMemReadErrMask_1[1]
Definition qib_7322_regs.h:500

QIB_7322_HwErrMask_pb::PCIeBusParityErrMask
pseudo_bit_t PCIeBusParityErrMask[3]
Definition qib_7322_regs.h:503

QIB_7322_HwErrMask_pb::TempsenseTholdReachedMask
pseudo_bit_t TempsenseTholdReachedMask[1]
Definition qib_7322_regs.h:508

QIB_7322_HwErrMask
Definition qib_7322_regs.h:515

QIB_7322_HwErrMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HwErrMask_pb)

QIB_7322_HwErrStatus_pb
Definition qib_7322_regs.h:521

QIB_7322_HwErrStatus_pb::PcieCplTimeout
pseudo_bit_t PcieCplTimeout[1]
Definition qib_7322_regs.h:532

QIB_7322_HwErrStatus_pb::SDmaMemReadErr_1
pseudo_bit_t SDmaMemReadErr_1[1]
Definition qib_7322_regs.h:530

QIB_7322_HwErrStatus_pb::PCIeBusParity
pseudo_bit_t PCIeBusParity[3]
Definition qib_7322_regs.h:533

QIB_7322_HwErrStatus_pb::TempsenseTholdReached
pseudo_bit_t TempsenseTholdReached[1]
Definition qib_7322_regs.h:538

QIB_7322_HwErrStatus_pb::IBCBusFromSPCParityErr_0
pseudo_bit_t IBCBusFromSPCParityErr_0[1]
Definition qib_7322_regs.h:525

QIB_7322_HwErrStatus_pb::statusValidNoEop_0
pseudo_bit_t statusValidNoEop_0[1]
Definition qib_7322_regs.h:524

QIB_7322_HwErrStatus_pb::IBSerdesPClkNotDetect_1
pseudo_bit_t IBSerdesPClkNotDetect_1[1]
Definition qib_7322_regs.h:543

QIB_7322_HwErrStatus_pb::_unused_3
pseudo_bit_t _unused_3[4]
Definition qib_7322_regs.h:537

QIB_7322_HwErrStatus_pb::_unused_4
pseudo_bit_t _unused_4[6]
Definition qib_7322_regs.h:541

QIB_7322_HwErrStatus_pb::PowerOnBISTFailed
pseudo_bit_t PowerOnBISTFailed[1]
Definition qib_7322_regs.h:539

QIB_7322_HwErrStatus_pb::PCIESerdesPClkNotDetect
pseudo_bit_t PCIESerdesPClkNotDetect[1]
Definition qib_7322_regs.h:540

QIB_7322_HwErrStatus_pb::_unused_2
pseudo_bit_t _unused_2[13]
Definition qib_7322_regs.h:535

QIB_7322_HwErrStatus_pb::LATriggered
pseudo_bit_t LATriggered[1]
Definition qib_7322_regs.h:523

QIB_7322_HwErrStatus_pb::MemoryErr
pseudo_bit_t MemoryErr[1]
Definition qib_7322_regs.h:536

QIB_7322_HwErrStatus_pb::PciePoisonedTLP
pseudo_bit_t PciePoisonedTLP[1]
Definition qib_7322_regs.h:531

QIB_7322_HwErrStatus_pb::_unused_0
pseudo_bit_t _unused_0[11]
Definition qib_7322_regs.h:522

QIB_7322_HwErrStatus_pb::pcie_phy_txParityErr
pseudo_bit_t pcie_phy_txParityErr[1]
Definition qib_7322_regs.h:534

QIB_7322_HwErrStatus_pb::IBCBusFromSPCParityErr_1
pseudo_bit_t IBCBusFromSPCParityErr_1[1]
Definition qib_7322_regs.h:527

QIB_7322_HwErrStatus_pb::IBSerdesPClkNotDetect_0
pseudo_bit_t IBSerdesPClkNotDetect_0[1]
Definition qib_7322_regs.h:542

QIB_7322_HwErrStatus_pb::SDmaMemReadErr_0
pseudo_bit_t SDmaMemReadErr_0[1]
Definition qib_7322_regs.h:529

QIB_7322_HwErrStatus_pb::statusValidNoEop_1
pseudo_bit_t statusValidNoEop_1[1]
Definition qib_7322_regs.h:526

QIB_7322_HwErrStatus_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:528

QIB_7322_HwErrStatus
Definition qib_7322_regs.h:545

QIB_7322_HwErrStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_HwErrStatus_pb)

QIB_7322_IBCCtrlA_0_pb
Definition qib_7322_regs.h:3147

QIB_7322_IBCCtrlA_0_pb::LinkInitCmd
pseudo_bit_t LinkInitCmd[3]
Definition qib_7322_regs.h:3150

QIB_7322_IBCCtrlA_0_pb::PhyerrThreshold
pseudo_bit_t PhyerrThreshold[4]
Definition qib_7322_regs.h:3153

QIB_7322_IBCCtrlA_0_pb::OverrunThreshold
pseudo_bit_t OverrunThreshold[4]
Definition qib_7322_regs.h:3154

QIB_7322_IBCCtrlA_0_pb::MaxPktLen
pseudo_bit_t MaxPktLen[11]
Definition qib_7322_regs.h:3152

QIB_7322_IBCCtrlA_0_pb::LinkCmd
pseudo_bit_t LinkCmd[2]
Definition qib_7322_regs.h:3151

QIB_7322_IBCCtrlA_0_pb::LinkDownDefaultState
pseudo_bit_t LinkDownDefaultState[1]
Definition qib_7322_regs.h:3160

QIB_7322_IBCCtrlA_0_pb::FlowCtrlPeriod
pseudo_bit_t FlowCtrlPeriod[8]
Definition qib_7322_regs.h:3148

QIB_7322_IBCCtrlA_0_pb::NumVLane
pseudo_bit_t NumVLane[3]
Definition qib_7322_regs.h:3156

QIB_7322_IBCCtrlA_0_pb::IBLinkEn
pseudo_bit_t IBLinkEn[1]
Definition qib_7322_regs.h:3159

QIB_7322_IBCCtrlA_0_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:3155

QIB_7322_IBCCtrlA_0_pb::Loopback
pseudo_bit_t Loopback[1]
Definition qib_7322_regs.h:3161

QIB_7322_IBCCtrlA_0_pb::FlowCtrlWaterMark
pseudo_bit_t FlowCtrlWaterMark[8]
Definition qib_7322_regs.h:3149

QIB_7322_IBCCtrlA_0_pb::IBStatIntReductionEn
pseudo_bit_t IBStatIntReductionEn[1]
Definition qib_7322_regs.h:3158

QIB_7322_IBCCtrlA_0_pb::_unused_1
pseudo_bit_t _unused_1[9]
Definition qib_7322_regs.h:3157

QIB_7322_IBCCtrlA_0
Definition qib_7322_regs.h:3163

QIB_7322_IBCCtrlA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlA_0_pb)

QIB_7322_IBCCtrlA_1_pb
Definition qib_7322_regs.h:4477

QIB_7322_IBCCtrlA_1_pb::FlowCtrlPeriod
pseudo_bit_t FlowCtrlPeriod[8]
Definition qib_7322_regs.h:4478

QIB_7322_IBCCtrlA_1_pb::MaxPktLen
pseudo_bit_t MaxPktLen[11]
Definition qib_7322_regs.h:4482

QIB_7322_IBCCtrlA_1_pb::FlowCtrlWaterMark
pseudo_bit_t FlowCtrlWaterMark[8]
Definition qib_7322_regs.h:4479

QIB_7322_IBCCtrlA_1_pb::NumVLane
pseudo_bit_t NumVLane[3]
Definition qib_7322_regs.h:4486

QIB_7322_IBCCtrlA_1_pb::IBLinkEn
pseudo_bit_t IBLinkEn[1]
Definition qib_7322_regs.h:4489

QIB_7322_IBCCtrlA_1_pb::PhyerrThreshold
pseudo_bit_t PhyerrThreshold[4]
Definition qib_7322_regs.h:4483

QIB_7322_IBCCtrlA_1_pb::LinkCmd
pseudo_bit_t LinkCmd[2]
Definition qib_7322_regs.h:4481

QIB_7322_IBCCtrlA_1_pb::LinkDownDefaultState
pseudo_bit_t LinkDownDefaultState[1]
Definition qib_7322_regs.h:4490

QIB_7322_IBCCtrlA_1_pb::IBStatIntReductionEn
pseudo_bit_t IBStatIntReductionEn[1]
Definition qib_7322_regs.h:4488

QIB_7322_IBCCtrlA_1_pb::_unused_1
pseudo_bit_t _unused_1[9]
Definition qib_7322_regs.h:4487

QIB_7322_IBCCtrlA_1_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:4485

QIB_7322_IBCCtrlA_1_pb::LinkInitCmd
pseudo_bit_t LinkInitCmd[3]
Definition qib_7322_regs.h:4480

QIB_7322_IBCCtrlA_1_pb::OverrunThreshold
pseudo_bit_t OverrunThreshold[4]
Definition qib_7322_regs.h:4484

QIB_7322_IBCCtrlA_1_pb::Loopback
pseudo_bit_t Loopback[1]
Definition qib_7322_regs.h:4491

QIB_7322_IBCCtrlA_1
Definition qib_7322_regs.h:4493

QIB_7322_IBCCtrlA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlA_1_pb)

QIB_7322_IBCCtrlB_0_pb
Definition qib_7322_regs.h:3169

QIB_7322_IBCCtrlB_0_pb::SD_DDS
pseudo_bit_t SD_DDS[4]
Definition qib_7322_regs.h:3181

QIB_7322_IBCCtrlB_0_pb::SD_SPEED
pseudo_bit_t SD_SPEED[1]
Definition qib_7322_regs.h:3171

QIB_7322_IBCCtrlB_0_pb::IB_DLID
pseudo_bit_t IB_DLID[16]
Definition qib_7322_regs.h:3188

QIB_7322_IBCCtrlB_0_pb::SD_DDSV
pseudo_bit_t SD_DDSV[1]
Definition qib_7322_regs.h:3180

QIB_7322_IBCCtrlB_0_pb::SD_ADD_ENB
pseudo_bit_t SD_ADD_ENB[1]
Definition qib_7322_regs.h:3179

QIB_7322_IBCCtrlB_0_pb::SD_SPEED_QDR
pseudo_bit_t SD_SPEED_QDR[1]
Definition qib_7322_regs.h:3174

QIB_7322_IBCCtrlB_0_pb::HRTBT_PORT
pseudo_bit_t HRTBT_PORT[8]
Definition qib_7322_regs.h:3184

QIB_7322_IBCCtrlB_0_pb::HRTBT_REQ
pseudo_bit_t HRTBT_REQ[1]
Definition qib_7322_regs.h:3185

QIB_7322_IBCCtrlB_0_pb::IB_POLARITY_REV_SUPP
pseudo_bit_t IB_POLARITY_REV_SUPP[1]
Definition qib_7322_regs.h:3176

QIB_7322_IBCCtrlB_0_pb::SD_RX_EQUAL_ENABLE
pseudo_bit_t SD_RX_EQUAL_ENABLE[1]
Definition qib_7322_regs.h:3178

QIB_7322_IBCCtrlB_0_pb::IB_DLID_MASK
pseudo_bit_t IB_DLID_MASK[16]
Definition qib_7322_regs.h:3189

QIB_7322_IBCCtrlB_0_pb::SD_SPEED_DDR
pseudo_bit_t SD_SPEED_DDR[1]
Definition qib_7322_regs.h:3173

QIB_7322_IBCCtrlB_0_pb::IB_ENABLE_FILT_DPKT
pseudo_bit_t IB_ENABLE_FILT_DPKT[1]
Definition qib_7322_regs.h:3186

QIB_7322_IBCCtrlB_0_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:3187

QIB_7322_IBCCtrlB_0_pb::HRTBT_ENB
pseudo_bit_t HRTBT_ENB[1]
Definition qib_7322_regs.h:3182

QIB_7322_IBCCtrlB_0_pb::IB_ENHANCED_MODE
pseudo_bit_t IB_ENHANCED_MODE[1]
Definition qib_7322_regs.h:3170

QIB_7322_IBCCtrlB_0_pb::HRTBT_AUTO
pseudo_bit_t HRTBT_AUTO[1]
Definition qib_7322_regs.h:3183

QIB_7322_IBCCtrlB_0_pb::IB_NUM_CHANNELS
pseudo_bit_t IB_NUM_CHANNELS[2]
Definition qib_7322_regs.h:3175

QIB_7322_IBCCtrlB_0_pb::IB_LANE_REV_SUPPORTED
pseudo_bit_t IB_LANE_REV_SUPPORTED[1]
Definition qib_7322_regs.h:3177

QIB_7322_IBCCtrlB_0_pb::SD_SPEED_SDR
pseudo_bit_t SD_SPEED_SDR[1]
Definition qib_7322_regs.h:3172

QIB_7322_IBCCtrlB_0
Definition qib_7322_regs.h:3191

QIB_7322_IBCCtrlB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlB_0_pb)

QIB_7322_IBCCtrlB_1_pb
Definition qib_7322_regs.h:4499

QIB_7322_IBCCtrlB_1_pb::SD_SPEED_SDR
pseudo_bit_t SD_SPEED_SDR[1]
Definition qib_7322_regs.h:4502

QIB_7322_IBCCtrlB_1_pb::IB_NUM_CHANNELS
pseudo_bit_t IB_NUM_CHANNELS[2]
Definition qib_7322_regs.h:4505

QIB_7322_IBCCtrlB_1_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:4517

QIB_7322_IBCCtrlB_1_pb::IB_LANE_REV_SUPPORTED
pseudo_bit_t IB_LANE_REV_SUPPORTED[1]
Definition qib_7322_regs.h:4507

QIB_7322_IBCCtrlB_1_pb::IB_POLARITY_REV_SUPP
pseudo_bit_t IB_POLARITY_REV_SUPP[1]
Definition qib_7322_regs.h:4506

QIB_7322_IBCCtrlB_1_pb::SD_DDSV
pseudo_bit_t SD_DDSV[1]
Definition qib_7322_regs.h:4510

QIB_7322_IBCCtrlB_1_pb::SD_RX_EQUAL_ENABLE
pseudo_bit_t SD_RX_EQUAL_ENABLE[1]
Definition qib_7322_regs.h:4508

QIB_7322_IBCCtrlB_1_pb::SD_ADD_ENB
pseudo_bit_t SD_ADD_ENB[1]
Definition qib_7322_regs.h:4509

QIB_7322_IBCCtrlB_1_pb::HRTBT_AUTO
pseudo_bit_t HRTBT_AUTO[1]
Definition qib_7322_regs.h:4513

QIB_7322_IBCCtrlB_1_pb::HRTBT_PORT
pseudo_bit_t HRTBT_PORT[8]
Definition qib_7322_regs.h:4514

QIB_7322_IBCCtrlB_1_pb::IB_ENHANCED_MODE
pseudo_bit_t IB_ENHANCED_MODE[1]
Definition qib_7322_regs.h:4500

QIB_7322_IBCCtrlB_1_pb::IB_DLID
pseudo_bit_t IB_DLID[16]
Definition qib_7322_regs.h:4518

QIB_7322_IBCCtrlB_1_pb::IB_ENABLE_FILT_DPKT
pseudo_bit_t IB_ENABLE_FILT_DPKT[1]
Definition qib_7322_regs.h:4516

QIB_7322_IBCCtrlB_1_pb::IB_DLID_MASK
pseudo_bit_t IB_DLID_MASK[16]
Definition qib_7322_regs.h:4519

QIB_7322_IBCCtrlB_1_pb::SD_DDS
pseudo_bit_t SD_DDS[4]
Definition qib_7322_regs.h:4511

QIB_7322_IBCCtrlB_1_pb::SD_SPEED_QDR
pseudo_bit_t SD_SPEED_QDR[1]
Definition qib_7322_regs.h:4504

QIB_7322_IBCCtrlB_1_pb::HRTBT_ENB
pseudo_bit_t HRTBT_ENB[1]
Definition qib_7322_regs.h:4512

QIB_7322_IBCCtrlB_1_pb::SD_SPEED
pseudo_bit_t SD_SPEED[1]
Definition qib_7322_regs.h:4501

QIB_7322_IBCCtrlB_1_pb::HRTBT_REQ
pseudo_bit_t HRTBT_REQ[1]
Definition qib_7322_regs.h:4515

QIB_7322_IBCCtrlB_1_pb::SD_SPEED_DDR
pseudo_bit_t SD_SPEED_DDR[1]
Definition qib_7322_regs.h:4503

QIB_7322_IBCCtrlB_1
Definition qib_7322_regs.h:4521

QIB_7322_IBCCtrlB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlB_1_pb)

QIB_7322_IBCCtrlC_0_pb
Definition qib_7322_regs.h:3197

QIB_7322_IBCCtrlC_0_pb::IB_FRONT_PORCH
pseudo_bit_t IB_FRONT_PORCH[5]
Definition qib_7322_regs.h:3198

QIB_7322_IBCCtrlC_0_pb::IB_BACK_PORCH
pseudo_bit_t IB_BACK_PORCH[5]
Definition qib_7322_regs.h:3199

QIB_7322_IBCCtrlC_0_pb::_unused_0
pseudo_bit_t _unused_0[54]
Definition qib_7322_regs.h:3200

QIB_7322_IBCCtrlC_0
Definition qib_7322_regs.h:3202

QIB_7322_IBCCtrlC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlC_0_pb)

QIB_7322_IBCCtrlC_1_pb
Definition qib_7322_regs.h:4527

QIB_7322_IBCCtrlC_1_pb::IB_BACK_PORCH
pseudo_bit_t IB_BACK_PORCH[5]
Definition qib_7322_regs.h:4529

QIB_7322_IBCCtrlC_1_pb::_unused_0
pseudo_bit_t _unused_0[54]
Definition qib_7322_regs.h:4530

QIB_7322_IBCCtrlC_1_pb::IB_FRONT_PORCH
pseudo_bit_t IB_FRONT_PORCH[5]
Definition qib_7322_regs.h:4528

QIB_7322_IBCCtrlC_1
Definition qib_7322_regs.h:4532

QIB_7322_IBCCtrlC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCCtrlC_1_pb)

QIB_7322_IBCStatusA_0_pb
Definition qib_7322_regs.h:3099

QIB_7322_IBCStatusA_0_pb::_unused_3
pseudo_bit_t _unused_3[24]
Definition qib_7322_regs.h:3122

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL2
pseudo_bit_t TxCreditOk_VL2[1]
Definition qib_7322_regs.h:3116

QIB_7322_IBCStatusA_0_pb::TxReady
pseudo_bit_t TxReady[1]
Definition qib_7322_regs.h:3112

QIB_7322_IBCStatusA_0_pb::IBRxLaneReversed
pseudo_bit_t IBRxLaneReversed[1]
Definition qib_7322_regs.h:3106

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL7
pseudo_bit_t TxCreditOk_VL7[1]
Definition qib_7322_regs.h:3121

QIB_7322_IBCStatusA_0_pb::ScrambleCapRemote
pseudo_bit_t ScrambleCapRemote[1]
Definition qib_7322_regs.h:3109

QIB_7322_IBCStatusA_0_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:3105

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL5
pseudo_bit_t TxCreditOk_VL5[1]
Definition qib_7322_regs.h:3119

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL0
pseudo_bit_t TxCreditOk_VL0[1]
Definition qib_7322_regs.h:3114

QIB_7322_IBCStatusA_0_pb::LinkState
pseudo_bit_t LinkState[3]
Definition qib_7322_regs.h:3101

QIB_7322_IBCStatusA_0_pb::LinkTrainingState
pseudo_bit_t LinkTrainingState[5]
Definition qib_7322_regs.h:3100

QIB_7322_IBCStatusA_0_pb::LinkWidthActive
pseudo_bit_t LinkWidthActive[1]
Definition qib_7322_regs.h:3103

QIB_7322_IBCStatusA_0_pb::LinkSpeedQDR
pseudo_bit_t LinkSpeedQDR[1]
Definition qib_7322_regs.h:3111

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL6
pseudo_bit_t TxCreditOk_VL6[1]
Definition qib_7322_regs.h:3120

QIB_7322_IBCStatusA_0_pb::DDS_RXEQ_FAIL
pseudo_bit_t DDS_RXEQ_FAIL[1]
Definition qib_7322_regs.h:3104

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL1
pseudo_bit_t TxCreditOk_VL1[1]
Definition qib_7322_regs.h:3115

QIB_7322_IBCStatusA_0_pb::LinkSpeedActive
pseudo_bit_t LinkSpeedActive[1]
Definition qib_7322_regs.h:3102

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL3
pseudo_bit_t TxCreditOk_VL3[1]
Definition qib_7322_regs.h:3117

QIB_7322_IBCStatusA_0_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:3113

QIB_7322_IBCStatusA_0_pb::ScrambleEn
pseudo_bit_t ScrambleEn[1]
Definition qib_7322_regs.h:3108

QIB_7322_IBCStatusA_0_pb::TxCreditOk_VL4
pseudo_bit_t TxCreditOk_VL4[1]
Definition qib_7322_regs.h:3118

QIB_7322_IBCStatusA_0_pb::IBTxLaneReversed
pseudo_bit_t IBTxLaneReversed[1]
Definition qib_7322_regs.h:3107

QIB_7322_IBCStatusA_0_pb::_unused_1
pseudo_bit_t _unused_1[13]
Definition qib_7322_regs.h:3110

QIB_7322_IBCStatusA_0
Definition qib_7322_regs.h:3124

QIB_7322_IBCStatusA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusA_0_pb)

QIB_7322_IBCStatusA_1_pb
Definition qib_7322_regs.h:4432

QIB_7322_IBCStatusA_1_pb::LinkTrainingState
pseudo_bit_t LinkTrainingState[5]
Definition qib_7322_regs.h:4433

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL2
pseudo_bit_t TxCreditOk_VL2[1]
Definition qib_7322_regs.h:4449

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL7
pseudo_bit_t TxCreditOk_VL7[1]
Definition qib_7322_regs.h:4454

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL6
pseudo_bit_t TxCreditOk_VL6[1]
Definition qib_7322_regs.h:4453

QIB_7322_IBCStatusA_1_pb::_unused_1
pseudo_bit_t _unused_1[13]
Definition qib_7322_regs.h:4443

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL3
pseudo_bit_t TxCreditOk_VL3[1]
Definition qib_7322_regs.h:4450

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL5
pseudo_bit_t TxCreditOk_VL5[1]
Definition qib_7322_regs.h:4452

QIB_7322_IBCStatusA_1_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:4438

QIB_7322_IBCStatusA_1_pb::LinkSpeedActive
pseudo_bit_t LinkSpeedActive[1]
Definition qib_7322_regs.h:4435

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL4
pseudo_bit_t TxCreditOk_VL4[1]
Definition qib_7322_regs.h:4451

QIB_7322_IBCStatusA_1_pb::IBTxLaneReversed
pseudo_bit_t IBTxLaneReversed[1]
Definition qib_7322_regs.h:4440

QIB_7322_IBCStatusA_1_pb::TxReady
pseudo_bit_t TxReady[1]
Definition qib_7322_regs.h:4445

QIB_7322_IBCStatusA_1_pb::LinkState
pseudo_bit_t LinkState[3]
Definition qib_7322_regs.h:4434

QIB_7322_IBCStatusA_1_pb::IBRxLaneReversed
pseudo_bit_t IBRxLaneReversed[1]
Definition qib_7322_regs.h:4439

QIB_7322_IBCStatusA_1_pb::_unused_3
pseudo_bit_t _unused_3[24]
Definition qib_7322_regs.h:4455

QIB_7322_IBCStatusA_1_pb::ScrambleEn
pseudo_bit_t ScrambleEn[1]
Definition qib_7322_regs.h:4441

QIB_7322_IBCStatusA_1_pb::LinkSpeedQDR
pseudo_bit_t LinkSpeedQDR[1]
Definition qib_7322_regs.h:4444

QIB_7322_IBCStatusA_1_pb::DDS_RXEQ_FAIL
pseudo_bit_t DDS_RXEQ_FAIL[1]
Definition qib_7322_regs.h:4437

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL1
pseudo_bit_t TxCreditOk_VL1[1]
Definition qib_7322_regs.h:4448

QIB_7322_IBCStatusA_1_pb::TxCreditOk_VL0
pseudo_bit_t TxCreditOk_VL0[1]
Definition qib_7322_regs.h:4447

QIB_7322_IBCStatusA_1_pb::LinkWidthActive
pseudo_bit_t LinkWidthActive[1]
Definition qib_7322_regs.h:4436

QIB_7322_IBCStatusA_1_pb::_unused_2
pseudo_bit_t _unused_2[1]
Definition qib_7322_regs.h:4446

QIB_7322_IBCStatusA_1_pb::ScrambleCapRemote
pseudo_bit_t ScrambleCapRemote[1]
Definition qib_7322_regs.h:4442

QIB_7322_IBCStatusA_1
Definition qib_7322_regs.h:4457

QIB_7322_IBCStatusA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusA_1_pb)

QIB_7322_IBCStatusB_0_pb
Definition qib_7322_regs.h:3130

QIB_7322_IBCStatusB_0_pb::RxEqLocalDevice
pseudo_bit_t RxEqLocalDevice[2]
Definition qib_7322_regs.h:3133

QIB_7322_IBCStatusB_0_pb::ibsd_adaptation_timer_debug
pseudo_bit_t ibsd_adaptation_timer_debug[1]
Definition qib_7322_regs.h:3138

QIB_7322_IBCStatusB_0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:3139

QIB_7322_IBCStatusB_0_pb::ibsd_adaptation_timer_started
pseudo_bit_t ibsd_adaptation_timer_started[1]
Definition qib_7322_regs.h:3136

QIB_7322_IBCStatusB_0_pb::heartbeat_timed_out
pseudo_bit_t heartbeat_timed_out[1]
Definition qib_7322_regs.h:3135

QIB_7322_IBCStatusB_0_pb::heartbeat_crosstalk
pseudo_bit_t heartbeat_crosstalk[4]
Definition qib_7322_regs.h:3134

QIB_7322_IBCStatusB_0_pb::LinkRoundTripLatency
pseudo_bit_t LinkRoundTripLatency[26]
Definition qib_7322_regs.h:3131

QIB_7322_IBCStatusB_0_pb::ReqDDSLocalFromRmt
pseudo_bit_t ReqDDSLocalFromRmt[4]
Definition qib_7322_regs.h:3132

QIB_7322_IBCStatusB_0_pb::ibsd_adaptation_timer_reached_threshold
pseudo_bit_t ibsd_adaptation_timer_reached_threshold[1]
Definition qib_7322_regs.h:3137

QIB_7322_IBCStatusB_0
Definition qib_7322_regs.h:3141

QIB_7322_IBCStatusB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusB_0_pb)

QIB_7322_IBCStatusB_1_pb
Definition qib_7322_regs.h:4463

QIB_7322_IBCStatusB_1_pb::heartbeat_timed_out
pseudo_bit_t heartbeat_timed_out[1]
Definition qib_7322_regs.h:4468

QIB_7322_IBCStatusB_1_pb::ReqDDSLocalFromRmt
pseudo_bit_t ReqDDSLocalFromRmt[4]
Definition qib_7322_regs.h:4465

QIB_7322_IBCStatusB_1_pb::heartbeat_crosstalk
pseudo_bit_t heartbeat_crosstalk[4]
Definition qib_7322_regs.h:4467

QIB_7322_IBCStatusB_1_pb::LinkRoundTripLatency
pseudo_bit_t LinkRoundTripLatency[26]
Definition qib_7322_regs.h:4464

QIB_7322_IBCStatusB_1_pb::_unused_0
pseudo_bit_t _unused_0[27]
Definition qib_7322_regs.h:4469

QIB_7322_IBCStatusB_1_pb::RxEqLocalDevice
pseudo_bit_t RxEqLocalDevice[2]
Definition qib_7322_regs.h:4466

QIB_7322_IBCStatusB_1
Definition qib_7322_regs.h:4471

QIB_7322_IBCStatusB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBCStatusB_1_pb)

QIB_7322_IBNCModeCtrl_0_pb
Definition qib_7322_regs.h:3244

QIB_7322_IBNCModeCtrl_0_pb::TSMEnable_send_TS2
pseudo_bit_t TSMEnable_send_TS2[1]
Definition qib_7322_regs.h:3246

QIB_7322_IBNCModeCtrl_0_pb::ScrambleCapRemoteForce
pseudo_bit_t ScrambleCapRemoteForce[1]
Definition qib_7322_regs.h:3254

QIB_7322_IBNCModeCtrl_0_pb::ScrambleCapRemoteMask
pseudo_bit_t ScrambleCapRemoteMask[1]
Definition qib_7322_regs.h:3253

QIB_7322_IBNCModeCtrl_0_pb::TSMCode_TS2
pseudo_bit_t TSMCode_TS2[9]
Definition qib_7322_regs.h:3250

QIB_7322_IBNCModeCtrl_0_pb::TSMCode_TS1
pseudo_bit_t TSMCode_TS1[9]
Definition qib_7322_regs.h:3249

QIB_7322_IBNCModeCtrl_0_pb::TSMEnable_ignore_TSM_on_rx
pseudo_bit_t TSMEnable_ignore_TSM_on_rx[1]
Definition qib_7322_regs.h:3247

QIB_7322_IBNCModeCtrl_0_pb::ScrambleCapLocal
pseudo_bit_t ScrambleCapLocal[1]
Definition qib_7322_regs.h:3252

QIB_7322_IBNCModeCtrl_0_pb::_unused_2
pseudo_bit_t _unused_2[29]
Definition qib_7322_regs.h:3255

QIB_7322_IBNCModeCtrl_0_pb::TSMEnable_send_TS1
pseudo_bit_t TSMEnable_send_TS1[1]
Definition qib_7322_regs.h:3245

QIB_7322_IBNCModeCtrl_0_pb::_unused_0
pseudo_bit_t _unused_0[5]
Definition qib_7322_regs.h:3248

QIB_7322_IBNCModeCtrl_0_pb::_unused_1
pseudo_bit_t _unused_1[6]
Definition qib_7322_regs.h:3251

QIB_7322_IBNCModeCtrl_0
Definition qib_7322_regs.h:3257

QIB_7322_IBNCModeCtrl_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBNCModeCtrl_0_pb)

QIB_7322_IBNCModeCtrl_1_pb
Definition qib_7322_regs.h:4574

QIB_7322_IBNCModeCtrl_1_pb::ScrambleCapRemoteForce
pseudo_bit_t ScrambleCapRemoteForce[1]
Definition qib_7322_regs.h:4584

QIB_7322_IBNCModeCtrl_1_pb::_unused_2
pseudo_bit_t _unused_2[29]
Definition qib_7322_regs.h:4585

QIB_7322_IBNCModeCtrl_1_pb::ScrambleCapLocal
pseudo_bit_t ScrambleCapLocal[1]
Definition qib_7322_regs.h:4582

QIB_7322_IBNCModeCtrl_1_pb::TSMEnable_send_TS1
pseudo_bit_t TSMEnable_send_TS1[1]
Definition qib_7322_regs.h:4575

QIB_7322_IBNCModeCtrl_1_pb::TSMCode_TS1
pseudo_bit_t TSMCode_TS1[9]
Definition qib_7322_regs.h:4579

QIB_7322_IBNCModeCtrl_1_pb::TSMEnable_ignore_TSM_on_rx
pseudo_bit_t TSMEnable_ignore_TSM_on_rx[1]
Definition qib_7322_regs.h:4577

QIB_7322_IBNCModeCtrl_1_pb::_unused_0
pseudo_bit_t _unused_0[5]
Definition qib_7322_regs.h:4578

QIB_7322_IBNCModeCtrl_1_pb::_unused_1
pseudo_bit_t _unused_1[6]
Definition qib_7322_regs.h:4581

QIB_7322_IBNCModeCtrl_1_pb::TSMCode_TS2
pseudo_bit_t TSMCode_TS2[9]
Definition qib_7322_regs.h:4580

QIB_7322_IBNCModeCtrl_1_pb::ScrambleCapRemoteMask
pseudo_bit_t ScrambleCapRemoteMask[1]
Definition qib_7322_regs.h:4583

QIB_7322_IBNCModeCtrl_1_pb::TSMEnable_send_TS2
pseudo_bit_t TSMEnable_send_TS2[1]
Definition qib_7322_regs.h:4576

QIB_7322_IBNCModeCtrl_1
Definition qib_7322_regs.h:4587

QIB_7322_IBNCModeCtrl_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBNCModeCtrl_1_pb)

QIB_7322_IBPCSConfig_0_pb
Definition qib_7322_regs.h:3266

QIB_7322_IBPCSConfig_0_pb::xcv_treset
pseudo_bit_t xcv_treset[1]
Definition qib_7322_regs.h:3268

QIB_7322_IBPCSConfig_0_pb::xcv_rreset
pseudo_bit_t xcv_rreset[1]
Definition qib_7322_regs.h:3269

QIB_7322_IBPCSConfig_0_pb::link_sync_mask
pseudo_bit_t link_sync_mask[10]
Definition qib_7322_regs.h:3271

QIB_7322_IBPCSConfig_0_pb::_unused_1
pseudo_bit_t _unused_1[45]
Definition qib_7322_regs.h:3272

QIB_7322_IBPCSConfig_0_pb::_unused_0
pseudo_bit_t _unused_0[6]
Definition qib_7322_regs.h:3270

QIB_7322_IBPCSConfig_0_pb::tx_rx_reset
pseudo_bit_t tx_rx_reset[1]
Definition qib_7322_regs.h:3267

QIB_7322_IBPCSConfig_0
Definition qib_7322_regs.h:3274

QIB_7322_IBPCSConfig_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBPCSConfig_0_pb)

QIB_7322_IBPCSConfig_1_pb
Definition qib_7322_regs.h:4596

QIB_7322_IBPCSConfig_1_pb::_unused_1
pseudo_bit_t _unused_1[45]
Definition qib_7322_regs.h:4602

QIB_7322_IBPCSConfig_1_pb::link_sync_mask
pseudo_bit_t link_sync_mask[10]
Definition qib_7322_regs.h:4601

QIB_7322_IBPCSConfig_1_pb::xcv_rreset
pseudo_bit_t xcv_rreset[1]
Definition qib_7322_regs.h:4599

QIB_7322_IBPCSConfig_1_pb::_unused_0
pseudo_bit_t _unused_0[6]
Definition qib_7322_regs.h:4600

QIB_7322_IBPCSConfig_1_pb::xcv_treset
pseudo_bit_t xcv_treset[1]
Definition qib_7322_regs.h:4598

QIB_7322_IBPCSConfig_1_pb::tx_rx_reset
pseudo_bit_t tx_rx_reset[1]
Definition qib_7322_regs.h:4597

QIB_7322_IBPCSConfig_1
Definition qib_7322_regs.h:4604

QIB_7322_IBPCSConfig_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBPCSConfig_1_pb)

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb
Definition qib_7322_regs.h:3304

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::txampcntl_d2a
pseudo_bit_t txampcntl_d2a[4]
Definition qib_7322_regs.h:3309

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::txc0_ena
pseudo_bit_t txc0_ena[5]
Definition qib_7322_regs.h:3308

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::txcn1_ena
pseudo_bit_t txcn1_ena[3]
Definition qib_7322_regs.h:3305

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::reset_tx_deemphasis_override
pseudo_bit_t reset_tx_deemphasis_override[1]
Definition qib_7322_regs.h:3311

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::tx_override_deemphasis_select
pseudo_bit_t tx_override_deemphasis_select[1]
Definition qib_7322_regs.h:3312

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::txcp1_ena
pseudo_bit_t txcp1_ena[4]
Definition qib_7322_regs.h:3307

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::_unused_1
pseudo_bit_t _unused_1[32]
Definition qib_7322_regs.h:3313

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::txcn1_xtra_emph0
pseudo_bit_t txcn1_xtra_emph0[2]
Definition qib_7322_regs.h:3306

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:3310

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0
Definition qib_7322_regs.h:3315

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_pb)

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb
Definition qib_7322_regs.h:4634

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::txcn1_ena
pseudo_bit_t txcn1_ena[3]
Definition qib_7322_regs.h:4635

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::txcp1_ena
pseudo_bit_t txcp1_ena[4]
Definition qib_7322_regs.h:4637

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:4640

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::_unused_1
pseudo_bit_t _unused_1[32]
Definition qib_7322_regs.h:4643

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::reset_tx_deemphasis_override
pseudo_bit_t reset_tx_deemphasis_override[1]
Definition qib_7322_regs.h:4641

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::txc0_ena
pseudo_bit_t txc0_ena[5]
Definition qib_7322_regs.h:4638

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::txampcntl_d2a
pseudo_bit_t txampcntl_d2a[4]
Definition qib_7322_regs.h:4639

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::txcn1_xtra_emph0
pseudo_bit_t txcn1_xtra_emph0[2]
Definition qib_7322_regs.h:4636

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb::tx_override_deemphasis_select
pseudo_bit_t tx_override_deemphasis_select[1]
Definition qib_7322_regs.h:4642

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1
Definition qib_7322_regs.h:4645

QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_1_pb)

QIB_7322_IBSerdesCtrl_0_pb
Definition qib_7322_regs.h:3280

QIB_7322_IBSerdesCtrl_0_pb::DISABLE_RXLATOFF_SDR
pseudo_bit_t DISABLE_RXLATOFF_SDR[1]
Definition qib_7322_regs.h:3293

QIB_7322_IBSerdesCtrl_0_pb::_unused_2
pseudo_bit_t _unused_2[37]
Definition qib_7322_regs.h:3296

QIB_7322_IBSerdesCtrl_0_pb::LPEN
pseudo_bit_t LPEN[1]
Definition qib_7322_regs.h:3287

QIB_7322_IBSerdesCtrl_0_pb::DISABLE_RXLATOFF_DDR
pseudo_bit_t DISABLE_RXLATOFF_DDR[1]
Definition qib_7322_regs.h:3294

QIB_7322_IBSerdesCtrl_0_pb::TXPD
pseudo_bit_t TXPD[1]
Definition qib_7322_regs.h:3285

QIB_7322_IBSerdesCtrl_0_pb::_unused_1
pseudo_bit_t _unused_1[1]
Definition qib_7322_regs.h:3289

QIB_7322_IBSerdesCtrl_0_pb::TXIDLE
pseudo_bit_t TXIDLE[1]
Definition qib_7322_regs.h:3283

QIB_7322_IBSerdesCtrl_0_pb::DISABLE_RXLATOFF_QDR
pseudo_bit_t DISABLE_RXLATOFF_QDR[1]
Definition qib_7322_regs.h:3295

QIB_7322_IBSerdesCtrl_0_pb::RXPD
pseudo_bit_t RXPD[1]
Definition qib_7322_regs.h:3284

QIB_7322_IBSerdesCtrl_0_pb::CHANNEL_RESET_N
pseudo_bit_t CHANNEL_RESET_N[4]
Definition qib_7322_regs.h:3292

QIB_7322_IBSerdesCtrl_0_pb::IB_LAT_MODE
pseudo_bit_t IB_LAT_MODE[1]
Definition qib_7322_regs.h:3290

QIB_7322_IBSerdesCtrl_0_pb::CMODE
pseudo_bit_t CMODE[7]
Definition qib_7322_regs.h:3281

QIB_7322_IBSerdesCtrl_0_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:3282

QIB_7322_IBSerdesCtrl_0_pb::PLLPD
pseudo_bit_t PLLPD[1]
Definition qib_7322_regs.h:3286

QIB_7322_IBSerdesCtrl_0_pb::RXLOSEN
pseudo_bit_t RXLOSEN[1]
Definition qib_7322_regs.h:3288

QIB_7322_IBSerdesCtrl_0_pb::CGMODE
pseudo_bit_t CGMODE[4]
Definition qib_7322_regs.h:3291

QIB_7322_IBSerdesCtrl_0
Definition qib_7322_regs.h:3298

QIB_7322_IBSerdesCtrl_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSerdesCtrl_0_pb)

QIB_7322_IBSerdesCtrl_1_pb
Definition qib_7322_regs.h:4610

QIB_7322_IBSerdesCtrl_1_pb::CMODE
pseudo_bit_t CMODE[7]
Definition qib_7322_regs.h:4611

QIB_7322_IBSerdesCtrl_1_pb::CGMODE
pseudo_bit_t CGMODE[4]
Definition qib_7322_regs.h:4621

QIB_7322_IBSerdesCtrl_1_pb::CHANNEL_RESET_N
pseudo_bit_t CHANNEL_RESET_N[4]
Definition qib_7322_regs.h:4622

QIB_7322_IBSerdesCtrl_1_pb::TXIDLE
pseudo_bit_t TXIDLE[1]
Definition qib_7322_regs.h:4613

QIB_7322_IBSerdesCtrl_1_pb::RXPD
pseudo_bit_t RXPD[1]
Definition qib_7322_regs.h:4614

QIB_7322_IBSerdesCtrl_1_pb::DISABLE_RXLATOFF_SDR
pseudo_bit_t DISABLE_RXLATOFF_SDR[1]
Definition qib_7322_regs.h:4623

QIB_7322_IBSerdesCtrl_1_pb::_unused_2
pseudo_bit_t _unused_2[37]
Definition qib_7322_regs.h:4626

QIB_7322_IBSerdesCtrl_1_pb::_unused_1
pseudo_bit_t _unused_1[1]
Definition qib_7322_regs.h:4619

QIB_7322_IBSerdesCtrl_1_pb::PLLPD
pseudo_bit_t PLLPD[1]
Definition qib_7322_regs.h:4616

QIB_7322_IBSerdesCtrl_1_pb::RXLOSEN
pseudo_bit_t RXLOSEN[1]
Definition qib_7322_regs.h:4618

QIB_7322_IBSerdesCtrl_1_pb::IB_LAT_MODE
pseudo_bit_t IB_LAT_MODE[1]
Definition qib_7322_regs.h:4620

QIB_7322_IBSerdesCtrl_1_pb::DISABLE_RXLATOFF_QDR
pseudo_bit_t DISABLE_RXLATOFF_QDR[1]
Definition qib_7322_regs.h:4625

QIB_7322_IBSerdesCtrl_1_pb::TXPD
pseudo_bit_t TXPD[1]
Definition qib_7322_regs.h:4615

QIB_7322_IBSerdesCtrl_1_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:4612

QIB_7322_IBSerdesCtrl_1_pb::DISABLE_RXLATOFF_DDR
pseudo_bit_t DISABLE_RXLATOFF_DDR[1]
Definition qib_7322_regs.h:4624

QIB_7322_IBSerdesCtrl_1_pb::LPEN
pseudo_bit_t LPEN[1]
Definition qib_7322_regs.h:4617

QIB_7322_IBSerdesCtrl_1
Definition qib_7322_regs.h:4628

QIB_7322_IBSerdesCtrl_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IBSerdesCtrl_1_pb)

QIB_7322_IB_SDTEST_IF_RX_0_pb
Definition qib_7322_regs.h:3229

QIB_7322_IB_SDTEST_IF_RX_0_pb::TS_RX_B
pseudo_bit_t TS_RX_B[8]
Definition qib_7322_regs.h:3234

QIB_7322_IB_SDTEST_IF_RX_0_pb::TS_RX_TX_CFG
pseudo_bit_t TS_RX_TX_CFG[16]
Definition qib_7322_regs.h:3235

QIB_7322_IB_SDTEST_IF_RX_0_pb::TS_T_RX_VALID
pseudo_bit_t TS_T_RX_VALID[1]
Definition qib_7322_regs.h:3230

QIB_7322_IB_SDTEST_IF_RX_0_pb::TS_3_RX_VALID
pseudo_bit_t TS_3_RX_VALID[1]
Definition qib_7322_regs.h:3231

QIB_7322_IB_SDTEST_IF_RX_0_pb::_unused_0
pseudo_bit_t _unused_0[14]
Definition qib_7322_regs.h:3232

QIB_7322_IB_SDTEST_IF_RX_0_pb::TS_RX_A
pseudo_bit_t TS_RX_A[8]
Definition qib_7322_regs.h:3233

QIB_7322_IB_SDTEST_IF_RX_0_pb::TS_RX_RX_CFG
pseudo_bit_t TS_RX_RX_CFG[16]
Definition qib_7322_regs.h:3236

QIB_7322_IB_SDTEST_IF_RX_0
Definition qib_7322_regs.h:3238

QIB_7322_IB_SDTEST_IF_RX_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_RX_0_pb)

QIB_7322_IB_SDTEST_IF_RX_1_pb
Definition qib_7322_regs.h:4559

QIB_7322_IB_SDTEST_IF_RX_1_pb::TS_RX_B
pseudo_bit_t TS_RX_B[8]
Definition qib_7322_regs.h:4564

QIB_7322_IB_SDTEST_IF_RX_1_pb::TS_RX_RX_CFG
pseudo_bit_t TS_RX_RX_CFG[16]
Definition qib_7322_regs.h:4566

QIB_7322_IB_SDTEST_IF_RX_1_pb::TS_T_RX_VALID
pseudo_bit_t TS_T_RX_VALID[1]
Definition qib_7322_regs.h:4560

QIB_7322_IB_SDTEST_IF_RX_1_pb::TS_RX_A
pseudo_bit_t TS_RX_A[8]
Definition qib_7322_regs.h:4563

QIB_7322_IB_SDTEST_IF_RX_1_pb::TS_RX_TX_CFG
pseudo_bit_t TS_RX_TX_CFG[16]
Definition qib_7322_regs.h:4565

QIB_7322_IB_SDTEST_IF_RX_1_pb::_unused_0
pseudo_bit_t _unused_0[14]
Definition qib_7322_regs.h:4562

QIB_7322_IB_SDTEST_IF_RX_1_pb::TS_3_RX_VALID
pseudo_bit_t TS_3_RX_VALID[1]
Definition qib_7322_regs.h:4561

QIB_7322_IB_SDTEST_IF_RX_1
Definition qib_7322_regs.h:4568

QIB_7322_IB_SDTEST_IF_RX_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_RX_1_pb)

QIB_7322_IB_SDTEST_IF_TX_0_pb
Definition qib_7322_regs.h:3211

QIB_7322_IB_SDTEST_IF_TX_0_pb::TS_3_TX_VALID
pseudo_bit_t TS_3_TX_VALID[1]
Definition qib_7322_regs.h:3213

QIB_7322_IB_SDTEST_IF_TX_0_pb::TS_TX_SPEED
pseudo_bit_t TS_TX_SPEED[3]
Definition qib_7322_regs.h:3218

QIB_7322_IB_SDTEST_IF_TX_0_pb::TS_T_TX_VALID
pseudo_bit_t TS_T_TX_VALID[1]
Definition qib_7322_regs.h:3212

QIB_7322_IB_SDTEST_IF_TX_0_pb::_unused_1
pseudo_bit_t _unused_1[16]
Definition qib_7322_regs.h:3219

QIB_7322_IB_SDTEST_IF_TX_0_pb::TS_TX_TX_CFG
pseudo_bit_t TS_TX_TX_CFG[16]
Definition qib_7322_regs.h:3220

QIB_7322_IB_SDTEST_IF_TX_0_pb::TS_TX_RX_CFG
pseudo_bit_t TS_TX_RX_CFG[16]
Definition qib_7322_regs.h:3221

QIB_7322_IB_SDTEST_IF_TX_0_pb::VL_CAP
pseudo_bit_t VL_CAP[2]
Definition qib_7322_regs.h:3214

QIB_7322_IB_SDTEST_IF_TX_0_pb::CREDIT_CHANGE
pseudo_bit_t CREDIT_CHANGE[1]
Definition qib_7322_regs.h:3215

QIB_7322_IB_SDTEST_IF_TX_0_pb::_unused_0
pseudo_bit_t _unused_0[6]
Definition qib_7322_regs.h:3216

QIB_7322_IB_SDTEST_IF_TX_0_pb::TS_TX_OPCODE
pseudo_bit_t TS_TX_OPCODE[2]
Definition qib_7322_regs.h:3217

QIB_7322_IB_SDTEST_IF_TX_0
Definition qib_7322_regs.h:3223

QIB_7322_IB_SDTEST_IF_TX_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_TX_0_pb)

QIB_7322_IB_SDTEST_IF_TX_1_pb
Definition qib_7322_regs.h:4541

QIB_7322_IB_SDTEST_IF_TX_1_pb::TS_T_TX_VALID
pseudo_bit_t TS_T_TX_VALID[1]
Definition qib_7322_regs.h:4542

QIB_7322_IB_SDTEST_IF_TX_1_pb::TS_3_TX_VALID
pseudo_bit_t TS_3_TX_VALID[1]
Definition qib_7322_regs.h:4543

QIB_7322_IB_SDTEST_IF_TX_1_pb::_unused_1
pseudo_bit_t _unused_1[16]
Definition qib_7322_regs.h:4549

QIB_7322_IB_SDTEST_IF_TX_1_pb::CREDIT_CHANGE
pseudo_bit_t CREDIT_CHANGE[1]
Definition qib_7322_regs.h:4545

QIB_7322_IB_SDTEST_IF_TX_1_pb::TS_TX_TX_CFG
pseudo_bit_t TS_TX_TX_CFG[16]
Definition qib_7322_regs.h:4550

QIB_7322_IB_SDTEST_IF_TX_1_pb::TS_TX_OPCODE
pseudo_bit_t TS_TX_OPCODE[2]
Definition qib_7322_regs.h:4547

QIB_7322_IB_SDTEST_IF_TX_1_pb::TS_TX_RX_CFG
pseudo_bit_t TS_TX_RX_CFG[16]
Definition qib_7322_regs.h:4551

QIB_7322_IB_SDTEST_IF_TX_1_pb::TS_TX_SPEED
pseudo_bit_t TS_TX_SPEED[3]
Definition qib_7322_regs.h:4548

QIB_7322_IB_SDTEST_IF_TX_1_pb::VL_CAP
pseudo_bit_t VL_CAP[2]
Definition qib_7322_regs.h:4544

QIB_7322_IB_SDTEST_IF_TX_1_pb::_unused_0
pseudo_bit_t _unused_0[6]
Definition qib_7322_regs.h:4546

QIB_7322_IB_SDTEST_IF_TX_1
Definition qib_7322_regs.h:4553

QIB_7322_IB_SDTEST_IF_TX_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IB_SDTEST_IF_TX_1_pb)

QIB_7322_IntBlocked_pb
Definition qib_7322_regs.h:159

QIB_7322_IntBlocked_pb::_unused_0
pseudo_bit_t _unused_0[5]
Definition qib_7322_regs.h:178

QIB_7322_IntBlocked_pb::RcvAvail8IntBlocked
pseudo_bit_t RcvAvail8IntBlocked[1]
Definition qib_7322_regs.h:168

QIB_7322_IntBlocked_pb::RcvAvail3IntBlocked
pseudo_bit_t RcvAvail3IntBlocked[1]
Definition qib_7322_regs.h:163

QIB_7322_IntBlocked_pb::RcvUrg8IntBlocked
pseudo_bit_t RcvUrg8IntBlocked[1]
Definition qib_7322_regs.h:195

QIB_7322_IntBlocked_pb::RcvAvail0IntBlocked
pseudo_bit_t RcvAvail0IntBlocked[1]
Definition qib_7322_regs.h:160

QIB_7322_IntBlocked_pb::RcvAvail14IntBlocked
pseudo_bit_t RcvAvail14IntBlocked[1]
Definition qib_7322_regs.h:174

QIB_7322_IntBlocked_pb::RcvUrg5IntBlocked
pseudo_bit_t RcvUrg5IntBlocked[1]
Definition qib_7322_regs.h:192

QIB_7322_IntBlocked_pb::RcvUrg2IntBlocked
pseudo_bit_t RcvUrg2IntBlocked[1]
Definition qib_7322_regs.h:189

QIB_7322_IntBlocked_pb::SDmaIntBlocked_0
pseudo_bit_t SDmaIntBlocked_0[1]
Definition qib_7322_regs.h:212

QIB_7322_IntBlocked_pb::SendBufAvailIntBlocked
pseudo_bit_t SendBufAvailIntBlocked[1]
Definition qib_7322_regs.h:179

QIB_7322_IntBlocked_pb::SDmaCleanupDoneBlocked_1
pseudo_bit_t SDmaCleanupDoneBlocked_1[1]
Definition qib_7322_regs.h:207

QIB_7322_IntBlocked_pb::RcvUrg12IntBlocked
pseudo_bit_t RcvUrg12IntBlocked[1]
Definition qib_7322_regs.h:199

QIB_7322_IntBlocked_pb::RcvUrg15IntBlocked
pseudo_bit_t RcvUrg15IntBlocked[1]
Definition qib_7322_regs.h:202

QIB_7322_IntBlocked_pb::_unused_1
pseudo_bit_t _unused_1[2]
Definition qib_7322_regs.h:182

QIB_7322_IntBlocked_pb::SDmaCleanupDoneBlocked_0
pseudo_bit_t SDmaCleanupDoneBlocked_0[1]
Definition qib_7322_regs.h:206

QIB_7322_IntBlocked_pb::RcvAvail12IntBlocked
pseudo_bit_t RcvAvail12IntBlocked[1]
Definition qib_7322_regs.h:172

QIB_7322_IntBlocked_pb::RcvUrg1IntBlocked
pseudo_bit_t RcvUrg1IntBlocked[1]
Definition qib_7322_regs.h:188

QIB_7322_IntBlocked_pb::RcvUrg14IntBlocked
pseudo_bit_t RcvUrg14IntBlocked[1]
Definition qib_7322_regs.h:201

QIB_7322_IntBlocked_pb::RcvUrg11IntBlocked
pseudo_bit_t RcvUrg11IntBlocked[1]
Definition qib_7322_regs.h:198

QIB_7322_IntBlocked_pb::RcvAvail7IntBlocked
pseudo_bit_t RcvAvail7IntBlocked[1]
Definition qib_7322_regs.h:167

QIB_7322_IntBlocked_pb::RcvAvail4IntBlocked
pseudo_bit_t RcvAvail4IntBlocked[1]
Definition qib_7322_regs.h:164

QIB_7322_IntBlocked_pb::RcvAvail13IntBlocked
pseudo_bit_t RcvAvail13IntBlocked[1]
Definition qib_7322_regs.h:173

QIB_7322_IntBlocked_pb::SDmaProgressIntBlocked_0
pseudo_bit_t SDmaProgressIntBlocked_0[1]
Definition qib_7322_regs.h:210

QIB_7322_IntBlocked_pb::RcvUrg17IntBlocked
pseudo_bit_t RcvUrg17IntBlocked[1]
Definition qib_7322_regs.h:204

QIB_7322_IntBlocked_pb::SendDoneIntBlocked_1
pseudo_bit_t SendDoneIntBlocked_1[1]
Definition qib_7322_regs.h:181

QIB_7322_IntBlocked_pb::RcvUrg9IntBlocked
pseudo_bit_t RcvUrg9IntBlocked[1]
Definition qib_7322_regs.h:196

QIB_7322_IntBlocked_pb::RcvAvail11IntBlocked
pseudo_bit_t RcvAvail11IntBlocked[1]
Definition qib_7322_regs.h:171

QIB_7322_IntBlocked_pb::SendDoneIntBlocked_0
pseudo_bit_t SendDoneIntBlocked_0[1]
Definition qib_7322_regs.h:180

QIB_7322_IntBlocked_pb::RcvUrg0IntBlocked
pseudo_bit_t RcvUrg0IntBlocked[1]
Definition qib_7322_regs.h:187

QIB_7322_IntBlocked_pb::ErrIntBlocked_1
pseudo_bit_t ErrIntBlocked_1[1]
Definition qib_7322_regs.h:186

QIB_7322_IntBlocked_pb::RcvUrg10IntBlocked
pseudo_bit_t RcvUrg10IntBlocked[1]
Definition qib_7322_regs.h:197

QIB_7322_IntBlocked_pb::RcvAvail16IntBlocked
pseudo_bit_t RcvAvail16IntBlocked[1]
Definition qib_7322_regs.h:176

QIB_7322_IntBlocked_pb::AssertGPIOIntBlocked
pseudo_bit_t AssertGPIOIntBlocked[1]
Definition qib_7322_regs.h:183

QIB_7322_IntBlocked_pb::_unused_2
pseudo_bit_t _unused_2[6]
Definition qib_7322_regs.h:205

QIB_7322_IntBlocked_pb::RcvAvail5IntBlocked
pseudo_bit_t RcvAvail5IntBlocked[1]
Definition qib_7322_regs.h:165

QIB_7322_IntBlocked_pb::RcvAvail17IntBlocked
pseudo_bit_t RcvAvail17IntBlocked[1]
Definition qib_7322_regs.h:177

QIB_7322_IntBlocked_pb::RcvUrg13IntBlocked
pseudo_bit_t RcvUrg13IntBlocked[1]
Definition qib_7322_regs.h:200

QIB_7322_IntBlocked_pb::ErrIntBlocked
pseudo_bit_t ErrIntBlocked[1]
Definition qib_7322_regs.h:184

QIB_7322_IntBlocked_pb::SDmaIdleIntBlocked_0
pseudo_bit_t SDmaIdleIntBlocked_0[1]
Definition qib_7322_regs.h:208

QIB_7322_IntBlocked_pb::RcvUrg6IntBlocked
pseudo_bit_t RcvUrg6IntBlocked[1]
Definition qib_7322_regs.h:193

QIB_7322_IntBlocked_pb::RcvAvail9IntBlocked
pseudo_bit_t RcvAvail9IntBlocked[1]
Definition qib_7322_regs.h:169

QIB_7322_IntBlocked_pb::RcvUrg4IntBlocked
pseudo_bit_t RcvUrg4IntBlocked[1]
Definition qib_7322_regs.h:191

QIB_7322_IntBlocked_pb::SDmaIntBlocked_1
pseudo_bit_t SDmaIntBlocked_1[1]
Definition qib_7322_regs.h:213

QIB_7322_IntBlocked_pb::SDmaIdleIntBlocked_1
pseudo_bit_t SDmaIdleIntBlocked_1[1]
Definition qib_7322_regs.h:209

QIB_7322_IntBlocked_pb::RcvUrg16IntBlocked
pseudo_bit_t RcvUrg16IntBlocked[1]
Definition qib_7322_regs.h:203

QIB_7322_IntBlocked_pb::RcvUrg3IntBlocked
pseudo_bit_t RcvUrg3IntBlocked[1]
Definition qib_7322_regs.h:190

QIB_7322_IntBlocked_pb::SDmaProgressIntBlocked_1
pseudo_bit_t SDmaProgressIntBlocked_1[1]
Definition qib_7322_regs.h:211

QIB_7322_IntBlocked_pb::RcvAvail15IntBlocked
pseudo_bit_t RcvAvail15IntBlocked[1]
Definition qib_7322_regs.h:175

QIB_7322_IntBlocked_pb::RcvAvail6IntBlocked
pseudo_bit_t RcvAvail6IntBlocked[1]
Definition qib_7322_regs.h:166

QIB_7322_IntBlocked_pb::RcvAvail1IntBlocked
pseudo_bit_t RcvAvail1IntBlocked[1]
Definition qib_7322_regs.h:161

QIB_7322_IntBlocked_pb::RcvAvail2IntBlocked
pseudo_bit_t RcvAvail2IntBlocked[1]
Definition qib_7322_regs.h:162

QIB_7322_IntBlocked_pb::RcvAvail10IntBlocked
pseudo_bit_t RcvAvail10IntBlocked[1]
Definition qib_7322_regs.h:170

QIB_7322_IntBlocked_pb::RcvUrg7IntBlocked
pseudo_bit_t RcvUrg7IntBlocked[1]
Definition qib_7322_regs.h:194

QIB_7322_IntBlocked_pb::ErrIntBlocked_0
pseudo_bit_t ErrIntBlocked_0[1]
Definition qib_7322_regs.h:185

QIB_7322_IntBlocked
Definition qib_7322_regs.h:215

QIB_7322_IntBlocked::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IntBlocked_pb)

QIB_7322_IntClear_pb
Definition qib_7322_regs.h:345

QIB_7322_IntClear_pb::RcvUrg4IntClear
pseudo_bit_t RcvUrg4IntClear[1]
Definition qib_7322_regs.h:377

QIB_7322_IntClear_pb::SDmaIdleIntClear_1
pseudo_bit_t SDmaIdleIntClear_1[1]
Definition qib_7322_regs.h:395

QIB_7322_IntClear_pb::RcvAvail3IntClear
pseudo_bit_t RcvAvail3IntClear[1]
Definition qib_7322_regs.h:349

QIB_7322_IntClear_pb::RcvUrg1IntClear
pseudo_bit_t RcvUrg1IntClear[1]
Definition qib_7322_regs.h:374

QIB_7322_IntClear_pb::ErrIntClear_1
pseudo_bit_t ErrIntClear_1[1]
Definition qib_7322_regs.h:372

QIB_7322_IntClear_pb::_unused_2
pseudo_bit_t _unused_2[6]
Definition qib_7322_regs.h:391

QIB_7322_IntClear_pb::RcvAvail10IntClear
pseudo_bit_t RcvAvail10IntClear[1]
Definition qib_7322_regs.h:356

QIB_7322_IntClear_pb::SDmaIntClear_1
pseudo_bit_t SDmaIntClear_1[1]
Definition qib_7322_regs.h:399

QIB_7322_IntClear_pb::SendDoneIntClear_1
pseudo_bit_t SendDoneIntClear_1[1]
Definition qib_7322_regs.h:367

QIB_7322_IntClear_pb::RcvAvail13IntClear
pseudo_bit_t RcvAvail13IntClear[1]
Definition qib_7322_regs.h:359

QIB_7322_IntClear_pb::RcvUrg17IntClear
pseudo_bit_t RcvUrg17IntClear[1]
Definition qib_7322_regs.h:390

QIB_7322_IntClear_pb::RcvUrg9IntClear
pseudo_bit_t RcvUrg9IntClear[1]
Definition qib_7322_regs.h:382

QIB_7322_IntClear_pb::SDmaProgressIntClear_0
pseudo_bit_t SDmaProgressIntClear_0[1]
Definition qib_7322_regs.h:396

QIB_7322_IntClear_pb::RcvUrg12IntClear
pseudo_bit_t RcvUrg12IntClear[1]
Definition qib_7322_regs.h:385

QIB_7322_IntClear_pb::ErrIntClear
pseudo_bit_t ErrIntClear[1]
Definition qib_7322_regs.h:370

QIB_7322_IntClear_pb::RcvAvail11IntClear
pseudo_bit_t RcvAvail11IntClear[1]
Definition qib_7322_regs.h:357

QIB_7322_IntClear_pb::SDmaCleanupDoneClear_0
pseudo_bit_t SDmaCleanupDoneClear_0[1]
Definition qib_7322_regs.h:392

QIB_7322_IntClear_pb::SDmaIdleIntClear_0
pseudo_bit_t SDmaIdleIntClear_0[1]
Definition qib_7322_regs.h:394

QIB_7322_IntClear_pb::RcvUrg10IntClear
pseudo_bit_t RcvUrg10IntClear[1]
Definition qib_7322_regs.h:383

QIB_7322_IntClear_pb::_unused_0
pseudo_bit_t _unused_0[5]
Definition qib_7322_regs.h:364

QIB_7322_IntClear_pb::RcvAvail8IntClear
pseudo_bit_t RcvAvail8IntClear[1]
Definition qib_7322_regs.h:354

QIB_7322_IntClear_pb::RcvUrg16IntClear
pseudo_bit_t RcvUrg16IntClear[1]
Definition qib_7322_regs.h:389

QIB_7322_IntClear_pb::RcvUrg13IntClear
pseudo_bit_t RcvUrg13IntClear[1]
Definition qib_7322_regs.h:386

QIB_7322_IntClear_pb::RcvAvail12IntClear
pseudo_bit_t RcvAvail12IntClear[1]
Definition qib_7322_regs.h:358

QIB_7322_IntClear_pb::SendBufAvailIntClear
pseudo_bit_t SendBufAvailIntClear[1]
Definition qib_7322_regs.h:365

QIB_7322_IntClear_pb::RcvAvail4IntClear
pseudo_bit_t RcvAvail4IntClear[1]
Definition qib_7322_regs.h:350

QIB_7322_IntClear_pb::RcvAvail2IntClear
pseudo_bit_t RcvAvail2IntClear[1]
Definition qib_7322_regs.h:348

QIB_7322_IntClear_pb::RcvUrg0IntClear
pseudo_bit_t RcvUrg0IntClear[1]
Definition qib_7322_regs.h:373

QIB_7322_IntClear_pb::ErrIntClear_0
pseudo_bit_t ErrIntClear_0[1]
Definition qib_7322_regs.h:371

QIB_7322_IntClear_pb::RcvAvail1IntClear
pseudo_bit_t RcvAvail1IntClear[1]
Definition qib_7322_regs.h:347

QIB_7322_IntClear_pb::RcvUrg11IntClear
pseudo_bit_t RcvUrg11IntClear[1]
Definition qib_7322_regs.h:384

QIB_7322_IntClear_pb::RcvUrg7IntClear
pseudo_bit_t RcvUrg7IntClear[1]
Definition qib_7322_regs.h:380

QIB_7322_IntClear_pb::RcvAvail7IntClear
pseudo_bit_t RcvAvail7IntClear[1]
Definition qib_7322_regs.h:353

QIB_7322_IntClear_pb::RcvAvail15IntClear
pseudo_bit_t RcvAvail15IntClear[1]
Definition qib_7322_regs.h:361

QIB_7322_IntClear_pb::SDmaProgressIntClear_1
pseudo_bit_t SDmaProgressIntClear_1[1]
Definition qib_7322_regs.h:397

QIB_7322_IntClear_pb::RcvAvail14IntClear
pseudo_bit_t RcvAvail14IntClear[1]
Definition qib_7322_regs.h:360

QIB_7322_IntClear_pb::RcvAvail17IntClear
pseudo_bit_t RcvAvail17IntClear[1]
Definition qib_7322_regs.h:363

QIB_7322_IntClear_pb::RcvAvail5IntClear
pseudo_bit_t RcvAvail5IntClear[1]
Definition qib_7322_regs.h:351

QIB_7322_IntClear_pb::RcvUrg5IntClear
pseudo_bit_t RcvUrg5IntClear[1]
Definition qib_7322_regs.h:378

QIB_7322_IntClear_pb::RcvUrg6IntClear
pseudo_bit_t RcvUrg6IntClear[1]
Definition qib_7322_regs.h:379

QIB_7322_IntClear_pb::SDmaCleanupDoneClear_1
pseudo_bit_t SDmaCleanupDoneClear_1[1]
Definition qib_7322_regs.h:393

QIB_7322_IntClear_pb::SDmaIntClear_0
pseudo_bit_t SDmaIntClear_0[1]
Definition qib_7322_regs.h:398

QIB_7322_IntClear_pb::_unused_1
pseudo_bit_t _unused_1[2]
Definition qib_7322_regs.h:368

QIB_7322_IntClear_pb::SendDoneIntClear_0
pseudo_bit_t SendDoneIntClear_0[1]
Definition qib_7322_regs.h:366

QIB_7322_IntClear_pb::RcvUrg14IntClear
pseudo_bit_t RcvUrg14IntClear[1]
Definition qib_7322_regs.h:387

QIB_7322_IntClear_pb::RcvUrg8IntClear
pseudo_bit_t RcvUrg8IntClear[1]
Definition qib_7322_regs.h:381

QIB_7322_IntClear_pb::RcvAvail0IntClear
pseudo_bit_t RcvAvail0IntClear[1]
Definition qib_7322_regs.h:346

QIB_7322_IntClear_pb::RcvUrg15IntClear
pseudo_bit_t RcvUrg15IntClear[1]
Definition qib_7322_regs.h:388

QIB_7322_IntClear_pb::RcvAvail16IntClear
pseudo_bit_t RcvAvail16IntClear[1]
Definition qib_7322_regs.h:362

QIB_7322_IntClear_pb::AssertGPIOIntClear
pseudo_bit_t AssertGPIOIntClear[1]
Definition qib_7322_regs.h:369

QIB_7322_IntClear_pb::RcvUrg2IntClear
pseudo_bit_t RcvUrg2IntClear[1]
Definition qib_7322_regs.h:375

QIB_7322_IntClear_pb::RcvAvail9IntClear
pseudo_bit_t RcvAvail9IntClear[1]
Definition qib_7322_regs.h:355

QIB_7322_IntClear_pb::RcvAvail6IntClear
pseudo_bit_t RcvAvail6IntClear[1]
Definition qib_7322_regs.h:352

QIB_7322_IntClear_pb::RcvUrg3IntClear
pseudo_bit_t RcvUrg3IntClear[1]
Definition qib_7322_regs.h:376

QIB_7322_IntClear
Definition qib_7322_regs.h:401

QIB_7322_IntClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IntClear_pb)

QIB_7322_IntMask_pb
Definition qib_7322_regs.h:221

QIB_7322_IntMask_pb::RcvUrg14IntMask
pseudo_bit_t RcvUrg14IntMask[1]
Definition qib_7322_regs.h:263

QIB_7322_IntMask_pb::RcvAvail3IntMask
pseudo_bit_t RcvAvail3IntMask[1]
Definition qib_7322_regs.h:225

QIB_7322_IntMask_pb::RcvAvail4IntMask
pseudo_bit_t RcvAvail4IntMask[1]
Definition qib_7322_regs.h:226

QIB_7322_IntMask_pb::RcvAvail12IntMask
pseudo_bit_t RcvAvail12IntMask[1]
Definition qib_7322_regs.h:234

QIB_7322_IntMask_pb::RcvUrg3IntMask
pseudo_bit_t RcvUrg3IntMask[1]
Definition qib_7322_regs.h:252

QIB_7322_IntMask_pb::RcvAvail5IntMask
pseudo_bit_t RcvAvail5IntMask[1]
Definition qib_7322_regs.h:227

QIB_7322_IntMask_pb::RcvAvail7IntMask
pseudo_bit_t RcvAvail7IntMask[1]
Definition qib_7322_regs.h:229

QIB_7322_IntMask_pb::SDmaCleanupDoneMask_0
pseudo_bit_t SDmaCleanupDoneMask_0[1]
Definition qib_7322_regs.h:268

QIB_7322_IntMask_pb::RcvAvail10IntMask
pseudo_bit_t RcvAvail10IntMask[1]
Definition qib_7322_regs.h:232

QIB_7322_IntMask_pb::RcvUrg5IntMask
pseudo_bit_t RcvUrg5IntMask[1]
Definition qib_7322_regs.h:254

QIB_7322_IntMask_pb::RcvAvail1IntMask
pseudo_bit_t RcvAvail1IntMask[1]
Definition qib_7322_regs.h:223

QIB_7322_IntMask_pb::SDmaIdleIntMask_1
pseudo_bit_t SDmaIdleIntMask_1[1]
Definition qib_7322_regs.h:271

QIB_7322_IntMask_pb::RcvAvail17IntMask
pseudo_bit_t RcvAvail17IntMask[1]
Definition qib_7322_regs.h:239

QIB_7322_IntMask_pb::RcvUrg8IntMask
pseudo_bit_t RcvUrg8IntMask[1]
Definition qib_7322_regs.h:257

QIB_7322_IntMask_pb::SendBufAvailIntMask
pseudo_bit_t SendBufAvailIntMask[1]
Definition qib_7322_regs.h:241

QIB_7322_IntMask_pb::RcvUrg11IntMask
pseudo_bit_t RcvUrg11IntMask[1]
Definition qib_7322_regs.h:260

QIB_7322_IntMask_pb::RcvUrg10IntMask
pseudo_bit_t RcvUrg10IntMask[1]
Definition qib_7322_regs.h:259

QIB_7322_IntMask_pb::RcvUrg0IntMask
pseudo_bit_t RcvUrg0IntMask[1]
Definition qib_7322_regs.h:249

QIB_7322_IntMask_pb::SDmaCleanupDoneMask_1
pseudo_bit_t SDmaCleanupDoneMask_1[1]
Definition qib_7322_regs.h:269

QIB_7322_IntMask_pb::RcvAvail11IntMask
pseudo_bit_t RcvAvail11IntMask[1]
Definition qib_7322_regs.h:233

QIB_7322_IntMask_pb::RcvAvail2IntMask
pseudo_bit_t RcvAvail2IntMask[1]
Definition qib_7322_regs.h:224

QIB_7322_IntMask_pb::RcvUrg17IntMask
pseudo_bit_t RcvUrg17IntMask[1]
Definition qib_7322_regs.h:266

QIB_7322_IntMask_pb::RcvUrg2IntMask
pseudo_bit_t RcvUrg2IntMask[1]
Definition qib_7322_regs.h:251

QIB_7322_IntMask_pb::RcvUrg15IntMask
pseudo_bit_t RcvUrg15IntMask[1]
Definition qib_7322_regs.h:264

QIB_7322_IntMask_pb::_unused_2
pseudo_bit_t _unused_2[6]
Definition qib_7322_regs.h:267

QIB_7322_IntMask_pb::SDmaProgressIntMask_0
pseudo_bit_t SDmaProgressIntMask_0[1]
Definition qib_7322_regs.h:272

QIB_7322_IntMask_pb::SDmaIntMask_1
pseudo_bit_t SDmaIntMask_1[1]
Definition qib_7322_regs.h:275

QIB_7322_IntMask_pb::_unused_1
pseudo_bit_t _unused_1[2]
Definition qib_7322_regs.h:244

QIB_7322_IntMask_pb::RcvAvail6IntMask
pseudo_bit_t RcvAvail6IntMask[1]
Definition qib_7322_regs.h:228

QIB_7322_IntMask_pb::RcvUrg13IntMask
pseudo_bit_t RcvUrg13IntMask[1]
Definition qib_7322_regs.h:262

QIB_7322_IntMask_pb::SendDoneIntMask_1
pseudo_bit_t SendDoneIntMask_1[1]
Definition qib_7322_regs.h:243

QIB_7322_IntMask_pb::RcvUrg7IntMask
pseudo_bit_t RcvUrg7IntMask[1]
Definition qib_7322_regs.h:256

QIB_7322_IntMask_pb::SendDoneIntMask_0
pseudo_bit_t SendDoneIntMask_0[1]
Definition qib_7322_regs.h:242

QIB_7322_IntMask_pb::ErrIntMask_1
pseudo_bit_t ErrIntMask_1[1]
Definition qib_7322_regs.h:248

QIB_7322_IntMask_pb::RcvAvail8IntMask
pseudo_bit_t RcvAvail8IntMask[1]
Definition qib_7322_regs.h:230

QIB_7322_IntMask_pb::RcvUrg1IntMask
pseudo_bit_t RcvUrg1IntMask[1]
Definition qib_7322_regs.h:250

QIB_7322_IntMask_pb::RcvAvail14IntMask
pseudo_bit_t RcvAvail14IntMask[1]
Definition qib_7322_regs.h:236

QIB_7322_IntMask_pb::_unused_0
pseudo_bit_t _unused_0[5]
Definition qib_7322_regs.h:240

QIB_7322_IntMask_pb::RcvUrg16IntMask
pseudo_bit_t RcvUrg16IntMask[1]
Definition qib_7322_regs.h:265

QIB_7322_IntMask_pb::SDmaProgressIntMask_1
pseudo_bit_t SDmaProgressIntMask_1[1]
Definition qib_7322_regs.h:273

QIB_7322_IntMask_pb::RcvUrg9IntMask
pseudo_bit_t RcvUrg9IntMask[1]
Definition qib_7322_regs.h:258

QIB_7322_IntMask_pb::SDmaIdleIntMask_0
pseudo_bit_t SDmaIdleIntMask_0[1]
Definition qib_7322_regs.h:270

QIB_7322_IntMask_pb::RcvAvail15IntMask
pseudo_bit_t RcvAvail15IntMask[1]
Definition qib_7322_regs.h:237

QIB_7322_IntMask_pb::RcvAvail9IntMask
pseudo_bit_t RcvAvail9IntMask[1]
Definition qib_7322_regs.h:231

QIB_7322_IntMask_pb::RcvUrg12IntMask
pseudo_bit_t RcvUrg12IntMask[1]
Definition qib_7322_regs.h:261

QIB_7322_IntMask_pb::SDmaIntMask_0
pseudo_bit_t SDmaIntMask_0[1]
Definition qib_7322_regs.h:274

QIB_7322_IntMask_pb::ErrIntMask
pseudo_bit_t ErrIntMask[1]
Definition qib_7322_regs.h:246

QIB_7322_IntMask_pb::RcvAvail0IntMask
pseudo_bit_t RcvAvail0IntMask[1]
Definition qib_7322_regs.h:222

QIB_7322_IntMask_pb::ErrIntMask_0
pseudo_bit_t ErrIntMask_0[1]
Definition qib_7322_regs.h:247

QIB_7322_IntMask_pb::AssertGPIOIntMask
pseudo_bit_t AssertGPIOIntMask[1]
Definition qib_7322_regs.h:245

QIB_7322_IntMask_pb::RcvUrg6IntMask
pseudo_bit_t RcvUrg6IntMask[1]
Definition qib_7322_regs.h:255

QIB_7322_IntMask_pb::RcvAvail16IntMask
pseudo_bit_t RcvAvail16IntMask[1]
Definition qib_7322_regs.h:238

QIB_7322_IntMask_pb::RcvAvail13IntMask
pseudo_bit_t RcvAvail13IntMask[1]
Definition qib_7322_regs.h:235

QIB_7322_IntMask_pb::RcvUrg4IntMask
pseudo_bit_t RcvUrg4IntMask[1]
Definition qib_7322_regs.h:253

QIB_7322_IntMask
Definition qib_7322_regs.h:277

QIB_7322_IntMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IntMask_pb)

QIB_7322_IntRedirect0_pb
Definition qib_7322_regs.h:1026

QIB_7322_IntRedirect0_pb::vec5
pseudo_bit_t vec5[5]
Definition qib_7322_regs.h:1032

QIB_7322_IntRedirect0_pb::vec3
pseudo_bit_t vec3[5]
Definition qib_7322_regs.h:1030

QIB_7322_IntRedirect0_pb::vec11
pseudo_bit_t vec11[5]
Definition qib_7322_regs.h:1038

QIB_7322_IntRedirect0_pb::vec2
pseudo_bit_t vec2[5]
Definition qib_7322_regs.h:1029

QIB_7322_IntRedirect0_pb::vec4
pseudo_bit_t vec4[5]
Definition qib_7322_regs.h:1031

QIB_7322_IntRedirect0_pb::vec8
pseudo_bit_t vec8[5]
Definition qib_7322_regs.h:1035

QIB_7322_IntRedirect0_pb::vec0
pseudo_bit_t vec0[5]
Definition qib_7322_regs.h:1027

QIB_7322_IntRedirect0_pb::vec1
pseudo_bit_t vec1[5]
Definition qib_7322_regs.h:1028

QIB_7322_IntRedirect0_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:1039

QIB_7322_IntRedirect0_pb::vec9
pseudo_bit_t vec9[5]
Definition qib_7322_regs.h:1036

QIB_7322_IntRedirect0_pb::vec10
pseudo_bit_t vec10[5]
Definition qib_7322_regs.h:1037

QIB_7322_IntRedirect0_pb::vec6
pseudo_bit_t vec6[5]
Definition qib_7322_regs.h:1033

QIB_7322_IntRedirect0_pb::vec7
pseudo_bit_t vec7[5]
Definition qib_7322_regs.h:1034

QIB_7322_IntRedirect0
Definition qib_7322_regs.h:1041

QIB_7322_IntRedirect0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IntRedirect0_pb)

QIB_7322_IntStatus_pb
Definition qib_7322_regs.h:283

QIB_7322_IntStatus_pb::RcvAvail0
pseudo_bit_t RcvAvail0[1]
Definition qib_7322_regs.h:284

QIB_7322_IntStatus_pb::RcvAvail8
pseudo_bit_t RcvAvail8[1]
Definition qib_7322_regs.h:292

QIB_7322_IntStatus_pb::RcvAvail15
pseudo_bit_t RcvAvail15[1]
Definition qib_7322_regs.h:299

QIB_7322_IntStatus_pb::RcvUrg16
pseudo_bit_t RcvUrg16[1]
Definition qib_7322_regs.h:327

QIB_7322_IntStatus_pb::RcvUrg0
pseudo_bit_t RcvUrg0[1]
Definition qib_7322_regs.h:311

QIB_7322_IntStatus_pb::SDmaCleanupDone_0
pseudo_bit_t SDmaCleanupDone_0[1]
Definition qib_7322_regs.h:330

QIB_7322_IntStatus_pb::RcvUrg6
pseudo_bit_t RcvUrg6[1]
Definition qib_7322_regs.h:317

QIB_7322_IntStatus_pb::RcvUrg11
pseudo_bit_t RcvUrg11[1]
Definition qib_7322_regs.h:322

QIB_7322_IntStatus_pb::SendDone_1
pseudo_bit_t SendDone_1[1]
Definition qib_7322_regs.h:305

QIB_7322_IntStatus_pb::SendDone_0
pseudo_bit_t SendDone_0[1]
Definition qib_7322_regs.h:304

QIB_7322_IntStatus_pb::RcvAvail16
pseudo_bit_t RcvAvail16[1]
Definition qib_7322_regs.h:300

QIB_7322_IntStatus_pb::RcvUrg8
pseudo_bit_t RcvUrg8[1]
Definition qib_7322_regs.h:319

QIB_7322_IntStatus_pb::RcvUrg7
pseudo_bit_t RcvUrg7[1]
Definition qib_7322_regs.h:318

QIB_7322_IntStatus_pb::RcvUrg3
pseudo_bit_t RcvUrg3[1]
Definition qib_7322_regs.h:314

QIB_7322_IntStatus_pb::_unused_1
pseudo_bit_t _unused_1[2]
Definition qib_7322_regs.h:306

QIB_7322_IntStatus_pb::RcvUrg14
pseudo_bit_t RcvUrg14[1]
Definition qib_7322_regs.h:325

QIB_7322_IntStatus_pb::Err_1
pseudo_bit_t Err_1[1]
Definition qib_7322_regs.h:310

QIB_7322_IntStatus_pb::SDmaCleanupDone_1
pseudo_bit_t SDmaCleanupDone_1[1]
Definition qib_7322_regs.h:331

QIB_7322_IntStatus_pb::RcvUrg5
pseudo_bit_t RcvUrg5[1]
Definition qib_7322_regs.h:316

QIB_7322_IntStatus_pb::RcvUrg9
pseudo_bit_t RcvUrg9[1]
Definition qib_7322_regs.h:320

QIB_7322_IntStatus_pb::RcvAvail13
pseudo_bit_t RcvAvail13[1]
Definition qib_7322_regs.h:297

QIB_7322_IntStatus_pb::RcvAvail1
pseudo_bit_t RcvAvail1[1]
Definition qib_7322_regs.h:285

QIB_7322_IntStatus_pb::SDmaIdleInt_0
pseudo_bit_t SDmaIdleInt_0[1]
Definition qib_7322_regs.h:332

QIB_7322_IntStatus_pb::RcvAvail10
pseudo_bit_t RcvAvail10[1]
Definition qib_7322_regs.h:294

QIB_7322_IntStatus_pb::RcvAvail4
pseudo_bit_t RcvAvail4[1]
Definition qib_7322_regs.h:288

QIB_7322_IntStatus_pb::RcvAvail7
pseudo_bit_t RcvAvail7[1]
Definition qib_7322_regs.h:291

QIB_7322_IntStatus_pb::RcvUrg4
pseudo_bit_t RcvUrg4[1]
Definition qib_7322_regs.h:315

QIB_7322_IntStatus_pb::RcvAvail2
pseudo_bit_t RcvAvail2[1]
Definition qib_7322_regs.h:286

QIB_7322_IntStatus_pb::SDmaInt_0
pseudo_bit_t SDmaInt_0[1]
Definition qib_7322_regs.h:336

QIB_7322_IntStatus_pb::SendBufAvail
pseudo_bit_t SendBufAvail[1]
Definition qib_7322_regs.h:303

QIB_7322_IntStatus_pb::RcvAvail9
pseudo_bit_t RcvAvail9[1]
Definition qib_7322_regs.h:293

QIB_7322_IntStatus_pb::SDmaIdleInt_1
pseudo_bit_t SDmaIdleInt_1[1]
Definition qib_7322_regs.h:333

QIB_7322_IntStatus_pb::RcvUrg15
pseudo_bit_t RcvUrg15[1]
Definition qib_7322_regs.h:326

QIB_7322_IntStatus_pb::AssertGPIO
pseudo_bit_t AssertGPIO[1]
Definition qib_7322_regs.h:307

QIB_7322_IntStatus_pb::RcvAvail11
pseudo_bit_t RcvAvail11[1]
Definition qib_7322_regs.h:295

QIB_7322_IntStatus_pb::RcvAvail14
pseudo_bit_t RcvAvail14[1]
Definition qib_7322_regs.h:298

QIB_7322_IntStatus_pb::SDmaProgressInt_1
pseudo_bit_t SDmaProgressInt_1[1]
Definition qib_7322_regs.h:335

QIB_7322_IntStatus_pb::Err
pseudo_bit_t Err[1]
Definition qib_7322_regs.h:308

QIB_7322_IntStatus_pb::SDmaProgressInt_0
pseudo_bit_t SDmaProgressInt_0[1]
Definition qib_7322_regs.h:334

QIB_7322_IntStatus_pb::RcvUrg1
pseudo_bit_t RcvUrg1[1]
Definition qib_7322_regs.h:312

QIB_7322_IntStatus_pb::RcvUrg12
pseudo_bit_t RcvUrg12[1]
Definition qib_7322_regs.h:323

QIB_7322_IntStatus_pb::RcvUrg2
pseudo_bit_t RcvUrg2[1]
Definition qib_7322_regs.h:313

QIB_7322_IntStatus_pb::_unused_0
pseudo_bit_t _unused_0[5]
Definition qib_7322_regs.h:302

QIB_7322_IntStatus_pb::RcvUrg17
pseudo_bit_t RcvUrg17[1]
Definition qib_7322_regs.h:328

QIB_7322_IntStatus_pb::RcvUrg10
pseudo_bit_t RcvUrg10[1]
Definition qib_7322_regs.h:321

QIB_7322_IntStatus_pb::Err_0
pseudo_bit_t Err_0[1]
Definition qib_7322_regs.h:309

QIB_7322_IntStatus_pb::RcvUrg13
pseudo_bit_t RcvUrg13[1]
Definition qib_7322_regs.h:324

QIB_7322_IntStatus_pb::SDmaInt_1
pseudo_bit_t SDmaInt_1[1]
Definition qib_7322_regs.h:337

QIB_7322_IntStatus_pb::RcvAvail12
pseudo_bit_t RcvAvail12[1]
Definition qib_7322_regs.h:296

QIB_7322_IntStatus_pb::RcvAvail5
pseudo_bit_t RcvAvail5[1]
Definition qib_7322_regs.h:289

QIB_7322_IntStatus_pb::RcvAvail3
pseudo_bit_t RcvAvail3[1]
Definition qib_7322_regs.h:287

QIB_7322_IntStatus_pb::_unused_2
pseudo_bit_t _unused_2[6]
Definition qib_7322_regs.h:329

QIB_7322_IntStatus_pb::RcvAvail17
pseudo_bit_t RcvAvail17[1]
Definition qib_7322_regs.h:301

QIB_7322_IntStatus_pb::RcvAvail6
pseudo_bit_t RcvAvail6[1]
Definition qib_7322_regs.h:290

QIB_7322_IntStatus
Definition qib_7322_regs.h:339

QIB_7322_IntStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_IntStatus_pb)

QIB_7322_LAControlReg_pb
Definition qib_7322_regs.h:980

QIB_7322_LAControlReg_pb::Address_sc
pseudo_bit_t Address_sc[9]
Definition qib_7322_regs.h:986

QIB_7322_LAControlReg_pb::Delay
pseudo_bit_t Delay[20]
Definition qib_7322_regs.h:984

QIB_7322_LAControlReg_pb::Delay_sc
pseudo_bit_t Delay_sc[20]
Definition qib_7322_regs.h:988

QIB_7322_LAControlReg_pb::Mode_sc
pseudo_bit_t Mode_sc[2]
Definition qib_7322_regs.h:987

QIB_7322_LAControlReg_pb::Finished
pseudo_bit_t Finished[1]
Definition qib_7322_regs.h:981

QIB_7322_LAControlReg_pb::Finished_sc
pseudo_bit_t Finished_sc[1]
Definition qib_7322_regs.h:985

QIB_7322_LAControlReg_pb::Mode
pseudo_bit_t Mode[2]
Definition qib_7322_regs.h:983

QIB_7322_LAControlReg_pb::Address
pseudo_bit_t Address[9]
Definition qib_7322_regs.h:982

QIB_7322_LAControlReg
Definition qib_7322_regs.h:990

QIB_7322_LAControlReg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LAControlReg_pb)

QIB_7322_LaFifoArray0CorErrLog_0_pb
Definition qib_7322_regs.h:3786

QIB_7322_LaFifoArray0CorErrLog_0_pb::LaFifoArray0CorErrData_34_0
pseudo_bit_t LaFifoArray0CorErrData_34_0[35]
Definition qib_7322_regs.h:3787

QIB_7322_LaFifoArray0CorErrLog_0_pb::LaFifoArray0CorErrAddr_10_0
pseudo_bit_t LaFifoArray0CorErrAddr_10_0[11]
Definition qib_7322_regs.h:3789

QIB_7322_LaFifoArray0CorErrLog_0_pb::_unused_0
pseudo_bit_t _unused_0[7]
Definition qib_7322_regs.h:3790

QIB_7322_LaFifoArray0CorErrLog_0_pb::LaFifoArray0CorErrCheckBit_10_0
pseudo_bit_t LaFifoArray0CorErrCheckBit_10_0[11]
Definition qib_7322_regs.h:3788

QIB_7322_LaFifoArray0CorErrLog_0
Definition qib_7322_regs.h:3792

QIB_7322_LaFifoArray0CorErrLog_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0CorErrLog_0_pb)

QIB_7322_LaFifoArray0CorErrLog_1_pb
Definition qib_7322_regs.h:5116

QIB_7322_LaFifoArray0CorErrLog_1_pb::LaFifoArray0CorErrData_34_0
pseudo_bit_t LaFifoArray0CorErrData_34_0[35]
Definition qib_7322_regs.h:5117

QIB_7322_LaFifoArray0CorErrLog_1_pb::LaFifoArray0CorErrCheckBit_10_0
pseudo_bit_t LaFifoArray0CorErrCheckBit_10_0[11]
Definition qib_7322_regs.h:5118

QIB_7322_LaFifoArray0CorErrLog_1_pb::LaFifoArray0CorErrAddr_10_0
pseudo_bit_t LaFifoArray0CorErrAddr_10_0[11]
Definition qib_7322_regs.h:5119

QIB_7322_LaFifoArray0CorErrLog_1_pb::_unused_0
pseudo_bit_t _unused_0[7]
Definition qib_7322_regs.h:5120

QIB_7322_LaFifoArray0CorErrLog_1
Definition qib_7322_regs.h:5122

QIB_7322_LaFifoArray0CorErrLog_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0CorErrLog_1_pb)

QIB_7322_LaFifoArray0UnCorErrLog_0_pb
Definition qib_7322_regs.h:3597

QIB_7322_LaFifoArray0UnCorErrLog_0_pb::LaFifoArray0UnCorErrCheckBit_10_0
pseudo_bit_t LaFifoArray0UnCorErrCheckBit_10_0[11]
Definition qib_7322_regs.h:3599

QIB_7322_LaFifoArray0UnCorErrLog_0_pb::LaFifoArray0UnCorErrData_34_0
pseudo_bit_t LaFifoArray0UnCorErrData_34_0[35]
Definition qib_7322_regs.h:3598

QIB_7322_LaFifoArray0UnCorErrLog_0_pb::_unused_0
pseudo_bit_t _unused_0[7]
Definition qib_7322_regs.h:3601

QIB_7322_LaFifoArray0UnCorErrLog_0_pb::LaFifoArray0UnCorErrAddr_10_0
pseudo_bit_t LaFifoArray0UnCorErrAddr_10_0[11]
Definition qib_7322_regs.h:3600

QIB_7322_LaFifoArray0UnCorErrLog_0
Definition qib_7322_regs.h:3603

QIB_7322_LaFifoArray0UnCorErrLog_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0UnCorErrLog_0_pb)

QIB_7322_LaFifoArray0UnCorErrLog_1_pb
Definition qib_7322_regs.h:4927

QIB_7322_LaFifoArray0UnCorErrLog_1_pb::LaFifoArray0UnCorErrAddr_10_0
pseudo_bit_t LaFifoArray0UnCorErrAddr_10_0[11]
Definition qib_7322_regs.h:4930

QIB_7322_LaFifoArray0UnCorErrLog_1_pb::LaFifoArray0UnCorErrData_34_0
pseudo_bit_t LaFifoArray0UnCorErrData_34_0[35]
Definition qib_7322_regs.h:4928

QIB_7322_LaFifoArray0UnCorErrLog_1_pb::_unused_0
pseudo_bit_t _unused_0[7]
Definition qib_7322_regs.h:4931

QIB_7322_LaFifoArray0UnCorErrLog_1_pb::LaFifoArray0UnCorErrCheckBit_10_0
pseudo_bit_t LaFifoArray0UnCorErrCheckBit_10_0[11]
Definition qib_7322_regs.h:4929

QIB_7322_LaFifoArray0UnCorErrLog_1
Definition qib_7322_regs.h:4933

QIB_7322_LaFifoArray0UnCorErrLog_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LaFifoArray0UnCorErrLog_1_pb)

QIB_7322_LowPriority0_0_pb
Definition qib_7322_regs.h:3838

QIB_7322_LowPriority0_0_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:3840

QIB_7322_LowPriority0_0_pb::_unused_1
pseudo_bit_t _unused_1[45]
Definition qib_7322_regs.h:3842

QIB_7322_LowPriority0_0_pb::Weight
pseudo_bit_t Weight[8]
Definition qib_7322_regs.h:3839

QIB_7322_LowPriority0_0_pb::VirtualLane
pseudo_bit_t VirtualLane[3]
Definition qib_7322_regs.h:3841

QIB_7322_LowPriority0_0
Definition qib_7322_regs.h:3844

QIB_7322_LowPriority0_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LowPriority0_0_pb)

QIB_7322_LowPriority0_1_pb
Definition qib_7322_regs.h:5168

QIB_7322_LowPriority0_1_pb::VirtualLane
pseudo_bit_t VirtualLane[3]
Definition qib_7322_regs.h:5171

QIB_7322_LowPriority0_1_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:5170

QIB_7322_LowPriority0_1_pb::_unused_1
pseudo_bit_t _unused_1[45]
Definition qib_7322_regs.h:5172

QIB_7322_LowPriority0_1_pb::Weight
pseudo_bit_t Weight[8]
Definition qib_7322_regs.h:5169

QIB_7322_LowPriority0_1
Definition qib_7322_regs.h:5174

QIB_7322_LowPriority0_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_LowPriority0_1_pb)

QIB_7322_MemCorErrClear_pb
Definition qib_7322_regs.h:1848

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO7_0
pseudo_bit_t CorErrClearSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1873

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO6_0
pseudo_bit_t CorErrClearSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1872

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO1_0
pseudo_bit_t CorErrClearSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1867

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO7_1
pseudo_bit_t CorErrClearSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1881

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO4_1
pseudo_bit_t CorErrClearSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1878

QIB_7322_MemCorErrClear_pb::CorErrClearRcvFlags_1
pseudo_bit_t CorErrClearRcvFlags_1[1]
Definition qib_7322_regs.h:1855

QIB_7322_MemCorErrClear_pb::CorErrClearRcvBuf_0
pseudo_bit_t CorErrClearRcvBuf_0[1]
Definition qib_7322_regs.h:1849

QIB_7322_MemCorErrClear_pb::CorErrClearMsixTable1
pseudo_bit_t CorErrClearMsixTable1[1]
Definition qib_7322_regs.h:1891

QIB_7322_MemCorErrClear_pb::CorErrClearPCIeCompHdrBuf
pseudo_bit_t CorErrClearPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1888

QIB_7322_MemCorErrClear_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1884

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO3_1
pseudo_bit_t CorErrClearSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1877

QIB_7322_MemCorErrClear_pb::CorErrClearLookupiqBuf_0
pseudo_bit_t CorErrClearLookupiqBuf_0[1]
Definition qib_7322_regs.h:1851

QIB_7322_MemCorErrClear_pb::CorErrClearPCIePostHdrBuf
pseudo_bit_t CorErrClearPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1886

QIB_7322_MemCorErrClear_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1893

QIB_7322_MemCorErrClear_pb::CorErrClearMsixTable0
pseudo_bit_t CorErrClearMsixTable0[1]
Definition qib_7322_regs.h:1890

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO5_0
pseudo_bit_t CorErrClearSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1871

QIB_7322_MemCorErrClear_pb::CorErrClearSendRmFIFO_0
pseudo_bit_t CorErrClearSendRmFIFO_0[1]
Definition qib_7322_regs.h:1882

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO5_1
pseudo_bit_t CorErrClearSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1879

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO3_0
pseudo_bit_t CorErrClearSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1869

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO0_1
pseudo_bit_t CorErrClearSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1874

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO4_0
pseudo_bit_t CorErrClearSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1870

QIB_7322_MemCorErrClear_pb::CorErrClearLookupiqBuf_1
pseudo_bit_t CorErrClearLookupiqBuf_1[1]
Definition qib_7322_regs.h:1856

QIB_7322_MemCorErrClear_pb::CorErrClearMsixTable2
pseudo_bit_t CorErrClearMsixTable2[1]
Definition qib_7322_regs.h:1892

QIB_7322_MemCorErrClear_pb::CorErrClearSendBufExtra
pseudo_bit_t CorErrClearSendBufExtra[1]
Definition qib_7322_regs.h:1864

QIB_7322_MemCorErrClear_pb::CorErrClearSendBufMain
pseudo_bit_t CorErrClearSendBufMain[1]
Definition qib_7322_regs.h:1863

QIB_7322_MemCorErrClear_pb::CorErrClearSendRmFIFO_1
pseudo_bit_t CorErrClearSendRmFIFO_1[1]
Definition qib_7322_regs.h:1883

QIB_7322_MemCorErrClear_pb::CorErrClearRcvDMADataBuf_1
pseudo_bit_t CorErrClearRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1858

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO0_0
pseudo_bit_t CorErrClearSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1866

QIB_7322_MemCorErrClear_pb::CorErrClearRcvDMAHdrBuf_1
pseudo_bit_t CorErrClearRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1857

QIB_7322_MemCorErrClear_pb::CorErrClearPCIeCompDataBuf
pseudo_bit_t CorErrClearPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1889

QIB_7322_MemCorErrClear_pb::CorErrClearPCIeRetryBuf
pseudo_bit_t CorErrClearPCIeRetryBuf[1]
Definition qib_7322_regs.h:1885

QIB_7322_MemCorErrClear_pb::CorErrClearSendPbcArray
pseudo_bit_t CorErrClearSendPbcArray[1]
Definition qib_7322_regs.h:1865

QIB_7322_MemCorErrClear_pb::CorErrClearRcvEgrArray
pseudo_bit_t CorErrClearRcvEgrArray[1]
Definition qib_7322_regs.h:1860

QIB_7322_MemCorErrClear_pb::CorErrClearSendBufVL15
pseudo_bit_t CorErrClearSendBufVL15[1]
Definition qib_7322_regs.h:1862

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO2_0
pseudo_bit_t CorErrClearSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1868

QIB_7322_MemCorErrClear_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1861

QIB_7322_MemCorErrClear_pb::CorErrClearRcvFlags_0
pseudo_bit_t CorErrClearRcvFlags_0[1]
Definition qib_7322_regs.h:1850

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO1_1
pseudo_bit_t CorErrClearSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1875

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO6_1
pseudo_bit_t CorErrClearSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1880

QIB_7322_MemCorErrClear_pb::CorErrClearRcvDMAHdrBuf_0
pseudo_bit_t CorErrClearRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1852

QIB_7322_MemCorErrClear_pb::CorErrClearRcvTIDArray
pseudo_bit_t CorErrClearRcvTIDArray[1]
Definition qib_7322_regs.h:1859

QIB_7322_MemCorErrClear_pb::CorErrClearPCIePostDataBuf
pseudo_bit_t CorErrClearPCIePostDataBuf[1]
Definition qib_7322_regs.h:1887

QIB_7322_MemCorErrClear_pb::CorErrClearRcvDMADataBuf_0
pseudo_bit_t CorErrClearRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1853

QIB_7322_MemCorErrClear_pb::CorErrClearSendLaFIFO2_1
pseudo_bit_t CorErrClearSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1876

QIB_7322_MemCorErrClear_pb::CorErrClearRcvBuf_1
pseudo_bit_t CorErrClearRcvBuf_1[1]
Definition qib_7322_regs.h:1854

QIB_7322_MemCorErrClear
Definition qib_7322_regs.h:1895

QIB_7322_MemCorErrClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemCorErrClear_pb)

QIB_7322_MemCorErrMask_pb
Definition qib_7322_regs.h:1742

QIB_7322_MemCorErrMask_pb::CorErrMskPCIeRetryBuf
pseudo_bit_t CorErrMskPCIeRetryBuf[1]
Definition qib_7322_regs.h:1779

QIB_7322_MemCorErrMask_pb::CorErrMskLookupiqBuf_0
pseudo_bit_t CorErrMskLookupiqBuf_0[1]
Definition qib_7322_regs.h:1745

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO0_0
pseudo_bit_t CorErrMskSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1760

QIB_7322_MemCorErrMask_pb::CorErrMskRcvDMADataBuf_0
pseudo_bit_t CorErrMskRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1747

QIB_7322_MemCorErrMask_pb::CorErrMskRcvEgrArray
pseudo_bit_t CorErrMskRcvEgrArray[1]
Definition qib_7322_regs.h:1754

QIB_7322_MemCorErrMask_pb::CorErrMskPCIePostHdrBuf
pseudo_bit_t CorErrMskPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1780

QIB_7322_MemCorErrMask_pb::CorErrMskRcvDMAHdrBuf_1
pseudo_bit_t CorErrMskRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1751

QIB_7322_MemCorErrMask_pb::CorErrMskRcvTIDArray
pseudo_bit_t CorErrMskRcvTIDArray[1]
Definition qib_7322_regs.h:1753

QIB_7322_MemCorErrMask_pb::CorErrMskPCIePostDataBuf
pseudo_bit_t CorErrMskPCIePostDataBuf[1]
Definition qib_7322_regs.h:1781

QIB_7322_MemCorErrMask_pb::CorErrMskSendRmFIFO_1
pseudo_bit_t CorErrMskSendRmFIFO_1[1]
Definition qib_7322_regs.h:1777

QIB_7322_MemCorErrMask_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1755

QIB_7322_MemCorErrMask_pb::CorErrMskPCIeCompHdrBuf
pseudo_bit_t CorErrMskPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1782

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO5_1
pseudo_bit_t CorErrMskSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1773

QIB_7322_MemCorErrMask_pb::CorErrMskMsixTable1
pseudo_bit_t CorErrMskMsixTable1[1]
Definition qib_7322_regs.h:1785

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO3_1
pseudo_bit_t CorErrMskSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1771

QIB_7322_MemCorErrMask_pb::CorErrMskSendBufMain
pseudo_bit_t CorErrMskSendBufMain[1]
Definition qib_7322_regs.h:1757

QIB_7322_MemCorErrMask_pb::CorErrMskRcvFlags_1
pseudo_bit_t CorErrMskRcvFlags_1[1]
Definition qib_7322_regs.h:1749

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO2_0
pseudo_bit_t CorErrMskSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1762

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO7_0
pseudo_bit_t CorErrMskSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1767

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO0_1
pseudo_bit_t CorErrMskSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1768

QIB_7322_MemCorErrMask_pb::CorErrMskRcvBuf_1
pseudo_bit_t CorErrMskRcvBuf_1[1]
Definition qib_7322_regs.h:1748

QIB_7322_MemCorErrMask_pb::CorErrMskRcvDMADataBuf_1
pseudo_bit_t CorErrMskRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1752

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO2_1
pseudo_bit_t CorErrMskSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1770

QIB_7322_MemCorErrMask_pb::CorErrMskSendBufExtra
pseudo_bit_t CorErrMskSendBufExtra[1]
Definition qib_7322_regs.h:1758

QIB_7322_MemCorErrMask_pb::CorErrMskMsixTable2
pseudo_bit_t CorErrMskMsixTable2[1]
Definition qib_7322_regs.h:1786

QIB_7322_MemCorErrMask_pb::CorErrMskRcvBuf_0
pseudo_bit_t CorErrMskRcvBuf_0[1]
Definition qib_7322_regs.h:1743

QIB_7322_MemCorErrMask_pb::CorErrMskSendRmFIFO_0
pseudo_bit_t CorErrMskSendRmFIFO_0[1]
Definition qib_7322_regs.h:1776

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO3_0
pseudo_bit_t CorErrMskSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1763

QIB_7322_MemCorErrMask_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1778

QIB_7322_MemCorErrMask_pb::CorErrMskMsixTable0
pseudo_bit_t CorErrMskMsixTable0[1]
Definition qib_7322_regs.h:1784

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO7_1
pseudo_bit_t CorErrMskSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1775

QIB_7322_MemCorErrMask_pb::CorErrMskSendBufVL15
pseudo_bit_t CorErrMskSendBufVL15[1]
Definition qib_7322_regs.h:1756

QIB_7322_MemCorErrMask_pb::CorErrMskLookupiqBuf_1
pseudo_bit_t CorErrMskLookupiqBuf_1[1]
Definition qib_7322_regs.h:1750

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO1_1
pseudo_bit_t CorErrMskSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1769

QIB_7322_MemCorErrMask_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1787

QIB_7322_MemCorErrMask_pb::CorErrMskRcvFlags_0
pseudo_bit_t CorErrMskRcvFlags_0[1]
Definition qib_7322_regs.h:1744

QIB_7322_MemCorErrMask_pb::CorErrMskPCIeCompDataBuf
pseudo_bit_t CorErrMskPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1783

QIB_7322_MemCorErrMask_pb::CorErrMskRcvDMAHdrBuf_0
pseudo_bit_t CorErrMskRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1746

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO1_0
pseudo_bit_t CorErrMskSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1761

QIB_7322_MemCorErrMask_pb::CorErrMskSendPbcArray
pseudo_bit_t CorErrMskSendPbcArray[1]
Definition qib_7322_regs.h:1759

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO4_1
pseudo_bit_t CorErrMskSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1772

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO4_0
pseudo_bit_t CorErrMskSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1764

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO5_0
pseudo_bit_t CorErrMskSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1765

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO6_1
pseudo_bit_t CorErrMskSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1774

QIB_7322_MemCorErrMask_pb::CorErrMskSendLaFIFO6_0
pseudo_bit_t CorErrMskSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1766

QIB_7322_MemCorErrMask
Definition qib_7322_regs.h:1789

QIB_7322_MemCorErrMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemCorErrMask_pb)

QIB_7322_MemCorErrStatus_pb
Definition qib_7322_regs.h:1795

QIB_7322_MemCorErrStatus_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1831

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO4_1
pseudo_bit_t CorErrStatusSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1825

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO7_0
pseudo_bit_t CorErrStatusSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1820

QIB_7322_MemCorErrStatus_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1808

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO7_1
pseudo_bit_t CorErrStatusSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1828

QIB_7322_MemCorErrStatus_pb::CorErrStatusMsixTable1
pseudo_bit_t CorErrStatusMsixTable1[1]
Definition qib_7322_regs.h:1838

QIB_7322_MemCorErrStatus_pb::CorErrStatusLookupiqBuf_1
pseudo_bit_t CorErrStatusLookupiqBuf_1[1]
Definition qib_7322_regs.h:1803

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvDMAHdrBuf_1
pseudo_bit_t CorErrStatusRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1804

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvBuf_1
pseudo_bit_t CorErrStatusRcvBuf_1[1]
Definition qib_7322_regs.h:1801

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvFlags_0
pseudo_bit_t CorErrStatusRcvFlags_0[1]
Definition qib_7322_regs.h:1797

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO3_0
pseudo_bit_t CorErrStatusSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1816

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvDMAHdrBuf_0
pseudo_bit_t CorErrStatusRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1799

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO4_0
pseudo_bit_t CorErrStatusSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1817

QIB_7322_MemCorErrStatus_pb::CorErrStatusLookupiqBuf_0
pseudo_bit_t CorErrStatusLookupiqBuf_0[1]
Definition qib_7322_regs.h:1798

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO2_1
pseudo_bit_t CorErrStatusSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1823

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvBuf_0
pseudo_bit_t CorErrStatusRcvBuf_0[1]
Definition qib_7322_regs.h:1796

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO1_0
pseudo_bit_t CorErrStatusSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1814

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO0_1
pseudo_bit_t CorErrStatusSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1821

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO0_0
pseudo_bit_t CorErrStatusSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1813

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvTIDArray
pseudo_bit_t CorErrStatusRcvTIDArray[1]
Definition qib_7322_regs.h:1806

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendRmFIFO_0
pseudo_bit_t CorErrStatusSendRmFIFO_0[1]
Definition qib_7322_regs.h:1829

QIB_7322_MemCorErrStatus_pb::CorErrStatusPCIePostDataBuf
pseudo_bit_t CorErrStatusPCIePostDataBuf[1]
Definition qib_7322_regs.h:1834

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO5_1
pseudo_bit_t CorErrStatusSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1826

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendRmFIFO_1
pseudo_bit_t CorErrStatusSendRmFIFO_1[1]
Definition qib_7322_regs.h:1830

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO3_1
pseudo_bit_t CorErrStatusSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1824

QIB_7322_MemCorErrStatus_pb::CorErrStatusPCIeCompHdrBuf
pseudo_bit_t CorErrStatusPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1835

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvFlags_1
pseudo_bit_t CorErrStatusRcvFlags_1[1]
Definition qib_7322_regs.h:1802

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendBufExtra
pseudo_bit_t CorErrStatusSendBufExtra[1]
Definition qib_7322_regs.h:1811

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO6_1
pseudo_bit_t CorErrStatusSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1827

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvDMADataBuf_1
pseudo_bit_t CorErrStatusRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1805

QIB_7322_MemCorErrStatus_pb::CorErrStatusPCIeCompDataBuf
pseudo_bit_t CorErrStatusPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1836

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO2_0
pseudo_bit_t CorErrStatusSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1815

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendBufMain
pseudo_bit_t CorErrStatusSendBufMain[1]
Definition qib_7322_regs.h:1810

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO1_1
pseudo_bit_t CorErrStatusSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1822

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO6_0
pseudo_bit_t CorErrStatusSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1819

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvDMADataBuf_0
pseudo_bit_t CorErrStatusRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1800

QIB_7322_MemCorErrStatus_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1840

QIB_7322_MemCorErrStatus_pb::CorErrStatusMsixTable0
pseudo_bit_t CorErrStatusMsixTable0[1]
Definition qib_7322_regs.h:1837

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendPbcArray
pseudo_bit_t CorErrStatusSendPbcArray[1]
Definition qib_7322_regs.h:1812

QIB_7322_MemCorErrStatus_pb::CorErrStatusPCIeRetryBuf
pseudo_bit_t CorErrStatusPCIeRetryBuf[1]
Definition qib_7322_regs.h:1832

QIB_7322_MemCorErrStatus_pb::CorErrStatusMsixTable2
pseudo_bit_t CorErrStatusMsixTable2[1]
Definition qib_7322_regs.h:1839

QIB_7322_MemCorErrStatus_pb::CorErrStatusPCIePostHdrBuf
pseudo_bit_t CorErrStatusPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1833

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendBufVL15
pseudo_bit_t CorErrStatusSendBufVL15[1]
Definition qib_7322_regs.h:1809

QIB_7322_MemCorErrStatus_pb::CorErrStatusRcvEgrArray
pseudo_bit_t CorErrStatusRcvEgrArray[1]
Definition qib_7322_regs.h:1807

QIB_7322_MemCorErrStatus_pb::CorErrStatusSendLaFIFO5_0
pseudo_bit_t CorErrStatusSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1818

QIB_7322_MemCorErrStatus
Definition qib_7322_regs.h:1842

QIB_7322_MemCorErrStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemCorErrStatus_pb)

QIB_7322_MemErrCtrlA_pb
Definition qib_7322_regs.h:1155

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO6_0
pseudo_bit_t FSSUncErrSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1179

QIB_7322_MemErrCtrlA_pb::SwapEccDataBits
pseudo_bit_t SwapEccDataBits[1]
Definition qib_7322_regs.h:1204

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvEgrArray
pseudo_bit_t FSSUncErrRcvEgrArray[1]
Definition qib_7322_regs.h:1167

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO4_1
pseudo_bit_t FSSUncErrSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1185

QIB_7322_MemErrCtrlA_pb::_unused_2
pseudo_bit_t _unused_2[4]
Definition qib_7322_regs.h:1200

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO3_1
pseudo_bit_t FSSUncErrSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1184

QIB_7322_MemErrCtrlA_pb::FSSUncErrMsixTable1
pseudo_bit_t FSSUncErrMsixTable1[1]
Definition qib_7322_regs.h:1198

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO4_0
pseudo_bit_t FSSUncErrSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1177

QIB_7322_MemErrCtrlA_pb::FSSUncErrMsixTable2
pseudo_bit_t FSSUncErrMsixTable2[1]
Definition qib_7322_regs.h:1199

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvFlags_0
pseudo_bit_t FSSUncErrRcvFlags_0[1]
Definition qib_7322_regs.h:1157

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO5_1
pseudo_bit_t FSSUncErrSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1186

QIB_7322_MemErrCtrlA_pb::FSSUncErrLookupiqBuf_1
pseudo_bit_t FSSUncErrLookupiqBuf_1[1]
Definition qib_7322_regs.h:1163

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvBuf_1
pseudo_bit_t FSSUncErrRcvBuf_1[1]
Definition qib_7322_regs.h:1161

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendBufMain
pseudo_bit_t FSSUncErrSendBufMain[1]
Definition qib_7322_regs.h:1170

QIB_7322_MemErrCtrlA_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1168

QIB_7322_MemErrCtrlA_pb::FSSUncErrPCIeRetryBuf
pseudo_bit_t FSSUncErrPCIeRetryBuf[1]
Definition qib_7322_regs.h:1192

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO2_1
pseudo_bit_t FSSUncErrSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1183

QIB_7322_MemErrCtrlA_pb::FSSUncErrPCIePostHdrBuf
pseudo_bit_t FSSUncErrPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1193

QIB_7322_MemErrCtrlA_pb::FSSUncErrLookupiqBuf_0
pseudo_bit_t FSSUncErrLookupiqBuf_0[1]
Definition qib_7322_regs.h:1158

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendBufVL15
pseudo_bit_t FSSUncErrSendBufVL15[1]
Definition qib_7322_regs.h:1169

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO6_1
pseudo_bit_t FSSUncErrSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1187

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO2_0
pseudo_bit_t FSSUncErrSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1175

QIB_7322_MemErrCtrlA_pb::FSSUncErrPCIeCompHdrBuf
pseudo_bit_t FSSUncErrPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1195

QIB_7322_MemErrCtrlA_pb::SwapEccDataMsixBits
pseudo_bit_t SwapEccDataMsixBits[1]
Definition qib_7322_regs.h:1201

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendPbcArray
pseudo_bit_t FSSUncErrSendPbcArray[1]
Definition qib_7322_regs.h:1172

QIB_7322_MemErrCtrlA_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1191

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO3_0
pseudo_bit_t FSSUncErrSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1176

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendBufExtra
pseudo_bit_t FSSUncErrSendBufExtra[1]
Definition qib_7322_regs.h:1171

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO1_1
pseudo_bit_t FSSUncErrSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1182

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvDMAHdrBuf_1
pseudo_bit_t FSSUncErrRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1164

QIB_7322_MemErrCtrlA_pb::FSSUncErrPCIeCompDataBuf
pseudo_bit_t FSSUncErrPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1196

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvTIDArray
pseudo_bit_t FSSUncErrRcvTIDArray[1]
Definition qib_7322_regs.h:1166

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO5_0
pseudo_bit_t FSSUncErrSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1178

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO1_0
pseudo_bit_t FSSUncErrSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1174

QIB_7322_MemErrCtrlA_pb::FSSUncErrPCIePostDataBuf
pseudo_bit_t FSSUncErrPCIePostDataBuf[1]
Definition qib_7322_regs.h:1194

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvFlags_1
pseudo_bit_t FSSUncErrRcvFlags_1[1]
Definition qib_7322_regs.h:1162

QIB_7322_MemErrCtrlA_pb::FSSUncErrMsixTable0
pseudo_bit_t FSSUncErrMsixTable0[1]
Definition qib_7322_regs.h:1197

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvDMADataBuf_0
pseudo_bit_t FSSUncErrRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1160

QIB_7322_MemErrCtrlA_pb::DisableEccCorrection
pseudo_bit_t DisableEccCorrection[1]
Definition qib_7322_regs.h:1203

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendRmFIFO_0
pseudo_bit_t FSSUncErrSendRmFIFO_0[1]
Definition qib_7322_regs.h:1189

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvDMAHdrBuf_0
pseudo_bit_t FSSUncErrRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1159

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO7_0
pseudo_bit_t FSSUncErrSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1180

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO0_1
pseudo_bit_t FSSUncErrSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1181

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendRmFIFO_1
pseudo_bit_t FSSUncErrSendRmFIFO_1[1]
Definition qib_7322_regs.h:1190

QIB_7322_MemErrCtrlA_pb::SwapEccDataExtraBits
pseudo_bit_t SwapEccDataExtraBits[1]
Definition qib_7322_regs.h:1202

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO0_0
pseudo_bit_t FSSUncErrSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1173

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvBuf_0
pseudo_bit_t FSSUncErrRcvBuf_0[1]
Definition qib_7322_regs.h:1156

QIB_7322_MemErrCtrlA_pb::FSSUncErrRcvDMADataBuf_1
pseudo_bit_t FSSUncErrRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1165

QIB_7322_MemErrCtrlA_pb::FSSUncErrSendLaFIFO7_1
pseudo_bit_t FSSUncErrSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1188

QIB_7322_MemErrCtrlA
Definition qib_7322_regs.h:1206

QIB_7322_MemErrCtrlA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemErrCtrlA_pb)

QIB_7322_MemErrCtrlB_pb
Definition qib_7322_regs.h:1212

QIB_7322_MemErrCtrlB_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1225

QIB_7322_MemErrCtrlB_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1257

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendBufExtra
pseudo_bit_t FSSCorErrSendBufExtra[1]
Definition qib_7322_regs.h:1228

QIB_7322_MemErrCtrlB_pb::FSSCorErrPCIeCompDataBuf
pseudo_bit_t FSSCorErrPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1253

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendBufMain
pseudo_bit_t FSSCorErrSendBufMain[1]
Definition qib_7322_regs.h:1227

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvDMAHdrBuf_1
pseudo_bit_t FSSCorErrRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1221

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvDMAHdrBuf_0
pseudo_bit_t FSSCorErrRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1216

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvTIDArray
pseudo_bit_t FSSCorErrRcvTIDArray[1]
Definition qib_7322_regs.h:1223

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO1_0
pseudo_bit_t FSSCorErrSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1231

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO6_1
pseudo_bit_t FSSCorErrSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1244

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendRmFIFO_1
pseudo_bit_t FSSCorErrSendRmFIFO_1[1]
Definition qib_7322_regs.h:1247

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvDMADataBuf_0
pseudo_bit_t FSSCorErrRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1217

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO2_1
pseudo_bit_t FSSCorErrSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1240

QIB_7322_MemErrCtrlB_pb::FSSCorErrPCIePostHdrBuf
pseudo_bit_t FSSCorErrPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1250

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO5_1
pseudo_bit_t FSSCorErrSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1243

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO7_0
pseudo_bit_t FSSCorErrSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1237

QIB_7322_MemErrCtrlB_pb::FSSCorErrPCIeCompHdrBuf
pseudo_bit_t FSSCorErrPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1252

QIB_7322_MemErrCtrlB_pb::FSSCorErrMsixTable2
pseudo_bit_t FSSCorErrMsixTable2[1]
Definition qib_7322_regs.h:1256

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvBuf_1
pseudo_bit_t FSSCorErrRcvBuf_1[1]
Definition qib_7322_regs.h:1218

QIB_7322_MemErrCtrlB_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1248

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvEgrArray
pseudo_bit_t FSSCorErrRcvEgrArray[1]
Definition qib_7322_regs.h:1224

QIB_7322_MemErrCtrlB_pb::FSSCorErrPCIeRetryBuf
pseudo_bit_t FSSCorErrPCIeRetryBuf[1]
Definition qib_7322_regs.h:1249

QIB_7322_MemErrCtrlB_pb::FSSCorErrPCIePostDataBuf
pseudo_bit_t FSSCorErrPCIePostDataBuf[1]
Definition qib_7322_regs.h:1251

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO1_1
pseudo_bit_t FSSCorErrSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1239

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO3_0
pseudo_bit_t FSSCorErrSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1233

QIB_7322_MemErrCtrlB_pb::FSSCorErrMsixTable0
pseudo_bit_t FSSCorErrMsixTable0[1]
Definition qib_7322_regs.h:1254

QIB_7322_MemErrCtrlB_pb::FSSCorErrLookupiqBuf_1
pseudo_bit_t FSSCorErrLookupiqBuf_1[1]
Definition qib_7322_regs.h:1220

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvFlags_1
pseudo_bit_t FSSCorErrRcvFlags_1[1]
Definition qib_7322_regs.h:1219

QIB_7322_MemErrCtrlB_pb::FSSCorErrMsixTable1
pseudo_bit_t FSSCorErrMsixTable1[1]
Definition qib_7322_regs.h:1255

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvFlags_0
pseudo_bit_t FSSCorErrRcvFlags_0[1]
Definition qib_7322_regs.h:1214

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendRmFIFO_0
pseudo_bit_t FSSCorErrSendRmFIFO_0[1]
Definition qib_7322_regs.h:1246

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO7_1
pseudo_bit_t FSSCorErrSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1245

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO0_1
pseudo_bit_t FSSCorErrSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1238

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO4_0
pseudo_bit_t FSSCorErrSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1234

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO5_0
pseudo_bit_t FSSCorErrSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1235

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO2_0
pseudo_bit_t FSSCorErrSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1232

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendPbcArray
pseudo_bit_t FSSCorErrSendPbcArray[1]
Definition qib_7322_regs.h:1229

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendBufVL15
pseudo_bit_t FSSCorErrSendBufVL15[1]
Definition qib_7322_regs.h:1226

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvDMADataBuf_1
pseudo_bit_t FSSCorErrRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1222

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO0_0
pseudo_bit_t FSSCorErrSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1230

QIB_7322_MemErrCtrlB_pb::FSSCorErrRcvBuf_0
pseudo_bit_t FSSCorErrRcvBuf_0[1]
Definition qib_7322_regs.h:1213

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO6_0
pseudo_bit_t FSSCorErrSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1236

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO4_1
pseudo_bit_t FSSCorErrSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1242

QIB_7322_MemErrCtrlB_pb::FSSCorErrSendLaFIFO3_1
pseudo_bit_t FSSCorErrSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1241

QIB_7322_MemErrCtrlB_pb::FSSCorErrLookupiqBuf_0
pseudo_bit_t FSSCorErrLookupiqBuf_0[1]
Definition qib_7322_regs.h:1215

QIB_7322_MemErrCtrlB
Definition qib_7322_regs.h:1259

QIB_7322_MemErrCtrlB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemErrCtrlB_pb)

QIB_7322_MemMultiCorErrClear_pb
Definition qib_7322_regs.h:1689

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvDMADataBuf_0
pseudo_bit_t MulCorErrClearRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1694

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO0_0
pseudo_bit_t MulCorErrClearSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1707

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendRmFIFO_1
pseudo_bit_t MulCorErrClearSendRmFIFO_1[1]
Definition qib_7322_regs.h:1724

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO0_1
pseudo_bit_t MulCorErrClearSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1715

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearPCIePostDataBuf
pseudo_bit_t MulCorErrClearPCIePostDataBuf[1]
Definition qib_7322_regs.h:1728

QIB_7322_MemMultiCorErrClear_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1702

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvBuf_0
pseudo_bit_t MulCorErrClearRcvBuf_0[1]
Definition qib_7322_regs.h:1690

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvBuf_1
pseudo_bit_t MulCorErrClearRcvBuf_1[1]
Definition qib_7322_regs.h:1695

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendBufVL15
pseudo_bit_t MulCorErrClearSendBufVL15[1]
Definition qib_7322_regs.h:1703

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO7_0
pseudo_bit_t MulCorErrClearSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1714

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendBufExtra
pseudo_bit_t MulCorErrClearSendBufExtra[1]
Definition qib_7322_regs.h:1705

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO6_1
pseudo_bit_t MulCorErrClearSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1721

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvFlags_1
pseudo_bit_t MulCorErrClearRcvFlags_1[1]
Definition qib_7322_regs.h:1696

QIB_7322_MemMultiCorErrClear_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1734

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO3_1
pseudo_bit_t MulCorErrClearSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1718

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearPCIeCompDataBuf
pseudo_bit_t MulCorErrClearPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1730

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvDMAHdrBuf_1
pseudo_bit_t MulCorErrClearRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1698

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO4_0
pseudo_bit_t MulCorErrClearSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1711

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearPCIePostHdrBuf
pseudo_bit_t MulCorErrClearPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1727

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvFlags_0
pseudo_bit_t MulCorErrClearRcvFlags_0[1]
Definition qib_7322_regs.h:1691

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO2_1
pseudo_bit_t MulCorErrClearSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1717

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearMsixTable1
pseudo_bit_t MulCorErrClearMsixTable1[1]
Definition qib_7322_regs.h:1732

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO3_0
pseudo_bit_t MulCorErrClearSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1710

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearPCIeRetryBuf
pseudo_bit_t MulCorErrClearPCIeRetryBuf[1]
Definition qib_7322_regs.h:1726

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO5_1
pseudo_bit_t MulCorErrClearSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1720

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO4_1
pseudo_bit_t MulCorErrClearSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1719

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO1_0
pseudo_bit_t MulCorErrClearSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1708

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearPCIeCompHdrBuf
pseudo_bit_t MulCorErrClearPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1729

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendPbcArray
pseudo_bit_t MulCorErrClearSendPbcArray[1]
Definition qib_7322_regs.h:1706

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvDMAHdrBuf_0
pseudo_bit_t MulCorErrClearRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1693

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO1_1
pseudo_bit_t MulCorErrClearSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1716

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendRmFIFO_0
pseudo_bit_t MulCorErrClearSendRmFIFO_0[1]
Definition qib_7322_regs.h:1723

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendBufMain
pseudo_bit_t MulCorErrClearSendBufMain[1]
Definition qib_7322_regs.h:1704

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearMsixTable2
pseudo_bit_t MulCorErrClearMsixTable2[1]
Definition qib_7322_regs.h:1733

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvEgrArray
pseudo_bit_t MulCorErrClearRcvEgrArray[1]
Definition qib_7322_regs.h:1701

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO6_0
pseudo_bit_t MulCorErrClearSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1713

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearLookupiqBuf_0
pseudo_bit_t MulCorErrClearLookupiqBuf_0[1]
Definition qib_7322_regs.h:1692

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvTIDArray
pseudo_bit_t MulCorErrClearRcvTIDArray[1]
Definition qib_7322_regs.h:1700

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearLookupiqBuf_1
pseudo_bit_t MulCorErrClearLookupiqBuf_1[1]
Definition qib_7322_regs.h:1697

QIB_7322_MemMultiCorErrClear_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1725

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO2_0
pseudo_bit_t MulCorErrClearSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1709

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearRcvDMADataBuf_1
pseudo_bit_t MulCorErrClearRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1699

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO5_0
pseudo_bit_t MulCorErrClearSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1712

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearMsixTable0
pseudo_bit_t MulCorErrClearMsixTable0[1]
Definition qib_7322_regs.h:1731

QIB_7322_MemMultiCorErrClear_pb::MulCorErrClearSendLaFIFO7_1
pseudo_bit_t MulCorErrClearSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1722

QIB_7322_MemMultiCorErrClear
Definition qib_7322_regs.h:1736

QIB_7322_MemMultiCorErrClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiCorErrClear_pb)

QIB_7322_MemMultiCorErrMask_pb
Definition qib_7322_regs.h:1583

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendRmFIFO_1
pseudo_bit_t MulCorErrMskSendRmFIFO_1[1]
Definition qib_7322_regs.h:1618

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO3_1
pseudo_bit_t MulCorErrMskSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1612

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO1_1
pseudo_bit_t MulCorErrMskSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1610

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvDMADataBuf_1
pseudo_bit_t MulCorErrMskRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1593

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendBufMain
pseudo_bit_t MulCorErrMskSendBufMain[1]
Definition qib_7322_regs.h:1598

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvBuf_1
pseudo_bit_t MulCorErrMskRcvBuf_1[1]
Definition qib_7322_regs.h:1589

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO4_1
pseudo_bit_t MulCorErrMskSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1613

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO6_0
pseudo_bit_t MulCorErrMskSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1607

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO5_1
pseudo_bit_t MulCorErrMskSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1614

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskPCIePostDataBuf
pseudo_bit_t MulCorErrMskPCIePostDataBuf[1]
Definition qib_7322_regs.h:1622

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO1_0
pseudo_bit_t MulCorErrMskSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1602

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendPbcArray
pseudo_bit_t MulCorErrMskSendPbcArray[1]
Definition qib_7322_regs.h:1600

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskLookupiqBuf_0
pseudo_bit_t MulCorErrMskLookupiqBuf_0[1]
Definition qib_7322_regs.h:1586

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO5_0
pseudo_bit_t MulCorErrMskSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1606

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO6_1
pseudo_bit_t MulCorErrMskSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1615

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvFlags_0
pseudo_bit_t MulCorErrMskRcvFlags_0[1]
Definition qib_7322_regs.h:1585

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvDMAHdrBuf_0
pseudo_bit_t MulCorErrMskRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1587

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO7_1
pseudo_bit_t MulCorErrMskSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1616

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO3_0
pseudo_bit_t MulCorErrMskSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1604

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO2_1
pseudo_bit_t MulCorErrMskSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1611

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvBuf_0
pseudo_bit_t MulCorErrMskRcvBuf_0[1]
Definition qib_7322_regs.h:1584

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvDMADataBuf_0
pseudo_bit_t MulCorErrMskRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1588

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO0_1
pseudo_bit_t MulCorErrMskSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1609

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskPCIeRetryBuf
pseudo_bit_t MulCorErrMskPCIeRetryBuf[1]
Definition qib_7322_regs.h:1620

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvDMAHdrBuf_1
pseudo_bit_t MulCorErrMskRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1592

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO7_0
pseudo_bit_t MulCorErrMskSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1608

QIB_7322_MemMultiCorErrMask_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1628

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvEgrArray
pseudo_bit_t MulCorErrMskRcvEgrArray[1]
Definition qib_7322_regs.h:1595

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskMsixTable1
pseudo_bit_t MulCorErrMskMsixTable1[1]
Definition qib_7322_regs.h:1626

QIB_7322_MemMultiCorErrMask_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1619

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvTIDArray
pseudo_bit_t MulCorErrMskRcvTIDArray[1]
Definition qib_7322_regs.h:1594

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskPCIeCompDataBuf
pseudo_bit_t MulCorErrMskPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1624

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendBufExtra
pseudo_bit_t MulCorErrMskSendBufExtra[1]
Definition qib_7322_regs.h:1599

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskMsixTable2
pseudo_bit_t MulCorErrMskMsixTable2[1]
Definition qib_7322_regs.h:1627

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO4_0
pseudo_bit_t MulCorErrMskSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1605

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO0_0
pseudo_bit_t MulCorErrMskSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1601

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskRcvFlags_1
pseudo_bit_t MulCorErrMskRcvFlags_1[1]
Definition qib_7322_regs.h:1590

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskMsixTable0
pseudo_bit_t MulCorErrMskMsixTable0[1]
Definition qib_7322_regs.h:1625

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendLaFIFO2_0
pseudo_bit_t MulCorErrMskSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1603

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendBufVL15
pseudo_bit_t MulCorErrMskSendBufVL15[1]
Definition qib_7322_regs.h:1597

QIB_7322_MemMultiCorErrMask_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1596

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskLookupiqBuf_1
pseudo_bit_t MulCorErrMskLookupiqBuf_1[1]
Definition qib_7322_regs.h:1591

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskPCIePostHdrBuf
pseudo_bit_t MulCorErrMskPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1621

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskPCIeCompHdrBuf
pseudo_bit_t MulCorErrMskPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1623

QIB_7322_MemMultiCorErrMask_pb::MulCorErrMskSendRmFIFO_0
pseudo_bit_t MulCorErrMskSendRmFIFO_0[1]
Definition qib_7322_regs.h:1617

QIB_7322_MemMultiCorErrMask
Definition qib_7322_regs.h:1630

QIB_7322_MemMultiCorErrMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiCorErrMask_pb)

QIB_7322_MemMultiCorErrStatus_pb
Definition qib_7322_regs.h:1636

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusPCIePostHdrBuf
pseudo_bit_t MulCorErrStatusPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1674

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusPCIeRetryBuf
pseudo_bit_t MulCorErrStatusPCIeRetryBuf[1]
Definition qib_7322_regs.h:1673

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvBuf_0
pseudo_bit_t MulCorErrStatusRcvBuf_0[1]
Definition qib_7322_regs.h:1637

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO7_0
pseudo_bit_t MulCorErrStatusSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1661

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO1_0
pseudo_bit_t MulCorErrStatusSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1655

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusMsixTable1
pseudo_bit_t MulCorErrStatusMsixTable1[1]
Definition qib_7322_regs.h:1679

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusPCIeCompDataBuf
pseudo_bit_t MulCorErrStatusPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1677

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO0_0
pseudo_bit_t MulCorErrStatusSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1654

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendBufVL15
pseudo_bit_t MulCorErrStatusSendBufVL15[1]
Definition qib_7322_regs.h:1650

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO3_1
pseudo_bit_t MulCorErrStatusSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1665

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendPbcArray
pseudo_bit_t MulCorErrStatusSendPbcArray[1]
Definition qib_7322_regs.h:1653

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO0_1
pseudo_bit_t MulCorErrStatusSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1662

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO7_1
pseudo_bit_t MulCorErrStatusSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1669

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO4_0
pseudo_bit_t MulCorErrStatusSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1658

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusPCIePostDataBuf
pseudo_bit_t MulCorErrStatusPCIePostDataBuf[1]
Definition qib_7322_regs.h:1675

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendBufExtra
pseudo_bit_t MulCorErrStatusSendBufExtra[1]
Definition qib_7322_regs.h:1652

QIB_7322_MemMultiCorErrStatus_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1681

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvFlags_0
pseudo_bit_t MulCorErrStatusRcvFlags_0[1]
Definition qib_7322_regs.h:1638

QIB_7322_MemMultiCorErrStatus_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1672

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvEgrArray
pseudo_bit_t MulCorErrStatusRcvEgrArray[1]
Definition qib_7322_regs.h:1648

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvTIDArray
pseudo_bit_t MulCorErrStatusRcvTIDArray[1]
Definition qib_7322_regs.h:1647

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvDMAHdrBuf_0
pseudo_bit_t MulCorErrStatusRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1640

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO5_1
pseudo_bit_t MulCorErrStatusSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1667

QIB_7322_MemMultiCorErrStatus_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1649

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusMsixTable0
pseudo_bit_t MulCorErrStatusMsixTable0[1]
Definition qib_7322_regs.h:1678

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendRmFIFO_0
pseudo_bit_t MulCorErrStatusSendRmFIFO_0[1]
Definition qib_7322_regs.h:1670

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusMsixTable2
pseudo_bit_t MulCorErrStatusMsixTable2[1]
Definition qib_7322_regs.h:1680

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO6_0
pseudo_bit_t MulCorErrStatusSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1660

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusLookupiqBuf_0
pseudo_bit_t MulCorErrStatusLookupiqBuf_0[1]
Definition qib_7322_regs.h:1639

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO6_1
pseudo_bit_t MulCorErrStatusSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1668

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvDMADataBuf_0
pseudo_bit_t MulCorErrStatusRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1641

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO3_0
pseudo_bit_t MulCorErrStatusSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1657

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvBuf_1
pseudo_bit_t MulCorErrStatusRcvBuf_1[1]
Definition qib_7322_regs.h:1642

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO5_0
pseudo_bit_t MulCorErrStatusSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1659

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendBufMain
pseudo_bit_t MulCorErrStatusSendBufMain[1]
Definition qib_7322_regs.h:1651

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusLookupiqBuf_1
pseudo_bit_t MulCorErrStatusLookupiqBuf_1[1]
Definition qib_7322_regs.h:1644

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO2_0
pseudo_bit_t MulCorErrStatusSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1656

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvFlags_1
pseudo_bit_t MulCorErrStatusRcvFlags_1[1]
Definition qib_7322_regs.h:1643

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendRmFIFO_1
pseudo_bit_t MulCorErrStatusSendRmFIFO_1[1]
Definition qib_7322_regs.h:1671

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO1_1
pseudo_bit_t MulCorErrStatusSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1663

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusPCIeCompHdrBuf
pseudo_bit_t MulCorErrStatusPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1676

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO2_1
pseudo_bit_t MulCorErrStatusSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1664

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvDMAHdrBuf_1
pseudo_bit_t MulCorErrStatusRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1645

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusRcvDMADataBuf_1
pseudo_bit_t MulCorErrStatusRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1646

QIB_7322_MemMultiCorErrStatus_pb::MulCorErrStatusSendLaFIFO4_1
pseudo_bit_t MulCorErrStatusSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1666

QIB_7322_MemMultiCorErrStatus
Definition qib_7322_regs.h:1683

QIB_7322_MemMultiCorErrStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiCorErrStatus_pb)

QIB_7322_MemMultiUnCorErrClear_pb
Definition qib_7322_regs.h:1371

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvDMAHdrBuf_1
pseudo_bit_t MulUncErrClearRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1380

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO4_1
pseudo_bit_t MulUncErrClearSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1401

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO4_0
pseudo_bit_t MulUncErrClearSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1393

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvFlags_0
pseudo_bit_t MulUncErrClearRcvFlags_0[1]
Definition qib_7322_regs.h:1373

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO0_1
pseudo_bit_t MulUncErrClearSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1397

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvDMADataBuf_1
pseudo_bit_t MulUncErrClearRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1381

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO7_1
pseudo_bit_t MulUncErrClearSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1404

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO5_1
pseudo_bit_t MulUncErrClearSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1402

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearLookupiqBuf_1
pseudo_bit_t MulUncErrClearLookupiqBuf_1[1]
Definition qib_7322_regs.h:1379

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearPCIeRetryBuf
pseudo_bit_t MulUncErrClearPCIeRetryBuf[1]
Definition qib_7322_regs.h:1408

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO6_0
pseudo_bit_t MulUncErrClearSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1395

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearLookupiqBuf_0
pseudo_bit_t MulUncErrClearLookupiqBuf_0[1]
Definition qib_7322_regs.h:1374

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvEgrArray
pseudo_bit_t MulUncErrClearRcvEgrArray[1]
Definition qib_7322_regs.h:1383

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendBufMain
pseudo_bit_t MulUncErrClearSendBufMain[1]
Definition qib_7322_regs.h:1386

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvTIDArray
pseudo_bit_t MulUncErrClearRcvTIDArray[1]
Definition qib_7322_regs.h:1382

QIB_7322_MemMultiUnCorErrClear_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1407

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendRmFIFO_1
pseudo_bit_t MulUncErrClearSendRmFIFO_1[1]
Definition qib_7322_regs.h:1406

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearPCIeCompHdrBuf
pseudo_bit_t MulUncErrClearPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1411

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO1_1
pseudo_bit_t MulUncErrClearSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1398

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvBuf_0
pseudo_bit_t MulUncErrClearRcvBuf_0[1]
Definition qib_7322_regs.h:1372

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO2_0
pseudo_bit_t MulUncErrClearSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1391

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO3_1
pseudo_bit_t MulUncErrClearSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1400

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendPbcArray
pseudo_bit_t MulUncErrClearSendPbcArray[1]
Definition qib_7322_regs.h:1388

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvDMADataBuf_0
pseudo_bit_t MulUncErrClearRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1376

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO6_1
pseudo_bit_t MulUncErrClearSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1403

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendBufExtra
pseudo_bit_t MulUncErrClearSendBufExtra[1]
Definition qib_7322_regs.h:1387

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO7_0
pseudo_bit_t MulUncErrClearSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1396

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO5_0
pseudo_bit_t MulUncErrClearSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1394

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvBuf_1
pseudo_bit_t MulUncErrClearRcvBuf_1[1]
Definition qib_7322_regs.h:1377

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendRmFIFO_0
pseudo_bit_t MulUncErrClearSendRmFIFO_0[1]
Definition qib_7322_regs.h:1405

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO2_1
pseudo_bit_t MulUncErrClearSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1399

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO3_0
pseudo_bit_t MulUncErrClearSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1392

QIB_7322_MemMultiUnCorErrClear_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1416

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearMsixTable1
pseudo_bit_t MulUncErrClearMsixTable1[1]
Definition qib_7322_regs.h:1414

QIB_7322_MemMultiUnCorErrClear_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1384

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO0_0
pseudo_bit_t MulUncErrClearSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1389

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearPCIePostHdrBuf
pseudo_bit_t MulUncErrClearPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1409

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearPCIePostDataBuf
pseudo_bit_t MulUncErrClearPCIePostDataBuf[1]
Definition qib_7322_regs.h:1410

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendBufVL15
pseudo_bit_t MulUncErrClearSendBufVL15[1]
Definition qib_7322_regs.h:1385

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearMsixTable0
pseudo_bit_t MulUncErrClearMsixTable0[1]
Definition qib_7322_regs.h:1413

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearSendLaFIFO1_0
pseudo_bit_t MulUncErrClearSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1390

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvFlags_1
pseudo_bit_t MulUncErrClearRcvFlags_1[1]
Definition qib_7322_regs.h:1378

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearMsixTable2
pseudo_bit_t MulUncErrClearMsixTable2[1]
Definition qib_7322_regs.h:1415

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearRcvDMAHdrBuf_0
pseudo_bit_t MulUncErrClearRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1375

QIB_7322_MemMultiUnCorErrClear_pb::MulUncErrClearPCIeCompDataBuf
pseudo_bit_t MulUncErrClearPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1412

QIB_7322_MemMultiUnCorErrClear
Definition qib_7322_regs.h:1418

QIB_7322_MemMultiUnCorErrClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiUnCorErrClear_pb)

QIB_7322_MemMultiUnCorErrMask_pb
Definition qib_7322_regs.h:1265

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendRmFIFO_1
pseudo_bit_t MulUncErrMskSendRmFIFO_1[1]
Definition qib_7322_regs.h:1300

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskLookupiqBuf_0
pseudo_bit_t MulUncErrMskLookupiqBuf_0[1]
Definition qib_7322_regs.h:1268

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvBuf_1
pseudo_bit_t MulUncErrMskRcvBuf_1[1]
Definition qib_7322_regs.h:1271

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO7_0
pseudo_bit_t MulUncErrMskSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1290

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendRmFIFO_0
pseudo_bit_t MulUncErrMskSendRmFIFO_0[1]
Definition qib_7322_regs.h:1299

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO6_0
pseudo_bit_t MulUncErrMskSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1289

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskPCIeRetryBuf
pseudo_bit_t MulUncErrMskPCIeRetryBuf[1]
Definition qib_7322_regs.h:1302

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskPCIePostDataBuf
pseudo_bit_t MulUncErrMskPCIePostDataBuf[1]
Definition qib_7322_regs.h:1304

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendBufVL15
pseudo_bit_t MulUncErrMskSendBufVL15[1]
Definition qib_7322_regs.h:1279

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO3_0
pseudo_bit_t MulUncErrMskSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1286

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvDMADataBuf_0
pseudo_bit_t MulUncErrMskRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1270

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO7_1
pseudo_bit_t MulUncErrMskSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1298

QIB_7322_MemMultiUnCorErrMask_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1310

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvFlags_1
pseudo_bit_t MulUncErrMskRcvFlags_1[1]
Definition qib_7322_regs.h:1272

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendPbcArray
pseudo_bit_t MulUncErrMskSendPbcArray[1]
Definition qib_7322_regs.h:1282

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskLookupiqBuf_1
pseudo_bit_t MulUncErrMskLookupiqBuf_1[1]
Definition qib_7322_regs.h:1273

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvFlags_0
pseudo_bit_t MulUncErrMskRcvFlags_0[1]
Definition qib_7322_regs.h:1267

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskPCIeCompDataBuf
pseudo_bit_t MulUncErrMskPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1306

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskMsixTable1
pseudo_bit_t MulUncErrMskMsixTable1[1]
Definition qib_7322_regs.h:1308

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvBuf_0
pseudo_bit_t MulUncErrMskRcvBuf_0[1]
Definition qib_7322_regs.h:1266

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO4_0
pseudo_bit_t MulUncErrMskSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1287

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskPCIeCompHdrBuf
pseudo_bit_t MulUncErrMskPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1305

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO0_0
pseudo_bit_t MulUncErrMskSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1283

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO5_0
pseudo_bit_t MulUncErrMskSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1288

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO2_0
pseudo_bit_t MulUncErrMskSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1285

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO5_1
pseudo_bit_t MulUncErrMskSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1296

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendBufMain
pseudo_bit_t MulUncErrMskSendBufMain[1]
Definition qib_7322_regs.h:1280

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskMsixTable0
pseudo_bit_t MulUncErrMskMsixTable0[1]
Definition qib_7322_regs.h:1307

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO1_0
pseudo_bit_t MulUncErrMskSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1284

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO2_1
pseudo_bit_t MulUncErrMskSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1293

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO4_1
pseudo_bit_t MulUncErrMskSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1295

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvDMAHdrBuf_1
pseudo_bit_t MulUncErrMskRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1274

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvDMAHdrBuf_0
pseudo_bit_t MulUncErrMskRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1269

QIB_7322_MemMultiUnCorErrMask_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1278

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskPCIePostHdrBuf
pseudo_bit_t MulUncErrMskPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1303

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO3_1
pseudo_bit_t MulUncErrMskSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1294

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO0_1
pseudo_bit_t MulUncErrMskSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1291

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskMsixTable2
pseudo_bit_t MulUncErrMskMsixTable2[1]
Definition qib_7322_regs.h:1309

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendBufExtra
pseudo_bit_t MulUncErrMskSendBufExtra[1]
Definition qib_7322_regs.h:1281

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO1_1
pseudo_bit_t MulUncErrMskSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1292

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvTIDArray
pseudo_bit_t MulUncErrMskRcvTIDArray[1]
Definition qib_7322_regs.h:1276

QIB_7322_MemMultiUnCorErrMask_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1301

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskSendLaFIFO6_1
pseudo_bit_t MulUncErrMskSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1297

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvEgrArray
pseudo_bit_t MulUncErrMskRcvEgrArray[1]
Definition qib_7322_regs.h:1277

QIB_7322_MemMultiUnCorErrMask_pb::MulUncErrMskRcvDMADataBuf_1
pseudo_bit_t MulUncErrMskRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1275

QIB_7322_MemMultiUnCorErrMask
Definition qib_7322_regs.h:1312

QIB_7322_MemMultiUnCorErrMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiUnCorErrMask_pb)

QIB_7322_MemMultiUnCorErrStatus_pb
Definition qib_7322_regs.h:1318

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvDMADataBuf_0
pseudo_bit_t MulUncErrStatusRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1323

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvDMADataBuf_1
pseudo_bit_t MulUncErrStatusRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1328

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO5_0
pseudo_bit_t MulUncErrStatusSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1341

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendRmFIFO_0
pseudo_bit_t MulUncErrStatusSendRmFIFO_0[1]
Definition qib_7322_regs.h:1352

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO7_0
pseudo_bit_t MulUncErrStatusSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1343

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendBufMain
pseudo_bit_t MulUncErrStatusSendBufMain[1]
Definition qib_7322_regs.h:1333

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO1_0
pseudo_bit_t MulUncErrStatusSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1337

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusLookupiqBuf_1
pseudo_bit_t MulUncErrStatusLookupiqBuf_1[1]
Definition qib_7322_regs.h:1326

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO6_1
pseudo_bit_t MulUncErrStatusSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1350

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvDMAHdrBuf_0
pseudo_bit_t MulUncErrStatusRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1322

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusMsixTable1
pseudo_bit_t MulUncErrStatusMsixTable1[1]
Definition qib_7322_regs.h:1361

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO2_1
pseudo_bit_t MulUncErrStatusSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1346

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendBufVL15
pseudo_bit_t MulUncErrStatusSendBufVL15[1]
Definition qib_7322_regs.h:1332

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvDMAHdrBuf_1
pseudo_bit_t MulUncErrStatusRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1327

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvBuf_0
pseudo_bit_t MulUncErrStatusRcvBuf_0[1]
Definition qib_7322_regs.h:1319

QIB_7322_MemMultiUnCorErrStatus_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1363

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusPCIePostHdrBuf
pseudo_bit_t MulUncErrStatusPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1356

QIB_7322_MemMultiUnCorErrStatus_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1331

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvFlags_1
pseudo_bit_t MulUncErrStatusRcvFlags_1[1]
Definition qib_7322_regs.h:1325

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusPCIeCompHdrBuf
pseudo_bit_t MulUncErrStatusPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1358

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO4_1
pseudo_bit_t MulUncErrStatusSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1348

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendBufExtra
pseudo_bit_t MulUncErrStatusSendBufExtra[1]
Definition qib_7322_regs.h:1334

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvFlags_0
pseudo_bit_t MulUncErrStatusRcvFlags_0[1]
Definition qib_7322_regs.h:1320

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendPbcArray
pseudo_bit_t MulUncErrStatusSendPbcArray[1]
Definition qib_7322_regs.h:1335

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO7_1
pseudo_bit_t MulUncErrStatusSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1351

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvBuf_1
pseudo_bit_t MulUncErrStatusRcvBuf_1[1]
Definition qib_7322_regs.h:1324

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvTIDArray
pseudo_bit_t MulUncErrStatusRcvTIDArray[1]
Definition qib_7322_regs.h:1329

QIB_7322_MemMultiUnCorErrStatus_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1354

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO0_0
pseudo_bit_t MulUncErrStatusSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1336

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO4_0
pseudo_bit_t MulUncErrStatusSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1340

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusPCIePostDataBuf
pseudo_bit_t MulUncErrStatusPCIePostDataBuf[1]
Definition qib_7322_regs.h:1357

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO3_1
pseudo_bit_t MulUncErrStatusSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1347

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO2_0
pseudo_bit_t MulUncErrStatusSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1338

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendRmFIFO_1
pseudo_bit_t MulUncErrStatusSendRmFIFO_1[1]
Definition qib_7322_regs.h:1353

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO1_1
pseudo_bit_t MulUncErrStatusSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1345

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusPCIeRetryBuf
pseudo_bit_t MulUncErrStatusPCIeRetryBuf[1]
Definition qib_7322_regs.h:1355

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusPCIeCompDataBuf
pseudo_bit_t MulUncErrStatusPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1359

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO0_1
pseudo_bit_t MulUncErrStatusSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1344

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO6_0
pseudo_bit_t MulUncErrStatusSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1342

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusLookupiqBuf_0
pseudo_bit_t MulUncErrStatusLookupiqBuf_0[1]
Definition qib_7322_regs.h:1321

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusMsixTable2
pseudo_bit_t MulUncErrStatusMsixTable2[1]
Definition qib_7322_regs.h:1362

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusRcvEgrArray
pseudo_bit_t MulUncErrStatusRcvEgrArray[1]
Definition qib_7322_regs.h:1330

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusMsixTable0
pseudo_bit_t MulUncErrStatusMsixTable0[1]
Definition qib_7322_regs.h:1360

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO5_1
pseudo_bit_t MulUncErrStatusSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1349

QIB_7322_MemMultiUnCorErrStatus_pb::MulUncErrStatusSendLaFIFO3_0
pseudo_bit_t MulUncErrStatusSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1339

QIB_7322_MemMultiUnCorErrStatus
Definition qib_7322_regs.h:1365

QIB_7322_MemMultiUnCorErrStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemMultiUnCorErrStatus_pb)

QIB_7322_MemUnCorErrClear_pb
Definition qib_7322_regs.h:1530

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO7_1
pseudo_bit_t UncErrClearSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1563

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO3_1
pseudo_bit_t UncErrClearSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1559

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvTIDArray
pseudo_bit_t UncErrClearRcvTIDArray[1]
Definition qib_7322_regs.h:1541

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvDMAHdrBuf_1
pseudo_bit_t UncErrClearRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1539

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvDMADataBuf_0
pseudo_bit_t UncErrClearRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1535

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvDMAHdrBuf_0
pseudo_bit_t UncErrClearRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1534

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendRmFIFO_1
pseudo_bit_t UncErrClearSendRmFIFO_1[1]
Definition qib_7322_regs.h:1565

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO6_1
pseudo_bit_t UncErrClearSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1562

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO1_0
pseudo_bit_t UncErrClearSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1549

QIB_7322_MemUnCorErrClear_pb::UncErrClearPCIePostHdrBuf
pseudo_bit_t UncErrClearPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1568

QIB_7322_MemUnCorErrClear_pb::UncErrClearMsixTable2
pseudo_bit_t UncErrClearMsixTable2[1]
Definition qib_7322_regs.h:1574

QIB_7322_MemUnCorErrClear_pb::UncErrClearPCIePostDataBuf
pseudo_bit_t UncErrClearPCIePostDataBuf[1]
Definition qib_7322_regs.h:1569

QIB_7322_MemUnCorErrClear_pb::UncErrClearMsixTable0
pseudo_bit_t UncErrClearMsixTable0[1]
Definition qib_7322_regs.h:1572

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendBufExtra
pseudo_bit_t UncErrClearSendBufExtra[1]
Definition qib_7322_regs.h:1546

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO0_1
pseudo_bit_t UncErrClearSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1556

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvBuf_1
pseudo_bit_t UncErrClearRcvBuf_1[1]
Definition qib_7322_regs.h:1536

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvBuf_0
pseudo_bit_t UncErrClearRcvBuf_0[1]
Definition qib_7322_regs.h:1531

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO5_0
pseudo_bit_t UncErrClearSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1553

QIB_7322_MemUnCorErrClear_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1575

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendRmFIFO_0
pseudo_bit_t UncErrClearSendRmFIFO_0[1]
Definition qib_7322_regs.h:1564

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO2_0
pseudo_bit_t UncErrClearSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1550

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO7_0
pseudo_bit_t UncErrClearSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1555

QIB_7322_MemUnCorErrClear_pb::UncErrClearPCIeCompDataBuf
pseudo_bit_t UncErrClearPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1571

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO4_1
pseudo_bit_t UncErrClearSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1560

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO1_1
pseudo_bit_t UncErrClearSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1557

QIB_7322_MemUnCorErrClear_pb::UncErrClearMsixTable1
pseudo_bit_t UncErrClearMsixTable1[1]
Definition qib_7322_regs.h:1573

QIB_7322_MemUnCorErrClear_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1566

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvFlags_1
pseudo_bit_t UncErrClearRcvFlags_1[1]
Definition qib_7322_regs.h:1537

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendBufMain
pseudo_bit_t UncErrClearSendBufMain[1]
Definition qib_7322_regs.h:1545

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO3_0
pseudo_bit_t UncErrClearSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1551

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendBufVL15
pseudo_bit_t UncErrClearSendBufVL15[1]
Definition qib_7322_regs.h:1544

QIB_7322_MemUnCorErrClear_pb::UncErrClearPCIeCompHdrBuf
pseudo_bit_t UncErrClearPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1570

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO6_0
pseudo_bit_t UncErrClearSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1554

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendPbcArray
pseudo_bit_t UncErrClearSendPbcArray[1]
Definition qib_7322_regs.h:1547

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvEgrArray
pseudo_bit_t UncErrClearRcvEgrArray[1]
Definition qib_7322_regs.h:1542

QIB_7322_MemUnCorErrClear_pb::UncErrClearLookupiqBuf_0
pseudo_bit_t UncErrClearLookupiqBuf_0[1]
Definition qib_7322_regs.h:1533

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO2_1
pseudo_bit_t UncErrClearSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1558

QIB_7322_MemUnCorErrClear_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1543

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO4_0
pseudo_bit_t UncErrClearSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1552

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO0_0
pseudo_bit_t UncErrClearSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1548

QIB_7322_MemUnCorErrClear_pb::UncErrClearPCIeRetryBuf
pseudo_bit_t UncErrClearPCIeRetryBuf[1]
Definition qib_7322_regs.h:1567

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvFlags_0
pseudo_bit_t UncErrClearRcvFlags_0[1]
Definition qib_7322_regs.h:1532

QIB_7322_MemUnCorErrClear_pb::UncErrClearRcvDMADataBuf_1
pseudo_bit_t UncErrClearRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1540

QIB_7322_MemUnCorErrClear_pb::UncErrClearLookupiqBuf_1
pseudo_bit_t UncErrClearLookupiqBuf_1[1]
Definition qib_7322_regs.h:1538

QIB_7322_MemUnCorErrClear_pb::UncErrClearSendLaFIFO5_1
pseudo_bit_t UncErrClearSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1561

QIB_7322_MemUnCorErrClear
Definition qib_7322_regs.h:1577

QIB_7322_MemUnCorErrClear::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemUnCorErrClear_pb)

QIB_7322_MemUnCorErrMask_pb
Definition qib_7322_regs.h:1424

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO0_0
pseudo_bit_t UncErrMskSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1442

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvDMAHdrBuf_0
pseudo_bit_t UncErrMskRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1428

QIB_7322_MemUnCorErrMask_pb::UncErrMskMsixTable0
pseudo_bit_t UncErrMskMsixTable0[1]
Definition qib_7322_regs.h:1466

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvBuf_1
pseudo_bit_t UncErrMskRcvBuf_1[1]
Definition qib_7322_regs.h:1430

QIB_7322_MemUnCorErrMask_pb::UncErrMskPCIeCompDataBuf
pseudo_bit_t UncErrMskPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1465

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendPbcArray
pseudo_bit_t UncErrMskSendPbcArray[1]
Definition qib_7322_regs.h:1441

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvBuf_0
pseudo_bit_t UncErrMskRcvBuf_0[1]
Definition qib_7322_regs.h:1425

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO1_0
pseudo_bit_t UncErrMskSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1443

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendBufMain
pseudo_bit_t UncErrMskSendBufMain[1]
Definition qib_7322_regs.h:1439

QIB_7322_MemUnCorErrMask_pb::UncErrMskPCIeCompHdrBuf
pseudo_bit_t UncErrMskPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1464

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendRmFIFO_0
pseudo_bit_t UncErrMskSendRmFIFO_0[1]
Definition qib_7322_regs.h:1458

QIB_7322_MemUnCorErrMask_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1437

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendBufVL15
pseudo_bit_t UncErrMskSendBufVL15[1]
Definition qib_7322_regs.h:1438

QIB_7322_MemUnCorErrMask_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1460

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO5_1
pseudo_bit_t UncErrMskSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1455

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvFlags_1
pseudo_bit_t UncErrMskRcvFlags_1[1]
Definition qib_7322_regs.h:1431

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO2_0
pseudo_bit_t UncErrMskSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1444

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendBufExtra
pseudo_bit_t UncErrMskSendBufExtra[1]
Definition qib_7322_regs.h:1440

QIB_7322_MemUnCorErrMask_pb::UncErrMskPCIePostHdrBuf
pseudo_bit_t UncErrMskPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1462

QIB_7322_MemUnCorErrMask_pb::UncErrMskLookupiqBuf_1
pseudo_bit_t UncErrMskLookupiqBuf_1[1]
Definition qib_7322_regs.h:1432

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO0_1
pseudo_bit_t UncErrMskSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1450

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvFlags_0
pseudo_bit_t UncErrMskRcvFlags_0[1]
Definition qib_7322_regs.h:1426

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvDMADataBuf_1
pseudo_bit_t UncErrMskRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1434

QIB_7322_MemUnCorErrMask_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1469

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO5_0
pseudo_bit_t UncErrMskSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1447

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO6_0
pseudo_bit_t UncErrMskSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1448

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO7_1
pseudo_bit_t UncErrMskSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1457

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO4_0
pseudo_bit_t UncErrMskSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1446

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendRmFIFO_1
pseudo_bit_t UncErrMskSendRmFIFO_1[1]
Definition qib_7322_regs.h:1459

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO1_1
pseudo_bit_t UncErrMskSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1451

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvDMADataBuf_0
pseudo_bit_t UncErrMskRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1429

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO6_1
pseudo_bit_t UncErrMskSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1456

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvDMAHdrBuf_1
pseudo_bit_t UncErrMskRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1433

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO4_1
pseudo_bit_t UncErrMskSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1454

QIB_7322_MemUnCorErrMask_pb::UncErrMskMsixTable1
pseudo_bit_t UncErrMskMsixTable1[1]
Definition qib_7322_regs.h:1467

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvEgrArray
pseudo_bit_t UncErrMskRcvEgrArray[1]
Definition qib_7322_regs.h:1436

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO3_0
pseudo_bit_t UncErrMskSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1445

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO3_1
pseudo_bit_t UncErrMskSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1453

QIB_7322_MemUnCorErrMask_pb::UncErrMskLookupiqBuf_0
pseudo_bit_t UncErrMskLookupiqBuf_0[1]
Definition qib_7322_regs.h:1427

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO2_1
pseudo_bit_t UncErrMskSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1452

QIB_7322_MemUnCorErrMask_pb::UncErrMskSendLaFIFO7_0
pseudo_bit_t UncErrMskSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1449

QIB_7322_MemUnCorErrMask_pb::UncErrMskRcvTIDArray
pseudo_bit_t UncErrMskRcvTIDArray[1]
Definition qib_7322_regs.h:1435

QIB_7322_MemUnCorErrMask_pb::UncErrMskPCIePostDataBuf
pseudo_bit_t UncErrMskPCIePostDataBuf[1]
Definition qib_7322_regs.h:1463

QIB_7322_MemUnCorErrMask_pb::UncErrMskPCIeRetryBuf
pseudo_bit_t UncErrMskPCIeRetryBuf[1]
Definition qib_7322_regs.h:1461

QIB_7322_MemUnCorErrMask_pb::UncErrMskMsixTable2
pseudo_bit_t UncErrMskMsixTable2[1]
Definition qib_7322_regs.h:1468

QIB_7322_MemUnCorErrMask
Definition qib_7322_regs.h:1471

QIB_7322_MemUnCorErrMask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemUnCorErrMask_pb)

QIB_7322_MemUnCorErrStatus_pb
Definition qib_7322_regs.h:1477

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO2_0
pseudo_bit_t UncErrStatusSendLaFIFO2_0[1]
Definition qib_7322_regs.h:1497

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusLookupiqBuf_1
pseudo_bit_t UncErrStatusLookupiqBuf_1[1]
Definition qib_7322_regs.h:1485

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO0_1
pseudo_bit_t UncErrStatusSendLaFIFO0_1[1]
Definition qib_7322_regs.h:1503

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendBufExtra
pseudo_bit_t UncErrStatusSendBufExtra[1]
Definition qib_7322_regs.h:1493

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvDMAHdrBuf_1
pseudo_bit_t UncErrStatusRcvDMAHdrBuf_1[1]
Definition qib_7322_regs.h:1486

QIB_7322_MemUnCorErrStatus_pb::_unused_0
pseudo_bit_t _unused_0[3]
Definition qib_7322_regs.h:1490

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO7_0
pseudo_bit_t UncErrStatusSendLaFIFO7_0[1]
Definition qib_7322_regs.h:1502

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvBuf_1
pseudo_bit_t UncErrStatusRcvBuf_1[1]
Definition qib_7322_regs.h:1483

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusPCIeCompDataBuf
pseudo_bit_t UncErrStatusPCIeCompDataBuf[1]
Definition qib_7322_regs.h:1518

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO1_1
pseudo_bit_t UncErrStatusSendLaFIFO1_1[1]
Definition qib_7322_regs.h:1504

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusPCIeCompHdrBuf
pseudo_bit_t UncErrStatusPCIeCompHdrBuf[1]
Definition qib_7322_regs.h:1517

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO6_1
pseudo_bit_t UncErrStatusSendLaFIFO6_1[1]
Definition qib_7322_regs.h:1509

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO0_0
pseudo_bit_t UncErrStatusSendLaFIFO0_0[1]
Definition qib_7322_regs.h:1495

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvFlags_0
pseudo_bit_t UncErrStatusRcvFlags_0[1]
Definition qib_7322_regs.h:1479

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendRmFIFO_0
pseudo_bit_t UncErrStatusSendRmFIFO_0[1]
Definition qib_7322_regs.h:1511

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendBufVL15
pseudo_bit_t UncErrStatusSendBufVL15[1]
Definition qib_7322_regs.h:1491

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendRmFIFO_1
pseudo_bit_t UncErrStatusSendRmFIFO_1[1]
Definition qib_7322_regs.h:1512

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO3_1
pseudo_bit_t UncErrStatusSendLaFIFO3_1[1]
Definition qib_7322_regs.h:1506

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusMsixTable0
pseudo_bit_t UncErrStatusMsixTable0[1]
Definition qib_7322_regs.h:1519

QIB_7322_MemUnCorErrStatus_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:1513

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO5_1
pseudo_bit_t UncErrStatusSendLaFIFO5_1[1]
Definition qib_7322_regs.h:1508

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO6_0
pseudo_bit_t UncErrStatusSendLaFIFO6_0[1]
Definition qib_7322_regs.h:1501

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO2_1
pseudo_bit_t UncErrStatusSendLaFIFO2_1[1]
Definition qib_7322_regs.h:1505

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusPCIePostHdrBuf
pseudo_bit_t UncErrStatusPCIePostHdrBuf[1]
Definition qib_7322_regs.h:1515

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusMsixTable1
pseudo_bit_t UncErrStatusMsixTable1[1]
Definition qib_7322_regs.h:1520

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO4_0
pseudo_bit_t UncErrStatusSendLaFIFO4_0[1]
Definition qib_7322_regs.h:1499

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvTIDArray
pseudo_bit_t UncErrStatusRcvTIDArray[1]
Definition qib_7322_regs.h:1488

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO5_0
pseudo_bit_t UncErrStatusSendLaFIFO5_0[1]
Definition qib_7322_regs.h:1500

QIB_7322_MemUnCorErrStatus_pb::_unused_2
pseudo_bit_t _unused_2[8]
Definition qib_7322_regs.h:1522

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvDMADataBuf_1
pseudo_bit_t UncErrStatusRcvDMADataBuf_1[1]
Definition qib_7322_regs.h:1487

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO1_0
pseudo_bit_t UncErrStatusSendLaFIFO1_0[1]
Definition qib_7322_regs.h:1496

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusMsixTable2
pseudo_bit_t UncErrStatusMsixTable2[1]
Definition qib_7322_regs.h:1521

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvFlags_1
pseudo_bit_t UncErrStatusRcvFlags_1[1]
Definition qib_7322_regs.h:1484

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendBufMain
pseudo_bit_t UncErrStatusSendBufMain[1]
Definition qib_7322_regs.h:1492

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendPbcArray
pseudo_bit_t UncErrStatusSendPbcArray[1]
Definition qib_7322_regs.h:1494

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvDMAHdrBuf_0
pseudo_bit_t UncErrStatusRcvDMAHdrBuf_0[1]
Definition qib_7322_regs.h:1481

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvEgrArray
pseudo_bit_t UncErrStatusRcvEgrArray[1]
Definition qib_7322_regs.h:1489

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO3_0
pseudo_bit_t UncErrStatusSendLaFIFO3_0[1]
Definition qib_7322_regs.h:1498

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvBuf_0
pseudo_bit_t UncErrStatusRcvBuf_0[1]
Definition qib_7322_regs.h:1478

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusPCIeRetryBuf
pseudo_bit_t UncErrStatusPCIeRetryBuf[1]
Definition qib_7322_regs.h:1514

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusRcvDMADataBuf_0
pseudo_bit_t UncErrStatusRcvDMADataBuf_0[1]
Definition qib_7322_regs.h:1482

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO7_1
pseudo_bit_t UncErrStatusSendLaFIFO7_1[1]
Definition qib_7322_regs.h:1510

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusSendLaFIFO4_1
pseudo_bit_t UncErrStatusSendLaFIFO4_1[1]
Definition qib_7322_regs.h:1507

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusPCIePostDataBuf
pseudo_bit_t UncErrStatusPCIePostDataBuf[1]
Definition qib_7322_regs.h:1516

QIB_7322_MemUnCorErrStatus_pb::UncErrStatusLookupiqBuf_0
pseudo_bit_t UncErrStatusLookupiqBuf_0[1]
Definition qib_7322_regs.h:1480

QIB_7322_MemUnCorErrStatus
Definition qib_7322_regs.h:1524

QIB_7322_MemUnCorErrStatus::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MemUnCorErrStatus_pb)

QIB_7322_MsixTableCorErrLogA_pb
Definition qib_7322_regs.h:1938

QIB_7322_MsixTableCorErrLogA_pb::MsixTable_1_0_CorErrData
pseudo_bit_t MsixTable_1_0_CorErrData[64]
Definition qib_7322_regs.h:1939

QIB_7322_MsixTableCorErrLogA
Definition qib_7322_regs.h:1941

QIB_7322_MsixTableCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableCorErrLogA_pb)

QIB_7322_MsixTableCorErrLogB_pb
Definition qib_7322_regs.h:1947

QIB_7322_MsixTableCorErrLogB_pb::MsixTable_0_CorErrCheckBits
pseudo_bit_t MsixTable_0_CorErrCheckBits[7]
Definition qib_7322_regs.h:1949

QIB_7322_MsixTableCorErrLogB_pb::MsixTable_1_CorErrCheckBits
pseudo_bit_t MsixTable_1_CorErrCheckBits[7]
Definition qib_7322_regs.h:1950

QIB_7322_MsixTableCorErrLogB_pb::MsixTable_2_CorErrData
pseudo_bit_t MsixTable_2_CorErrData[32]
Definition qib_7322_regs.h:1948

QIB_7322_MsixTableCorErrLogB_pb::MsixTable_2_CorErrCheckBits
pseudo_bit_t MsixTable_2_CorErrCheckBits[7]
Definition qib_7322_regs.h:1951

QIB_7322_MsixTableCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[11]
Definition qib_7322_regs.h:1952

QIB_7322_MsixTableCorErrLogB
Definition qib_7322_regs.h:1954

QIB_7322_MsixTableCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableCorErrLogB_pb)

QIB_7322_MsixTableCorErrLogC_pb
Definition qib_7322_regs.h:1960

QIB_7322_MsixTableCorErrLogC_pb::MsixTable_2_CorErrAddr
pseudo_bit_t MsixTable_2_CorErrAddr[7]
Definition qib_7322_regs.h:1963

QIB_7322_MsixTableCorErrLogC_pb::MsixTable_1_CorErrAddr
pseudo_bit_t MsixTable_1_CorErrAddr[7]
Definition qib_7322_regs.h:1962

QIB_7322_MsixTableCorErrLogC_pb::MsixTable_0_CorErrAddr
pseudo_bit_t MsixTable_0_CorErrAddr[7]
Definition qib_7322_regs.h:1961

QIB_7322_MsixTableCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[43]
Definition qib_7322_regs.h:1964

QIB_7322_MsixTableCorErrLogC
Definition qib_7322_regs.h:1966

QIB_7322_MsixTableCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableCorErrLogC_pb)

QIB_7322_MsixTableUnCorErrLogA_pb
Definition qib_7322_regs.h:1901

QIB_7322_MsixTableUnCorErrLogA_pb::MsixTable_1_0_UnCorErrData
pseudo_bit_t MsixTable_1_0_UnCorErrData[64]
Definition qib_7322_regs.h:1902

QIB_7322_MsixTableUnCorErrLogA
Definition qib_7322_regs.h:1904

QIB_7322_MsixTableUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableUnCorErrLogA_pb)

QIB_7322_MsixTableUnCorErrLogB_pb
Definition qib_7322_regs.h:1910

QIB_7322_MsixTableUnCorErrLogB_pb::MsixTable_2_UnCorErrData
pseudo_bit_t MsixTable_2_UnCorErrData[32]
Definition qib_7322_regs.h:1911

QIB_7322_MsixTableUnCorErrLogB_pb::MsixTable_1_UnCorErrCheckBits
pseudo_bit_t MsixTable_1_UnCorErrCheckBits[7]
Definition qib_7322_regs.h:1913

QIB_7322_MsixTableUnCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[11]
Definition qib_7322_regs.h:1915

QIB_7322_MsixTableUnCorErrLogB_pb::MsixTable_0_UnCorErrCheckBits
pseudo_bit_t MsixTable_0_UnCorErrCheckBits[7]
Definition qib_7322_regs.h:1912

QIB_7322_MsixTableUnCorErrLogB_pb::MsixTable_2_UnCorErrCheckBits
pseudo_bit_t MsixTable_2_UnCorErrCheckBits[7]
Definition qib_7322_regs.h:1914

QIB_7322_MsixTableUnCorErrLogB
Definition qib_7322_regs.h:1917

QIB_7322_MsixTableUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableUnCorErrLogB_pb)

QIB_7322_MsixTableUnCorErrLogC_pb
Definition qib_7322_regs.h:1923

QIB_7322_MsixTableUnCorErrLogC_pb::MsixTable_0_UnCorErrAddr
pseudo_bit_t MsixTable_0_UnCorErrAddr[7]
Definition qib_7322_regs.h:1924

QIB_7322_MsixTableUnCorErrLogC_pb::MsixTable_1_UnCorErrAddr
pseudo_bit_t MsixTable_1_UnCorErrAddr[7]
Definition qib_7322_regs.h:1925

QIB_7322_MsixTableUnCorErrLogC_pb::MsixTable_2_UnCorErrAddr
pseudo_bit_t MsixTable_2_UnCorErrAddr[7]
Definition qib_7322_regs.h:1926

QIB_7322_MsixTableUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[43]
Definition qib_7322_regs.h:1927

QIB_7322_MsixTableUnCorErrLogC
Definition qib_7322_regs.h:1929

QIB_7322_MsixTableUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_MsixTableUnCorErrLogC_pb)

QIB_7322_PcieCplDataBufrCorErrLogA_pb
Definition qib_7322_regs.h:2245

QIB_7322_PcieCplDataBufrCorErrLogA_pb::PcieCplDataBufrCorErrData_63_0
pseudo_bit_t PcieCplDataBufrCorErrData_63_0[64]
Definition qib_7322_regs.h:2246

QIB_7322_PcieCplDataBufrCorErrLogA
Definition qib_7322_regs.h:2248

QIB_7322_PcieCplDataBufrCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrCorErrLogA_pb)

QIB_7322_PcieCplDataBufrCorErrLogB_pb
Definition qib_7322_regs.h:2254

QIB_7322_PcieCplDataBufrCorErrLogB_pb::PcieCplDataBufrCorErrData_127_64
pseudo_bit_t PcieCplDataBufrCorErrData_127_64[64]
Definition qib_7322_regs.h:2255

QIB_7322_PcieCplDataBufrCorErrLogB
Definition qib_7322_regs.h:2257

QIB_7322_PcieCplDataBufrCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrCorErrLogB_pb)

QIB_7322_PcieCplDataBufrCorErrLogC_pb
Definition qib_7322_regs.h:2263

QIB_7322_PcieCplDataBufrCorErrLogC_pb::PcieCplDataBufrCorErrAddr_13_0
pseudo_bit_t PcieCplDataBufrCorErrAddr_13_0[14]
Definition qib_7322_regs.h:2266

QIB_7322_PcieCplDataBufrCorErrLogC_pb::PcieCplDataBufrCorErrData_136_128
pseudo_bit_t PcieCplDataBufrCorErrData_136_128[9]
Definition qib_7322_regs.h:2264

QIB_7322_PcieCplDataBufrCorErrLogC_pb::PcieCplDataBufrCorErrCheckBit_21_0
pseudo_bit_t PcieCplDataBufrCorErrCheckBit_21_0[22]
Definition qib_7322_regs.h:2265

QIB_7322_PcieCplDataBufrCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[19]
Definition qib_7322_regs.h:2267

QIB_7322_PcieCplDataBufrCorErrLogC
Definition qib_7322_regs.h:2269

QIB_7322_PcieCplDataBufrCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrCorErrLogC_pb)

QIB_7322_PcieCplDataBufrUnCorErrLogA_pb
Definition qib_7322_regs.h:1972

QIB_7322_PcieCplDataBufrUnCorErrLogA_pb::PcieCplDataBufrUnCorErrData_63_0
pseudo_bit_t PcieCplDataBufrUnCorErrData_63_0[64]
Definition qib_7322_regs.h:1973

QIB_7322_PcieCplDataBufrUnCorErrLogA
Definition qib_7322_regs.h:1975

QIB_7322_PcieCplDataBufrUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrUnCorErrLogA_pb)

QIB_7322_PcieCplDataBufrUnCorErrLogB_pb
Definition qib_7322_regs.h:1981

QIB_7322_PcieCplDataBufrUnCorErrLogB_pb::PcieCplDataBufrUnCorErrData_127_64
pseudo_bit_t PcieCplDataBufrUnCorErrData_127_64[64]
Definition qib_7322_regs.h:1982

QIB_7322_PcieCplDataBufrUnCorErrLogB
Definition qib_7322_regs.h:1984

QIB_7322_PcieCplDataBufrUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrUnCorErrLogB_pb)

QIB_7322_PcieCplDataBufrUnCorErrLogC_pb
Definition qib_7322_regs.h:1990

QIB_7322_PcieCplDataBufrUnCorErrLogC_pb::PcieCplDataBufrUnCorErrData_136_128
pseudo_bit_t PcieCplDataBufrUnCorErrData_136_128[9]
Definition qib_7322_regs.h:1991

QIB_7322_PcieCplDataBufrUnCorErrLogC_pb::PcieCplDataBufrUnCorErrCheckBit_21_0
pseudo_bit_t PcieCplDataBufrUnCorErrCheckBit_21_0[22]
Definition qib_7322_regs.h:1992

QIB_7322_PcieCplDataBufrUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[19]
Definition qib_7322_regs.h:1994

QIB_7322_PcieCplDataBufrUnCorErrLogC_pb::PcieCplDataBufrUnCorErrAddr_13_0
pseudo_bit_t PcieCplDataBufrUnCorErrAddr_13_0[14]
Definition qib_7322_regs.h:1993

QIB_7322_PcieCplDataBufrUnCorErrLogC
Definition qib_7322_regs.h:1996

QIB_7322_PcieCplDataBufrUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplDataBufrUnCorErrLogC_pb)

QIB_7322_PcieCplHdrBufrCorErrLogA_pb
Definition qib_7322_regs.h:2275

QIB_7322_PcieCplHdrBufrCorErrLogA_pb::PcieCplHdrBufrCorErrHdr_63_0
pseudo_bit_t PcieCplHdrBufrCorErrHdr_63_0[64]
Definition qib_7322_regs.h:2276

QIB_7322_PcieCplHdrBufrCorErrLogA
Definition qib_7322_regs.h:2278

QIB_7322_PcieCplHdrBufrCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrCorErrLogA_pb)

QIB_7322_PcieCplHdrBufrCorErrLogB_pb
Definition qib_7322_regs.h:2284

QIB_7322_PcieCplHdrBufrCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:2286

QIB_7322_PcieCplHdrBufrCorErrLogB_pb::PcieCplHdrBufrCorErrHdr_103_64
pseudo_bit_t PcieCplHdrBufrCorErrHdr_103_64[40]
Definition qib_7322_regs.h:2285

QIB_7322_PcieCplHdrBufrCorErrLogB
Definition qib_7322_regs.h:2288

QIB_7322_PcieCplHdrBufrCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrCorErrLogB_pb)

QIB_7322_PcieCplHdrBufrCorErrLogC_pb
Definition qib_7322_regs.h:2294

QIB_7322_PcieCplHdrBufrCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[39]
Definition qib_7322_regs.h:2297

QIB_7322_PcieCplHdrBufrCorErrLogC_pb::PcieCplHdrBufrCorErrAddr_8_0
pseudo_bit_t PcieCplHdrBufrCorErrAddr_8_0[9]
Definition qib_7322_regs.h:2296

QIB_7322_PcieCplHdrBufrCorErrLogC_pb::PcieCplHdrBufrCorErrCheckBit_15_0
pseudo_bit_t PcieCplHdrBufrCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:2295

QIB_7322_PcieCplHdrBufrCorErrLogC
Definition qib_7322_regs.h:2299

QIB_7322_PcieCplHdrBufrCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrCorErrLogC_pb)

QIB_7322_PcieCplHdrBufrUnCorErrLogA_pb
Definition qib_7322_regs.h:2002

QIB_7322_PcieCplHdrBufrUnCorErrLogA_pb::PcieCplHdrBufrUnCorErrHdr_63_0
pseudo_bit_t PcieCplHdrBufrUnCorErrHdr_63_0[64]
Definition qib_7322_regs.h:2003

QIB_7322_PcieCplHdrBufrUnCorErrLogA
Definition qib_7322_regs.h:2005

QIB_7322_PcieCplHdrBufrUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrUnCorErrLogA_pb)

QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb
Definition qib_7322_regs.h:2011

QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb::PcieCplHdrBufrUnCorErrHdr_103_64
pseudo_bit_t PcieCplHdrBufrUnCorErrHdr_103_64[40]
Definition qib_7322_regs.h:2012

QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:2013

QIB_7322_PcieCplHdrBufrUnCorErrLogB
Definition qib_7322_regs.h:2015

QIB_7322_PcieCplHdrBufrUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrUnCorErrLogB_pb)

QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb
Definition qib_7322_regs.h:2021

QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb::PcieCplHdrBufrUnCorErrCheckBit_15_0
pseudo_bit_t PcieCplHdrBufrUnCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:2022

QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[39]
Definition qib_7322_regs.h:2024

QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb::PcieCplHdrBufrUnCorErrAddr_8_0
pseudo_bit_t PcieCplHdrBufrUnCorErrAddr_8_0[9]
Definition qib_7322_regs.h:2023

QIB_7322_PcieCplHdrBufrUnCorErrLogC
Definition qib_7322_regs.h:2026

QIB_7322_PcieCplHdrBufrUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieCplHdrBufrUnCorErrLogC_pb)

QIB_7322_PciePDataBufrCorErrLogA_pb
Definition qib_7322_regs.h:2305

QIB_7322_PciePDataBufrCorErrLogA_pb::PciePDataBufrCorErrData_63_0
pseudo_bit_t PciePDataBufrCorErrData_63_0[64]
Definition qib_7322_regs.h:2306

QIB_7322_PciePDataBufrCorErrLogA
Definition qib_7322_regs.h:2308

QIB_7322_PciePDataBufrCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrCorErrLogA_pb)

QIB_7322_PciePDataBufrCorErrLogB_pb
Definition qib_7322_regs.h:2314

QIB_7322_PciePDataBufrCorErrLogB_pb::PciePDataBufrCorErrData_127_64
pseudo_bit_t PciePDataBufrCorErrData_127_64[64]
Definition qib_7322_regs.h:2315

QIB_7322_PciePDataBufrCorErrLogB
Definition qib_7322_regs.h:2317

QIB_7322_PciePDataBufrCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrCorErrLogB_pb)

QIB_7322_PciePDataBufrCorErrLogC_pb
Definition qib_7322_regs.h:2323

QIB_7322_PciePDataBufrCorErrLogC_pb::PciePDataBufrCorErrAddr_13_0
pseudo_bit_t PciePDataBufrCorErrAddr_13_0[14]
Definition qib_7322_regs.h:2326

QIB_7322_PciePDataBufrCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[19]
Definition qib_7322_regs.h:2327

QIB_7322_PciePDataBufrCorErrLogC_pb::PciePDataBufrCorErrData_136_128
pseudo_bit_t PciePDataBufrCorErrData_136_128[9]
Definition qib_7322_regs.h:2324

QIB_7322_PciePDataBufrCorErrLogC_pb::PciePDataBufrCorErrCheckBit_21_0
pseudo_bit_t PciePDataBufrCorErrCheckBit_21_0[22]
Definition qib_7322_regs.h:2325

QIB_7322_PciePDataBufrCorErrLogC
Definition qib_7322_regs.h:2329

QIB_7322_PciePDataBufrCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrCorErrLogC_pb)

QIB_7322_PciePDataBufrUnCorErrLogA_pb
Definition qib_7322_regs.h:2032

QIB_7322_PciePDataBufrUnCorErrLogA_pb::PciePDataBufrUnCorErrData_63_0
pseudo_bit_t PciePDataBufrUnCorErrData_63_0[64]
Definition qib_7322_regs.h:2033

QIB_7322_PciePDataBufrUnCorErrLogA
Definition qib_7322_regs.h:2035

QIB_7322_PciePDataBufrUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrUnCorErrLogA_pb)

QIB_7322_PciePDataBufrUnCorErrLogB_pb
Definition qib_7322_regs.h:2041

QIB_7322_PciePDataBufrUnCorErrLogB_pb::PciePDataBufrUnCorErrData_127_64
pseudo_bit_t PciePDataBufrUnCorErrData_127_64[64]
Definition qib_7322_regs.h:2042

QIB_7322_PciePDataBufrUnCorErrLogB
Definition qib_7322_regs.h:2044

QIB_7322_PciePDataBufrUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrUnCorErrLogB_pb)

QIB_7322_PciePDataBufrUnCorErrLogC_pb
Definition qib_7322_regs.h:2050

QIB_7322_PciePDataBufrUnCorErrLogC_pb::PciePDataBufrUnCorErrCheckBit_21_0
pseudo_bit_t PciePDataBufrUnCorErrCheckBit_21_0[22]
Definition qib_7322_regs.h:2052

QIB_7322_PciePDataBufrUnCorErrLogC_pb::PciePDataBufrUnCorErrData_136_128
pseudo_bit_t PciePDataBufrUnCorErrData_136_128[9]
Definition qib_7322_regs.h:2051

QIB_7322_PciePDataBufrUnCorErrLogC_pb::PciePDataBufrUnCorErrAddr_13_0
pseudo_bit_t PciePDataBufrUnCorErrAddr_13_0[14]
Definition qib_7322_regs.h:2053

QIB_7322_PciePDataBufrUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[19]
Definition qib_7322_regs.h:2054

QIB_7322_PciePDataBufrUnCorErrLogC
Definition qib_7322_regs.h:2056

QIB_7322_PciePDataBufrUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePDataBufrUnCorErrLogC_pb)

QIB_7322_PciePHdrBufrCorErrLogA_pb
Definition qib_7322_regs.h:2335

QIB_7322_PciePHdrBufrCorErrLogA_pb::PciePHdrBufrCorErrData_63_0
pseudo_bit_t PciePHdrBufrCorErrData_63_0[64]
Definition qib_7322_regs.h:2336

QIB_7322_PciePHdrBufrCorErrLogA
Definition qib_7322_regs.h:2338

QIB_7322_PciePHdrBufrCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrCorErrLogA_pb)

QIB_7322_PciePHdrBufrCorErrLogB_pb
Definition qib_7322_regs.h:2344

QIB_7322_PciePHdrBufrCorErrLogB_pb::PciePHdrBufrCorErrData_107_64
pseudo_bit_t PciePHdrBufrCorErrData_107_64[44]
Definition qib_7322_regs.h:2345

QIB_7322_PciePHdrBufrCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[20]
Definition qib_7322_regs.h:2346

QIB_7322_PciePHdrBufrCorErrLogB
Definition qib_7322_regs.h:2348

QIB_7322_PciePHdrBufrCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrCorErrLogB_pb)

QIB_7322_PciePHdrBufrCorErrLogC_pb
Definition qib_7322_regs.h:2354

QIB_7322_PciePHdrBufrCorErrLogC_pb::PciePHdrBufrCorErrAddr_8_0
pseudo_bit_t PciePHdrBufrCorErrAddr_8_0[9]
Definition qib_7322_regs.h:2356

QIB_7322_PciePHdrBufrCorErrLogC_pb::PciePHdrBufrCorErrCheckBit_15_0
pseudo_bit_t PciePHdrBufrCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:2355

QIB_7322_PciePHdrBufrCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[39]
Definition qib_7322_regs.h:2357

QIB_7322_PciePHdrBufrCorErrLogC
Definition qib_7322_regs.h:2359

QIB_7322_PciePHdrBufrCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrCorErrLogC_pb)

QIB_7322_PciePHdrBufrUnCorErrLogA_pb
Definition qib_7322_regs.h:2062

QIB_7322_PciePHdrBufrUnCorErrLogA_pb::PciePHdrBufrUnCorErrData_63_0
pseudo_bit_t PciePHdrBufrUnCorErrData_63_0[64]
Definition qib_7322_regs.h:2063

QIB_7322_PciePHdrBufrUnCorErrLogA
Definition qib_7322_regs.h:2065

QIB_7322_PciePHdrBufrUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrUnCorErrLogA_pb)

QIB_7322_PciePHdrBufrUnCorErrLogB_pb
Definition qib_7322_regs.h:2071

QIB_7322_PciePHdrBufrUnCorErrLogB_pb::PciePHdrBufrUnCorErrData_107_64
pseudo_bit_t PciePHdrBufrUnCorErrData_107_64[44]
Definition qib_7322_regs.h:2072

QIB_7322_PciePHdrBufrUnCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[20]
Definition qib_7322_regs.h:2073

QIB_7322_PciePHdrBufrUnCorErrLogB
Definition qib_7322_regs.h:2075

QIB_7322_PciePHdrBufrUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrUnCorErrLogB_pb)

QIB_7322_PciePHdrBufrUnCorErrLogC_pb
Definition qib_7322_regs.h:2081

QIB_7322_PciePHdrBufrUnCorErrLogC_pb::PciePHdrBufrUnCorErrCheckBit_15_0
pseudo_bit_t PciePHdrBufrUnCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:2082

QIB_7322_PciePHdrBufrUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[39]
Definition qib_7322_regs.h:2084

QIB_7322_PciePHdrBufrUnCorErrLogC_pb::PciePHdrBufrUnCorErrAddr_8_0
pseudo_bit_t PciePHdrBufrUnCorErrAddr_8_0[9]
Definition qib_7322_regs.h:2083

QIB_7322_PciePHdrBufrUnCorErrLogC
Definition qib_7322_regs.h:2086

QIB_7322_PciePHdrBufrUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PciePHdrBufrUnCorErrLogC_pb)

QIB_7322_PcieRetryBufrCorErrLogA_pb
Definition qib_7322_regs.h:2365

QIB_7322_PcieRetryBufrCorErrLogA_pb::PcieRetryBufrCorErrData_63_0
pseudo_bit_t PcieRetryBufrCorErrData_63_0[64]
Definition qib_7322_regs.h:2366

QIB_7322_PcieRetryBufrCorErrLogA
Definition qib_7322_regs.h:2368

QIB_7322_PcieRetryBufrCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrCorErrLogA_pb)

QIB_7322_PcieRetryBufrCorErrLogB_pb
Definition qib_7322_regs.h:2374

QIB_7322_PcieRetryBufrCorErrLogB_pb::PcieRetryBufrCorErrData_127_64
pseudo_bit_t PcieRetryBufrCorErrData_127_64[64]
Definition qib_7322_regs.h:2375

QIB_7322_PcieRetryBufrCorErrLogB
Definition qib_7322_regs.h:2377

QIB_7322_PcieRetryBufrCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrCorErrLogB_pb)

QIB_7322_PcieRetryBufrCorErrLogC_pb
Definition qib_7322_regs.h:2383

QIB_7322_PcieRetryBufrCorErrLogC_pb::PcieRetryBufrCorErrData_133_128
pseudo_bit_t PcieRetryBufrCorErrData_133_128[6]
Definition qib_7322_regs.h:2384

QIB_7322_PcieRetryBufrCorErrLogC_pb::PcieRetryBufrCorErrAddr_13_0
pseudo_bit_t PcieRetryBufrCorErrAddr_13_0[14]
Definition qib_7322_regs.h:2386

QIB_7322_PcieRetryBufrCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[23]
Definition qib_7322_regs.h:2387

QIB_7322_PcieRetryBufrCorErrLogC_pb::PcieRetryBufrCorErrCheckBit_20_0
pseudo_bit_t PcieRetryBufrCorErrCheckBit_20_0[21]
Definition qib_7322_regs.h:2385

QIB_7322_PcieRetryBufrCorErrLogC
Definition qib_7322_regs.h:2389

QIB_7322_PcieRetryBufrCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrCorErrLogC_pb)

QIB_7322_PcieRetryBufrUnCorErrLogA_pb
Definition qib_7322_regs.h:2092

QIB_7322_PcieRetryBufrUnCorErrLogA_pb::PcieRetryBufrUnCorErrData_63_0
pseudo_bit_t PcieRetryBufrUnCorErrData_63_0[64]
Definition qib_7322_regs.h:2093

QIB_7322_PcieRetryBufrUnCorErrLogA
Definition qib_7322_regs.h:2095

QIB_7322_PcieRetryBufrUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrUnCorErrLogA_pb)

QIB_7322_PcieRetryBufrUnCorErrLogB_pb
Definition qib_7322_regs.h:2101

QIB_7322_PcieRetryBufrUnCorErrLogB_pb::PcieRetryBufrUnCorErrData_127_64
pseudo_bit_t PcieRetryBufrUnCorErrData_127_64[64]
Definition qib_7322_regs.h:2102

QIB_7322_PcieRetryBufrUnCorErrLogB
Definition qib_7322_regs.h:2104

QIB_7322_PcieRetryBufrUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrUnCorErrLogB_pb)

QIB_7322_PcieRetryBufrUnCorErrLogC_pb
Definition qib_7322_regs.h:2110

QIB_7322_PcieRetryBufrUnCorErrLogC_pb::PcieRetryBufrUnCorErrCheckBit_20_0
pseudo_bit_t PcieRetryBufrUnCorErrCheckBit_20_0[21]
Definition qib_7322_regs.h:2112

QIB_7322_PcieRetryBufrUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[23]
Definition qib_7322_regs.h:2114

QIB_7322_PcieRetryBufrUnCorErrLogC_pb::PcieRetryBufrUnCorErrAddr_13_0
pseudo_bit_t PcieRetryBufrUnCorErrAddr_13_0[14]
Definition qib_7322_regs.h:2113

QIB_7322_PcieRetryBufrUnCorErrLogC_pb::PcieRetryBufrUnCorErrData_133_128
pseudo_bit_t PcieRetryBufrUnCorErrData_133_128[6]
Definition qib_7322_regs.h:2111

QIB_7322_PcieRetryBufrUnCorErrLogC
Definition qib_7322_regs.h:2116

QIB_7322_PcieRetryBufrUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_PcieRetryBufrUnCorErrLogC_pb)

QIB_7322_RcvAvailTimeOut0_pb
Definition qib_7322_regs.h:2518

QIB_7322_RcvAvailTimeOut0_pb::_unused_0
pseudo_bit_t _unused_0[32]
Definition qib_7322_regs.h:2521

QIB_7322_RcvAvailTimeOut0_pb::RcvAvailTOCount
pseudo_bit_t RcvAvailTOCount[16]
Definition qib_7322_regs.h:2520

QIB_7322_RcvAvailTimeOut0_pb::RcvAvailTOReload
pseudo_bit_t RcvAvailTOReload[16]
Definition qib_7322_regs.h:2519

QIB_7322_RcvAvailTimeOut0
Definition qib_7322_regs.h:2523

QIB_7322_RcvAvailTimeOut0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvAvailTimeOut0_pb)

QIB_7322_RcvBTHQP_0_pb
Definition qib_7322_regs.h:2730

QIB_7322_RcvBTHQP_0_pb::_unused_0
pseudo_bit_t _unused_0[40]
Definition qib_7322_regs.h:2732

QIB_7322_RcvBTHQP_0_pb::RcvBTHQP
pseudo_bit_t RcvBTHQP[24]
Definition qib_7322_regs.h:2731

QIB_7322_RcvBTHQP_0
Definition qib_7322_regs.h:2734

QIB_7322_RcvBTHQP_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvBTHQP_0_pb)

QIB_7322_RcvBTHQP_1_pb
Definition qib_7322_regs.h:4063

QIB_7322_RcvBTHQP_1_pb::_unused_0
pseudo_bit_t _unused_0[40]
Definition qib_7322_regs.h:4065

QIB_7322_RcvBTHQP_1_pb::RcvBTHQP
pseudo_bit_t RcvBTHQP[24]
Definition qib_7322_regs.h:4064

QIB_7322_RcvBTHQP_1
Definition qib_7322_regs.h:4067

QIB_7322_RcvBTHQP_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvBTHQP_1_pb)

QIB_7322_RcvCtrl_0_pb
Definition qib_7322_regs.h:2713

QIB_7322_RcvCtrl_0_pb::RcvQPMapEnable
pseudo_bit_t RcvQPMapEnable[1]
Definition qib_7322_regs.h:2719

QIB_7322_RcvCtrl_0_pb::ContextEnableKernel
pseudo_bit_t ContextEnableKernel[1]
Definition qib_7322_regs.h:2714

QIB_7322_RcvCtrl_0_pb::RcvResetCredit
pseudo_bit_t RcvResetCredit[1]
Definition qib_7322_regs.h:2721

QIB_7322_RcvCtrl_0_pb::RcvPartitionKeyDisable
pseudo_bit_t RcvPartitionKeyDisable[1]
Definition qib_7322_regs.h:2720

QIB_7322_RcvCtrl_0_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:2715

QIB_7322_RcvCtrl_0_pb::_unused_2
pseudo_bit_t _unused_2[21]
Definition qib_7322_regs.h:2722

QIB_7322_RcvCtrl_0_pb::_unused_1
pseudo_bit_t _unused_1[21]
Definition qib_7322_regs.h:2717

QIB_7322_RcvCtrl_0_pb::RcvIBPortEnable
pseudo_bit_t RcvIBPortEnable[1]
Definition qib_7322_regs.h:2718

QIB_7322_RcvCtrl_0_pb::ContextEnableUser
pseudo_bit_t ContextEnableUser[16]
Definition qib_7322_regs.h:2716

QIB_7322_RcvCtrl_0
Definition qib_7322_regs.h:2724

QIB_7322_RcvCtrl_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvCtrl_0_pb)

QIB_7322_RcvCtrl_1_pb
Definition qib_7322_regs.h:4046

QIB_7322_RcvCtrl_1_pb::_unused_1
pseudo_bit_t _unused_1[21]
Definition qib_7322_regs.h:4050

QIB_7322_RcvCtrl_1_pb::RcvPartitionKeyDisable
pseudo_bit_t RcvPartitionKeyDisable[1]
Definition qib_7322_regs.h:4053

QIB_7322_RcvCtrl_1_pb::_unused_2
pseudo_bit_t _unused_2[21]
Definition qib_7322_regs.h:4055

QIB_7322_RcvCtrl_1_pb::RcvIBPortEnable
pseudo_bit_t RcvIBPortEnable[1]
Definition qib_7322_regs.h:4051

QIB_7322_RcvCtrl_1_pb::RcvQPMapEnable
pseudo_bit_t RcvQPMapEnable[1]
Definition qib_7322_regs.h:4052

QIB_7322_RcvCtrl_1_pb::ContextEnableKernel
pseudo_bit_t ContextEnableKernel[1]
Definition qib_7322_regs.h:4048

QIB_7322_RcvCtrl_1_pb::ContextEnableUser
pseudo_bit_t ContextEnableUser[16]
Definition qib_7322_regs.h:4049

QIB_7322_RcvCtrl_1_pb::RcvResetCredit
pseudo_bit_t RcvResetCredit[1]
Definition qib_7322_regs.h:4054

QIB_7322_RcvCtrl_1_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:4047

QIB_7322_RcvCtrl_1
Definition qib_7322_regs.h:4057

QIB_7322_RcvCtrl_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvCtrl_1_pb)

QIB_7322_RcvCtrl_pb
Definition qib_7322_regs.h:652

QIB_7322_RcvCtrl_pb::XrcTypeCode
pseudo_bit_t XrcTypeCode[3]
Definition qib_7322_regs.h:659

QIB_7322_RcvCtrl_pb::IntrAvail
pseudo_bit_t IntrAvail[18]
Definition qib_7322_regs.h:655

QIB_7322_RcvCtrl_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:654

QIB_7322_RcvCtrl_pb::TailUpd
pseudo_bit_t TailUpd[1]
Definition qib_7322_regs.h:660

QIB_7322_RcvCtrl_pb::ContextCfg
pseudo_bit_t ContextCfg[2]
Definition qib_7322_regs.h:657

QIB_7322_RcvCtrl_pb::TidReDirect
pseudo_bit_t TidReDirect[16]
Definition qib_7322_regs.h:661

QIB_7322_RcvCtrl_pb::_unused_1
pseudo_bit_t _unused_1[3]
Definition qib_7322_regs.h:656

QIB_7322_RcvCtrl_pb::dontDropRHQFull
pseudo_bit_t dontDropRHQFull[18]
Definition qib_7322_regs.h:653

QIB_7322_RcvCtrl_pb::TidFlowEnable
pseudo_bit_t TidFlowEnable[1]
Definition qib_7322_regs.h:658

QIB_7322_RcvCtrl
Definition qib_7322_regs.h:663

QIB_7322_RcvCtrl::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvCtrl_pb)

QIB_7322_RcvEgrArray_pb
Definition qib_7322_regs.h:5501

QIB_7322_RcvEgrArray_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:5504

QIB_7322_RcvEgrArray_pb::RT_BufSize
pseudo_bit_t RT_BufSize[3]
Definition qib_7322_regs.h:5503

QIB_7322_RcvEgrArray_pb::RT_Addr
pseudo_bit_t RT_Addr[37]
Definition qib_7322_regs.h:5502

QIB_7322_RcvEgrArray
Definition qib_7322_regs.h:5506

QIB_7322_RcvEgrArray::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvEgrArray_pb)

QIB_7322_RcvHdrAddr0_pb
Definition qib_7322_regs.h:818

QIB_7322_RcvHdrAddr0_pb::RcvHdrAddr
pseudo_bit_t RcvHdrAddr[38]
Definition qib_7322_regs.h:820

QIB_7322_RcvHdrAddr0_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:819

QIB_7322_RcvHdrAddr0_pb::_unused_1
pseudo_bit_t _unused_1[24]
Definition qib_7322_regs.h:821

QIB_7322_RcvHdrAddr0
Definition qib_7322_regs.h:823

QIB_7322_RcvHdrAddr0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrAddr0_pb)

QIB_7322_RcvHdrHead0_pb
Definition qib_7322_regs.h:6582

QIB_7322_RcvHdrHead0_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6583

QIB_7322_RcvHdrHead0_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6585

QIB_7322_RcvHdrHead0_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6584

QIB_7322_RcvHdrHead0
Definition qib_7322_regs.h:6587

QIB_7322_RcvHdrHead0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead0_pb)

QIB_7322_RcvHdrHead10_pb
Definition qib_7322_regs.h:6962

QIB_7322_RcvHdrHead10_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6963

QIB_7322_RcvHdrHead10_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6964

QIB_7322_RcvHdrHead10_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6965

QIB_7322_RcvHdrHead10
Definition qib_7322_regs.h:6967

QIB_7322_RcvHdrHead10::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead10_pb)

QIB_7322_RcvHdrHead11_pb
Definition qib_7322_regs.h:7000

QIB_7322_RcvHdrHead11_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7001

QIB_7322_RcvHdrHead11_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7003

QIB_7322_RcvHdrHead11_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7002

QIB_7322_RcvHdrHead11
Definition qib_7322_regs.h:7005

QIB_7322_RcvHdrHead11::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead11_pb)

QIB_7322_RcvHdrHead12_pb
Definition qib_7322_regs.h:7038

QIB_7322_RcvHdrHead12_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7039

QIB_7322_RcvHdrHead12_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7040

QIB_7322_RcvHdrHead12_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7041

QIB_7322_RcvHdrHead12
Definition qib_7322_regs.h:7043

QIB_7322_RcvHdrHead12::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead12_pb)

QIB_7322_RcvHdrHead13_pb
Definition qib_7322_regs.h:7076

QIB_7322_RcvHdrHead13_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7077

QIB_7322_RcvHdrHead13_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7078

QIB_7322_RcvHdrHead13_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7079

QIB_7322_RcvHdrHead13
Definition qib_7322_regs.h:7081

QIB_7322_RcvHdrHead13::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead13_pb)

QIB_7322_RcvHdrHead14_pb
Definition qib_7322_regs.h:7114

QIB_7322_RcvHdrHead14_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7116

QIB_7322_RcvHdrHead14_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7117

QIB_7322_RcvHdrHead14_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7115

QIB_7322_RcvHdrHead14
Definition qib_7322_regs.h:7119

QIB_7322_RcvHdrHead14::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead14_pb)

QIB_7322_RcvHdrHead15_pb
Definition qib_7322_regs.h:7152

QIB_7322_RcvHdrHead15_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7155

QIB_7322_RcvHdrHead15_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7153

QIB_7322_RcvHdrHead15_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7154

QIB_7322_RcvHdrHead15
Definition qib_7322_regs.h:7157

QIB_7322_RcvHdrHead15::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead15_pb)

QIB_7322_RcvHdrHead16_pb
Definition qib_7322_regs.h:7190

QIB_7322_RcvHdrHead16_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7191

QIB_7322_RcvHdrHead16_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7193

QIB_7322_RcvHdrHead16_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7192

QIB_7322_RcvHdrHead16
Definition qib_7322_regs.h:7195

QIB_7322_RcvHdrHead16::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead16_pb)

QIB_7322_RcvHdrHead17_pb
Definition qib_7322_regs.h:7228

QIB_7322_RcvHdrHead17_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:7230

QIB_7322_RcvHdrHead17_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:7231

QIB_7322_RcvHdrHead17_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:7229

QIB_7322_RcvHdrHead17
Definition qib_7322_regs.h:7233

QIB_7322_RcvHdrHead17::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead17_pb)

QIB_7322_RcvHdrHead1_pb
Definition qib_7322_regs.h:6620

QIB_7322_RcvHdrHead1_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6623

QIB_7322_RcvHdrHead1_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6621

QIB_7322_RcvHdrHead1_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6622

QIB_7322_RcvHdrHead1
Definition qib_7322_regs.h:6625

QIB_7322_RcvHdrHead1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead1_pb)

QIB_7322_RcvHdrHead2_pb
Definition qib_7322_regs.h:6658

QIB_7322_RcvHdrHead2_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6659

QIB_7322_RcvHdrHead2_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6661

QIB_7322_RcvHdrHead2_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6660

QIB_7322_RcvHdrHead2
Definition qib_7322_regs.h:6663

QIB_7322_RcvHdrHead2::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead2_pb)

QIB_7322_RcvHdrHead3_pb
Definition qib_7322_regs.h:6696

QIB_7322_RcvHdrHead3_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6699

QIB_7322_RcvHdrHead3_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6698

QIB_7322_RcvHdrHead3_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6697

QIB_7322_RcvHdrHead3
Definition qib_7322_regs.h:6701

QIB_7322_RcvHdrHead3::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead3_pb)

QIB_7322_RcvHdrHead4_pb
Definition qib_7322_regs.h:6734

QIB_7322_RcvHdrHead4_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6737

QIB_7322_RcvHdrHead4_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6735

QIB_7322_RcvHdrHead4_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6736

QIB_7322_RcvHdrHead4
Definition qib_7322_regs.h:6739

QIB_7322_RcvHdrHead4::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead4_pb)

QIB_7322_RcvHdrHead5_pb
Definition qib_7322_regs.h:6772

QIB_7322_RcvHdrHead5_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6773

QIB_7322_RcvHdrHead5_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6774

QIB_7322_RcvHdrHead5_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6775

QIB_7322_RcvHdrHead5
Definition qib_7322_regs.h:6777

QIB_7322_RcvHdrHead5::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead5_pb)

QIB_7322_RcvHdrHead6_pb
Definition qib_7322_regs.h:6810

QIB_7322_RcvHdrHead6_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6811

QIB_7322_RcvHdrHead6_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6812

QIB_7322_RcvHdrHead6_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6813

QIB_7322_RcvHdrHead6
Definition qib_7322_regs.h:6815

QIB_7322_RcvHdrHead6::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead6_pb)

QIB_7322_RcvHdrHead7_pb
Definition qib_7322_regs.h:6848

QIB_7322_RcvHdrHead7_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6850

QIB_7322_RcvHdrHead7_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6851

QIB_7322_RcvHdrHead7_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6849

QIB_7322_RcvHdrHead7
Definition qib_7322_regs.h:6853

QIB_7322_RcvHdrHead7::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead7_pb)

QIB_7322_RcvHdrHead8_pb
Definition qib_7322_regs.h:6886

QIB_7322_RcvHdrHead8_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6889

QIB_7322_RcvHdrHead8_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6887

QIB_7322_RcvHdrHead8_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6888

QIB_7322_RcvHdrHead8
Definition qib_7322_regs.h:6891

QIB_7322_RcvHdrHead8::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead8_pb)

QIB_7322_RcvHdrHead9_pb
Definition qib_7322_regs.h:6924

QIB_7322_RcvHdrHead9_pb::counter
pseudo_bit_t counter[16]
Definition qib_7322_regs.h:6926

QIB_7322_RcvHdrHead9_pb::RcvHeadPointer
pseudo_bit_t RcvHeadPointer[32]
Definition qib_7322_regs.h:6925

QIB_7322_RcvHdrHead9_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:6927

QIB_7322_RcvHdrHead9
Definition qib_7322_regs.h:6929

QIB_7322_RcvHdrHead9::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrHead9_pb)

QIB_7322_RcvHdrTailAddr0_pb
Definition qib_7322_regs.h:829

QIB_7322_RcvHdrTailAddr0_pb::_unused_1
pseudo_bit_t _unused_1[24]
Definition qib_7322_regs.h:832

QIB_7322_RcvHdrTailAddr0_pb::_unused_0
pseudo_bit_t _unused_0[2]
Definition qib_7322_regs.h:830

QIB_7322_RcvHdrTailAddr0_pb::RcvHdrTailAddr
pseudo_bit_t RcvHdrTailAddr[38]
Definition qib_7322_regs.h:831

QIB_7322_RcvHdrTailAddr0
Definition qib_7322_regs.h:834

QIB_7322_RcvHdrTailAddr0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvHdrTailAddr0_pb)

QIB_7322_RcvPktLEDCnt_0_pb
Definition qib_7322_regs.h:2859

QIB_7322_RcvPktLEDCnt_0_pb::ONperiod
pseudo_bit_t ONperiod[32]
Definition qib_7322_regs.h:2861

QIB_7322_RcvPktLEDCnt_0_pb::OFFperiod
pseudo_bit_t OFFperiod[32]
Definition qib_7322_regs.h:2860

QIB_7322_RcvPktLEDCnt_0
Definition qib_7322_regs.h:2863

QIB_7322_RcvPktLEDCnt_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvPktLEDCnt_0_pb)

QIB_7322_RcvPktLEDCnt_1_pb
Definition qib_7322_regs.h:4192

QIB_7322_RcvPktLEDCnt_1_pb::ONperiod
pseudo_bit_t ONperiod[32]
Definition qib_7322_regs.h:4194

QIB_7322_RcvPktLEDCnt_1_pb::OFFperiod
pseudo_bit_t OFFperiod[32]
Definition qib_7322_regs.h:4193

QIB_7322_RcvPktLEDCnt_1
Definition qib_7322_regs.h:4196

QIB_7322_RcvPktLEDCnt_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvPktLEDCnt_1_pb)

QIB_7322_RcvQPMapTableA_0_pb
Definition qib_7322_regs.h:2740

QIB_7322_RcvQPMapTableA_0_pb::RcvQPMapContext2
pseudo_bit_t RcvQPMapContext2[5]
Definition qib_7322_regs.h:2743

QIB_7322_RcvQPMapTableA_0_pb::RcvQPMapContext3
pseudo_bit_t RcvQPMapContext3[5]
Definition qib_7322_regs.h:2744

QIB_7322_RcvQPMapTableA_0_pb::RcvQPMapContext4
pseudo_bit_t RcvQPMapContext4[5]
Definition qib_7322_regs.h:2745

QIB_7322_RcvQPMapTableA_0_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:2747

QIB_7322_RcvQPMapTableA_0_pb::RcvQPMapContext5
pseudo_bit_t RcvQPMapContext5[5]
Definition qib_7322_regs.h:2746

QIB_7322_RcvQPMapTableA_0_pb::RcvQPMapContext1
pseudo_bit_t RcvQPMapContext1[5]
Definition qib_7322_regs.h:2742

QIB_7322_RcvQPMapTableA_0_pb::RcvQPMapContext0
pseudo_bit_t RcvQPMapContext0[5]
Definition qib_7322_regs.h:2741

QIB_7322_RcvQPMapTableA_0
Definition qib_7322_regs.h:2749

QIB_7322_RcvQPMapTableA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableA_0_pb)

QIB_7322_RcvQPMapTableA_1_pb
Definition qib_7322_regs.h:4073

QIB_7322_RcvQPMapTableA_1_pb::RcvQPMapContext2
pseudo_bit_t RcvQPMapContext2[5]
Definition qib_7322_regs.h:4076

QIB_7322_RcvQPMapTableA_1_pb::RcvQPMapContext1
pseudo_bit_t RcvQPMapContext1[5]
Definition qib_7322_regs.h:4075

QIB_7322_RcvQPMapTableA_1_pb::RcvQPMapContext0
pseudo_bit_t RcvQPMapContext0[5]
Definition qib_7322_regs.h:4074

QIB_7322_RcvQPMapTableA_1_pb::RcvQPMapContext4
pseudo_bit_t RcvQPMapContext4[5]
Definition qib_7322_regs.h:4078

QIB_7322_RcvQPMapTableA_1_pb::RcvQPMapContext5
pseudo_bit_t RcvQPMapContext5[5]
Definition qib_7322_regs.h:4079

QIB_7322_RcvQPMapTableA_1_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:4080

QIB_7322_RcvQPMapTableA_1_pb::RcvQPMapContext3
pseudo_bit_t RcvQPMapContext3[5]
Definition qib_7322_regs.h:4077

QIB_7322_RcvQPMapTableA_1
Definition qib_7322_regs.h:4082

QIB_7322_RcvQPMapTableA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableA_1_pb)

QIB_7322_RcvQPMapTableB_0_pb
Definition qib_7322_regs.h:2755

QIB_7322_RcvQPMapTableB_0_pb::RcvQPMapContext7
pseudo_bit_t RcvQPMapContext7[5]
Definition qib_7322_regs.h:2757

QIB_7322_RcvQPMapTableB_0_pb::RcvQPMapContext8
pseudo_bit_t RcvQPMapContext8[5]
Definition qib_7322_regs.h:2758

QIB_7322_RcvQPMapTableB_0_pb::RcvQPMapContext11
pseudo_bit_t RcvQPMapContext11[5]
Definition qib_7322_regs.h:2761

QIB_7322_RcvQPMapTableB_0_pb::RcvQPMapContext6
pseudo_bit_t RcvQPMapContext6[5]
Definition qib_7322_regs.h:2756

QIB_7322_RcvQPMapTableB_0_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:2762

QIB_7322_RcvQPMapTableB_0_pb::RcvQPMapContext9
pseudo_bit_t RcvQPMapContext9[5]
Definition qib_7322_regs.h:2759

QIB_7322_RcvQPMapTableB_0_pb::RcvQPMapContext10
pseudo_bit_t RcvQPMapContext10[5]
Definition qib_7322_regs.h:2760

QIB_7322_RcvQPMapTableB_0
Definition qib_7322_regs.h:2764

QIB_7322_RcvQPMapTableB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableB_0_pb)

QIB_7322_RcvQPMapTableB_1_pb
Definition qib_7322_regs.h:4088

QIB_7322_RcvQPMapTableB_1_pb::RcvQPMapContext6
pseudo_bit_t RcvQPMapContext6[5]
Definition qib_7322_regs.h:4089

QIB_7322_RcvQPMapTableB_1_pb::RcvQPMapContext10
pseudo_bit_t RcvQPMapContext10[5]
Definition qib_7322_regs.h:4093

QIB_7322_RcvQPMapTableB_1_pb::RcvQPMapContext7
pseudo_bit_t RcvQPMapContext7[5]
Definition qib_7322_regs.h:4090

QIB_7322_RcvQPMapTableB_1_pb::RcvQPMapContext8
pseudo_bit_t RcvQPMapContext8[5]
Definition qib_7322_regs.h:4091

QIB_7322_RcvQPMapTableB_1_pb::RcvQPMapContext9
pseudo_bit_t RcvQPMapContext9[5]
Definition qib_7322_regs.h:4092

QIB_7322_RcvQPMapTableB_1_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:4095

QIB_7322_RcvQPMapTableB_1_pb::RcvQPMapContext11
pseudo_bit_t RcvQPMapContext11[5]
Definition qib_7322_regs.h:4094

QIB_7322_RcvQPMapTableB_1
Definition qib_7322_regs.h:4097

QIB_7322_RcvQPMapTableB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableB_1_pb)

QIB_7322_RcvQPMapTableC_0_pb
Definition qib_7322_regs.h:2770

QIB_7322_RcvQPMapTableC_0_pb::RcvQPMapContext13
pseudo_bit_t RcvQPMapContext13[5]
Definition qib_7322_regs.h:2772

QIB_7322_RcvQPMapTableC_0_pb::RcvQPMapContext12
pseudo_bit_t RcvQPMapContext12[5]
Definition qib_7322_regs.h:2771

QIB_7322_RcvQPMapTableC_0_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:2777

QIB_7322_RcvQPMapTableC_0_pb::RcvQPMapContext14
pseudo_bit_t RcvQPMapContext14[5]
Definition qib_7322_regs.h:2773

QIB_7322_RcvQPMapTableC_0_pb::RcvQPMapContext16
pseudo_bit_t RcvQPMapContext16[5]
Definition qib_7322_regs.h:2775

QIB_7322_RcvQPMapTableC_0_pb::RcvQPMapContext17
pseudo_bit_t RcvQPMapContext17[5]
Definition qib_7322_regs.h:2776

QIB_7322_RcvQPMapTableC_0_pb::RcvQPMapContext15
pseudo_bit_t RcvQPMapContext15[5]
Definition qib_7322_regs.h:2774

QIB_7322_RcvQPMapTableC_0
Definition qib_7322_regs.h:2779

QIB_7322_RcvQPMapTableC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableC_0_pb)

QIB_7322_RcvQPMapTableC_1_pb
Definition qib_7322_regs.h:4103

QIB_7322_RcvQPMapTableC_1_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:4110

QIB_7322_RcvQPMapTableC_1_pb::RcvQPMapContext15
pseudo_bit_t RcvQPMapContext15[5]
Definition qib_7322_regs.h:4107

QIB_7322_RcvQPMapTableC_1_pb::RcvQPMapContext13
pseudo_bit_t RcvQPMapContext13[5]
Definition qib_7322_regs.h:4105

QIB_7322_RcvQPMapTableC_1_pb::RcvQPMapContext17
pseudo_bit_t RcvQPMapContext17[5]
Definition qib_7322_regs.h:4109

QIB_7322_RcvQPMapTableC_1_pb::RcvQPMapContext14
pseudo_bit_t RcvQPMapContext14[5]
Definition qib_7322_regs.h:4106

QIB_7322_RcvQPMapTableC_1_pb::RcvQPMapContext12
pseudo_bit_t RcvQPMapContext12[5]
Definition qib_7322_regs.h:4104

QIB_7322_RcvQPMapTableC_1_pb::RcvQPMapContext16
pseudo_bit_t RcvQPMapContext16[5]
Definition qib_7322_regs.h:4108

QIB_7322_RcvQPMapTableC_1
Definition qib_7322_regs.h:4112

QIB_7322_RcvQPMapTableC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableC_1_pb)

QIB_7322_RcvQPMapTableD_0_pb
Definition qib_7322_regs.h:2785

QIB_7322_RcvQPMapTableD_0_pb::RcvQPMapContext22
pseudo_bit_t RcvQPMapContext22[5]
Definition qib_7322_regs.h:2790

QIB_7322_RcvQPMapTableD_0_pb::RcvQPMapContext18
pseudo_bit_t RcvQPMapContext18[5]
Definition qib_7322_regs.h:2786

QIB_7322_RcvQPMapTableD_0_pb::RcvQPMapContext20
pseudo_bit_t RcvQPMapContext20[5]
Definition qib_7322_regs.h:2788

QIB_7322_RcvQPMapTableD_0_pb::RcvQPMapContext19
pseudo_bit_t RcvQPMapContext19[5]
Definition qib_7322_regs.h:2787

QIB_7322_RcvQPMapTableD_0_pb::RcvQPMapContext23
pseudo_bit_t RcvQPMapContext23[5]
Definition qib_7322_regs.h:2791

QIB_7322_RcvQPMapTableD_0_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:2792

QIB_7322_RcvQPMapTableD_0_pb::RcvQPMapContext21
pseudo_bit_t RcvQPMapContext21[5]
Definition qib_7322_regs.h:2789

QIB_7322_RcvQPMapTableD_0
Definition qib_7322_regs.h:2794

QIB_7322_RcvQPMapTableD_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableD_0_pb)

QIB_7322_RcvQPMapTableD_1_pb
Definition qib_7322_regs.h:4118

QIB_7322_RcvQPMapTableD_1_pb::RcvQPMapContext18
pseudo_bit_t RcvQPMapContext18[5]
Definition qib_7322_regs.h:4119

QIB_7322_RcvQPMapTableD_1_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:4125

QIB_7322_RcvQPMapTableD_1_pb::RcvQPMapContext20
pseudo_bit_t RcvQPMapContext20[5]
Definition qib_7322_regs.h:4121

QIB_7322_RcvQPMapTableD_1_pb::RcvQPMapContext21
pseudo_bit_t RcvQPMapContext21[5]
Definition qib_7322_regs.h:4122

QIB_7322_RcvQPMapTableD_1_pb::RcvQPMapContext22
pseudo_bit_t RcvQPMapContext22[5]
Definition qib_7322_regs.h:4123

QIB_7322_RcvQPMapTableD_1_pb::RcvQPMapContext19
pseudo_bit_t RcvQPMapContext19[5]
Definition qib_7322_regs.h:4120

QIB_7322_RcvQPMapTableD_1_pb::RcvQPMapContext23
pseudo_bit_t RcvQPMapContext23[5]
Definition qib_7322_regs.h:4124

QIB_7322_RcvQPMapTableD_1
Definition qib_7322_regs.h:4127

QIB_7322_RcvQPMapTableD_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableD_1_pb)

QIB_7322_RcvQPMapTableE_0_pb
Definition qib_7322_regs.h:2800

QIB_7322_RcvQPMapTableE_0_pb::RcvQPMapContext27
pseudo_bit_t RcvQPMapContext27[5]
Definition qib_7322_regs.h:2804

QIB_7322_RcvQPMapTableE_0_pb::RcvQPMapContext25
pseudo_bit_t RcvQPMapContext25[5]
Definition qib_7322_regs.h:2802

QIB_7322_RcvQPMapTableE_0_pb::RcvQPMapContext24
pseudo_bit_t RcvQPMapContext24[5]
Definition qib_7322_regs.h:2801

QIB_7322_RcvQPMapTableE_0_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:2807

QIB_7322_RcvQPMapTableE_0_pb::RcvQPMapContext28
pseudo_bit_t RcvQPMapContext28[5]
Definition qib_7322_regs.h:2805

QIB_7322_RcvQPMapTableE_0_pb::RcvQPMapContext26
pseudo_bit_t RcvQPMapContext26[5]
Definition qib_7322_regs.h:2803

QIB_7322_RcvQPMapTableE_0_pb::RcvQPMapContext29
pseudo_bit_t RcvQPMapContext29[5]
Definition qib_7322_regs.h:2806

QIB_7322_RcvQPMapTableE_0
Definition qib_7322_regs.h:2809

QIB_7322_RcvQPMapTableE_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableE_0_pb)

QIB_7322_RcvQPMapTableE_1_pb
Definition qib_7322_regs.h:4133

QIB_7322_RcvQPMapTableE_1_pb::RcvQPMapContext29
pseudo_bit_t RcvQPMapContext29[5]
Definition qib_7322_regs.h:4139

QIB_7322_RcvQPMapTableE_1_pb::RcvQPMapContext28
pseudo_bit_t RcvQPMapContext28[5]
Definition qib_7322_regs.h:4138

QIB_7322_RcvQPMapTableE_1_pb::_unused_0
pseudo_bit_t _unused_0[34]
Definition qib_7322_regs.h:4140

QIB_7322_RcvQPMapTableE_1_pb::RcvQPMapContext26
pseudo_bit_t RcvQPMapContext26[5]
Definition qib_7322_regs.h:4136

QIB_7322_RcvQPMapTableE_1_pb::RcvQPMapContext25
pseudo_bit_t RcvQPMapContext25[5]
Definition qib_7322_regs.h:4135

QIB_7322_RcvQPMapTableE_1_pb::RcvQPMapContext27
pseudo_bit_t RcvQPMapContext27[5]
Definition qib_7322_regs.h:4137

QIB_7322_RcvQPMapTableE_1_pb::RcvQPMapContext24
pseudo_bit_t RcvQPMapContext24[5]
Definition qib_7322_regs.h:4134

QIB_7322_RcvQPMapTableE_1
Definition qib_7322_regs.h:4142

QIB_7322_RcvQPMapTableE_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableE_1_pb)

QIB_7322_RcvQPMapTableF_0_pb
Definition qib_7322_regs.h:2815

QIB_7322_RcvQPMapTableF_0_pb::RcvQPMapContext31
pseudo_bit_t RcvQPMapContext31[5]
Definition qib_7322_regs.h:2817

QIB_7322_RcvQPMapTableF_0_pb::RcvQPMapContext30
pseudo_bit_t RcvQPMapContext30[5]
Definition qib_7322_regs.h:2816

QIB_7322_RcvQPMapTableF_0_pb::_unused_0
pseudo_bit_t _unused_0[54]
Definition qib_7322_regs.h:2818

QIB_7322_RcvQPMapTableF_0
Definition qib_7322_regs.h:2820

QIB_7322_RcvQPMapTableF_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableF_0_pb)

QIB_7322_RcvQPMapTableF_1_pb
Definition qib_7322_regs.h:4148

QIB_7322_RcvQPMapTableF_1_pb::_unused_0
pseudo_bit_t _unused_0[54]
Definition qib_7322_regs.h:4151

QIB_7322_RcvQPMapTableF_1_pb::RcvQPMapContext30
pseudo_bit_t RcvQPMapContext30[5]
Definition qib_7322_regs.h:4149

QIB_7322_RcvQPMapTableF_1_pb::RcvQPMapContext31
pseudo_bit_t RcvQPMapContext31[5]
Definition qib_7322_regs.h:4150

QIB_7322_RcvQPMapTableF_1
Definition qib_7322_regs.h:4153

QIB_7322_RcvQPMapTableF_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMapTableF_1_pb)

QIB_7322_RcvQPMulticastContext_0_pb
Definition qib_7322_regs.h:2849

QIB_7322_RcvQPMulticastContext_0_pb::RcvQpMcContext
pseudo_bit_t RcvQpMcContext[5]
Definition qib_7322_regs.h:2850

QIB_7322_RcvQPMulticastContext_0_pb::_unused_0
pseudo_bit_t _unused_0[59]
Definition qib_7322_regs.h:2851

QIB_7322_RcvQPMulticastContext_0
Definition qib_7322_regs.h:2853

QIB_7322_RcvQPMulticastContext_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMulticastContext_0_pb)

QIB_7322_RcvQPMulticastContext_1_pb
Definition qib_7322_regs.h:4182

QIB_7322_RcvQPMulticastContext_1_pb::RcvQpMcContext
pseudo_bit_t RcvQpMcContext[5]
Definition qib_7322_regs.h:4183

QIB_7322_RcvQPMulticastContext_1_pb::_unused_0
pseudo_bit_t _unused_0[59]
Definition qib_7322_regs.h:4184

QIB_7322_RcvQPMulticastContext_1
Definition qib_7322_regs.h:4186

QIB_7322_RcvQPMulticastContext_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvQPMulticastContext_1_pb)

QIB_7322_RcvStatus_0_pb
Definition qib_7322_regs.h:2835

QIB_7322_RcvStatus_0_pb::DmaeqBlockingContext
pseudo_bit_t DmaeqBlockingContext[5]
Definition qib_7322_regs.h:2837

QIB_7322_RcvStatus_0_pb::_unused_0
pseudo_bit_t _unused_0[58]
Definition qib_7322_regs.h:2838

QIB_7322_RcvStatus_0_pb::RxPktInProgress
pseudo_bit_t RxPktInProgress[1]
Definition qib_7322_regs.h:2836

QIB_7322_RcvStatus_0
Definition qib_7322_regs.h:2840

QIB_7322_RcvStatus_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvStatus_0_pb)

QIB_7322_RcvStatus_1_pb
Definition qib_7322_regs.h:4168

QIB_7322_RcvStatus_1_pb::DmaeqBlockingContext
pseudo_bit_t DmaeqBlockingContext[5]
Definition qib_7322_regs.h:4170

QIB_7322_RcvStatus_1_pb::_unused_0
pseudo_bit_t _unused_0[58]
Definition qib_7322_regs.h:4171

QIB_7322_RcvStatus_1_pb::RxPktInProgress
pseudo_bit_t RxPktInProgress[1]
Definition qib_7322_regs.h:4169

QIB_7322_RcvStatus_1
Definition qib_7322_regs.h:4173

QIB_7322_RcvStatus_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvStatus_1_pb)

QIB_7322_RcvTIDArray0_pb
Definition qib_7322_regs.h:5512

QIB_7322_RcvTIDArray0_pb::RT_BufSize
pseudo_bit_t RT_BufSize[3]
Definition qib_7322_regs.h:5514

QIB_7322_RcvTIDArray0_pb::_unused_0
pseudo_bit_t _unused_0[24]
Definition qib_7322_regs.h:5515

QIB_7322_RcvTIDArray0_pb::RT_Addr
pseudo_bit_t RT_Addr[37]
Definition qib_7322_regs.h:5513

QIB_7322_RcvTIDArray0
Definition qib_7322_regs.h:5517

QIB_7322_RcvTIDArray0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDArray0_pb)

QIB_7322_RcvTIDFlowTable0_pb
Definition qib_7322_regs.h:6599

QIB_7322_RcvTIDFlowTable0_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6607

QIB_7322_RcvTIDFlowTable0_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6604

QIB_7322_RcvTIDFlowTable0_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6606

QIB_7322_RcvTIDFlowTable0_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6602

QIB_7322_RcvTIDFlowTable0_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6609

QIB_7322_RcvTIDFlowTable0_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6603

QIB_7322_RcvTIDFlowTable0_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6605

QIB_7322_RcvTIDFlowTable0_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6600

QIB_7322_RcvTIDFlowTable0_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6608

QIB_7322_RcvTIDFlowTable0_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6601

QIB_7322_RcvTIDFlowTable0
Definition qib_7322_regs.h:6611

QIB_7322_RcvTIDFlowTable0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable0_pb)

QIB_7322_RcvTIDFlowTable10_pb
Definition qib_7322_regs.h:6979

QIB_7322_RcvTIDFlowTable10_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6980

QIB_7322_RcvTIDFlowTable10_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6984

QIB_7322_RcvTIDFlowTable10_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6986

QIB_7322_RcvTIDFlowTable10_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6988

QIB_7322_RcvTIDFlowTable10_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6987

QIB_7322_RcvTIDFlowTable10_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6981

QIB_7322_RcvTIDFlowTable10_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6985

QIB_7322_RcvTIDFlowTable10_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6989

QIB_7322_RcvTIDFlowTable10_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6983

QIB_7322_RcvTIDFlowTable10_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6982

QIB_7322_RcvTIDFlowTable10
Definition qib_7322_regs.h:6991

QIB_7322_RcvTIDFlowTable10::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable10_pb)

QIB_7322_RcvTIDFlowTable11_pb
Definition qib_7322_regs.h:7017

QIB_7322_RcvTIDFlowTable11_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7026

QIB_7322_RcvTIDFlowTable11_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7022

QIB_7322_RcvTIDFlowTable11_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7020

QIB_7322_RcvTIDFlowTable11_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7021

QIB_7322_RcvTIDFlowTable11_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7019

QIB_7322_RcvTIDFlowTable11_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7018

QIB_7322_RcvTIDFlowTable11_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7025

QIB_7322_RcvTIDFlowTable11_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7024

QIB_7322_RcvTIDFlowTable11_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7027

QIB_7322_RcvTIDFlowTable11_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7023

QIB_7322_RcvTIDFlowTable11
Definition qib_7322_regs.h:7029

QIB_7322_RcvTIDFlowTable11::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable11_pb)

QIB_7322_RcvTIDFlowTable12_pb
Definition qib_7322_regs.h:7055

QIB_7322_RcvTIDFlowTable12_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7061

QIB_7322_RcvTIDFlowTable12_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7064

QIB_7322_RcvTIDFlowTable12_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7058

QIB_7322_RcvTIDFlowTable12_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7062

QIB_7322_RcvTIDFlowTable12_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7060

QIB_7322_RcvTIDFlowTable12_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7059

QIB_7322_RcvTIDFlowTable12_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7063

QIB_7322_RcvTIDFlowTable12_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7056

QIB_7322_RcvTIDFlowTable12_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7057

QIB_7322_RcvTIDFlowTable12_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7065

QIB_7322_RcvTIDFlowTable12
Definition qib_7322_regs.h:7067

QIB_7322_RcvTIDFlowTable12::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable12_pb)

QIB_7322_RcvTIDFlowTable13_pb
Definition qib_7322_regs.h:7093

QIB_7322_RcvTIDFlowTable13_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7096

QIB_7322_RcvTIDFlowTable13_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7097

QIB_7322_RcvTIDFlowTable13_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7102

QIB_7322_RcvTIDFlowTable13_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7100

QIB_7322_RcvTIDFlowTable13_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7095

QIB_7322_RcvTIDFlowTable13_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7103

QIB_7322_RcvTIDFlowTable13_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7098

QIB_7322_RcvTIDFlowTable13_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7094

QIB_7322_RcvTIDFlowTable13_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7101

QIB_7322_RcvTIDFlowTable13_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7099

QIB_7322_RcvTIDFlowTable13
Definition qib_7322_regs.h:7105

QIB_7322_RcvTIDFlowTable13::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable13_pb)

QIB_7322_RcvTIDFlowTable14_pb
Definition qib_7322_regs.h:7131

QIB_7322_RcvTIDFlowTable14_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7138

QIB_7322_RcvTIDFlowTable14_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7134

QIB_7322_RcvTIDFlowTable14_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7132

QIB_7322_RcvTIDFlowTable14_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7133

QIB_7322_RcvTIDFlowTable14_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7135

QIB_7322_RcvTIDFlowTable14_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7137

QIB_7322_RcvTIDFlowTable14_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7136

QIB_7322_RcvTIDFlowTable14_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7139

QIB_7322_RcvTIDFlowTable14_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7141

QIB_7322_RcvTIDFlowTable14_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7140

QIB_7322_RcvTIDFlowTable14
Definition qib_7322_regs.h:7143

QIB_7322_RcvTIDFlowTable14::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable14_pb)

QIB_7322_RcvTIDFlowTable15_pb
Definition qib_7322_regs.h:7169

QIB_7322_RcvTIDFlowTable15_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7177

QIB_7322_RcvTIDFlowTable15_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7171

QIB_7322_RcvTIDFlowTable15_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7178

QIB_7322_RcvTIDFlowTable15_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7176

QIB_7322_RcvTIDFlowTable15_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7172

QIB_7322_RcvTIDFlowTable15_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7174

QIB_7322_RcvTIDFlowTable15_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7173

QIB_7322_RcvTIDFlowTable15_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7179

QIB_7322_RcvTIDFlowTable15_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7175

QIB_7322_RcvTIDFlowTable15_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7170

QIB_7322_RcvTIDFlowTable15
Definition qib_7322_regs.h:7181

QIB_7322_RcvTIDFlowTable15::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable15_pb)

QIB_7322_RcvTIDFlowTable16_pb
Definition qib_7322_regs.h:7207

QIB_7322_RcvTIDFlowTable16_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7209

QIB_7322_RcvTIDFlowTable16_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7212

QIB_7322_RcvTIDFlowTable16_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7213

QIB_7322_RcvTIDFlowTable16_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7215

QIB_7322_RcvTIDFlowTable16_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7210

QIB_7322_RcvTIDFlowTable16_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7211

QIB_7322_RcvTIDFlowTable16_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7217

QIB_7322_RcvTIDFlowTable16_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7216

QIB_7322_RcvTIDFlowTable16_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7214

QIB_7322_RcvTIDFlowTable16_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7208

QIB_7322_RcvTIDFlowTable16
Definition qib_7322_regs.h:7219

QIB_7322_RcvTIDFlowTable16::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable16_pb)

QIB_7322_RcvTIDFlowTable17_pb
Definition qib_7322_regs.h:7245

QIB_7322_RcvTIDFlowTable17_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:7252

QIB_7322_RcvTIDFlowTable17_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:7250

QIB_7322_RcvTIDFlowTable17_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:7246

QIB_7322_RcvTIDFlowTable17_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:7253

QIB_7322_RcvTIDFlowTable17_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:7249

QIB_7322_RcvTIDFlowTable17_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:7254

QIB_7322_RcvTIDFlowTable17_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:7248

QIB_7322_RcvTIDFlowTable17_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:7251

QIB_7322_RcvTIDFlowTable17_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:7247

QIB_7322_RcvTIDFlowTable17_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:7255

QIB_7322_RcvTIDFlowTable17
Definition qib_7322_regs.h:7257

QIB_7322_RcvTIDFlowTable17::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable17_pb)

QIB_7322_RcvTIDFlowTable1_pb
Definition qib_7322_regs.h:6637

QIB_7322_RcvTIDFlowTable1_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6645

QIB_7322_RcvTIDFlowTable1_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6644

QIB_7322_RcvTIDFlowTable1_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6639

QIB_7322_RcvTIDFlowTable1_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6643

QIB_7322_RcvTIDFlowTable1_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6642

QIB_7322_RcvTIDFlowTable1_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6646

QIB_7322_RcvTIDFlowTable1_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6640

QIB_7322_RcvTIDFlowTable1_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6641

QIB_7322_RcvTIDFlowTable1_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6647

QIB_7322_RcvTIDFlowTable1_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6638

QIB_7322_RcvTIDFlowTable1
Definition qib_7322_regs.h:6649

QIB_7322_RcvTIDFlowTable1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable1_pb)

QIB_7322_RcvTIDFlowTable2_pb
Definition qib_7322_regs.h:6675

QIB_7322_RcvTIDFlowTable2_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6678

QIB_7322_RcvTIDFlowTable2_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6684

QIB_7322_RcvTIDFlowTable2_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6677

QIB_7322_RcvTIDFlowTable2_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6683

QIB_7322_RcvTIDFlowTable2_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6679

QIB_7322_RcvTIDFlowTable2_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6685

QIB_7322_RcvTIDFlowTable2_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6676

QIB_7322_RcvTIDFlowTable2_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6682

QIB_7322_RcvTIDFlowTable2_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6680

QIB_7322_RcvTIDFlowTable2_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6681

QIB_7322_RcvTIDFlowTable2
Definition qib_7322_regs.h:6687

QIB_7322_RcvTIDFlowTable2::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable2_pb)

QIB_7322_RcvTIDFlowTable3_pb
Definition qib_7322_regs.h:6713

QIB_7322_RcvTIDFlowTable3_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6720

QIB_7322_RcvTIDFlowTable3_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6717

QIB_7322_RcvTIDFlowTable3_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6719

QIB_7322_RcvTIDFlowTable3_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6718

QIB_7322_RcvTIDFlowTable3_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6723

QIB_7322_RcvTIDFlowTable3_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6722

QIB_7322_RcvTIDFlowTable3_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6714

QIB_7322_RcvTIDFlowTable3_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6715

QIB_7322_RcvTIDFlowTable3_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6721

QIB_7322_RcvTIDFlowTable3_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6716

QIB_7322_RcvTIDFlowTable3
Definition qib_7322_regs.h:6725

QIB_7322_RcvTIDFlowTable3::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable3_pb)

QIB_7322_RcvTIDFlowTable4_pb
Definition qib_7322_regs.h:6751

QIB_7322_RcvTIDFlowTable4_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6760

QIB_7322_RcvTIDFlowTable4_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6757

QIB_7322_RcvTIDFlowTable4_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6756

QIB_7322_RcvTIDFlowTable4_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6759

QIB_7322_RcvTIDFlowTable4_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6753

QIB_7322_RcvTIDFlowTable4_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6758

QIB_7322_RcvTIDFlowTable4_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6761

QIB_7322_RcvTIDFlowTable4_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6752

QIB_7322_RcvTIDFlowTable4_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6754

QIB_7322_RcvTIDFlowTable4_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6755

QIB_7322_RcvTIDFlowTable4
Definition qib_7322_regs.h:6763

QIB_7322_RcvTIDFlowTable4::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable4_pb)

QIB_7322_RcvTIDFlowTable5_pb
Definition qib_7322_regs.h:6789

QIB_7322_RcvTIDFlowTable5_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6797

QIB_7322_RcvTIDFlowTable5_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6799

QIB_7322_RcvTIDFlowTable5_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6791

QIB_7322_RcvTIDFlowTable5_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6794

QIB_7322_RcvTIDFlowTable5_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6796

QIB_7322_RcvTIDFlowTable5_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6793

QIB_7322_RcvTIDFlowTable5_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6792

QIB_7322_RcvTIDFlowTable5_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6790

QIB_7322_RcvTIDFlowTable5_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6795

QIB_7322_RcvTIDFlowTable5_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6798

QIB_7322_RcvTIDFlowTable5
Definition qib_7322_regs.h:6801

QIB_7322_RcvTIDFlowTable5::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable5_pb)

QIB_7322_RcvTIDFlowTable6_pb
Definition qib_7322_regs.h:6827

QIB_7322_RcvTIDFlowTable6_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6834

QIB_7322_RcvTIDFlowTable6_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6833

QIB_7322_RcvTIDFlowTable6_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6830

QIB_7322_RcvTIDFlowTable6_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6831

QIB_7322_RcvTIDFlowTable6_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6837

QIB_7322_RcvTIDFlowTable6_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6836

QIB_7322_RcvTIDFlowTable6_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6828

QIB_7322_RcvTIDFlowTable6_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6832

QIB_7322_RcvTIDFlowTable6_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6829

QIB_7322_RcvTIDFlowTable6_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6835

QIB_7322_RcvTIDFlowTable6
Definition qib_7322_regs.h:6839

QIB_7322_RcvTIDFlowTable6::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable6_pb)

QIB_7322_RcvTIDFlowTable7_pb
Definition qib_7322_regs.h:6865

QIB_7322_RcvTIDFlowTable7_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6872

QIB_7322_RcvTIDFlowTable7_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6873

QIB_7322_RcvTIDFlowTable7_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6874

QIB_7322_RcvTIDFlowTable7_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6870

QIB_7322_RcvTIDFlowTable7_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6867

QIB_7322_RcvTIDFlowTable7_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6871

QIB_7322_RcvTIDFlowTable7_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6875

QIB_7322_RcvTIDFlowTable7_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6868

QIB_7322_RcvTIDFlowTable7_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6869

QIB_7322_RcvTIDFlowTable7_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6866

QIB_7322_RcvTIDFlowTable7
Definition qib_7322_regs.h:6877

QIB_7322_RcvTIDFlowTable7::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable7_pb)

QIB_7322_RcvTIDFlowTable8_pb
Definition qib_7322_regs.h:6903

QIB_7322_RcvTIDFlowTable8_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6913

QIB_7322_RcvTIDFlowTable8_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6905

QIB_7322_RcvTIDFlowTable8_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6904

QIB_7322_RcvTIDFlowTable8_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6908

QIB_7322_RcvTIDFlowTable8_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6906

QIB_7322_RcvTIDFlowTable8_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6910

QIB_7322_RcvTIDFlowTable8_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6907

QIB_7322_RcvTIDFlowTable8_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6912

QIB_7322_RcvTIDFlowTable8_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6911

QIB_7322_RcvTIDFlowTable8_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6909

QIB_7322_RcvTIDFlowTable8
Definition qib_7322_regs.h:6915

QIB_7322_RcvTIDFlowTable8::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable8_pb)

QIB_7322_RcvTIDFlowTable9_pb
Definition qib_7322_regs.h:6941

QIB_7322_RcvTIDFlowTable9_pb::_unused_1
pseudo_bit_t _unused_1[35]
Definition qib_7322_regs.h:6951

QIB_7322_RcvTIDFlowTable9_pb::FlowValid
pseudo_bit_t FlowValid[1]
Definition qib_7322_regs.h:6944

QIB_7322_RcvTIDFlowTable9_pb::SeqMismatch
pseudo_bit_t SeqMismatch[1]
Definition qib_7322_regs.h:6949

QIB_7322_RcvTIDFlowTable9_pb::SeqNum
pseudo_bit_t SeqNum[11]
Definition qib_7322_regs.h:6942

QIB_7322_RcvTIDFlowTable9_pb::GenMismatch
pseudo_bit_t GenMismatch[1]
Definition qib_7322_regs.h:6950

QIB_7322_RcvTIDFlowTable9_pb::GenVal
pseudo_bit_t GenVal[8]
Definition qib_7322_regs.h:6943

QIB_7322_RcvTIDFlowTable9_pb::KeepAfterSeqErr
pseudo_bit_t KeepAfterSeqErr[1]
Definition qib_7322_regs.h:6946

QIB_7322_RcvTIDFlowTable9_pb::HdrSuppEnabled
pseudo_bit_t HdrSuppEnabled[1]
Definition qib_7322_regs.h:6945

QIB_7322_RcvTIDFlowTable9_pb::KeepOnGenErr
pseudo_bit_t KeepOnGenErr[1]
Definition qib_7322_regs.h:6947

QIB_7322_RcvTIDFlowTable9_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:6948

QIB_7322_RcvTIDFlowTable9
Definition qib_7322_regs.h:6953

QIB_7322_RcvTIDFlowTable9::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RcvTIDFlowTable9_pb)

QIB_7322_Revision_pb
Definition qib_7322_regs.h:39

QIB_7322_Revision_pb::R_Arch
pseudo_bit_t R_Arch[8]
Definition qib_7322_regs.h:42

QIB_7322_Revision_pb::R_Simulator
pseudo_bit_t R_Simulator[1]
Definition qib_7322_regs.h:47

QIB_7322_Revision_pb::R_Emulation_Revcode
pseudo_bit_t R_Emulation_Revcode[22]
Definition qib_7322_regs.h:45

QIB_7322_Revision_pb::BoardID
pseudo_bit_t BoardID[8]
Definition qib_7322_regs.h:44

QIB_7322_Revision_pb::R_ChipRevMajor
pseudo_bit_t R_ChipRevMajor[8]
Definition qib_7322_regs.h:41

QIB_7322_Revision_pb::R_SW
pseudo_bit_t R_SW[8]
Definition qib_7322_regs.h:43

QIB_7322_Revision_pb::R_Emulation
pseudo_bit_t R_Emulation[1]
Definition qib_7322_regs.h:46

QIB_7322_Revision_pb::R_ChipRevMinor
pseudo_bit_t R_ChipRevMinor[8]
Definition qib_7322_regs.h:40

QIB_7322_Revision
Definition qib_7322_regs.h:49

QIB_7322_Revision::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_Revision_pb)

QIB_7322_RmFifoArrayCorErrLogA_0_pb
Definition qib_7322_regs.h:3798

QIB_7322_RmFifoArrayCorErrLogA_0_pb::RmFifoArrayCorErrData_63_0
pseudo_bit_t RmFifoArrayCorErrData_63_0[64]
Definition qib_7322_regs.h:3799

QIB_7322_RmFifoArrayCorErrLogA_0
Definition qib_7322_regs.h:3801

QIB_7322_RmFifoArrayCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogA_0_pb)

QIB_7322_RmFifoArrayCorErrLogA_1_pb
Definition qib_7322_regs.h:5128

QIB_7322_RmFifoArrayCorErrLogA_1_pb::RmFifoArrayCorErrData_63_0
pseudo_bit_t RmFifoArrayCorErrData_63_0[64]
Definition qib_7322_regs.h:5129

QIB_7322_RmFifoArrayCorErrLogA_1
Definition qib_7322_regs.h:5131

QIB_7322_RmFifoArrayCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogA_1_pb)

QIB_7322_RmFifoArrayCorErrLogB_0_pb
Definition qib_7322_regs.h:3807

QIB_7322_RmFifoArrayCorErrLogB_0_pb::RmFifoArrayCorErrData_127_64
pseudo_bit_t RmFifoArrayCorErrData_127_64[64]
Definition qib_7322_regs.h:3808

QIB_7322_RmFifoArrayCorErrLogB_0
Definition qib_7322_regs.h:3810

QIB_7322_RmFifoArrayCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogB_0_pb)

QIB_7322_RmFifoArrayCorErrLogB_1_pb
Definition qib_7322_regs.h:5137

QIB_7322_RmFifoArrayCorErrLogB_1_pb::RmFifoArrayCorErrData_127_64
pseudo_bit_t RmFifoArrayCorErrData_127_64[64]
Definition qib_7322_regs.h:5138

QIB_7322_RmFifoArrayCorErrLogB_1
Definition qib_7322_regs.h:5140

QIB_7322_RmFifoArrayCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogB_1_pb)

QIB_7322_RmFifoArrayCorErrLogC_0_pb
Definition qib_7322_regs.h:3816

QIB_7322_RmFifoArrayCorErrLogC_0_pb::RmFifoArrayCorErrDword_3_0
pseudo_bit_t RmFifoArrayCorErrDword_3_0[4]
Definition qib_7322_regs.h:3820

QIB_7322_RmFifoArrayCorErrLogC_0_pb::RmFifoArrayCorErrCheckBit_27_0
pseudo_bit_t RmFifoArrayCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:3817

QIB_7322_RmFifoArrayCorErrLogC_0_pb::RmFifoArrayCorErrAddr_13_0
pseudo_bit_t RmFifoArrayCorErrAddr_13_0[14]
Definition qib_7322_regs.h:3818

QIB_7322_RmFifoArrayCorErrLogC_0_pb::_unused_0
pseudo_bit_t _unused_0[18]
Definition qib_7322_regs.h:3819

QIB_7322_RmFifoArrayCorErrLogC_0
Definition qib_7322_regs.h:3822

QIB_7322_RmFifoArrayCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogC_0_pb)

QIB_7322_RmFifoArrayCorErrLogC_1_pb
Definition qib_7322_regs.h:5146

QIB_7322_RmFifoArrayCorErrLogC_1_pb::RmFifoArrayCorErrAddr_13_0
pseudo_bit_t RmFifoArrayCorErrAddr_13_0[14]
Definition qib_7322_regs.h:5148

QIB_7322_RmFifoArrayCorErrLogC_1_pb::RmFifoArrayCorErrCheckBit_27_0
pseudo_bit_t RmFifoArrayCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:5147

QIB_7322_RmFifoArrayCorErrLogC_1_pb::RmFifoArrayCorErrDword_3_0
pseudo_bit_t RmFifoArrayCorErrDword_3_0[4]
Definition qib_7322_regs.h:5150

QIB_7322_RmFifoArrayCorErrLogC_1_pb::_unused_0
pseudo_bit_t _unused_0[18]
Definition qib_7322_regs.h:5149

QIB_7322_RmFifoArrayCorErrLogC_1
Definition qib_7322_regs.h:5152

QIB_7322_RmFifoArrayCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayCorErrLogC_1_pb)

QIB_7322_RmFifoArrayUnCorErrLogA_0_pb
Definition qib_7322_regs.h:3609

QIB_7322_RmFifoArrayUnCorErrLogA_0_pb::RmFifoArrayUnCorErrData_63_0
pseudo_bit_t RmFifoArrayUnCorErrData_63_0[64]
Definition qib_7322_regs.h:3610

QIB_7322_RmFifoArrayUnCorErrLogA_0
Definition qib_7322_regs.h:3612

QIB_7322_RmFifoArrayUnCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogA_0_pb)

QIB_7322_RmFifoArrayUnCorErrLogA_1_pb
Definition qib_7322_regs.h:4939

QIB_7322_RmFifoArrayUnCorErrLogA_1_pb::RmFifoArrayUnCorErrData_63_0
pseudo_bit_t RmFifoArrayUnCorErrData_63_0[64]
Definition qib_7322_regs.h:4940

QIB_7322_RmFifoArrayUnCorErrLogA_1
Definition qib_7322_regs.h:4942

QIB_7322_RmFifoArrayUnCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogA_1_pb)

QIB_7322_RmFifoArrayUnCorErrLogB_0_pb
Definition qib_7322_regs.h:3618

QIB_7322_RmFifoArrayUnCorErrLogB_0_pb::RmFifoArrayUnCorErrData_127_64
pseudo_bit_t RmFifoArrayUnCorErrData_127_64[64]
Definition qib_7322_regs.h:3619

QIB_7322_RmFifoArrayUnCorErrLogB_0
Definition qib_7322_regs.h:3621

QIB_7322_RmFifoArrayUnCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogB_0_pb)

QIB_7322_RmFifoArrayUnCorErrLogB_1_pb
Definition qib_7322_regs.h:4948

QIB_7322_RmFifoArrayUnCorErrLogB_1_pb::RmFifoArrayUnCorErrData_127_64
pseudo_bit_t RmFifoArrayUnCorErrData_127_64[64]
Definition qib_7322_regs.h:4949

QIB_7322_RmFifoArrayUnCorErrLogB_1
Definition qib_7322_regs.h:4951

QIB_7322_RmFifoArrayUnCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogB_1_pb)

QIB_7322_RmFifoArrayUnCorErrLogC_0_pb
Definition qib_7322_regs.h:3627

QIB_7322_RmFifoArrayUnCorErrLogC_0_pb::RmFifoArrayUnCorErrAddr_13_0
pseudo_bit_t RmFifoArrayUnCorErrAddr_13_0[14]
Definition qib_7322_regs.h:3629

QIB_7322_RmFifoArrayUnCorErrLogC_0_pb::_unused_0
pseudo_bit_t _unused_0[18]
Definition qib_7322_regs.h:3630

QIB_7322_RmFifoArrayUnCorErrLogC_0_pb::RmFifoArrayUnCorErrDword_3_0
pseudo_bit_t RmFifoArrayUnCorErrDword_3_0[4]
Definition qib_7322_regs.h:3631

QIB_7322_RmFifoArrayUnCorErrLogC_0_pb::RmFifoArrayUnCorErrCheckBit_27_0
pseudo_bit_t RmFifoArrayUnCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:3628

QIB_7322_RmFifoArrayUnCorErrLogC_0
Definition qib_7322_regs.h:3633

QIB_7322_RmFifoArrayUnCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogC_0_pb)

QIB_7322_RmFifoArrayUnCorErrLogC_1_pb
Definition qib_7322_regs.h:4957

QIB_7322_RmFifoArrayUnCorErrLogC_1_pb::RmFifoArrayUnCorErrCheckBit_27_0
pseudo_bit_t RmFifoArrayUnCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:4958

QIB_7322_RmFifoArrayUnCorErrLogC_1_pb::_unused_0
pseudo_bit_t _unused_0[18]
Definition qib_7322_regs.h:4960

QIB_7322_RmFifoArrayUnCorErrLogC_1_pb::RmFifoArrayUnCorErrDword_3_0
pseudo_bit_t RmFifoArrayUnCorErrDword_3_0[4]
Definition qib_7322_regs.h:4961

QIB_7322_RmFifoArrayUnCorErrLogC_1_pb::RmFifoArrayUnCorErrAddr_13_0
pseudo_bit_t RmFifoArrayUnCorErrAddr_13_0[14]
Definition qib_7322_regs.h:4959

QIB_7322_RmFifoArrayUnCorErrLogC_1
Definition qib_7322_regs.h:4963

QIB_7322_RmFifoArrayUnCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RmFifoArrayUnCorErrLogC_1_pb)

QIB_7322_RxBufrCorErrLogA_0_pb
Definition qib_7322_regs.h:3639

QIB_7322_RxBufrCorErrLogA_0_pb::RxBufrCorErrData_63_0
pseudo_bit_t RxBufrCorErrData_63_0[64]
Definition qib_7322_regs.h:3640

QIB_7322_RxBufrCorErrLogA_0
Definition qib_7322_regs.h:3642

QIB_7322_RxBufrCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogA_0_pb)

QIB_7322_RxBufrCorErrLogA_1_pb
Definition qib_7322_regs.h:4969

QIB_7322_RxBufrCorErrLogA_1_pb::RxBufrCorErrData_63_0
pseudo_bit_t RxBufrCorErrData_63_0[64]
Definition qib_7322_regs.h:4970

QIB_7322_RxBufrCorErrLogA_1
Definition qib_7322_regs.h:4972

QIB_7322_RxBufrCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogA_1_pb)

QIB_7322_RxBufrCorErrLogB_0_pb
Definition qib_7322_regs.h:3648

QIB_7322_RxBufrCorErrLogB_0_pb::RxBufrCorErrData_127_64
pseudo_bit_t RxBufrCorErrData_127_64[64]
Definition qib_7322_regs.h:3649

QIB_7322_RxBufrCorErrLogB_0
Definition qib_7322_regs.h:3651

QIB_7322_RxBufrCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogB_0_pb)

QIB_7322_RxBufrCorErrLogB_1_pb
Definition qib_7322_regs.h:4978

QIB_7322_RxBufrCorErrLogB_1_pb::RxBufrCorErrData_127_64
pseudo_bit_t RxBufrCorErrData_127_64[64]
Definition qib_7322_regs.h:4979

QIB_7322_RxBufrCorErrLogB_1
Definition qib_7322_regs.h:4981

QIB_7322_RxBufrCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogB_1_pb)

QIB_7322_RxBufrCorErrLogC_0_pb
Definition qib_7322_regs.h:3657

QIB_7322_RxBufrCorErrLogC_0_pb::RxBufrCorErrData_191_128
pseudo_bit_t RxBufrCorErrData_191_128[64]
Definition qib_7322_regs.h:3658

QIB_7322_RxBufrCorErrLogC_0
Definition qib_7322_regs.h:3660

QIB_7322_RxBufrCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogC_0_pb)

QIB_7322_RxBufrCorErrLogC_1_pb
Definition qib_7322_regs.h:4987

QIB_7322_RxBufrCorErrLogC_1_pb::RxBufrCorErrData_191_128
pseudo_bit_t RxBufrCorErrData_191_128[64]
Definition qib_7322_regs.h:4988

QIB_7322_RxBufrCorErrLogC_1
Definition qib_7322_regs.h:4990

QIB_7322_RxBufrCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogC_1_pb)

QIB_7322_RxBufrCorErrLogD_0_pb
Definition qib_7322_regs.h:3666

QIB_7322_RxBufrCorErrLogD_0_pb::RxBufrCorErrData_255_192
pseudo_bit_t RxBufrCorErrData_255_192[64]
Definition qib_7322_regs.h:3667

QIB_7322_RxBufrCorErrLogD_0
Definition qib_7322_regs.h:3669

QIB_7322_RxBufrCorErrLogD_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogD_0_pb)

QIB_7322_RxBufrCorErrLogD_1_pb
Definition qib_7322_regs.h:4996

QIB_7322_RxBufrCorErrLogD_1_pb::RxBufrCorErrData_255_192
pseudo_bit_t RxBufrCorErrData_255_192[64]
Definition qib_7322_regs.h:4997

QIB_7322_RxBufrCorErrLogD_1
Definition qib_7322_regs.h:4999

QIB_7322_RxBufrCorErrLogD_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogD_1_pb)

QIB_7322_RxBufrCorErrLogE_0_pb
Definition qib_7322_regs.h:3675

QIB_7322_RxBufrCorErrLogE_0_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:3679

QIB_7322_RxBufrCorErrLogE_0_pb::RxBufrCorErrCheckBit_36_0
pseudo_bit_t RxBufrCorErrCheckBit_36_0[37]
Definition qib_7322_regs.h:3677

QIB_7322_RxBufrCorErrLogE_0_pb::RxBufrCorErrAddr_15_0
pseudo_bit_t RxBufrCorErrAddr_15_0[16]
Definition qib_7322_regs.h:3678

QIB_7322_RxBufrCorErrLogE_0_pb::RxBufrCorErrData_258_256
pseudo_bit_t RxBufrCorErrData_258_256[3]
Definition qib_7322_regs.h:3676

QIB_7322_RxBufrCorErrLogE_0
Definition qib_7322_regs.h:3681

QIB_7322_RxBufrCorErrLogE_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogE_0_pb)

QIB_7322_RxBufrCorErrLogE_1_pb
Definition qib_7322_regs.h:5005

QIB_7322_RxBufrCorErrLogE_1_pb::RxBufrCorErrAddr_15_0
pseudo_bit_t RxBufrCorErrAddr_15_0[16]
Definition qib_7322_regs.h:5008

QIB_7322_RxBufrCorErrLogE_1_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:5009

QIB_7322_RxBufrCorErrLogE_1_pb::RxBufrCorErrCheckBit_36_0
pseudo_bit_t RxBufrCorErrCheckBit_36_0[37]
Definition qib_7322_regs.h:5007

QIB_7322_RxBufrCorErrLogE_1_pb::RxBufrCorErrData_258_256
pseudo_bit_t RxBufrCorErrData_258_256[3]
Definition qib_7322_regs.h:5006

QIB_7322_RxBufrCorErrLogE_1
Definition qib_7322_regs.h:5011

QIB_7322_RxBufrCorErrLogE_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrCorErrLogE_1_pb)

QIB_7322_RxBufrUnCorErrLogA_0_pb
Definition qib_7322_regs.h:3450

QIB_7322_RxBufrUnCorErrLogA_0_pb::RxBufrUnCorErrData_63_0
pseudo_bit_t RxBufrUnCorErrData_63_0[64]
Definition qib_7322_regs.h:3451

QIB_7322_RxBufrUnCorErrLogA_0
Definition qib_7322_regs.h:3453

QIB_7322_RxBufrUnCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogA_0_pb)

QIB_7322_RxBufrUnCorErrLogA_1_pb
Definition qib_7322_regs.h:4780

QIB_7322_RxBufrUnCorErrLogA_1_pb::RxBufrUnCorErrData_63_0
pseudo_bit_t RxBufrUnCorErrData_63_0[64]
Definition qib_7322_regs.h:4781

QIB_7322_RxBufrUnCorErrLogA_1
Definition qib_7322_regs.h:4783

QIB_7322_RxBufrUnCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogA_1_pb)

QIB_7322_RxBufrUnCorErrLogB_0_pb
Definition qib_7322_regs.h:3459

QIB_7322_RxBufrUnCorErrLogB_0_pb::RxBufrUnCorErrData_127_64
pseudo_bit_t RxBufrUnCorErrData_127_64[64]
Definition qib_7322_regs.h:3460

QIB_7322_RxBufrUnCorErrLogB_0
Definition qib_7322_regs.h:3462

QIB_7322_RxBufrUnCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogB_0_pb)

QIB_7322_RxBufrUnCorErrLogB_1_pb
Definition qib_7322_regs.h:4789

QIB_7322_RxBufrUnCorErrLogB_1_pb::RxBufrUnCorErrData_127_64
pseudo_bit_t RxBufrUnCorErrData_127_64[64]
Definition qib_7322_regs.h:4790

QIB_7322_RxBufrUnCorErrLogB_1
Definition qib_7322_regs.h:4792

QIB_7322_RxBufrUnCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogB_1_pb)

QIB_7322_RxBufrUnCorErrLogC_0_pb
Definition qib_7322_regs.h:3468

QIB_7322_RxBufrUnCorErrLogC_0_pb::RxBufrUnCorErrData_191_128
pseudo_bit_t RxBufrUnCorErrData_191_128[64]
Definition qib_7322_regs.h:3469

QIB_7322_RxBufrUnCorErrLogC_0
Definition qib_7322_regs.h:3471

QIB_7322_RxBufrUnCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogC_0_pb)

QIB_7322_RxBufrUnCorErrLogC_1_pb
Definition qib_7322_regs.h:4798

QIB_7322_RxBufrUnCorErrLogC_1_pb::RxBufrUnCorErrData_191_128
pseudo_bit_t RxBufrUnCorErrData_191_128[64]
Definition qib_7322_regs.h:4799

QIB_7322_RxBufrUnCorErrLogC_1
Definition qib_7322_regs.h:4801

QIB_7322_RxBufrUnCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogC_1_pb)

QIB_7322_RxBufrUnCorErrLogD_0_pb
Definition qib_7322_regs.h:3477

QIB_7322_RxBufrUnCorErrLogD_0_pb::RxBufrUnCorErrData_255_192
pseudo_bit_t RxBufrUnCorErrData_255_192[64]
Definition qib_7322_regs.h:3478

QIB_7322_RxBufrUnCorErrLogD_0
Definition qib_7322_regs.h:3480

QIB_7322_RxBufrUnCorErrLogD_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogD_0_pb)

QIB_7322_RxBufrUnCorErrLogD_1_pb
Definition qib_7322_regs.h:4807

QIB_7322_RxBufrUnCorErrLogD_1_pb::RxBufrUnCorErrData_255_192
pseudo_bit_t RxBufrUnCorErrData_255_192[64]
Definition qib_7322_regs.h:4808

QIB_7322_RxBufrUnCorErrLogD_1
Definition qib_7322_regs.h:4810

QIB_7322_RxBufrUnCorErrLogD_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogD_1_pb)

QIB_7322_RxBufrUnCorErrLogE_0_pb
Definition qib_7322_regs.h:3486

QIB_7322_RxBufrUnCorErrLogE_0_pb::RxBufrUnCorErrData_258_256
pseudo_bit_t RxBufrUnCorErrData_258_256[3]
Definition qib_7322_regs.h:3487

QIB_7322_RxBufrUnCorErrLogE_0_pb::RxBufrUnCorErrAddr_15_0
pseudo_bit_t RxBufrUnCorErrAddr_15_0[16]
Definition qib_7322_regs.h:3489

QIB_7322_RxBufrUnCorErrLogE_0_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:3490

QIB_7322_RxBufrUnCorErrLogE_0_pb::RxBufrUnCorErrCheckBit_36_0
pseudo_bit_t RxBufrUnCorErrCheckBit_36_0[37]
Definition qib_7322_regs.h:3488

QIB_7322_RxBufrUnCorErrLogE_0
Definition qib_7322_regs.h:3492

QIB_7322_RxBufrUnCorErrLogE_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogE_0_pb)

QIB_7322_RxBufrUnCorErrLogE_1_pb
Definition qib_7322_regs.h:4816

QIB_7322_RxBufrUnCorErrLogE_1_pb::RxBufrUnCorErrAddr_15_0
pseudo_bit_t RxBufrUnCorErrAddr_15_0[16]
Definition qib_7322_regs.h:4819

QIB_7322_RxBufrUnCorErrLogE_1_pb::RxBufrUnCorErrData_258_256
pseudo_bit_t RxBufrUnCorErrData_258_256[3]
Definition qib_7322_regs.h:4817

QIB_7322_RxBufrUnCorErrLogE_1_pb::_unused_0
pseudo_bit_t _unused_0[8]
Definition qib_7322_regs.h:4820

QIB_7322_RxBufrUnCorErrLogE_1_pb::RxBufrUnCorErrCheckBit_36_0
pseudo_bit_t RxBufrUnCorErrCheckBit_36_0[37]
Definition qib_7322_regs.h:4818

QIB_7322_RxBufrUnCorErrLogE_1
Definition qib_7322_regs.h:4822

QIB_7322_RxBufrUnCorErrLogE_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxBufrUnCorErrLogE_1_pb)

QIB_7322_RxCreditVL0_0_pb
Definition qib_7322_regs.h:3034

QIB_7322_RxCreditVL0_0_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:3036

QIB_7322_RxCreditVL0_0_pb::RxMaxCreditVL
pseudo_bit_t RxMaxCreditVL[12]
Definition qib_7322_regs.h:3035

QIB_7322_RxCreditVL0_0_pb::_unused_1
pseudo_bit_t _unused_1[36]
Definition qib_7322_regs.h:3038

QIB_7322_RxCreditVL0_0_pb::RxBufrConsumedVL
pseudo_bit_t RxBufrConsumedVL[12]
Definition qib_7322_regs.h:3037

QIB_7322_RxCreditVL0_0
Definition qib_7322_regs.h:3040

QIB_7322_RxCreditVL0_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxCreditVL0_0_pb)

QIB_7322_RxCreditVL0_1_pb
Definition qib_7322_regs.h:4367

QIB_7322_RxCreditVL0_1_pb::RxMaxCreditVL
pseudo_bit_t RxMaxCreditVL[12]
Definition qib_7322_regs.h:4368

QIB_7322_RxCreditVL0_1_pb::RxBufrConsumedVL
pseudo_bit_t RxBufrConsumedVL[12]
Definition qib_7322_regs.h:4370

QIB_7322_RxCreditVL0_1_pb::_unused_1
pseudo_bit_t _unused_1[36]
Definition qib_7322_regs.h:4371

QIB_7322_RxCreditVL0_1_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:4369

QIB_7322_RxCreditVL0_1
Definition qib_7322_regs.h:4373

QIB_7322_RxCreditVL0_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxCreditVL0_1_pb)

QIB_7322_RxDataFifoCorErrLogA_0_pb
Definition qib_7322_regs.h:3757

QIB_7322_RxDataFifoCorErrLogA_0_pb::RxDataFifoCorErrData_63_0
pseudo_bit_t RxDataFifoCorErrData_63_0[64]
Definition qib_7322_regs.h:3758

QIB_7322_RxDataFifoCorErrLogA_0
Definition qib_7322_regs.h:3760

QIB_7322_RxDataFifoCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogA_0_pb)

QIB_7322_RxDataFifoCorErrLogA_1_pb
Definition qib_7322_regs.h:5087

QIB_7322_RxDataFifoCorErrLogA_1_pb::RxDataFifoCorErrData_63_0
pseudo_bit_t RxDataFifoCorErrData_63_0[64]
Definition qib_7322_regs.h:5088

QIB_7322_RxDataFifoCorErrLogA_1
Definition qib_7322_regs.h:5090

QIB_7322_RxDataFifoCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogA_1_pb)

QIB_7322_RxDataFifoCorErrLogB_0_pb
Definition qib_7322_regs.h:3766

QIB_7322_RxDataFifoCorErrLogB_0_pb::RxDataFifoCorErrData_127_64
pseudo_bit_t RxDataFifoCorErrData_127_64[64]
Definition qib_7322_regs.h:3767

QIB_7322_RxDataFifoCorErrLogB_0
Definition qib_7322_regs.h:3769

QIB_7322_RxDataFifoCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogB_0_pb)

QIB_7322_RxDataFifoCorErrLogB_1_pb
Definition qib_7322_regs.h:5096

QIB_7322_RxDataFifoCorErrLogB_1_pb::RxDataFifoCorErrData_127_64
pseudo_bit_t RxDataFifoCorErrData_127_64[64]
Definition qib_7322_regs.h:5097

QIB_7322_RxDataFifoCorErrLogB_1
Definition qib_7322_regs.h:5099

QIB_7322_RxDataFifoCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogB_1_pb)

QIB_7322_RxDataFifoCorErrLogC_0_pb
Definition qib_7322_regs.h:3775

QIB_7322_RxDataFifoCorErrLogC_0_pb::RxDataFifoCorErrAddr_10_0
pseudo_bit_t RxDataFifoCorErrAddr_10_0[11]
Definition qib_7322_regs.h:3777

QIB_7322_RxDataFifoCorErrLogC_0_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:3778

QIB_7322_RxDataFifoCorErrLogC_0_pb::RxDataFifoCorErrCheckBit_15_0
pseudo_bit_t RxDataFifoCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:3776

QIB_7322_RxDataFifoCorErrLogC_0
Definition qib_7322_regs.h:3780

QIB_7322_RxDataFifoCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogC_0_pb)

QIB_7322_RxDataFifoCorErrLogC_1_pb
Definition qib_7322_regs.h:5105

QIB_7322_RxDataFifoCorErrLogC_1_pb::RxDataFifoCorErrAddr_10_0
pseudo_bit_t RxDataFifoCorErrAddr_10_0[11]
Definition qib_7322_regs.h:5107

QIB_7322_RxDataFifoCorErrLogC_1_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:5108

QIB_7322_RxDataFifoCorErrLogC_1_pb::RxDataFifoCorErrCheckBit_15_0
pseudo_bit_t RxDataFifoCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:5106

QIB_7322_RxDataFifoCorErrLogC_1
Definition qib_7322_regs.h:5110

QIB_7322_RxDataFifoCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoCorErrLogC_1_pb)

QIB_7322_RxDataFifoUnCorErrLogA_0_pb
Definition qib_7322_regs.h:3568

QIB_7322_RxDataFifoUnCorErrLogA_0_pb::RxDataFifoUnCorErrData_63_0
pseudo_bit_t RxDataFifoUnCorErrData_63_0[64]
Definition qib_7322_regs.h:3569

QIB_7322_RxDataFifoUnCorErrLogA_0
Definition qib_7322_regs.h:3571

QIB_7322_RxDataFifoUnCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogA_0_pb)

QIB_7322_RxDataFifoUnCorErrLogA_1_pb
Definition qib_7322_regs.h:4898

QIB_7322_RxDataFifoUnCorErrLogA_1_pb::RxDataFifoUnCorErrData_63_0
pseudo_bit_t RxDataFifoUnCorErrData_63_0[64]
Definition qib_7322_regs.h:4899

QIB_7322_RxDataFifoUnCorErrLogA_1
Definition qib_7322_regs.h:4901

QIB_7322_RxDataFifoUnCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogA_1_pb)

QIB_7322_RxDataFifoUnCorErrLogB_0_pb
Definition qib_7322_regs.h:3577

QIB_7322_RxDataFifoUnCorErrLogB_0_pb::RxDataFifoUnCorErrData_127_64
pseudo_bit_t RxDataFifoUnCorErrData_127_64[64]
Definition qib_7322_regs.h:3578

QIB_7322_RxDataFifoUnCorErrLogB_0
Definition qib_7322_regs.h:3580

QIB_7322_RxDataFifoUnCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogB_0_pb)

QIB_7322_RxDataFifoUnCorErrLogB_1_pb
Definition qib_7322_regs.h:4907

QIB_7322_RxDataFifoUnCorErrLogB_1_pb::RxDataFifoUnCorErrData_127_64
pseudo_bit_t RxDataFifoUnCorErrData_127_64[64]
Definition qib_7322_regs.h:4908

QIB_7322_RxDataFifoUnCorErrLogB_1
Definition qib_7322_regs.h:4910

QIB_7322_RxDataFifoUnCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogB_1_pb)

QIB_7322_RxDataFifoUnCorErrLogC_0_pb
Definition qib_7322_regs.h:3586

QIB_7322_RxDataFifoUnCorErrLogC_0_pb::RxDataFifoUnCorErrCheckBit_15_0
pseudo_bit_t RxDataFifoUnCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:3587

QIB_7322_RxDataFifoUnCorErrLogC_0_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:3589

QIB_7322_RxDataFifoUnCorErrLogC_0_pb::RxDataFifoUnCorErrAddr_10_0
pseudo_bit_t RxDataFifoUnCorErrAddr_10_0[11]
Definition qib_7322_regs.h:3588

QIB_7322_RxDataFifoUnCorErrLogC_0
Definition qib_7322_regs.h:3591

QIB_7322_RxDataFifoUnCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogC_0_pb)

QIB_7322_RxDataFifoUnCorErrLogC_1_pb
Definition qib_7322_regs.h:4916

QIB_7322_RxDataFifoUnCorErrLogC_1_pb::RxDataFifoUnCorErrCheckBit_15_0
pseudo_bit_t RxDataFifoUnCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:4917

QIB_7322_RxDataFifoUnCorErrLogC_1_pb::RxDataFifoUnCorErrAddr_10_0
pseudo_bit_t RxDataFifoUnCorErrAddr_10_0[11]
Definition qib_7322_regs.h:4918

QIB_7322_RxDataFifoUnCorErrLogC_1_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:4919

QIB_7322_RxDataFifoUnCorErrLogC_1
Definition qib_7322_regs.h:4921

QIB_7322_RxDataFifoUnCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxDataFifoUnCorErrLogC_1_pb)

QIB_7322_RxEagerArrayCorErrLogA_pb
Definition qib_7322_regs.h:2416

QIB_7322_RxEagerArrayCorErrLogA_pb::RxEagerArrayCorErrCheckBit_11_0
pseudo_bit_t RxEagerArrayCorErrCheckBit_11_0[12]
Definition qib_7322_regs.h:2418

QIB_7322_RxEagerArrayCorErrLogA_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:2419

QIB_7322_RxEagerArrayCorErrLogA_pb::RxEagerArrayCorErrData_39_0
pseudo_bit_t RxEagerArrayCorErrData_39_0[40]
Definition qib_7322_regs.h:2417

QIB_7322_RxEagerArrayCorErrLogA
Definition qib_7322_regs.h:2421

QIB_7322_RxEagerArrayCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayCorErrLogA_pb)

QIB_7322_RxEagerArrayCorErrLogB_pb
Definition qib_7322_regs.h:2427

QIB_7322_RxEagerArrayCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[46]
Definition qib_7322_regs.h:2429

QIB_7322_RxEagerArrayCorErrLogB_pb::RxEagerArrayCorErrAddr_17_0
pseudo_bit_t RxEagerArrayCorErrAddr_17_0[18]
Definition qib_7322_regs.h:2428

QIB_7322_RxEagerArrayCorErrLogB
Definition qib_7322_regs.h:2431

QIB_7322_RxEagerArrayCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayCorErrLogB_pb)

QIB_7322_RxEagerArrayUnCorErrLogA_pb
Definition qib_7322_regs.h:2143

QIB_7322_RxEagerArrayUnCorErrLogA_pb::RxEagerArrayUnCorErrCheckBit_11_0
pseudo_bit_t RxEagerArrayUnCorErrCheckBit_11_0[12]
Definition qib_7322_regs.h:2145

QIB_7322_RxEagerArrayUnCorErrLogA_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:2146

QIB_7322_RxEagerArrayUnCorErrLogA_pb::RxEagerArrayUnCorErrData_39_0
pseudo_bit_t RxEagerArrayUnCorErrData_39_0[40]
Definition qib_7322_regs.h:2144

QIB_7322_RxEagerArrayUnCorErrLogA
Definition qib_7322_regs.h:2148

QIB_7322_RxEagerArrayUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayUnCorErrLogA_pb)

QIB_7322_RxEagerArrayUnCorErrLogB_pb
Definition qib_7322_regs.h:2154

QIB_7322_RxEagerArrayUnCorErrLogB_pb::RxEagerArrayUnCorErrAddr_17_0
pseudo_bit_t RxEagerArrayUnCorErrAddr_17_0[18]
Definition qib_7322_regs.h:2155

QIB_7322_RxEagerArrayUnCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[46]
Definition qib_7322_regs.h:2156

QIB_7322_RxEagerArrayUnCorErrLogB
Definition qib_7322_regs.h:2158

QIB_7322_RxEagerArrayUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxEagerArrayUnCorErrLogB_pb)

QIB_7322_RxFlagCorErrLogA_0_pb
Definition qib_7322_regs.h:3687

QIB_7322_RxFlagCorErrLogA_0_pb::RxFlagCorErrData_63_0
pseudo_bit_t RxFlagCorErrData_63_0[64]
Definition qib_7322_regs.h:3688

QIB_7322_RxFlagCorErrLogA_0
Definition qib_7322_regs.h:3690

QIB_7322_RxFlagCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogA_0_pb)

QIB_7322_RxFlagCorErrLogA_1_pb
Definition qib_7322_regs.h:5017

QIB_7322_RxFlagCorErrLogA_1_pb::RxFlagCorErrData_63_0
pseudo_bit_t RxFlagCorErrData_63_0[64]
Definition qib_7322_regs.h:5018

QIB_7322_RxFlagCorErrLogA_1
Definition qib_7322_regs.h:5020

QIB_7322_RxFlagCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogA_1_pb)

QIB_7322_RxFlagCorErrLogB_0_pb
Definition qib_7322_regs.h:3696

QIB_7322_RxFlagCorErrLogB_0_pb::RxFlagCorErrAddr_12_0
pseudo_bit_t RxFlagCorErrAddr_12_0[13]
Definition qib_7322_regs.h:3698

QIB_7322_RxFlagCorErrLogB_0_pb::_unused_0
pseudo_bit_t _unused_0[43]
Definition qib_7322_regs.h:3699

QIB_7322_RxFlagCorErrLogB_0_pb::RxFlagCorErrCheckBit_7_0
pseudo_bit_t RxFlagCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:3697

QIB_7322_RxFlagCorErrLogB_0
Definition qib_7322_regs.h:3701

QIB_7322_RxFlagCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogB_0_pb)

QIB_7322_RxFlagCorErrLogB_1_pb
Definition qib_7322_regs.h:5026

QIB_7322_RxFlagCorErrLogB_1_pb::RxFlagCorErrCheckBit_7_0
pseudo_bit_t RxFlagCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:5027

QIB_7322_RxFlagCorErrLogB_1_pb::_unused_0
pseudo_bit_t _unused_0[43]
Definition qib_7322_regs.h:5029

QIB_7322_RxFlagCorErrLogB_1_pb::RxFlagCorErrAddr_12_0
pseudo_bit_t RxFlagCorErrAddr_12_0[13]
Definition qib_7322_regs.h:5028

QIB_7322_RxFlagCorErrLogB_1
Definition qib_7322_regs.h:5031

QIB_7322_RxFlagCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagCorErrLogB_1_pb)

QIB_7322_RxFlagUnCorErrLogA_0_pb
Definition qib_7322_regs.h:3498

QIB_7322_RxFlagUnCorErrLogA_0_pb::RxFlagUnCorErrData_63_0
pseudo_bit_t RxFlagUnCorErrData_63_0[64]
Definition qib_7322_regs.h:3499

QIB_7322_RxFlagUnCorErrLogA_0
Definition qib_7322_regs.h:3501

QIB_7322_RxFlagUnCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogA_0_pb)

QIB_7322_RxFlagUnCorErrLogA_1_pb
Definition qib_7322_regs.h:4828

QIB_7322_RxFlagUnCorErrLogA_1_pb::RxFlagUnCorErrData_63_0
pseudo_bit_t RxFlagUnCorErrData_63_0[64]
Definition qib_7322_regs.h:4829

QIB_7322_RxFlagUnCorErrLogA_1
Definition qib_7322_regs.h:4831

QIB_7322_RxFlagUnCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogA_1_pb)

QIB_7322_RxFlagUnCorErrLogB_0_pb
Definition qib_7322_regs.h:3507

QIB_7322_RxFlagUnCorErrLogB_0_pb::RxFlagUnCorErrAddr_12_0
pseudo_bit_t RxFlagUnCorErrAddr_12_0[13]
Definition qib_7322_regs.h:3509

QIB_7322_RxFlagUnCorErrLogB_0_pb::_unused_0
pseudo_bit_t _unused_0[43]
Definition qib_7322_regs.h:3510

QIB_7322_RxFlagUnCorErrLogB_0_pb::RxFlagUnCorErrCheckBit_7_0
pseudo_bit_t RxFlagUnCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:3508

QIB_7322_RxFlagUnCorErrLogB_0
Definition qib_7322_regs.h:3512

QIB_7322_RxFlagUnCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogB_0_pb)

QIB_7322_RxFlagUnCorErrLogB_1_pb
Definition qib_7322_regs.h:4837

QIB_7322_RxFlagUnCorErrLogB_1_pb::_unused_0
pseudo_bit_t _unused_0[43]
Definition qib_7322_regs.h:4840

QIB_7322_RxFlagUnCorErrLogB_1_pb::RxFlagUnCorErrAddr_12_0
pseudo_bit_t RxFlagUnCorErrAddr_12_0[13]
Definition qib_7322_regs.h:4839

QIB_7322_RxFlagUnCorErrLogB_1_pb::RxFlagUnCorErrCheckBit_7_0
pseudo_bit_t RxFlagUnCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:4838

QIB_7322_RxFlagUnCorErrLogB_1
Definition qib_7322_regs.h:4842

QIB_7322_RxFlagUnCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxFlagUnCorErrLogB_1_pb)

QIB_7322_RxHdrFifoCorErrLogA_0_pb
Definition qib_7322_regs.h:3728

QIB_7322_RxHdrFifoCorErrLogA_0_pb::RxHdrFifoCorErrData_63_0
pseudo_bit_t RxHdrFifoCorErrData_63_0[64]
Definition qib_7322_regs.h:3729

QIB_7322_RxHdrFifoCorErrLogA_0
Definition qib_7322_regs.h:3731

QIB_7322_RxHdrFifoCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogA_0_pb)

QIB_7322_RxHdrFifoCorErrLogA_1_pb
Definition qib_7322_regs.h:5058

QIB_7322_RxHdrFifoCorErrLogA_1_pb::RxHdrFifoCorErrData_63_0
pseudo_bit_t RxHdrFifoCorErrData_63_0[64]
Definition qib_7322_regs.h:5059

QIB_7322_RxHdrFifoCorErrLogA_1
Definition qib_7322_regs.h:5061

QIB_7322_RxHdrFifoCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogA_1_pb)

QIB_7322_RxHdrFifoCorErrLogB_0_pb
Definition qib_7322_regs.h:3737

QIB_7322_RxHdrFifoCorErrLogB_0_pb::RxHdrFifoCorErrData_127_64
pseudo_bit_t RxHdrFifoCorErrData_127_64[64]
Definition qib_7322_regs.h:3738

QIB_7322_RxHdrFifoCorErrLogB_0
Definition qib_7322_regs.h:3740

QIB_7322_RxHdrFifoCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogB_0_pb)

QIB_7322_RxHdrFifoCorErrLogB_1_pb
Definition qib_7322_regs.h:5067

QIB_7322_RxHdrFifoCorErrLogB_1_pb::RxHdrFifoCorErrData_127_64
pseudo_bit_t RxHdrFifoCorErrData_127_64[64]
Definition qib_7322_regs.h:5068

QIB_7322_RxHdrFifoCorErrLogB_1
Definition qib_7322_regs.h:5070

QIB_7322_RxHdrFifoCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogB_1_pb)

QIB_7322_RxHdrFifoCorErrLogC_0_pb
Definition qib_7322_regs.h:3746

QIB_7322_RxHdrFifoCorErrLogC_0_pb::RxHdrFifoCorErrCheckBit_15_0
pseudo_bit_t RxHdrFifoCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:3747

QIB_7322_RxHdrFifoCorErrLogC_0_pb::RxHdrFifoCorErrAddr_10_0
pseudo_bit_t RxHdrFifoCorErrAddr_10_0[11]
Definition qib_7322_regs.h:3748

QIB_7322_RxHdrFifoCorErrLogC_0_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:3749

QIB_7322_RxHdrFifoCorErrLogC_0
Definition qib_7322_regs.h:3751

QIB_7322_RxHdrFifoCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogC_0_pb)

QIB_7322_RxHdrFifoCorErrLogC_1_pb
Definition qib_7322_regs.h:5076

QIB_7322_RxHdrFifoCorErrLogC_1_pb::RxHdrFifoCorErrAddr_10_0
pseudo_bit_t RxHdrFifoCorErrAddr_10_0[11]
Definition qib_7322_regs.h:5078

QIB_7322_RxHdrFifoCorErrLogC_1_pb::RxHdrFifoCorErrCheckBit_15_0
pseudo_bit_t RxHdrFifoCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:5077

QIB_7322_RxHdrFifoCorErrLogC_1_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:5079

QIB_7322_RxHdrFifoCorErrLogC_1
Definition qib_7322_regs.h:5081

QIB_7322_RxHdrFifoCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoCorErrLogC_1_pb)

QIB_7322_RxHdrFifoUnCorErrLogA_0_pb
Definition qib_7322_regs.h:3539

QIB_7322_RxHdrFifoUnCorErrLogA_0_pb::RxHdrFifoUnCorErrData_63_0
pseudo_bit_t RxHdrFifoUnCorErrData_63_0[64]
Definition qib_7322_regs.h:3540

QIB_7322_RxHdrFifoUnCorErrLogA_0
Definition qib_7322_regs.h:3542

QIB_7322_RxHdrFifoUnCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogA_0_pb)

QIB_7322_RxHdrFifoUnCorErrLogA_1_pb
Definition qib_7322_regs.h:4869

QIB_7322_RxHdrFifoUnCorErrLogA_1_pb::RxHdrFifoUnCorErrData_63_0
pseudo_bit_t RxHdrFifoUnCorErrData_63_0[64]
Definition qib_7322_regs.h:4870

QIB_7322_RxHdrFifoUnCorErrLogA_1
Definition qib_7322_regs.h:4872

QIB_7322_RxHdrFifoUnCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogA_1_pb)

QIB_7322_RxHdrFifoUnCorErrLogB_0_pb
Definition qib_7322_regs.h:3548

QIB_7322_RxHdrFifoUnCorErrLogB_0_pb::RxHdrFifoUnCorErrData_127_64
pseudo_bit_t RxHdrFifoUnCorErrData_127_64[64]
Definition qib_7322_regs.h:3549

QIB_7322_RxHdrFifoUnCorErrLogB_0
Definition qib_7322_regs.h:3551

QIB_7322_RxHdrFifoUnCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogB_0_pb)

QIB_7322_RxHdrFifoUnCorErrLogB_1_pb
Definition qib_7322_regs.h:4878

QIB_7322_RxHdrFifoUnCorErrLogB_1_pb::RxHdrFifoUnCorErrData_127_64
pseudo_bit_t RxHdrFifoUnCorErrData_127_64[64]
Definition qib_7322_regs.h:4879

QIB_7322_RxHdrFifoUnCorErrLogB_1
Definition qib_7322_regs.h:4881

QIB_7322_RxHdrFifoUnCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogB_1_pb)

QIB_7322_RxHdrFifoUnCorErrLogC_0_pb
Definition qib_7322_regs.h:3557

QIB_7322_RxHdrFifoUnCorErrLogC_0_pb::RxHdrFifoUnCorErrCheckBit_15_0
pseudo_bit_t RxHdrFifoUnCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:3558

QIB_7322_RxHdrFifoUnCorErrLogC_0_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:3560

QIB_7322_RxHdrFifoUnCorErrLogC_0_pb::RxHdrFifoUnCorErrAddr_10_0
pseudo_bit_t RxHdrFifoUnCorErrAddr_10_0[11]
Definition qib_7322_regs.h:3559

QIB_7322_RxHdrFifoUnCorErrLogC_0
Definition qib_7322_regs.h:3562

QIB_7322_RxHdrFifoUnCorErrLogC_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogC_0_pb)

QIB_7322_RxHdrFifoUnCorErrLogC_1_pb
Definition qib_7322_regs.h:4887

QIB_7322_RxHdrFifoUnCorErrLogC_1_pb::RxHdrFifoUnCorErrAddr_10_0
pseudo_bit_t RxHdrFifoUnCorErrAddr_10_0[11]
Definition qib_7322_regs.h:4889

QIB_7322_RxHdrFifoUnCorErrLogC_1_pb::RxHdrFifoUnCorErrCheckBit_15_0
pseudo_bit_t RxHdrFifoUnCorErrCheckBit_15_0[16]
Definition qib_7322_regs.h:4888

QIB_7322_RxHdrFifoUnCorErrLogC_1_pb::_unused_0
pseudo_bit_t _unused_0[37]
Definition qib_7322_regs.h:4890

QIB_7322_RxHdrFifoUnCorErrLogC_1
Definition qib_7322_regs.h:4892

QIB_7322_RxHdrFifoUnCorErrLogC_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxHdrFifoUnCorErrLogC_1_pb)

QIB_7322_RxLkupiqCorErrLogA_0_pb
Definition qib_7322_regs.h:3707

QIB_7322_RxLkupiqCorErrLogA_0_pb::_unused_0
pseudo_bit_t _unused_0[10]
Definition qib_7322_regs.h:3710

QIB_7322_RxLkupiqCorErrLogA_0_pb::RxLkupiqCorErrData_45_0
pseudo_bit_t RxLkupiqCorErrData_45_0[46]
Definition qib_7322_regs.h:3708

QIB_7322_RxLkupiqCorErrLogA_0_pb::RxLkupiqCorErrCheckBit_7_0
pseudo_bit_t RxLkupiqCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:3709

QIB_7322_RxLkupiqCorErrLogA_0
Definition qib_7322_regs.h:3712

QIB_7322_RxLkupiqCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogA_0_pb)

QIB_7322_RxLkupiqCorErrLogA_1_pb
Definition qib_7322_regs.h:5037

QIB_7322_RxLkupiqCorErrLogA_1_pb::_unused_0
pseudo_bit_t _unused_0[10]
Definition qib_7322_regs.h:5040

QIB_7322_RxLkupiqCorErrLogA_1_pb::RxLkupiqCorErrCheckBit_7_0
pseudo_bit_t RxLkupiqCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:5039

QIB_7322_RxLkupiqCorErrLogA_1_pb::RxLkupiqCorErrData_45_0
pseudo_bit_t RxLkupiqCorErrData_45_0[46]
Definition qib_7322_regs.h:5038

QIB_7322_RxLkupiqCorErrLogA_1
Definition qib_7322_regs.h:5042

QIB_7322_RxLkupiqCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogA_1_pb)

QIB_7322_RxLkupiqCorErrLogB_0_pb
Definition qib_7322_regs.h:3718

QIB_7322_RxLkupiqCorErrLogB_0_pb::RxLkupiqCorErrAddr_12_0
pseudo_bit_t RxLkupiqCorErrAddr_12_0[13]
Definition qib_7322_regs.h:3719

QIB_7322_RxLkupiqCorErrLogB_0_pb::_unused_0
pseudo_bit_t _unused_0[51]
Definition qib_7322_regs.h:3720

QIB_7322_RxLkupiqCorErrLogB_0
Definition qib_7322_regs.h:3722

QIB_7322_RxLkupiqCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogB_0_pb)

QIB_7322_RxLkupiqCorErrLogB_1_pb
Definition qib_7322_regs.h:5048

QIB_7322_RxLkupiqCorErrLogB_1_pb::_unused_0
pseudo_bit_t _unused_0[51]
Definition qib_7322_regs.h:5050

QIB_7322_RxLkupiqCorErrLogB_1_pb::RxLkupiqCorErrAddr_12_0
pseudo_bit_t RxLkupiqCorErrAddr_12_0[13]
Definition qib_7322_regs.h:5049

QIB_7322_RxLkupiqCorErrLogB_1
Definition qib_7322_regs.h:5052

QIB_7322_RxLkupiqCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqCorErrLogB_1_pb)

QIB_7322_RxLkupiqUnCorErrLogA_0_pb
Definition qib_7322_regs.h:3518

QIB_7322_RxLkupiqUnCorErrLogA_0_pb::_unused_0
pseudo_bit_t _unused_0[10]
Definition qib_7322_regs.h:3521

QIB_7322_RxLkupiqUnCorErrLogA_0_pb::RxLkupiqUnCorErrCheckBit_7_0
pseudo_bit_t RxLkupiqUnCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:3520

QIB_7322_RxLkupiqUnCorErrLogA_0_pb::RxLkupiqUnCorErrData_45_0
pseudo_bit_t RxLkupiqUnCorErrData_45_0[46]
Definition qib_7322_regs.h:3519

QIB_7322_RxLkupiqUnCorErrLogA_0
Definition qib_7322_regs.h:3523

QIB_7322_RxLkupiqUnCorErrLogA_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogA_0_pb)

QIB_7322_RxLkupiqUnCorErrLogA_1_pb
Definition qib_7322_regs.h:4848

QIB_7322_RxLkupiqUnCorErrLogA_1_pb::_unused_0
pseudo_bit_t _unused_0[10]
Definition qib_7322_regs.h:4851

QIB_7322_RxLkupiqUnCorErrLogA_1_pb::RxLkupiqUnCorErrData_45_0
pseudo_bit_t RxLkupiqUnCorErrData_45_0[46]
Definition qib_7322_regs.h:4849

QIB_7322_RxLkupiqUnCorErrLogA_1_pb::RxLkupiqUnCorErrCheckBit_7_0
pseudo_bit_t RxLkupiqUnCorErrCheckBit_7_0[8]
Definition qib_7322_regs.h:4850

QIB_7322_RxLkupiqUnCorErrLogA_1
Definition qib_7322_regs.h:4853

QIB_7322_RxLkupiqUnCorErrLogA_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogA_1_pb)

QIB_7322_RxLkupiqUnCorErrLogB_0_pb
Definition qib_7322_regs.h:3529

QIB_7322_RxLkupiqUnCorErrLogB_0_pb::RxLkupiqUnCorErrAddr_12_0
pseudo_bit_t RxLkupiqUnCorErrAddr_12_0[13]
Definition qib_7322_regs.h:3530

QIB_7322_RxLkupiqUnCorErrLogB_0_pb::_unused_0
pseudo_bit_t _unused_0[51]
Definition qib_7322_regs.h:3531

QIB_7322_RxLkupiqUnCorErrLogB_0
Definition qib_7322_regs.h:3533

QIB_7322_RxLkupiqUnCorErrLogB_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogB_0_pb)

QIB_7322_RxLkupiqUnCorErrLogB_1_pb
Definition qib_7322_regs.h:4859

QIB_7322_RxLkupiqUnCorErrLogB_1_pb::_unused_0
pseudo_bit_t _unused_0[51]
Definition qib_7322_regs.h:4861

QIB_7322_RxLkupiqUnCorErrLogB_1_pb::RxLkupiqUnCorErrAddr_12_0
pseudo_bit_t RxLkupiqUnCorErrAddr_12_0[13]
Definition qib_7322_regs.h:4860

QIB_7322_RxLkupiqUnCorErrLogB_1
Definition qib_7322_regs.h:4863

QIB_7322_RxLkupiqUnCorErrLogB_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxLkupiqUnCorErrLogB_1_pb)

QIB_7322_RxTIDArrayCorErrLogA_pb
Definition qib_7322_regs.h:2395

QIB_7322_RxTIDArrayCorErrLogA_pb::RxTIDArrayCorErrData_39_0
pseudo_bit_t RxTIDArrayCorErrData_39_0[40]
Definition qib_7322_regs.h:2396

QIB_7322_RxTIDArrayCorErrLogA_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:2398

QIB_7322_RxTIDArrayCorErrLogA_pb::RxTIDArrayCorErrCheckBit_11_0
pseudo_bit_t RxTIDArrayCorErrCheckBit_11_0[12]
Definition qib_7322_regs.h:2397

QIB_7322_RxTIDArrayCorErrLogA
Definition qib_7322_regs.h:2400

QIB_7322_RxTIDArrayCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayCorErrLogA_pb)

QIB_7322_RxTIDArrayCorErrLogB_pb
Definition qib_7322_regs.h:2406

QIB_7322_RxTIDArrayCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[47]
Definition qib_7322_regs.h:2408

QIB_7322_RxTIDArrayCorErrLogB_pb::RxTIDArrayCorErrAddr_16_0
pseudo_bit_t RxTIDArrayCorErrAddr_16_0[17]
Definition qib_7322_regs.h:2407

QIB_7322_RxTIDArrayCorErrLogB
Definition qib_7322_regs.h:2410

QIB_7322_RxTIDArrayCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayCorErrLogB_pb)

QIB_7322_RxTIDArrayUnCorErrLogA_pb
Definition qib_7322_regs.h:2122

QIB_7322_RxTIDArrayUnCorErrLogA_pb::RxTIDArrayUnCorErrCheckBit_11_0
pseudo_bit_t RxTIDArrayUnCorErrCheckBit_11_0[12]
Definition qib_7322_regs.h:2124

QIB_7322_RxTIDArrayUnCorErrLogA_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:2125

QIB_7322_RxTIDArrayUnCorErrLogA_pb::RxTIDArrayUnCorErrData_39_0
pseudo_bit_t RxTIDArrayUnCorErrData_39_0[40]
Definition qib_7322_regs.h:2123

QIB_7322_RxTIDArrayUnCorErrLogA
Definition qib_7322_regs.h:2127

QIB_7322_RxTIDArrayUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayUnCorErrLogA_pb)

QIB_7322_RxTIDArrayUnCorErrLogB_pb
Definition qib_7322_regs.h:2133

QIB_7322_RxTIDArrayUnCorErrLogB_pb::_unused_0
pseudo_bit_t _unused_0[47]
Definition qib_7322_regs.h:2135

QIB_7322_RxTIDArrayUnCorErrLogB_pb::RxTIDArrayUnCorErrAddr_16_0
pseudo_bit_t RxTIDArrayUnCorErrAddr_16_0[17]
Definition qib_7322_regs.h:2134

QIB_7322_RxTIDArrayUnCorErrLogB
Definition qib_7322_regs.h:2137

QIB_7322_RxTIDArrayUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_RxTIDArrayUnCorErrLogB_pb)

QIB_7322_SBufExtraArrayCorErrLogA_pb
Definition qib_7322_regs.h:2467

QIB_7322_SBufExtraArrayCorErrLogA_pb::SBufExtraArrayCorErrData_63_0
pseudo_bit_t SBufExtraArrayCorErrData_63_0[64]
Definition qib_7322_regs.h:2468

QIB_7322_SBufExtraArrayCorErrLogA
Definition qib_7322_regs.h:2470

QIB_7322_SBufExtraArrayCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufExtraArrayCorErrLogA_pb)

QIB_7322_SBufExtraArrayCorErrLogB_pb
Definition qib_7322_regs.h:2476

QIB_7322_SBufExtraArrayCorErrLogB_pb::SBufExtraArrayCorErrData_127_64
pseudo_bit_t SBufExtraArrayCorErrData_127_64[64]
Definition qib_7322_regs.h:2477

QIB_7322_SBufExtraArrayCorErrLogB
Definition qib_7322_regs.h:2479

QIB_7322_SBufExtraArrayCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufExtraArrayCorErrLogB_pb)

QIB_7322_SBufExtraArrayCorErrLogC_pb
Definition qib_7322_regs.h:2485

QIB_7322_SBufExtraArrayCorErrLogC_pb::SBufExtraArrayCorErrCheckBit_27_0
pseudo_bit_t SBufExtraArrayCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:2486

QIB_7322_SBufExtraArrayCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[17]
Definition qib_7322_regs.h:2488

QIB_7322_SBufExtraArrayCorErrLogC_pb::SBufExtraArrayCorErrAdd_3_0
pseudo_bit_t SBufExtraArrayCorErrAdd_3_0[4]
Definition qib_7322_regs.h:2489

QIB_7322_SBufExtraArrayCorErrLogC_pb::SBufExtraArrayCorErrAddr_14_0
pseudo_bit_t SBufExtraArrayCorErrAddr_14_0[15]
Definition qib_7322_regs.h:2487

QIB_7322_SBufExtraArrayCorErrLogC
Definition qib_7322_regs.h:2491

QIB_7322_SBufExtraArrayCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufExtraArrayCorErrLogC_pb)

QIB_7322_SBufExtraArrayUnCorErrLogA_pb
Definition qib_7322_regs.h:2194

QIB_7322_SBufExtraArrayUnCorErrLogA_pb::SBufExtraArrayUnCorErrData_63_0
pseudo_bit_t SBufExtraArrayUnCorErrData_63_0[64]
Definition qib_7322_regs.h:2195

QIB_7322_SBufExtraArrayUnCorErrLogA
Definition qib_7322_regs.h:2197

QIB_7322_SBufExtraArrayUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufExtraArrayUnCorErrLogA_pb)

QIB_7322_SBufExtraArrayUnCorErrLogB_pb
Definition qib_7322_regs.h:2203

QIB_7322_SBufExtraArrayUnCorErrLogB_pb::SBufExtraArrayUnCorErrData_127_64
pseudo_bit_t SBufExtraArrayUnCorErrData_127_64[64]
Definition qib_7322_regs.h:2204

QIB_7322_SBufExtraArrayUnCorErrLogB
Definition qib_7322_regs.h:2206

QIB_7322_SBufExtraArrayUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufExtraArrayUnCorErrLogB_pb)

QIB_7322_SBufExtraArrayUnCorErrLogC_pb
Definition qib_7322_regs.h:2212

QIB_7322_SBufExtraArrayUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[17]
Definition qib_7322_regs.h:2215

QIB_7322_SBufExtraArrayUnCorErrLogC_pb::SBufExtraArrayUnCorErrCheckBit_27_0
pseudo_bit_t SBufExtraArrayUnCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:2213

QIB_7322_SBufExtraArrayUnCorErrLogC_pb::SBufExtraArrayUnCorErrAddr_14_0
pseudo_bit_t SBufExtraArrayUnCorErrAddr_14_0[15]
Definition qib_7322_regs.h:2214

QIB_7322_SBufExtraArrayUnCorErrLogC_pb::SBufExtraArrayUnCorErrAdd_3_0
pseudo_bit_t SBufExtraArrayUnCorErrAdd_3_0[4]
Definition qib_7322_regs.h:2216

QIB_7322_SBufExtraArrayUnCorErrLogC
Definition qib_7322_regs.h:2218

QIB_7322_SBufExtraArrayUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufExtraArrayUnCorErrLogC_pb)

QIB_7322_SBufMainArrayCorErrLogA_pb
Definition qib_7322_regs.h:2437

QIB_7322_SBufMainArrayCorErrLogA_pb::SBufMainArrayCorErrData_63_0
pseudo_bit_t SBufMainArrayCorErrData_63_0[64]
Definition qib_7322_regs.h:2438

QIB_7322_SBufMainArrayCorErrLogA
Definition qib_7322_regs.h:2440

QIB_7322_SBufMainArrayCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayCorErrLogA_pb)

QIB_7322_SBufMainArrayCorErrLogB_pb
Definition qib_7322_regs.h:2446

QIB_7322_SBufMainArrayCorErrLogB_pb::SBufMainArrayCorErrData_127_64
pseudo_bit_t SBufMainArrayCorErrData_127_64[64]
Definition qib_7322_regs.h:2447

QIB_7322_SBufMainArrayCorErrLogB
Definition qib_7322_regs.h:2449

QIB_7322_SBufMainArrayCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayCorErrLogB_pb)

QIB_7322_SBufMainArrayCorErrLogC_pb
Definition qib_7322_regs.h:2455

QIB_7322_SBufMainArrayCorErrLogC_pb::SBufMainArrayCorErrDword_3_0
pseudo_bit_t SBufMainArrayCorErrDword_3_0[4]
Definition qib_7322_regs.h:2459

QIB_7322_SBufMainArrayCorErrLogC_pb::SBufMainArrayCorErrAddr_18_0
pseudo_bit_t SBufMainArrayCorErrAddr_18_0[19]
Definition qib_7322_regs.h:2457

QIB_7322_SBufMainArrayCorErrLogC_pb::SBufMainArrayCorErrCheckBit_27_0
pseudo_bit_t SBufMainArrayCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:2456

QIB_7322_SBufMainArrayCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[13]
Definition qib_7322_regs.h:2458

QIB_7322_SBufMainArrayCorErrLogC
Definition qib_7322_regs.h:2461

QIB_7322_SBufMainArrayCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayCorErrLogC_pb)

QIB_7322_SBufMainArrayUnCorErrLogA_pb
Definition qib_7322_regs.h:2164

QIB_7322_SBufMainArrayUnCorErrLogA_pb::SBufMainArrayUnCorErrData_63_0
pseudo_bit_t SBufMainArrayUnCorErrData_63_0[64]
Definition qib_7322_regs.h:2165

QIB_7322_SBufMainArrayUnCorErrLogA
Definition qib_7322_regs.h:2167

QIB_7322_SBufMainArrayUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayUnCorErrLogA_pb)

QIB_7322_SBufMainArrayUnCorErrLogB_pb
Definition qib_7322_regs.h:2173

QIB_7322_SBufMainArrayUnCorErrLogB_pb::SBufMainArrayUnCorErrData_127_64
pseudo_bit_t SBufMainArrayUnCorErrData_127_64[64]
Definition qib_7322_regs.h:2174

QIB_7322_SBufMainArrayUnCorErrLogB
Definition qib_7322_regs.h:2176

QIB_7322_SBufMainArrayUnCorErrLogB::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayUnCorErrLogB_pb)

QIB_7322_SBufMainArrayUnCorErrLogC_pb
Definition qib_7322_regs.h:2182

QIB_7322_SBufMainArrayUnCorErrLogC_pb::SBufMainArrayUnCorErrDword_3_0
pseudo_bit_t SBufMainArrayUnCorErrDword_3_0[4]
Definition qib_7322_regs.h:2186

QIB_7322_SBufMainArrayUnCorErrLogC_pb::SBufMainArrayUnCorErrCheckBit_27_0
pseudo_bit_t SBufMainArrayUnCorErrCheckBit_27_0[28]
Definition qib_7322_regs.h:2183

QIB_7322_SBufMainArrayUnCorErrLogC_pb::_unused_0
pseudo_bit_t _unused_0[13]
Definition qib_7322_regs.h:2185

QIB_7322_SBufMainArrayUnCorErrLogC_pb::SBufMainArrayUnCorErrAddr_18_0
pseudo_bit_t SBufMainArrayUnCorErrAddr_18_0[19]
Definition qib_7322_regs.h:2184

QIB_7322_SBufMainArrayUnCorErrLogC
Definition qib_7322_regs.h:2188

QIB_7322_SBufMainArrayUnCorErrLogC::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufMainArrayUnCorErrLogC_pb)

QIB_7322_SBufVL15ArrayCorErrLogA_pb
Definition qib_7322_regs.h:2509

QIB_7322_SBufVL15ArrayCorErrLogA_pb::SBufVL15ArrayCorErrData_63_0
pseudo_bit_t SBufVL15ArrayCorErrData_63_0[64]
Definition qib_7322_regs.h:2510

QIB_7322_SBufVL15ArrayCorErrLogA
Definition qib_7322_regs.h:2512

QIB_7322_SBufVL15ArrayCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufVL15ArrayCorErrLogA_pb)

QIB_7322_SBufVL15ArrayUnCorErrLogA_pb
Definition qib_7322_regs.h:2236

QIB_7322_SBufVL15ArrayUnCorErrLogA_pb::SBufVL15ArrayUnCorErrData_63_0
pseudo_bit_t SBufVL15ArrayUnCorErrData_63_0[64]
Definition qib_7322_regs.h:2237

QIB_7322_SBufVL15ArrayUnCorErrLogA
Definition qib_7322_regs.h:2239

QIB_7322_SBufVL15ArrayUnCorErrLogA::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SBufVL15ArrayUnCorErrLogA_pb)

QIB_7322_SPC_JTAG_ACCESS_REG_pb
Definition qib_7322_regs.h:965

QIB_7322_SPC_JTAG_ACCESS_REG_pb::bist_en
pseudo_bit_t bist_en[5]
Definition qib_7322_regs.h:970

QIB_7322_SPC_JTAG_ACCESS_REG_pb::_unused_0
pseudo_bit_t _unused_0[53]
Definition qib_7322_regs.h:972

QIB_7322_SPC_JTAG_ACCESS_REG_pb::tdo
pseudo_bit_t tdo[1]
Definition qib_7322_regs.h:967

QIB_7322_SPC_JTAG_ACCESS_REG_pb::tdi
pseudo_bit_t tdi[1]
Definition qib_7322_regs.h:968

QIB_7322_SPC_JTAG_ACCESS_REG_pb::rdy
pseudo_bit_t rdy[1]
Definition qib_7322_regs.h:966

QIB_7322_SPC_JTAG_ACCESS_REG_pb::opcode
pseudo_bit_t opcode[2]
Definition qib_7322_regs.h:969

QIB_7322_SPC_JTAG_ACCESS_REG_pb::SPC_JTAG_ACCESS_EN
pseudo_bit_t SPC_JTAG_ACCESS_EN[1]
Definition qib_7322_regs.h:971

QIB_7322_SPC_JTAG_ACCESS_REG
Definition qib_7322_regs.h:974

QIB_7322_SPC_JTAG_ACCESS_REG::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SPC_JTAG_ACCESS_REG_pb)

QIB_7322_SendBufAvail0_pb
Definition qib_7322_regs.h:5192

QIB_7322_SendBufAvail0_pb::SendBuf_31_0
pseudo_bit_t SendBuf_31_0[64]
Definition qib_7322_regs.h:5193

QIB_7322_SendBufAvail0
Definition qib_7322_regs.h:5195

QIB_7322_SendBufAvail0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufAvail0_pb)

QIB_7322_SendBufAvailAddr_pb
Definition qib_7322_regs.h:782

QIB_7322_SendBufAvailAddr_pb::_unused_0
pseudo_bit_t _unused_0[6]
Definition qib_7322_regs.h:783

QIB_7322_SendBufAvailAddr_pb::_unused_1
pseudo_bit_t _unused_1[24]
Definition qib_7322_regs.h:785

QIB_7322_SendBufAvailAddr_pb::SendBufAvailAddr
pseudo_bit_t SendBufAvailAddr[34]
Definition qib_7322_regs.h:784

QIB_7322_SendBufAvailAddr
Definition qib_7322_regs.h:787

QIB_7322_SendBufAvailAddr::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufAvailAddr_pb)

QIB_7322_SendBufBase_pb
Definition qib_7322_regs.h:746

QIB_7322_SendBufBase_pb::BaseAddr_SmallPIO
pseudo_bit_t BaseAddr_SmallPIO[21]
Definition qib_7322_regs.h:747

QIB_7322_SendBufBase_pb::_unused_1
pseudo_bit_t _unused_1[11]
Definition qib_7322_regs.h:750

QIB_7322_SendBufBase_pb::BaseAddr_LargePIO
pseudo_bit_t BaseAddr_LargePIO[21]
Definition qib_7322_regs.h:749

QIB_7322_SendBufBase_pb::_unused_0
pseudo_bit_t _unused_0[11]
Definition qib_7322_regs.h:748

QIB_7322_SendBufBase
Definition qib_7322_regs.h:752

QIB_7322_SendBufBase::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufBase_pb)

QIB_7322_SendBufCnt_pb
Definition qib_7322_regs.h:770

QIB_7322_SendBufCnt_pb::_unused_0
pseudo_bit_t _unused_0[23]
Definition qib_7322_regs.h:772

QIB_7322_SendBufCnt_pb::Num_SmallBuffers
pseudo_bit_t Num_SmallBuffers[9]
Definition qib_7322_regs.h:771

QIB_7322_SendBufCnt_pb::Num_LargeBuffers
pseudo_bit_t Num_LargeBuffers[6]
Definition qib_7322_regs.h:773

QIB_7322_SendBufCnt_pb::_unused_1
pseudo_bit_t _unused_1[26]
Definition qib_7322_regs.h:774

QIB_7322_SendBufCnt
Definition qib_7322_regs.h:776

QIB_7322_SendBufCnt::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufCnt_pb)

QIB_7322_SendBufErr0_pb
Definition qib_7322_regs.h:799

QIB_7322_SendBufErr0_pb::SendBufErr_63_0
pseudo_bit_t SendBufErr_63_0[64]
Definition qib_7322_regs.h:800

QIB_7322_SendBufErr0
Definition qib_7322_regs.h:802

QIB_7322_SendBufErr0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufErr0_pb)

QIB_7322_SendBufSize_pb
Definition qib_7322_regs.h:758

QIB_7322_SendBufSize_pb::Size_SmallPIO
pseudo_bit_t Size_SmallPIO[12]
Definition qib_7322_regs.h:759

QIB_7322_SendBufSize_pb::_unused_0
pseudo_bit_t _unused_0[20]
Definition qib_7322_regs.h:760

QIB_7322_SendBufSize_pb::Size_LargePIO
pseudo_bit_t Size_LargePIO[13]
Definition qib_7322_regs.h:761

QIB_7322_SendBufSize_pb::_unused_1
pseudo_bit_t _unused_1[19]
Definition qib_7322_regs.h:762

QIB_7322_SendBufSize
Definition qib_7322_regs.h:764

QIB_7322_SendBufSize::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendBufSize_pb)

QIB_7322_SendCheckControl_0_pb
Definition qib_7322_regs.h:3065

QIB_7322_SendCheckControl_0_pb::_unused_0
pseudo_bit_t _unused_0[59]
Definition qib_7322_regs.h:3071

QIB_7322_SendCheckControl_0_pb::SLID_En
pseudo_bit_t SLID_En[1]
Definition qib_7322_regs.h:3068

QIB_7322_SendCheckControl_0_pb::PKey_En
pseudo_bit_t PKey_En[1]
Definition qib_7322_regs.h:3070

QIB_7322_SendCheckControl_0_pb::RawIPV6_En
pseudo_bit_t RawIPV6_En[1]
Definition qib_7322_regs.h:3067

QIB_7322_SendCheckControl_0_pb::PacketTooSmall_En
pseudo_bit_t PacketTooSmall_En[1]
Definition qib_7322_regs.h:3066

QIB_7322_SendCheckControl_0_pb::BTHQP_En
pseudo_bit_t BTHQP_En[1]
Definition qib_7322_regs.h:3069

QIB_7322_SendCheckControl_0
Definition qib_7322_regs.h:3073

QIB_7322_SendCheckControl_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCheckControl_0_pb)

QIB_7322_SendCheckControl_1_pb
Definition qib_7322_regs.h:4398

QIB_7322_SendCheckControl_1_pb::PacketTooSmall_En
pseudo_bit_t PacketTooSmall_En[1]
Definition qib_7322_regs.h:4399

QIB_7322_SendCheckControl_1_pb::PKey_En
pseudo_bit_t PKey_En[1]
Definition qib_7322_regs.h:4403

QIB_7322_SendCheckControl_1_pb::BTHQP_En
pseudo_bit_t BTHQP_En[1]
Definition qib_7322_regs.h:4402

QIB_7322_SendCheckControl_1_pb::RawIPV6_En
pseudo_bit_t RawIPV6_En[1]
Definition qib_7322_regs.h:4400

QIB_7322_SendCheckControl_1_pb::_unused_0
pseudo_bit_t _unused_0[59]
Definition qib_7322_regs.h:4404

QIB_7322_SendCheckControl_1_pb::SLID_En
pseudo_bit_t SLID_En[1]
Definition qib_7322_regs.h:4401

QIB_7322_SendCheckControl_1
Definition qib_7322_regs.h:4406

QIB_7322_SendCheckControl_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCheckControl_1_pb)

QIB_7322_SendCheckMask0_pb
Definition qib_7322_regs.h:999

QIB_7322_SendCheckMask0_pb::SendCheckMask_63_32
pseudo_bit_t SendCheckMask_63_32[64]
Definition qib_7322_regs.h:1000

QIB_7322_SendCheckMask0
Definition qib_7322_regs.h:1002

QIB_7322_SendCheckMask0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCheckMask0_pb)

QIB_7322_SendCtrl_0_pb
Definition qib_7322_regs.h:2899

QIB_7322_SendCtrl_0_pb::TxeBypassIbc
pseudo_bit_t TxeBypassIbc[1]
Definition qib_7322_regs.h:2901

QIB_7322_SendCtrl_0_pb::SDmaSingleDescriptor
pseudo_bit_t SDmaSingleDescriptor[1]
Definition qib_7322_regs.h:2908

QIB_7322_SendCtrl_0_pb::ForceCreditUpToDate
pseudo_bit_t ForceCreditUpToDate[1]
Definition qib_7322_regs.h:2905

QIB_7322_SendCtrl_0_pb::_unused_1
pseudo_bit_t _unused_1[3]
Definition qib_7322_regs.h:2904

QIB_7322_SendCtrl_0_pb::SendEnable
pseudo_bit_t SendEnable[1]
Definition qib_7322_regs.h:2903

QIB_7322_SendCtrl_0_pb::IBVLArbiterEn
pseudo_bit_t IBVLArbiterEn[1]
Definition qib_7322_regs.h:2913

QIB_7322_SendCtrl_0_pb::_unused_2
pseudo_bit_t _unused_2[48]
Definition qib_7322_regs.h:2914

QIB_7322_SendCtrl_0_pb::SDmaEnable
pseudo_bit_t SDmaEnable[1]
Definition qib_7322_regs.h:2909

QIB_7322_SendCtrl_0_pb::TxeDrainRmFifo
pseudo_bit_t TxeDrainRmFifo[1]
Definition qib_7322_regs.h:2912

QIB_7322_SendCtrl_0_pb::SDmaCleanup
pseudo_bit_t SDmaCleanup[1]
Definition qib_7322_regs.h:2906

QIB_7322_SendCtrl_0_pb::SDmaIntEnable
pseudo_bit_t SDmaIntEnable[1]
Definition qib_7322_regs.h:2907

QIB_7322_SendCtrl_0_pb::SDmaHalt
pseudo_bit_t SDmaHalt[1]
Definition qib_7322_regs.h:2910

QIB_7322_SendCtrl_0_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:2902

QIB_7322_SendCtrl_0_pb::TxeAbortIbc
pseudo_bit_t TxeAbortIbc[1]
Definition qib_7322_regs.h:2900

QIB_7322_SendCtrl_0_pb::TxeDrainLaFifo
pseudo_bit_t TxeDrainLaFifo[1]
Definition qib_7322_regs.h:2911

QIB_7322_SendCtrl_0
Definition qib_7322_regs.h:2916

QIB_7322_SendCtrl_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCtrl_0_pb)

QIB_7322_SendCtrl_1_pb
Definition qib_7322_regs.h:4232

QIB_7322_SendCtrl_1_pb::SDmaEnable
pseudo_bit_t SDmaEnable[1]
Definition qib_7322_regs.h:4242

QIB_7322_SendCtrl_1_pb::TxeDrainLaFifo
pseudo_bit_t TxeDrainLaFifo[1]
Definition qib_7322_regs.h:4244

QIB_7322_SendCtrl_1_pb::SDmaIntEnable
pseudo_bit_t SDmaIntEnable[1]
Definition qib_7322_regs.h:4240

QIB_7322_SendCtrl_1_pb::SDmaSingleDescriptor
pseudo_bit_t SDmaSingleDescriptor[1]
Definition qib_7322_regs.h:4241

QIB_7322_SendCtrl_1_pb::TxeAbortIbc
pseudo_bit_t TxeAbortIbc[1]
Definition qib_7322_regs.h:4233

QIB_7322_SendCtrl_1_pb::_unused_1
pseudo_bit_t _unused_1[3]
Definition qib_7322_regs.h:4237

QIB_7322_SendCtrl_1_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:4235

QIB_7322_SendCtrl_1_pb::SendEnable
pseudo_bit_t SendEnable[1]
Definition qib_7322_regs.h:4236

QIB_7322_SendCtrl_1_pb::TxeDrainRmFifo
pseudo_bit_t TxeDrainRmFifo[1]
Definition qib_7322_regs.h:4245

QIB_7322_SendCtrl_1_pb::SDmaCleanup
pseudo_bit_t SDmaCleanup[1]
Definition qib_7322_regs.h:4239

QIB_7322_SendCtrl_1_pb::IBVLArbiterEn
pseudo_bit_t IBVLArbiterEn[1]
Definition qib_7322_regs.h:4246

QIB_7322_SendCtrl_1_pb::_unused_2
pseudo_bit_t _unused_2[48]
Definition qib_7322_regs.h:4247

QIB_7322_SendCtrl_1_pb::ForceCreditUpToDate
pseudo_bit_t ForceCreditUpToDate[1]
Definition qib_7322_regs.h:4238

QIB_7322_SendCtrl_1_pb::TxeBypassIbc
pseudo_bit_t TxeBypassIbc[1]
Definition qib_7322_regs.h:4234

QIB_7322_SendCtrl_1_pb::SDmaHalt
pseudo_bit_t SDmaHalt[1]
Definition qib_7322_regs.h:4243

QIB_7322_SendCtrl_1
Definition qib_7322_regs.h:4249

QIB_7322_SendCtrl_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCtrl_1_pb)

QIB_7322_SendCtrl_pb
Definition qib_7322_regs.h:726

QIB_7322_SendCtrl_pb::DisarmSendBuf
pseudo_bit_t DisarmSendBuf[8]
Definition qib_7322_regs.h:733

QIB_7322_SendCtrl_pb::_unused_1
pseudo_bit_t _unused_1[1]
Definition qib_7322_regs.h:730

QIB_7322_SendCtrl_pb::_unused_2
pseudo_bit_t _unused_2[11]
Definition qib_7322_regs.h:732

QIB_7322_SendCtrl_pb::SendBufAvailUpd
pseudo_bit_t SendBufAvailUpd[1]
Definition qib_7322_regs.h:729

QIB_7322_SendCtrl_pb::Disarm
pseudo_bit_t Disarm[1]
Definition qib_7322_regs.h:737

QIB_7322_SendCtrl_pb::SendBufAvailPad64Byte
pseudo_bit_t SendBufAvailPad64Byte[1]
Definition qib_7322_regs.h:735

QIB_7322_SendCtrl_pb::_unused_4
pseudo_bit_t _unused_4[32]
Definition qib_7322_regs.h:738

QIB_7322_SendCtrl_pb::_unused_3
pseudo_bit_t _unused_3[1]
Definition qib_7322_regs.h:736

QIB_7322_SendCtrl_pb::SpecialTriggerEn
pseudo_bit_t SpecialTriggerEn[1]
Definition qib_7322_regs.h:731

QIB_7322_SendCtrl_pb::AvailUpdThld
pseudo_bit_t AvailUpdThld[5]
Definition qib_7322_regs.h:734

QIB_7322_SendCtrl_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:727

QIB_7322_SendCtrl_pb::SendIntBufAvail
pseudo_bit_t SendIntBufAvail[1]
Definition qib_7322_regs.h:728

QIB_7322_SendCtrl
Definition qib_7322_regs.h:740

QIB_7322_SendCtrl::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendCtrl_pb)

QIB_7322_SendDmaBase_0_pb
Definition qib_7322_regs.h:2922

QIB_7322_SendDmaBase_0_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:2924

QIB_7322_SendDmaBase_0_pb::SendDmaBase
pseudo_bit_t SendDmaBase[48]
Definition qib_7322_regs.h:2923

QIB_7322_SendDmaBase_0
Definition qib_7322_regs.h:2926

QIB_7322_SendDmaBase_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBase_0_pb)

QIB_7322_SendDmaBase_1_pb
Definition qib_7322_regs.h:4255

QIB_7322_SendDmaBase_1_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:4257

QIB_7322_SendDmaBase_1_pb::SendDmaBase
pseudo_bit_t SendDmaBase[48]
Definition qib_7322_regs.h:4256

QIB_7322_SendDmaBase_1
Definition qib_7322_regs.h:4259

QIB_7322_SendDmaBase_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBase_1_pb)

QIB_7322_SendDmaBufMask0_0_pb
Definition qib_7322_regs.h:2975

QIB_7322_SendDmaBufMask0_0_pb::BufMask_63_0
pseudo_bit_t BufMask_63_0[64]
Definition qib_7322_regs.h:2976

QIB_7322_SendDmaBufMask0_0
Definition qib_7322_regs.h:2978

QIB_7322_SendDmaBufMask0_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufMask0_0_pb)

QIB_7322_SendDmaBufMask0_1_pb
Definition qib_7322_regs.h:4308

QIB_7322_SendDmaBufMask0_1_pb::BufMask_63_0
pseudo_bit_t BufMask_63_0[64]
Definition qib_7322_regs.h:4309

QIB_7322_SendDmaBufMask0_1
Definition qib_7322_regs.h:4311

QIB_7322_SendDmaBufMask0_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufMask0_1_pb)

QIB_7322_SendDmaBufUsed0_0_pb
Definition qib_7322_regs.h:3046

QIB_7322_SendDmaBufUsed0_0_pb::BufUsed_63_0
pseudo_bit_t BufUsed_63_0[64]
Definition qib_7322_regs.h:3047

QIB_7322_SendDmaBufUsed0_0
Definition qib_7322_regs.h:3049

QIB_7322_SendDmaBufUsed0_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufUsed0_0_pb)

QIB_7322_SendDmaBufUsed0_1_pb
Definition qib_7322_regs.h:4379

QIB_7322_SendDmaBufUsed0_1_pb::BufUsed_63_0
pseudo_bit_t BufUsed_63_0[64]
Definition qib_7322_regs.h:4380

QIB_7322_SendDmaBufUsed0_1
Definition qib_7322_regs.h:4382

QIB_7322_SendDmaBufUsed0_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaBufUsed0_1_pb)

QIB_7322_SendDmaDescCnt_0_pb
Definition qib_7322_regs.h:2889

QIB_7322_SendDmaDescCnt_0_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:2891

QIB_7322_SendDmaDescCnt_0_pb::SendDmaDescCnt
pseudo_bit_t SendDmaDescCnt[16]
Definition qib_7322_regs.h:2890

QIB_7322_SendDmaDescCnt_0
Definition qib_7322_regs.h:2893

QIB_7322_SendDmaDescCnt_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaDescCnt_0_pb)

QIB_7322_SendDmaDescCnt_1_pb
Definition qib_7322_regs.h:4222

QIB_7322_SendDmaDescCnt_1_pb::SendDmaDescCnt
pseudo_bit_t SendDmaDescCnt[16]
Definition qib_7322_regs.h:4223

QIB_7322_SendDmaDescCnt_1_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:4224

QIB_7322_SendDmaDescCnt_1
Definition qib_7322_regs.h:4226

QIB_7322_SendDmaDescCnt_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaDescCnt_1_pb)

QIB_7322_SendDmaHeadAddr_0_pb
Definition qib_7322_regs.h:2965

QIB_7322_SendDmaHeadAddr_0_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:2967

QIB_7322_SendDmaHeadAddr_0_pb::SendDmaHeadAddr
pseudo_bit_t SendDmaHeadAddr[48]
Definition qib_7322_regs.h:2966

QIB_7322_SendDmaHeadAddr_0
Definition qib_7322_regs.h:2969

QIB_7322_SendDmaHeadAddr_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHeadAddr_0_pb)

QIB_7322_SendDmaHeadAddr_1_pb
Definition qib_7322_regs.h:4298

QIB_7322_SendDmaHeadAddr_1_pb::SendDmaHeadAddr
pseudo_bit_t SendDmaHeadAddr[48]
Definition qib_7322_regs.h:4299

QIB_7322_SendDmaHeadAddr_1_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:4300

QIB_7322_SendDmaHeadAddr_1
Definition qib_7322_regs.h:4302

QIB_7322_SendDmaHeadAddr_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHeadAddr_1_pb)

QIB_7322_SendDmaHead_0_pb
Definition qib_7322_regs.h:2953

QIB_7322_SendDmaHead_0_pb::SendDmaHead
pseudo_bit_t SendDmaHead[16]
Definition qib_7322_regs.h:2954

QIB_7322_SendDmaHead_0_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:2955

QIB_7322_SendDmaHead_0_pb::InternalSendDmaHead
pseudo_bit_t InternalSendDmaHead[16]
Definition qib_7322_regs.h:2956

QIB_7322_SendDmaHead_0_pb::_unused_1
pseudo_bit_t _unused_1[16]
Definition qib_7322_regs.h:2957

QIB_7322_SendDmaHead_0
Definition qib_7322_regs.h:2959

QIB_7322_SendDmaHead_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHead_0_pb)

QIB_7322_SendDmaHead_1_pb
Definition qib_7322_regs.h:4286

QIB_7322_SendDmaHead_1_pb::SendDmaHead
pseudo_bit_t SendDmaHead[16]
Definition qib_7322_regs.h:4287

QIB_7322_SendDmaHead_1_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:4288

QIB_7322_SendDmaHead_1_pb::_unused_1
pseudo_bit_t _unused_1[16]
Definition qib_7322_regs.h:4290

QIB_7322_SendDmaHead_1_pb::InternalSendDmaHead
pseudo_bit_t InternalSendDmaHead[16]
Definition qib_7322_regs.h:4289

QIB_7322_SendDmaHead_1
Definition qib_7322_regs.h:4292

QIB_7322_SendDmaHead_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaHead_1_pb)

QIB_7322_SendDmaIdleCnt_0_pb
Definition qib_7322_regs.h:2869

QIB_7322_SendDmaIdleCnt_0_pb::SendDmaIdleCnt
pseudo_bit_t SendDmaIdleCnt[16]
Definition qib_7322_regs.h:2870

QIB_7322_SendDmaIdleCnt_0_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:2871

QIB_7322_SendDmaIdleCnt_0
Definition qib_7322_regs.h:2873

QIB_7322_SendDmaIdleCnt_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaIdleCnt_0_pb)

QIB_7322_SendDmaIdleCnt_1_pb
Definition qib_7322_regs.h:4202

QIB_7322_SendDmaIdleCnt_1_pb::SendDmaIdleCnt
pseudo_bit_t SendDmaIdleCnt[16]
Definition qib_7322_regs.h:4203

QIB_7322_SendDmaIdleCnt_1_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:4204

QIB_7322_SendDmaIdleCnt_1
Definition qib_7322_regs.h:4206

QIB_7322_SendDmaIdleCnt_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaIdleCnt_1_pb)

QIB_7322_SendDmaLenGen_0_pb
Definition qib_7322_regs.h:2932

QIB_7322_SendDmaLenGen_0_pb::Length
pseudo_bit_t Length[16]
Definition qib_7322_regs.h:2933

QIB_7322_SendDmaLenGen_0_pb::Generation
pseudo_bit_t Generation[3]
Definition qib_7322_regs.h:2934

QIB_7322_SendDmaLenGen_0_pb::_unused_0
pseudo_bit_t _unused_0[45]
Definition qib_7322_regs.h:2935

QIB_7322_SendDmaLenGen_0
Definition qib_7322_regs.h:2937

QIB_7322_SendDmaLenGen_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaLenGen_0_pb)

QIB_7322_SendDmaLenGen_1_pb
Definition qib_7322_regs.h:4265

QIB_7322_SendDmaLenGen_1_pb::Length
pseudo_bit_t Length[16]
Definition qib_7322_regs.h:4266

QIB_7322_SendDmaLenGen_1_pb::Generation
pseudo_bit_t Generation[3]
Definition qib_7322_regs.h:4267

QIB_7322_SendDmaLenGen_1_pb::_unused_0
pseudo_bit_t _unused_0[45]
Definition qib_7322_regs.h:4268

QIB_7322_SendDmaLenGen_1
Definition qib_7322_regs.h:4270

QIB_7322_SendDmaLenGen_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaLenGen_1_pb)

QIB_7322_SendDmaPriorityThld_0_pb
Definition qib_7322_regs.h:3008

QIB_7322_SendDmaPriorityThld_0_pb::_unused_0
pseudo_bit_t _unused_0[60]
Definition qib_7322_regs.h:3010

QIB_7322_SendDmaPriorityThld_0_pb::PriorityThreshold
pseudo_bit_t PriorityThreshold[4]
Definition qib_7322_regs.h:3009

QIB_7322_SendDmaPriorityThld_0
Definition qib_7322_regs.h:3012

QIB_7322_SendDmaPriorityThld_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaPriorityThld_0_pb)

QIB_7322_SendDmaPriorityThld_1_pb
Definition qib_7322_regs.h:4341

QIB_7322_SendDmaPriorityThld_1_pb::_unused_0
pseudo_bit_t _unused_0[60]
Definition qib_7322_regs.h:4343

QIB_7322_SendDmaPriorityThld_1_pb::PriorityThreshold
pseudo_bit_t PriorityThreshold[4]
Definition qib_7322_regs.h:4342

QIB_7322_SendDmaPriorityThld_1
Definition qib_7322_regs.h:4345

QIB_7322_SendDmaPriorityThld_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaPriorityThld_1_pb)

QIB_7322_SendDmaReloadCnt_0_pb
Definition qib_7322_regs.h:2879

QIB_7322_SendDmaReloadCnt_0_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:2881

QIB_7322_SendDmaReloadCnt_0_pb::SendDmaReloadCnt
pseudo_bit_t SendDmaReloadCnt[16]
Definition qib_7322_regs.h:2880

QIB_7322_SendDmaReloadCnt_0
Definition qib_7322_regs.h:2883

QIB_7322_SendDmaReloadCnt_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReloadCnt_0_pb)

QIB_7322_SendDmaReloadCnt_1_pb
Definition qib_7322_regs.h:4212

QIB_7322_SendDmaReloadCnt_1_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:4214

QIB_7322_SendDmaReloadCnt_1_pb::SendDmaReloadCnt
pseudo_bit_t SendDmaReloadCnt[16]
Definition qib_7322_regs.h:4213

QIB_7322_SendDmaReloadCnt_1
Definition qib_7322_regs.h:4216

QIB_7322_SendDmaReloadCnt_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReloadCnt_1_pb)

QIB_7322_SendDmaReqTagUsed_0_pb
Definition qib_7322_regs.h:3055

QIB_7322_SendDmaReqTagUsed_0_pb::ReqTagUsed_7_0
pseudo_bit_t ReqTagUsed_7_0[8]
Definition qib_7322_regs.h:3056

QIB_7322_SendDmaReqTagUsed_0_pb::_unused_0
pseudo_bit_t _unused_0[56]
Definition qib_7322_regs.h:3057

QIB_7322_SendDmaReqTagUsed_0
Definition qib_7322_regs.h:3059

QIB_7322_SendDmaReqTagUsed_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReqTagUsed_0_pb)

QIB_7322_SendDmaReqTagUsed_1_pb
Definition qib_7322_regs.h:4388

QIB_7322_SendDmaReqTagUsed_1_pb::ReqTagUsed_7_0
pseudo_bit_t ReqTagUsed_7_0[8]
Definition qib_7322_regs.h:4389

QIB_7322_SendDmaReqTagUsed_1_pb::_unused_0
pseudo_bit_t _unused_0[56]
Definition qib_7322_regs.h:4390

QIB_7322_SendDmaReqTagUsed_1
Definition qib_7322_regs.h:4392

QIB_7322_SendDmaReqTagUsed_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaReqTagUsed_1_pb)

QIB_7322_SendDmaStatus_0_pb
Definition qib_7322_regs.h:2984

QIB_7322_SendDmaStatus_0_pb::ScbFetchDescFlag
pseudo_bit_t ScbFetchDescFlag[1]
Definition qib_7322_regs.h:2991

QIB_7322_SendDmaStatus_0_pb::ScbEmpty
pseudo_bit_t ScbEmpty[1]
Definition qib_7322_regs.h:2993

QIB_7322_SendDmaStatus_0_pb::RpyLowAddr_6_0
pseudo_bit_t RpyLowAddr_6_0[7]
Definition qib_7322_regs.h:2996

QIB_7322_SendDmaStatus_0_pb::ScbDescIndex_13_0
pseudo_bit_t ScbDescIndex_13_0[14]
Definition qib_7322_regs.h:2997

QIB_7322_SendDmaStatus_0_pb::SplFifoReadyToGo
pseudo_bit_t SplFifoReadyToGo[1]
Definition qib_7322_regs.h:2990

QIB_7322_SendDmaStatus_0_pb::ScbFull
pseudo_bit_t ScbFull[1]
Definition qib_7322_regs.h:2994

QIB_7322_SendDmaStatus_0_pb::ScbEntryValid
pseudo_bit_t ScbEntryValid[1]
Definition qib_7322_regs.h:2992

QIB_7322_SendDmaStatus_0_pb::InternalSDmaHalt
pseudo_bit_t InternalSDmaHalt[1]
Definition qib_7322_regs.h:2998

QIB_7322_SendDmaStatus_0_pb::RpyTag_7_0
pseudo_bit_t RpyTag_7_0[8]
Definition qib_7322_regs.h:2995

QIB_7322_SendDmaStatus_0_pb::SplFifoDescIndex
pseudo_bit_t SplFifoDescIndex[16]
Definition qib_7322_regs.h:2985

QIB_7322_SendDmaStatus_0_pb::SplFifoEmpty
pseudo_bit_t SplFifoEmpty[1]
Definition qib_7322_regs.h:2988

QIB_7322_SendDmaStatus_0_pb::SplFifoBufNum
pseudo_bit_t SplFifoBufNum[8]
Definition qib_7322_regs.h:2986

QIB_7322_SendDmaStatus_0_pb::SplFifoDisarmed
pseudo_bit_t SplFifoDisarmed[1]
Definition qib_7322_regs.h:2989

QIB_7322_SendDmaStatus_0_pb::HaltInProg
pseudo_bit_t HaltInProg[1]
Definition qib_7322_regs.h:2999

QIB_7322_SendDmaStatus_0_pb::ScoreBoardDrainInProg
pseudo_bit_t ScoreBoardDrainInProg[1]
Definition qib_7322_regs.h:3000

QIB_7322_SendDmaStatus_0_pb::SplFifoFull
pseudo_bit_t SplFifoFull[1]
Definition qib_7322_regs.h:2987

QIB_7322_SendDmaStatus_0
Definition qib_7322_regs.h:3002

QIB_7322_SendDmaStatus_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaStatus_0_pb)

QIB_7322_SendDmaStatus_1_pb
Definition qib_7322_regs.h:4317

QIB_7322_SendDmaStatus_1_pb::InternalSDmaHalt
pseudo_bit_t InternalSDmaHalt[1]
Definition qib_7322_regs.h:4331

QIB_7322_SendDmaStatus_1_pb::SplFifoDisarmed
pseudo_bit_t SplFifoDisarmed[1]
Definition qib_7322_regs.h:4322

QIB_7322_SendDmaStatus_1_pb::RpyLowAddr_6_0
pseudo_bit_t RpyLowAddr_6_0[7]
Definition qib_7322_regs.h:4329

QIB_7322_SendDmaStatus_1_pb::ScbEmpty
pseudo_bit_t ScbEmpty[1]
Definition qib_7322_regs.h:4326

QIB_7322_SendDmaStatus_1_pb::ScbEntryValid
pseudo_bit_t ScbEntryValid[1]
Definition qib_7322_regs.h:4325

QIB_7322_SendDmaStatus_1_pb::ScbDescIndex_13_0
pseudo_bit_t ScbDescIndex_13_0[14]
Definition qib_7322_regs.h:4330

QIB_7322_SendDmaStatus_1_pb::ScbFetchDescFlag
pseudo_bit_t ScbFetchDescFlag[1]
Definition qib_7322_regs.h:4324

QIB_7322_SendDmaStatus_1_pb::SplFifoEmpty
pseudo_bit_t SplFifoEmpty[1]
Definition qib_7322_regs.h:4321

QIB_7322_SendDmaStatus_1_pb::SplFifoReadyToGo
pseudo_bit_t SplFifoReadyToGo[1]
Definition qib_7322_regs.h:4323

QIB_7322_SendDmaStatus_1_pb::HaltInProg
pseudo_bit_t HaltInProg[1]
Definition qib_7322_regs.h:4332

QIB_7322_SendDmaStatus_1_pb::SplFifoDescIndex
pseudo_bit_t SplFifoDescIndex[16]
Definition qib_7322_regs.h:4318

QIB_7322_SendDmaStatus_1_pb::SplFifoBufNum
pseudo_bit_t SplFifoBufNum[8]
Definition qib_7322_regs.h:4319

QIB_7322_SendDmaStatus_1_pb::ScbFull
pseudo_bit_t ScbFull[1]
Definition qib_7322_regs.h:4327

QIB_7322_SendDmaStatus_1_pb::ScoreBoardDrainInProg
pseudo_bit_t ScoreBoardDrainInProg[1]
Definition qib_7322_regs.h:4333

QIB_7322_SendDmaStatus_1_pb::SplFifoFull
pseudo_bit_t SplFifoFull[1]
Definition qib_7322_regs.h:4320

QIB_7322_SendDmaStatus_1_pb::RpyTag_7_0
pseudo_bit_t RpyTag_7_0[8]
Definition qib_7322_regs.h:4328

QIB_7322_SendDmaStatus_1
Definition qib_7322_regs.h:4335

QIB_7322_SendDmaStatus_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaStatus_1_pb)

QIB_7322_SendDmaTail_0_pb
Definition qib_7322_regs.h:2943

QIB_7322_SendDmaTail_0_pb::SendDmaTail
pseudo_bit_t SendDmaTail[16]
Definition qib_7322_regs.h:2944

QIB_7322_SendDmaTail_0_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:2945

QIB_7322_SendDmaTail_0
Definition qib_7322_regs.h:2947

QIB_7322_SendDmaTail_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaTail_0_pb)

QIB_7322_SendDmaTail_1_pb
Definition qib_7322_regs.h:4276

QIB_7322_SendDmaTail_1_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:4278

QIB_7322_SendDmaTail_1_pb::SendDmaTail
pseudo_bit_t SendDmaTail[16]
Definition qib_7322_regs.h:4277

QIB_7322_SendDmaTail_1
Definition qib_7322_regs.h:4280

QIB_7322_SendDmaTail_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendDmaTail_1_pb)

QIB_7322_SendGRHCheckMask0_pb
Definition qib_7322_regs.h:1008

QIB_7322_SendGRHCheckMask0_pb::SendGRHCheckMask_63_32
pseudo_bit_t SendGRHCheckMask_63_32[64]
Definition qib_7322_regs.h:1009

QIB_7322_SendGRHCheckMask0
Definition qib_7322_regs.h:1011

QIB_7322_SendGRHCheckMask0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendGRHCheckMask0_pb)

QIB_7322_SendHdrErrSymptom_0_pb
Definition qib_7322_regs.h:3018

QIB_7322_SendHdrErrSymptom_0_pb::_unused_0
pseudo_bit_t _unused_0[57]
Definition qib_7322_regs.h:3026

QIB_7322_SendHdrErrSymptom_0_pb::PkeyFail
pseudo_bit_t PkeyFail[1]
Definition qib_7322_regs.h:3023

QIB_7322_SendHdrErrSymptom_0_pb::NonKeyPacket
pseudo_bit_t NonKeyPacket[1]
Definition qib_7322_regs.h:3025

QIB_7322_SendHdrErrSymptom_0_pb::GRHFail
pseudo_bit_t GRHFail[1]
Definition qib_7322_regs.h:3024

QIB_7322_SendHdrErrSymptom_0_pb::PacketTooSmall
pseudo_bit_t PacketTooSmall[1]
Definition qib_7322_regs.h:3019

QIB_7322_SendHdrErrSymptom_0_pb::QPFail
pseudo_bit_t QPFail[1]
Definition qib_7322_regs.h:3022

QIB_7322_SendHdrErrSymptom_0_pb::SLIDFail
pseudo_bit_t SLIDFail[1]
Definition qib_7322_regs.h:3021

QIB_7322_SendHdrErrSymptom_0_pb::RawIPV6
pseudo_bit_t RawIPV6[1]
Definition qib_7322_regs.h:3020

QIB_7322_SendHdrErrSymptom_0
Definition qib_7322_regs.h:3028

QIB_7322_SendHdrErrSymptom_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendHdrErrSymptom_0_pb)

QIB_7322_SendHdrErrSymptom_1_pb
Definition qib_7322_regs.h:4351

QIB_7322_SendHdrErrSymptom_1_pb::RawIPV6
pseudo_bit_t RawIPV6[1]
Definition qib_7322_regs.h:4353

QIB_7322_SendHdrErrSymptom_1_pb::PkeyFail
pseudo_bit_t PkeyFail[1]
Definition qib_7322_regs.h:4356

QIB_7322_SendHdrErrSymptom_1_pb::SLIDFail
pseudo_bit_t SLIDFail[1]
Definition qib_7322_regs.h:4354

QIB_7322_SendHdrErrSymptom_1_pb::QPFail
pseudo_bit_t QPFail[1]
Definition qib_7322_regs.h:4355

QIB_7322_SendHdrErrSymptom_1_pb::GRHFail
pseudo_bit_t GRHFail[1]
Definition qib_7322_regs.h:4357

QIB_7322_SendHdrErrSymptom_1_pb::NonKeyPacket
pseudo_bit_t NonKeyPacket[1]
Definition qib_7322_regs.h:4358

QIB_7322_SendHdrErrSymptom_1_pb::PacketTooSmall
pseudo_bit_t PacketTooSmall[1]
Definition qib_7322_regs.h:4352

QIB_7322_SendHdrErrSymptom_1_pb::_unused_0
pseudo_bit_t _unused_0[57]
Definition qib_7322_regs.h:4359

QIB_7322_SendHdrErrSymptom_1
Definition qib_7322_regs.h:4361

QIB_7322_SendHdrErrSymptom_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendHdrErrSymptom_1_pb)

QIB_7322_SendIBPacketMask0_pb
Definition qib_7322_regs.h:1017

QIB_7322_SendIBPacketMask0_pb::SendIBPacketMask_63_32
pseudo_bit_t SendIBPacketMask_63_32[64]
Definition qib_7322_regs.h:1018

QIB_7322_SendIBPacketMask0
Definition qib_7322_regs.h:1020

QIB_7322_SendIBPacketMask0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBPacketMask0_pb)

QIB_7322_SendIBSLIDAssign_0_pb
Definition qib_7322_regs.h:3089

QIB_7322_SendIBSLIDAssign_0_pb::SendIBSLIDAssign_15_0
pseudo_bit_t SendIBSLIDAssign_15_0[16]
Definition qib_7322_regs.h:3090

QIB_7322_SendIBSLIDAssign_0_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:3091

QIB_7322_SendIBSLIDAssign_0
Definition qib_7322_regs.h:3093

QIB_7322_SendIBSLIDAssign_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDAssign_0_pb)

QIB_7322_SendIBSLIDAssign_1_pb
Definition qib_7322_regs.h:4422

QIB_7322_SendIBSLIDAssign_1_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:4424

QIB_7322_SendIBSLIDAssign_1_pb::SendIBSLIDAssign_15_0
pseudo_bit_t SendIBSLIDAssign_15_0[16]
Definition qib_7322_regs.h:4423

QIB_7322_SendIBSLIDAssign_1
Definition qib_7322_regs.h:4426

QIB_7322_SendIBSLIDAssign_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDAssign_1_pb)

QIB_7322_SendIBSLIDMask_0_pb
Definition qib_7322_regs.h:3079

QIB_7322_SendIBSLIDMask_0_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:3081

QIB_7322_SendIBSLIDMask_0_pb::SendIBSLIDMask_15_0
pseudo_bit_t SendIBSLIDMask_15_0[16]
Definition qib_7322_regs.h:3080

QIB_7322_SendIBSLIDMask_0
Definition qib_7322_regs.h:3083

QIB_7322_SendIBSLIDMask_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDMask_0_pb)

QIB_7322_SendIBSLIDMask_1_pb
Definition qib_7322_regs.h:4412

QIB_7322_SendIBSLIDMask_1_pb::SendIBSLIDMask_15_0
pseudo_bit_t SendIBSLIDMask_15_0[16]
Definition qib_7322_regs.h:4413

QIB_7322_SendIBSLIDMask_1_pb::_unused_0
pseudo_bit_t _unused_0[48]
Definition qib_7322_regs.h:4414

QIB_7322_SendIBSLIDMask_1
Definition qib_7322_regs.h:4416

QIB_7322_SendIBSLIDMask_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendIBSLIDMask_1_pb)

QIB_7322_SendPbcArrayCorErrLog_pb
Definition qib_7322_regs.h:2497

QIB_7322_SendPbcArrayCorErrLog_pb::_unused_0
pseudo_bit_t _unused_0[25]
Definition qib_7322_regs.h:2501

QIB_7322_SendPbcArrayCorErrLog_pb::SendPbcArrayCorErrAddr_9_0
pseudo_bit_t SendPbcArrayCorErrAddr_9_0[10]
Definition qib_7322_regs.h:2500

QIB_7322_SendPbcArrayCorErrLog_pb::SendPbcArrayCorErrData_21_0
pseudo_bit_t SendPbcArrayCorErrData_21_0[22]
Definition qib_7322_regs.h:2498

QIB_7322_SendPbcArrayCorErrLog_pb::SendPbcArrayCorErrCheckBit_6_0
pseudo_bit_t SendPbcArrayCorErrCheckBit_6_0[7]
Definition qib_7322_regs.h:2499

QIB_7322_SendPbcArrayCorErrLog
Definition qib_7322_regs.h:2503

QIB_7322_SendPbcArrayCorErrLog::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendPbcArrayCorErrLog_pb)

QIB_7322_SendPbcArrayUnCorErrLog_pb
Definition qib_7322_regs.h:2224

QIB_7322_SendPbcArrayUnCorErrLog_pb::_unused_0
pseudo_bit_t _unused_0[25]
Definition qib_7322_regs.h:2228

QIB_7322_SendPbcArrayUnCorErrLog_pb::SendPbcArrayUnCorErrData_21_0
pseudo_bit_t SendPbcArrayUnCorErrData_21_0[22]
Definition qib_7322_regs.h:2225

QIB_7322_SendPbcArrayUnCorErrLog_pb::SendPbcArrayUnCorErrCheckBit_6_0
pseudo_bit_t SendPbcArrayUnCorErrCheckBit_6_0[7]
Definition qib_7322_regs.h:2226

QIB_7322_SendPbcArrayUnCorErrLog_pb::SendPbcArrayUnCorErrAddr_9_0
pseudo_bit_t SendPbcArrayUnCorErrAddr_9_0[10]
Definition qib_7322_regs.h:2227

QIB_7322_SendPbcArrayUnCorErrLog
Definition qib_7322_regs.h:2230

QIB_7322_SendPbcArrayUnCorErrLog::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_SendPbcArrayUnCorErrLog_pb)

QIB_7322_TXEStatus_0_pb
Definition qib_7322_regs.h:2691

QIB_7322_TXEStatus_0_pb::_unused_0
pseudo_bit_t _unused_0[7]
Definition qib_7322_regs.h:2700

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL4
pseudo_bit_t LaFifoEmpty_VL4[1]
Definition qib_7322_regs.h:2696

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL6
pseudo_bit_t LaFifoEmpty_VL6[1]
Definition qib_7322_regs.h:2698

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL5
pseudo_bit_t LaFifoEmpty_VL5[1]
Definition qib_7322_regs.h:2697

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL2
pseudo_bit_t LaFifoEmpty_VL2[1]
Definition qib_7322_regs.h:2694

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL1
pseudo_bit_t LaFifoEmpty_VL1[1]
Definition qib_7322_regs.h:2693

QIB_7322_TXEStatus_0_pb::_unused_2
pseudo_bit_t _unused_2[32]
Definition qib_7322_regs.h:2705

QIB_7322_TXEStatus_0_pb::_unused_1
pseudo_bit_t _unused_1[14]
Definition qib_7322_regs.h:2702

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL7
pseudo_bit_t LaFifoEmpty_VL7[1]
Definition qib_7322_regs.h:2699

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL15
pseudo_bit_t LaFifoEmpty_VL15[1]
Definition qib_7322_regs.h:2701

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL3
pseudo_bit_t LaFifoEmpty_VL3[1]
Definition qib_7322_regs.h:2695

QIB_7322_TXEStatus_0_pb::TXE_IBC_Idle
pseudo_bit_t TXE_IBC_Idle[1]
Definition qib_7322_regs.h:2704

QIB_7322_TXEStatus_0_pb::RmFifoEmpty
pseudo_bit_t RmFifoEmpty[1]
Definition qib_7322_regs.h:2703

QIB_7322_TXEStatus_0_pb::LaFifoEmpty_VL0
pseudo_bit_t LaFifoEmpty_VL0[1]
Definition qib_7322_regs.h:2692

QIB_7322_TXEStatus_0
Definition qib_7322_regs.h:2707

QIB_7322_TXEStatus_0::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_TXEStatus_0_pb)

QIB_7322_TXEStatus_1_pb
Definition qib_7322_regs.h:4024

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL6
pseudo_bit_t LaFifoEmpty_VL6[1]
Definition qib_7322_regs.h:4031

QIB_7322_TXEStatus_1_pb::_unused_1
pseudo_bit_t _unused_1[14]
Definition qib_7322_regs.h:4035

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL15
pseudo_bit_t LaFifoEmpty_VL15[1]
Definition qib_7322_regs.h:4034

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL3
pseudo_bit_t LaFifoEmpty_VL3[1]
Definition qib_7322_regs.h:4028

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL7
pseudo_bit_t LaFifoEmpty_VL7[1]
Definition qib_7322_regs.h:4032

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL0
pseudo_bit_t LaFifoEmpty_VL0[1]
Definition qib_7322_regs.h:4025

QIB_7322_TXEStatus_1_pb::RmFifoEmpty
pseudo_bit_t RmFifoEmpty[1]
Definition qib_7322_regs.h:4036

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL1
pseudo_bit_t LaFifoEmpty_VL1[1]
Definition qib_7322_regs.h:4026

QIB_7322_TXEStatus_1_pb::TXE_IBC_Idle
pseudo_bit_t TXE_IBC_Idle[1]
Definition qib_7322_regs.h:4037

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL5
pseudo_bit_t LaFifoEmpty_VL5[1]
Definition qib_7322_regs.h:4030

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL2
pseudo_bit_t LaFifoEmpty_VL2[1]
Definition qib_7322_regs.h:4027

QIB_7322_TXEStatus_1_pb::_unused_2
pseudo_bit_t _unused_2[32]
Definition qib_7322_regs.h:4038

QIB_7322_TXEStatus_1_pb::LaFifoEmpty_VL4
pseudo_bit_t LaFifoEmpty_VL4[1]
Definition qib_7322_regs.h:4029

QIB_7322_TXEStatus_1_pb::_unused_0
pseudo_bit_t _unused_0[7]
Definition qib_7322_regs.h:4033

QIB_7322_TXEStatus_1
Definition qib_7322_regs.h:4040

QIB_7322_TXEStatus_1::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_TXEStatus_1_pb)

QIB_7322_VTSense_reg_pb
Definition qib_7322_regs.h:902

QIB_7322_VTSense_reg_pb::_unused_2
pseudo_bit_t _unused_2[32]
Definition qib_7322_regs.h:913

QIB_7322_VTSense_reg_pb::sensor_output_data
pseudo_bit_t sensor_output_data[10]
Definition qib_7322_regs.h:908

QIB_7322_VTSense_reg_pb::_unused_0
pseudo_bit_t _unused_0[1]
Definition qib_7322_regs.h:909

QIB_7322_VTSense_reg_pb::start_busy
pseudo_bit_t start_busy[1]
Definition qib_7322_regs.h:905

QIB_7322_VTSense_reg_pb::output_valid
pseudo_bit_t output_valid[1]
Definition qib_7322_regs.h:912

QIB_7322_VTSense_reg_pb::threshold_limbit
pseudo_bit_t threshold_limbit[1]
Definition qib_7322_regs.h:910

QIB_7322_VTSense_reg_pb::power_down
pseudo_bit_t power_down[1]
Definition qib_7322_regs.h:906

QIB_7322_VTSense_reg_pb::adc_mode
pseudo_bit_t adc_mode[1]
Definition qib_7322_regs.h:904

QIB_7322_VTSense_reg_pb::temp_sense_select
pseudo_bit_t temp_sense_select[3]
Definition qib_7322_regs.h:903

QIB_7322_VTSense_reg_pb::_unused_1
pseudo_bit_t _unused_1[3]
Definition qib_7322_regs.h:911

QIB_7322_VTSense_reg_pb::threshold
pseudo_bit_t threshold[10]
Definition qib_7322_regs.h:907

QIB_7322_VTSense_reg
Definition qib_7322_regs.h:915

QIB_7322_VTSense_reg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_VTSense_reg_pb)

QIB_7322_active_feature_mask_pb
Definition qib_7322_regs.h:711

QIB_7322_active_feature_mask_pb::Port0_DDR_Enabled
pseudo_bit_t Port0_DDR_Enabled[1]
Definition qib_7322_regs.h:713

QIB_7322_active_feature_mask_pb::_unused_0
pseudo_bit_t _unused_0[58]
Definition qib_7322_regs.h:718

QIB_7322_active_feature_mask_pb::Port0_SDR_Enabled
pseudo_bit_t Port0_SDR_Enabled[1]
Definition qib_7322_regs.h:712

QIB_7322_active_feature_mask_pb::Port0_QDR_Enabled
pseudo_bit_t Port0_QDR_Enabled[1]
Definition qib_7322_regs.h:714

QIB_7322_active_feature_mask_pb::Port1_DDR_Enabled
pseudo_bit_t Port1_DDR_Enabled[1]
Definition qib_7322_regs.h:716

QIB_7322_active_feature_mask_pb::Port1_SDR_Enabled
pseudo_bit_t Port1_SDR_Enabled[1]
Definition qib_7322_regs.h:715

QIB_7322_active_feature_mask_pb::Port1_QDR_Enabled
pseudo_bit_t Port1_QDR_Enabled[1]
Definition qib_7322_regs.h:717

QIB_7322_active_feature_mask
Definition qib_7322_regs.h:720

QIB_7322_active_feature_mask::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_active_feature_mask_pb)

QIB_7322_ahb_access_ctrl_pb
Definition qib_7322_regs.h:939

QIB_7322_ahb_access_ctrl_pb::sw_ahb_sel
pseudo_bit_t sw_ahb_sel[1]
Definition qib_7322_regs.h:940

QIB_7322_ahb_access_ctrl_pb::sw_sel_ahb_trgt
pseudo_bit_t sw_sel_ahb_trgt[2]
Definition qib_7322_regs.h:941

QIB_7322_ahb_access_ctrl_pb::_unused_0
pseudo_bit_t _unused_0[61]
Definition qib_7322_regs.h:942

QIB_7322_ahb_access_ctrl
Definition qib_7322_regs.h:944

QIB_7322_ahb_access_ctrl::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ahb_access_ctrl_pb)

QIB_7322_ahb_transaction_reg_pb
Definition qib_7322_regs.h:950

QIB_7322_ahb_transaction_reg_pb::ahb_address
pseudo_bit_t ahb_address[11]
Definition qib_7322_regs.h:952

QIB_7322_ahb_transaction_reg_pb::ahb_data
pseudo_bit_t ahb_data[32]
Definition qib_7322_regs.h:957

QIB_7322_ahb_transaction_reg_pb::_unused_0
pseudo_bit_t _unused_0[16]
Definition qib_7322_regs.h:951

QIB_7322_ahb_transaction_reg_pb::_unused_1
pseudo_bit_t _unused_1[2]
Definition qib_7322_regs.h:954

QIB_7322_ahb_transaction_reg_pb::ahb_rdy
pseudo_bit_t ahb_rdy[1]
Definition qib_7322_regs.h:956

QIB_7322_ahb_transaction_reg_pb::write_not_read
pseudo_bit_t write_not_read[1]
Definition qib_7322_regs.h:953

QIB_7322_ahb_transaction_reg_pb::ahb_req_err
pseudo_bit_t ahb_req_err[1]
Definition qib_7322_regs.h:955

QIB_7322_ahb_transaction_reg
Definition qib_7322_regs.h:959

QIB_7322_ahb_transaction_reg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_ahb_transaction_reg_pb)

QIB_7322_efuse_control_reg_pb
Definition qib_7322_regs.h:871

QIB_7322_efuse_control_reg_pb::address
pseudo_bit_t address[11]
Definition qib_7322_regs.h:872

QIB_7322_efuse_control_reg_pb::_unused_0
pseudo_bit_t _unused_0[4]
Definition qib_7322_regs.h:876

QIB_7322_efuse_control_reg_pb::operation
pseudo_bit_t operation[2]
Definition qib_7322_regs.h:874

QIB_7322_efuse_control_reg_pb::start_operation
pseudo_bit_t start_operation[1]
Definition qib_7322_regs.h:875

QIB_7322_efuse_control_reg_pb::_unused_1
pseudo_bit_t _unused_1[32]
Definition qib_7322_regs.h:880

QIB_7322_efuse_control_reg_pb::rdy
pseudo_bit_t rdy[1]
Definition qib_7322_regs.h:879

QIB_7322_efuse_control_reg_pb::req_err
pseudo_bit_t req_err[1]
Definition qib_7322_regs.h:877

QIB_7322_efuse_control_reg_pb::last_program_address
pseudo_bit_t last_program_address[11]
Definition qib_7322_regs.h:873

QIB_7322_efuse_control_reg_pb::read_data_valid
pseudo_bit_t read_data_valid[1]
Definition qib_7322_regs.h:878

QIB_7322_efuse_control_reg
Definition qib_7322_regs.h:882

QIB_7322_efuse_control_reg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_efuse_control_reg_pb)

QIB_7322_procmon_reg_pb
Definition qib_7322_regs.h:921

QIB_7322_procmon_reg_pb::procmon_count_valid
pseudo_bit_t procmon_count_valid[1]
Definition qib_7322_regs.h:927

QIB_7322_procmon_reg_pb::_unused_1
pseudo_bit_t _unused_1[3]
Definition qib_7322_regs.h:926

QIB_7322_procmon_reg_pb::start_counter
pseudo_bit_t start_counter[1]
Definition qib_7322_regs.h:924

QIB_7322_procmon_reg_pb::procmon_count
pseudo_bit_t procmon_count[12]
Definition qib_7322_regs.h:925

QIB_7322_procmon_reg_pb::ring_osc_select
pseudo_bit_t ring_osc_select[3]
Definition qib_7322_regs.h:922

QIB_7322_procmon_reg_pb::_unused_2
pseudo_bit_t _unused_2[32]
Definition qib_7322_regs.h:928

QIB_7322_procmon_reg_pb::_unused_0
pseudo_bit_t _unused_0[12]
Definition qib_7322_regs.h:923

QIB_7322_procmon_reg
Definition qib_7322_regs.h:930

QIB_7322_procmon_reg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_procmon_reg_pb)

QIB_7322_voltage_margin_reg_pb
Definition qib_7322_regs.h:891

QIB_7322_voltage_margin_reg_pb::voltage_margin_settings
pseudo_bit_t voltage_margin_settings[2]
Definition qib_7322_regs.h:893

QIB_7322_voltage_margin_reg_pb::voltage_margin_settings_enable
pseudo_bit_t voltage_margin_settings_enable[1]
Definition qib_7322_regs.h:892

QIB_7322_voltage_margin_reg_pb::_unused_0
pseudo_bit_t _unused_0[61]
Definition qib_7322_regs.h:894

QIB_7322_voltage_margin_reg
Definition qib_7322_regs.h:896

QIB_7322_voltage_margin_reg::PSEUDO_BIT_STRUCT
PSEUDO_BIT_STRUCT(struct QIB_7322_voltage_margin_reg_pb)