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iPXE
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SMSC LAN95xx USB Ethernet driver. More...
#include "smscusb.h"Go to the source code of this file.
Data Structures | |
| struct | smsc95xx_rx_header |
| Receive packet header. More... | |
| struct | smsc95xx_tx_header |
| Transmit packet header. More... | |
| struct | smsc95xx_rx_statistics |
| Receive statistics. More... | |
| struct | smsc95xx_tx_statistics |
| Transmit statistics. More... | |
Macros | |
| #define | SMSC95XX_INT_STS 0x008 |
| Interrupt status register. | |
| #define | SMSC95XX_INT_STS_RXDF_INT 0x00000800UL |
| RX FIFO overflow. | |
| #define | SMSC95XX_INT_STS_PHY_INT 0x00008000UL |
| PHY interrupt. | |
| #define | SMSC95XX_TX_CFG 0x010 |
| Transmit configuration register. | |
| #define | SMSC95XX_TX_CFG_ON 0x00000004UL |
| TX enable. | |
| #define | SMSC95XX_HW_CFG 0x014 |
| Hardware configuration register. | |
| #define | SMSC95XX_HW_CFG_BIR 0x00001000UL |
| Bulk IN use NAK. | |
| #define | SMSC95XX_HW_CFG_LRST 0x00000008UL |
| Soft lite reset. | |
| #define | SMSC95XX_LED_GPIO_CFG 0x024 |
| LED GPIO configuration register. | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL2(x) |
| GPIO 2 control. | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL2_NSPD_LED SMSC95XX_LED_GPIO_CFG_GPCTL2 ( 1 ) |
| Link speed LED. | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL1(x) |
| GPIO 1 control. | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL1_NLNKA_LED SMSC95XX_LED_GPIO_CFG_GPCTL1 ( 1 ) |
| Activity LED. | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL0(x) |
| GPIO 0 control. | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 ) |
| Full-duplex LED. | |
| #define | SMSC95XX_E2P_BASE 0x030 |
| EEPROM register base. | |
| #define | SMSC95XX_INT_EP_CTL 0x068 |
| Interrupt endpoint control register. | |
| #define | SMSC95XX_INT_EP_CTL_RXDF_EN 0x00000800UL |
| RX FIFO overflow. | |
| #define | SMSC95XX_INT_EP_CTL_PHY_EN 0x00008000UL |
| PHY interrupt. | |
| #define | SMSC95XX_BULK_IN_DLY 0x06c |
| Bulk IN delay register. | |
| #define | SMSC95XX_BULK_IN_DLY_SET(ticks) |
| Delay / 16.7ns. | |
| #define | SMSC95XX_MAC_CR 0x100 |
| MAC control register. | |
| #define | SMSC95XX_MAC_CR_RXALL 0x80000000UL |
| Receive all. | |
| #define | SMSC95XX_MAC_CR_FDPX 0x00100000UL |
| Full duplex. | |
| #define | SMSC95XX_MAC_CR_MCPAS 0x00080000UL |
| All multicast. | |
| #define | SMSC95XX_MAC_CR_PRMS 0x00040000UL |
| Promiscuous. | |
| #define | SMSC95XX_MAC_CR_PASSBAD 0x00010000UL |
| Pass bad frames. | |
| #define | SMSC95XX_MAC_CR_TXEN 0x00000008UL |
| TX enabled. | |
| #define | SMSC95XX_MAC_CR_RXEN 0x00000004UL |
| RX enabled. | |
| #define | SMSC95XX_ADDR_BASE 0x104 |
| MAC address register base. | |
| #define | SMSC95XX_MII_BASE 0x0114 |
| MII register base. | |
| #define | SMSC95XX_MII_PHY_INTR_SOURCE 29 |
| PHY interrupt source MII register. | |
| #define | SMSC95XX_MII_PHY_INTR_MASK 30 |
| PHY interrupt mask MII register. | |
| #define | SMSC95XX_PHY_INTR_ANEG_DONE 0x0040 |
| PHY interrupt: auto-negotiation complete. | |
| #define | SMSC95XX_PHY_INTR_LINK_DOWN 0x0010 |
| PHY interrupt: link down. | |
| #define | SMSC95XX_RX_RUNT 0x00004000UL |
| Runt frame. | |
| #define | SMSC95XX_RX_LATE 0x00000040UL |
| Late collision. | |
| #define | SMSC95XX_RX_CRC 0x00000002UL |
| CRC error. | |
| #define | SMSC95XX_TX_FIRST 0x00002000UL |
| First segment. | |
| #define | SMSC95XX_TX_LAST 0x00001000UL |
| Last segment. | |
| #define | SMSC95XX_TX_LEN(len) |
| Buffer size. | |
| #define | SMSC95XX_RX_STATISTICS 0 |
| Receive statistics. | |
| #define | SMSC95XX_TX_STATISTICS 1 |
| Transmit statistics. | |
| #define | SMSC95XX_RESET_DELAY_US 2 |
| Reset delay (in microseconds) | |
| #define | SMSC95XX_IN_MAX_FILL 8 |
| Bulk IN maximum fill level. | |
| #define | SMSC95XX_IN_MTU |
| Bulk IN buffer size. | |
| #define | SMSC95XX_VM3_OEM_STRING_MAC 2 |
| Honeywell VM3 MAC address OEM string index. | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
| FILE_SECBOOT (PERMITTED) | |
SMSC LAN95xx USB Ethernet driver.
Definition in file smsc95xx.h.
| #define SMSC95XX_INT_STS 0x008 |
| #define SMSC95XX_INT_STS_RXDF_INT 0x00000800UL |
| #define SMSC95XX_INT_STS_PHY_INT 0x00008000UL |
| #define SMSC95XX_TX_CFG 0x010 |
Transmit configuration register.
Definition at line 21 of file smsc95xx.h.
Referenced by smsc95xx_open().
| #define SMSC95XX_TX_CFG_ON 0x00000004UL |
| #define SMSC95XX_HW_CFG 0x014 |
Hardware configuration register.
Definition at line 25 of file smsc95xx.h.
Referenced by smsc95xx_open(), and smsc95xx_reset().
| #define SMSC95XX_HW_CFG_BIR 0x00001000UL |
| #define SMSC95XX_HW_CFG_LRST 0x00000008UL |
| #define SMSC95XX_LED_GPIO_CFG 0x024 |
LED GPIO configuration register.
Definition at line 30 of file smsc95xx.h.
Referenced by smsc95xx_reset().
| #define SMSC95XX_LED_GPIO_CFG_GPCTL2 | ( | x | ) |
| #define SMSC95XX_LED_GPIO_CFG_GPCTL2_NSPD_LED SMSC95XX_LED_GPIO_CFG_GPCTL2 ( 1 ) |
Link speed LED.
Definition at line 32 of file smsc95xx.h.
Referenced by smsc95xx_reset().
| #define SMSC95XX_LED_GPIO_CFG_GPCTL1 | ( | x | ) |
| #define SMSC95XX_LED_GPIO_CFG_GPCTL1_NLNKA_LED SMSC95XX_LED_GPIO_CFG_GPCTL1 ( 1 ) |
Activity LED.
Definition at line 35 of file smsc95xx.h.
Referenced by smsc95xx_reset().
| #define SMSC95XX_LED_GPIO_CFG_GPCTL0 | ( | x | ) |
| #define SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 ) |
Full-duplex LED.
Definition at line 38 of file smsc95xx.h.
Referenced by smsc95xx_reset().
| #define SMSC95XX_E2P_BASE 0x030 |
| #define SMSC95XX_INT_EP_CTL 0x068 |
Interrupt endpoint control register.
Definition at line 45 of file smsc95xx.h.
Referenced by smsc95xx_open().
| #define SMSC95XX_INT_EP_CTL_RXDF_EN 0x00000800UL |
| #define SMSC95XX_INT_EP_CTL_PHY_EN 0x00008000UL |
| #define SMSC95XX_BULK_IN_DLY 0x06c |
| #define SMSC95XX_BULK_IN_DLY_SET | ( | ticks | ) |
Delay / 16.7ns.
Definition at line 51 of file smsc95xx.h.
Referenced by smsc95xx_open().
| #define SMSC95XX_MAC_CR 0x100 |
| #define SMSC95XX_MAC_CR_RXALL 0x80000000UL |
| #define SMSC95XX_MAC_CR_FDPX 0x00100000UL |
| #define SMSC95XX_MAC_CR_MCPAS 0x00080000UL |
| #define SMSC95XX_MAC_CR_PRMS 0x00040000UL |
| #define SMSC95XX_MAC_CR_PASSBAD 0x00010000UL |
| #define SMSC95XX_MAC_CR_TXEN 0x00000008UL |
| #define SMSC95XX_MAC_CR_RXEN 0x00000004UL |
| #define SMSC95XX_ADDR_BASE 0x104 |
| #define SMSC95XX_MII_BASE 0x0114 |
| #define SMSC95XX_MII_PHY_INTR_SOURCE 29 |
PHY interrupt source MII register.
Definition at line 70 of file smsc95xx.h.
Referenced by smsc95xx_probe().
| #define SMSC95XX_MII_PHY_INTR_MASK 30 |
PHY interrupt mask MII register.
Definition at line 73 of file smsc95xx.h.
Referenced by smsc95xx_open().
| #define SMSC95XX_PHY_INTR_ANEG_DONE 0x0040 |
PHY interrupt: auto-negotiation complete.
Definition at line 76 of file smsc95xx.h.
Referenced by smsc95xx_open().
| #define SMSC95XX_PHY_INTR_LINK_DOWN 0x0010 |
| #define SMSC95XX_RX_RUNT 0x00004000UL |
| #define SMSC95XX_RX_LATE 0x00000040UL |
| #define SMSC95XX_RX_CRC 0x00000002UL |
| #define SMSC95XX_TX_FIRST 0x00002000UL |
| #define SMSC95XX_TX_LAST 0x00001000UL |
| #define SMSC95XX_TX_LEN | ( | len | ) |
Buffer size.
Definition at line 111 of file smsc95xx.h.
Referenced by smsc95xx_out_transmit().
| #define SMSC95XX_RX_STATISTICS 0 |
Receive statistics.
Definition at line 134 of file smsc95xx.h.
Referenced by smsc95xx_dump_statistics().
| #define SMSC95XX_TX_STATISTICS 1 |
Transmit statistics.
Definition at line 161 of file smsc95xx.h.
Referenced by smsc95xx_dump_statistics().
| #define SMSC95XX_RESET_DELAY_US 2 |
Reset delay (in microseconds)
Definition at line 164 of file smsc95xx.h.
Referenced by smsc95xx_reset().
| #define SMSC95XX_IN_MAX_FILL 8 |
Bulk IN maximum fill level.
This is a policy decision.
Definition at line 170 of file smsc95xx.h.
Referenced by smsc95xx_probe().
| #define SMSC95XX_IN_MTU |
Bulk IN buffer size.
Definition at line 173 of file smsc95xx.h.
Referenced by smsc95xx_probe().
| #define SMSC95XX_VM3_OEM_STRING_MAC 2 |
Honeywell VM3 MAC address OEM string index.
Definition at line 179 of file smsc95xx.h.
Referenced by smsc95xx_vm3_fetch_mac().
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
| FILE_SECBOOT | ( | PERMITTED | ) |