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iPXE
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SMSC LAN95xx USB Ethernet driver. More...
#include "smscusb.h"Go to the source code of this file.
Data Structures | |
| struct | smsc95xx_rx_header |
| Receive packet header. More... | |
| struct | smsc95xx_tx_header |
| Transmit packet header. More... | |
| struct | smsc95xx_rx_statistics |
| Receive statistics. More... | |
| struct | smsc95xx_tx_statistics |
| Transmit statistics. More... | |
Macros | |
| #define | SMSC95XX_INT_STS 0x008 |
| Interrupt status register. More... | |
| #define | SMSC95XX_INT_STS_RXDF_INT 0x00000800UL |
| RX FIFO overflow. More... | |
| #define | SMSC95XX_INT_STS_PHY_INT 0x00008000UL |
| PHY interrupt. More... | |
| #define | SMSC95XX_TX_CFG 0x010 |
| Transmit configuration register. More... | |
| #define | SMSC95XX_TX_CFG_ON 0x00000004UL |
| TX enable. More... | |
| #define | SMSC95XX_HW_CFG 0x014 |
| Hardware configuration register. More... | |
| #define | SMSC95XX_HW_CFG_BIR 0x00001000UL |
| Bulk IN use NAK. More... | |
| #define | SMSC95XX_HW_CFG_LRST 0x00000008UL |
| Soft lite reset. More... | |
| #define | SMSC95XX_LED_GPIO_CFG 0x024 |
| LED GPIO configuration register. More... | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL2(x) ( (x) << 24 ) |
| GPIO 2 control. More... | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL2_NSPD_LED SMSC95XX_LED_GPIO_CFG_GPCTL2 ( 1 ) |
| Link speed LED. More... | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL1(x) ( (x) << 20 ) |
| GPIO 1 control. More... | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL1_NLNKA_LED SMSC95XX_LED_GPIO_CFG_GPCTL1 ( 1 ) |
| Activity LED. More... | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL0(x) ( (x) << 16 ) |
| GPIO 0 control. More... | |
| #define | SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 ) |
| Full-duplex LED. More... | |
| #define | SMSC95XX_E2P_BASE 0x030 |
| EEPROM register base. More... | |
| #define | SMSC95XX_INT_EP_CTL 0x068 |
| Interrupt endpoint control register. More... | |
| #define | SMSC95XX_INT_EP_CTL_RXDF_EN 0x00000800UL |
| RX FIFO overflow. More... | |
| #define | SMSC95XX_INT_EP_CTL_PHY_EN 0x00008000UL |
| PHY interrupt. More... | |
| #define | SMSC95XX_BULK_IN_DLY 0x06c |
| Bulk IN delay register. More... | |
| #define | SMSC95XX_BULK_IN_DLY_SET(ticks) ( (ticks) << 0 ) |
| Delay / 16.7ns. More... | |
| #define | SMSC95XX_MAC_CR 0x100 |
| MAC control register. More... | |
| #define | SMSC95XX_MAC_CR_RXALL 0x80000000UL |
| Receive all. More... | |
| #define | SMSC95XX_MAC_CR_FDPX 0x00100000UL |
| Full duplex. More... | |
| #define | SMSC95XX_MAC_CR_MCPAS 0x00080000UL |
| All multicast. More... | |
| #define | SMSC95XX_MAC_CR_PRMS 0x00040000UL |
| Promiscuous. More... | |
| #define | SMSC95XX_MAC_CR_PASSBAD 0x00010000UL |
| Pass bad frames. More... | |
| #define | SMSC95XX_MAC_CR_TXEN 0x00000008UL |
| TX enabled. More... | |
| #define | SMSC95XX_MAC_CR_RXEN 0x00000004UL |
| RX enabled. More... | |
| #define | SMSC95XX_ADDR_BASE 0x104 |
| MAC address register base. More... | |
| #define | SMSC95XX_MII_BASE 0x0114 |
| MII register base. More... | |
| #define | SMSC95XX_MII_PHY_INTR_SOURCE 29 |
| PHY interrupt source MII register. More... | |
| #define | SMSC95XX_MII_PHY_INTR_MASK 30 |
| PHY interrupt mask MII register. More... | |
| #define | SMSC95XX_PHY_INTR_ANEG_DONE 0x0040 |
| PHY interrupt: auto-negotiation complete. More... | |
| #define | SMSC95XX_PHY_INTR_LINK_DOWN 0x0010 |
| PHY interrupt: link down. More... | |
| #define | SMSC95XX_RX_RUNT 0x00004000UL |
| Runt frame. More... | |
| #define | SMSC95XX_RX_LATE 0x00000040UL |
| Late collision. More... | |
| #define | SMSC95XX_RX_CRC 0x00000002UL |
| CRC error. More... | |
| #define | SMSC95XX_TX_FIRST 0x00002000UL |
| First segment. More... | |
| #define | SMSC95XX_TX_LAST 0x00001000UL |
| Last segment. More... | |
| #define | SMSC95XX_TX_LEN(len) ( (len) << 0 ) |
| Buffer size. More... | |
| #define | SMSC95XX_RX_STATISTICS 0 |
| Receive statistics. More... | |
| #define | SMSC95XX_TX_STATISTICS 1 |
| Transmit statistics. More... | |
| #define | SMSC95XX_RESET_DELAY_US 2 |
| Reset delay (in microseconds) More... | |
| #define | SMSC95XX_IN_MAX_FILL 8 |
| Bulk IN maximum fill level. More... | |
| #define | SMSC95XX_IN_MTU |
| Bulk IN buffer size. More... | |
| #define | SMSC95XX_VM3_OEM_STRING_MAC 2 |
| Honeywell VM3 MAC address OEM string index. More... | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
SMSC LAN95xx USB Ethernet driver.
Definition in file smsc95xx.h.
| #define SMSC95XX_INT_STS 0x008 |
Interrupt status register.
Definition at line 15 of file smsc95xx.h.
| #define SMSC95XX_INT_STS_RXDF_INT 0x00000800UL |
RX FIFO overflow.
Definition at line 16 of file smsc95xx.h.
| #define SMSC95XX_INT_STS_PHY_INT 0x00008000UL |
PHY interrupt.
Definition at line 17 of file smsc95xx.h.
| #define SMSC95XX_TX_CFG 0x010 |
Transmit configuration register.
Definition at line 20 of file smsc95xx.h.
| #define SMSC95XX_TX_CFG_ON 0x00000004UL |
TX enable.
Definition at line 21 of file smsc95xx.h.
| #define SMSC95XX_HW_CFG 0x014 |
Hardware configuration register.
Definition at line 24 of file smsc95xx.h.
| #define SMSC95XX_HW_CFG_BIR 0x00001000UL |
Bulk IN use NAK.
Definition at line 25 of file smsc95xx.h.
| #define SMSC95XX_HW_CFG_LRST 0x00000008UL |
Soft lite reset.
Definition at line 26 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG 0x024 |
LED GPIO configuration register.
Definition at line 29 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG_GPCTL2 | ( | x | ) | ( (x) << 24 ) |
GPIO 2 control.
Definition at line 30 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG_GPCTL2_NSPD_LED SMSC95XX_LED_GPIO_CFG_GPCTL2 ( 1 ) |
Link speed LED.
Definition at line 31 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG_GPCTL1 | ( | x | ) | ( (x) << 20 ) |
GPIO 1 control.
Definition at line 33 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG_GPCTL1_NLNKA_LED SMSC95XX_LED_GPIO_CFG_GPCTL1 ( 1 ) |
Activity LED.
Definition at line 34 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG_GPCTL0 | ( | x | ) | ( (x) << 16 ) |
GPIO 0 control.
Definition at line 36 of file smsc95xx.h.
| #define SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 ) |
Full-duplex LED.
Definition at line 37 of file smsc95xx.h.
| #define SMSC95XX_E2P_BASE 0x030 |
EEPROM register base.
Definition at line 41 of file smsc95xx.h.
| #define SMSC95XX_INT_EP_CTL 0x068 |
Interrupt endpoint control register.
Definition at line 44 of file smsc95xx.h.
| #define SMSC95XX_INT_EP_CTL_RXDF_EN 0x00000800UL |
RX FIFO overflow.
Definition at line 45 of file smsc95xx.h.
| #define SMSC95XX_INT_EP_CTL_PHY_EN 0x00008000UL |
PHY interrupt.
Definition at line 46 of file smsc95xx.h.
| #define SMSC95XX_BULK_IN_DLY 0x06c |
Bulk IN delay register.
Definition at line 49 of file smsc95xx.h.
| #define SMSC95XX_BULK_IN_DLY_SET | ( | ticks | ) | ( (ticks) << 0 ) |
Delay / 16.7ns.
Definition at line 50 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR 0x100 |
MAC control register.
Definition at line 53 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_RXALL 0x80000000UL |
Receive all.
Definition at line 54 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_FDPX 0x00100000UL |
Full duplex.
Definition at line 55 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_MCPAS 0x00080000UL |
All multicast.
Definition at line 56 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_PRMS 0x00040000UL |
Promiscuous.
Definition at line 57 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_PASSBAD 0x00010000UL |
Pass bad frames.
Definition at line 58 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_TXEN 0x00000008UL |
TX enabled.
Definition at line 59 of file smsc95xx.h.
| #define SMSC95XX_MAC_CR_RXEN 0x00000004UL |
RX enabled.
Definition at line 60 of file smsc95xx.h.
| #define SMSC95XX_ADDR_BASE 0x104 |
MAC address register base.
Definition at line 63 of file smsc95xx.h.
| #define SMSC95XX_MII_BASE 0x0114 |
MII register base.
Definition at line 66 of file smsc95xx.h.
| #define SMSC95XX_MII_PHY_INTR_SOURCE 29 |
PHY interrupt source MII register.
Definition at line 69 of file smsc95xx.h.
| #define SMSC95XX_MII_PHY_INTR_MASK 30 |
PHY interrupt mask MII register.
Definition at line 72 of file smsc95xx.h.
| #define SMSC95XX_PHY_INTR_ANEG_DONE 0x0040 |
PHY interrupt: auto-negotiation complete.
Definition at line 75 of file smsc95xx.h.
| #define SMSC95XX_PHY_INTR_LINK_DOWN 0x0010 |
PHY interrupt: link down.
Definition at line 78 of file smsc95xx.h.
| #define SMSC95XX_RX_RUNT 0x00004000UL |
Runt frame.
Definition at line 87 of file smsc95xx.h.
| #define SMSC95XX_RX_LATE 0x00000040UL |
Late collision.
Definition at line 90 of file smsc95xx.h.
| #define SMSC95XX_RX_CRC 0x00000002UL |
CRC error.
Definition at line 93 of file smsc95xx.h.
| #define SMSC95XX_TX_FIRST 0x00002000UL |
First segment.
Definition at line 104 of file smsc95xx.h.
| #define SMSC95XX_TX_LAST 0x00001000UL |
Last segment.
Definition at line 107 of file smsc95xx.h.
Buffer size.
Definition at line 110 of file smsc95xx.h.
| #define SMSC95XX_RX_STATISTICS 0 |
Receive statistics.
Definition at line 133 of file smsc95xx.h.
| #define SMSC95XX_TX_STATISTICS 1 |
Transmit statistics.
Definition at line 160 of file smsc95xx.h.
| #define SMSC95XX_RESET_DELAY_US 2 |
Reset delay (in microseconds)
Definition at line 163 of file smsc95xx.h.
| #define SMSC95XX_IN_MAX_FILL 8 |
| #define SMSC95XX_IN_MTU |
Bulk IN buffer size.
Definition at line 172 of file smsc95xx.h.
| #define SMSC95XX_VM3_OEM_STRING_MAC 2 |
Honeywell VM3 MAC address OEM string index.
Definition at line 178 of file smsc95xx.h.
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
1.8.15