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#define | UHCI_ALIGN 16 |
| Minimum alignment required for data structures. More...
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#define | UHCI_PORTS 2 |
| Number of ports. More...
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#define | UHCI_MTU 1280 |
| Maximum transfer size. More...
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#define | UHCI_BAR_SIZE 0x14 |
| I/O BAR size. More...
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#define | UHCI_USBCMD 0x00 |
| USB command register. More...
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#define | UHCI_USBCMD_MAX64 0x0080 |
| Max packet is 64 bytes. More...
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#define | UHCI_USBCMD_HCRESET 0x0002 |
| Host controller reset. More...
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#define | UHCI_USBCMD_RUN 0x0001 |
| Run/stop. More...
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#define | UHCI_USBSTS 0x02 |
| USB status register. More...
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#define | UHCI_USBSTS_HCHALTED 0x0020 |
| Host controller halted. More...
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#define | UHCI_USBSTS_USBINT 0x0001 |
| USB interrupt. More...
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#define | UHCI_FLBASEADD 0x08 |
| Frame list base address register. More...
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#define | UHCI_PORTSC(port) ( 0x0e + ( (port) << 1 ) ) |
| Port status and control register. More...
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#define | UHCI_PORTSC_PR 0x0200 |
| Port reset. More...
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#define | UHCI_PORTSC_LS 0x0100 |
| Low-speed device attached. More...
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#define | UHCI_PORTSC_PEC 0x0008 |
| Port enabled/disabled change. More...
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#define | UHCI_PORTSC_PED 0x0004 |
| Port enabled. More...
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#define | UHCI_PORTSC_CSC 0x0002 |
| Connect status change. More...
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#define | UHCI_PORTSC_CCS 0x0001 |
| Current connect status. More...
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#define | UHCI_PORTSC_CHANGE ( UHCI_PORTSC_CSC | UHCI_PORTSC_PEC ) |
| Port status change mask. More...
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#define | UHCI_LINK_DEPTH_FIRST 0x00000004UL |
| Depth-first processing. More...
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#define | UHCI_LINK_TYPE_QH 0x00000002UL |
| Queue head type. More...
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#define | UHCI_LINK_TERMINATE 0x00000001UL |
| List terminator. More...
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#define | UHCI_FRAMES 1024 |
| Number of frames in frame list. More...
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#define | UHCI_LEN_MASK 0x7ff |
| Length mask. More...
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#define | UHCI_ACTUAL_LEN(actual) ( ( (actual) + 1 ) & UHCI_LEN_MASK ) |
| Actual length. More...
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#define | UHCI_STATUS_ACTIVE 0x80 |
| Active. More...
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#define | UHCI_STATUS_STALLED 0x40 |
| Stalled. More...
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#define | UHCI_STATUS_BUFFER 0x20 |
| Data buffer error. More...
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#define | UHCI_STATUS_BABBLE 0x10 |
| Babble detected. More...
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#define | UHCI_STATUS_NAK 0x08 |
| NAK received. More...
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#define | UHCI_STATUS_CRC_TIMEOUT 0x04 |
| CRC/timeout error. More...
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#define | UHCI_STATUS_BITSTUFF 0x02 |
| Bitstuff error. More...
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#define | UHCI_FL_SPD 0x20 |
| Short packet detect. More...
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#define | UHCI_FL_CERR(count) ( (count) << 3 ) |
| Error counter. More...
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#define | UHCI_FL_CERR_MAX UHCI_FL_CERR ( 3 ) |
| Error counter maximum value. More...
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#define | UHCI_FL_LS 0x04 |
| Low speed device. More...
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#define | UHCI_FL_IOC 0x01 |
| Interrupt on completion. More...
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#define | UHCI_CONTROL_PID(pid) ( (pid) << 0 ) |
| Packet ID. More...
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#define | UHCI_CONTROL_PID_MASK UHCI_CONTROL_PID ( 0xff ) |
| Packet ID mask. More...
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#define | UHCI_CONTROL_DEVICE(address) ( (address) << 8 ) |
| Device address. More...
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#define | UHCI_CONTROL_ENDPOINT(address) ( (address) << 15 ) |
| Endpoint address. More...
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#define | UHCI_CONTROL_TOGGLE ( 1 << 19 ) |
| Data toggle. More...
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#define | UHCI_CONTROL_LEN(len) ( ( ( (len) - 1 ) & UHCI_LEN_MASK ) << 21 ) |
| Data length. More...
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#define | UHCI_DATA_PACKET(control) ( ! ( control & 0x04 ) ) |
| Check for data packet. More...
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#define | UHCI_SHORT_PACKET(control, actual) ( ( ( (control) >> 21 ) ^ (actual) ) & UHCI_LEN_MASK ) |
| Check for short packet. More...
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#define | UHCI_USBLEGSUP 0xc0 |
| USB legacy support register (in PCI configuration space) More...
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#define | UHCI_USBLEGSUP_DEFAULT 0x2000 |
| USB legacy support default value. More...
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#define | UHCI_RING_COUNT 16 |
| Number of transfer descriptors in a ring. More...
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#define | UHCI_STOP_MAX_WAIT_MS 100 |
| Maximum time to wait for host controller to stop. More...
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#define | UHCI_RESET_MAX_WAIT_MS 500 |
| Maximum time to wait for reset to complete. More...
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#define | UHCI_PORT_ENABLE_MAX_WAIT_MS 500 |
| Maximum time to wait for a port to be enabled. More...
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