iPXE
etherfabric_nic.h
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00001 /**************************************************************************
00002  *
00003  * Etherboot driver for Level 5 Etherfabric network cards
00004  *
00005  * Written by Michael Brown <mbrown@fensystems.co.uk>
00006  *
00007  * Copyright Fen Systems Ltd. 2005
00008  * Copyright Level 5 Networks Inc. 2005
00009  *
00010  * This software may be used and distributed according to the terms of
00011  * the GNU General Public License (GPL), incorporated herein by
00012  * reference.  Drivers based on or derived from this code fall under
00013  * the GPL and must retain the authorship, copyright and license
00014  * notice.
00015  *
00016  **************************************************************************
00017  */
00018 
00019 FILE_LICENCE ( GPL_ANY );
00020 
00021 #ifndef EFAB_NIC_H
00022 #define  EFAB_NIC_H
00023 #include <ipxe/bitbash.h>
00024 #include <ipxe/i2c.h>
00025 #include <ipxe/spi.h>
00026 #include <ipxe/nvo.h>
00027 #include <ipxe/if_ether.h>
00028 /**************************************************************************
00029  *
00030  * Constants and macros
00031  *
00032  **************************************************************************
00033  */
00034 /* Board IDs. Early boards have no board_type, (e.g. EF1002 and 401/403)
00035  * But newer boards are getting bigger...
00036  */
00037 typedef enum {
00038         EFAB_BOARD_INVALID = 0, /* Early boards do not have board rev. info. */
00039         EFAB_BOARD_SFE4001 = 1,
00040         EFAB_BOARD_SFE4002 = 2,
00041         EFAB_BOARD_SFE4003 = 3,
00042         /* Insert new types before here */
00043         EFAB_BOARD_MAX
00044 } efab_board_type;
00045 
00046 /* PHY types. */
00047 typedef enum {
00048         PHY_TYPE_AUTO = 0, /* on development board detect between CX4 & alaska */
00049         PHY_TYPE_CX4_RTMR = 1,
00050         PHY_TYPE_1GIG_ALASKA = 2,
00051         PHY_TYPE_10XPRESS = 3,
00052         PHY_TYPE_XFP = 4,
00053         PHY_TYPE_CX4 = 5,
00054         PHY_TYPE_PM8358 = 6,
00055 } phy_type_t;
00056 
00057 /**************************************************************************
00058  *
00059  * Hardware data structures and sizing
00060  *
00061  **************************************************************************
00062  */
00063 
00064 #define dma_addr_t unsigned long
00065 typedef efab_qword_t falcon_rx_desc_t;
00066 typedef efab_qword_t falcon_tx_desc_t;
00067 typedef efab_qword_t falcon_event_t;
00068 
00069 #define EFAB_BUF_ALIGN          4096
00070 #define EFAB_RXD_SIZE           512
00071 #define EFAB_TXD_SIZE           512
00072 #define EFAB_EVQ_SIZE           512
00073 
00074 #define EFAB_NUM_RX_DESC        16
00075 #define EFAB_RX_BUF_SIZE        1600
00076 
00077 /**************************************************************************
00078  *
00079  * Data structures
00080  *
00081  **************************************************************************
00082  */
00083 
00084 struct efab_nic;
00085 
00086 /* A buffer table allocation backing a tx dma, rx dma or eventq */
00087 struct efab_special_buffer {
00088         dma_addr_t dma_addr;
00089         int id;
00090 };
00091 
00092 /* A TX queue */
00093 struct efab_tx_queue {
00094         /* The hardware ring */
00095         falcon_tx_desc_t *ring;
00096 
00097         /* The software ring storing io_buffers. */
00098         struct io_buffer *buf[EFAB_TXD_SIZE];
00099 
00100         /* The buffer table reservation pushed to hardware */
00101         struct efab_special_buffer entry;
00102 
00103         /* Software descriptor write ptr */
00104         unsigned int write_ptr;
00105 
00106         /* Hardware descriptor read ptr */
00107         unsigned int read_ptr;
00108 };
00109 
00110 /* An RX queue */
00111 struct efab_rx_queue {
00112         /* The hardware ring */
00113         falcon_rx_desc_t *ring;
00114 
00115         /* The software ring storing io_buffers */
00116         struct io_buffer *buf[EFAB_NUM_RX_DESC];
00117 
00118         /* The buffer table reservation pushed to hardware */
00119         struct efab_special_buffer entry;
00120 
00121         /* Descriptor write ptr, into both the hardware and software rings */
00122         unsigned int write_ptr;
00123 
00124         /* Hardware completion ptr */
00125         unsigned int read_ptr;
00126 };
00127 
00128 /* An event queue */
00129 struct efab_ev_queue {
00130         /* The hardware ring to push to hardware.
00131          * Must be the first entry in the structure */
00132         falcon_event_t *ring;
00133 
00134         /* The buffer table reservation pushed to hardware */
00135         struct efab_special_buffer entry;
00136 
00137         /* Pointers into the ring */
00138         unsigned int read_ptr;
00139 };
00140 
00141 struct efab_mac_operations {
00142         int ( * init ) ( struct efab_nic *efab );
00143 };
00144 
00145 struct efab_phy_operations {
00146         int ( * init ) ( struct efab_nic *efab );
00147         unsigned int mmds;
00148 };
00149 
00150 struct efab_board_operations {
00151         int ( * init ) ( struct efab_nic *efab );
00152         void ( * fini ) ( struct efab_nic *efab );
00153 };
00154 
00155 struct efab_nic {
00156         struct net_device *netdev;
00157         int pci_revision;
00158         int is_asic;
00159 
00160         /* I2C bit-bashed interface */
00161         struct i2c_bit_basher i2c_bb;
00162 
00163         /** SPI bus and devices, and the user visible NVO area */
00164         struct spi_bus spi_bus;
00165         struct spi_device spi_flash;
00166         struct spi_device spi_eeprom;
00167         struct spi_device *spi;
00168         struct nvo_block nvo;
00169 
00170         /** Board, MAC, and PHY operations tables */
00171         struct efab_board_operations *board_op;
00172         struct efab_mac_operations *mac_op;
00173         struct efab_phy_operations *phy_op;
00174 
00175         /* PHY and board types */
00176         int phy_addr;
00177         int phy_type;
00178         int phy_10g;
00179         int board_type;
00180 
00181         /** Memory and IO base */
00182         void *membase;
00183         unsigned int iobase;
00184 
00185         /* Buffer table allocation head */
00186         int buffer_head;
00187 
00188         /* Queues */
00189         struct efab_rx_queue rx_queue;
00190         struct efab_tx_queue tx_queue;
00191         struct efab_ev_queue ev_queue;
00192 
00193         /** MAC address */
00194         uint8_t mac_addr[ETH_ALEN];
00195         /** GMII link options */
00196         unsigned int link_options;
00197         /** Link status */
00198         int link_up;
00199 
00200         /** INT_REG_KER */
00201         efab_oword_t int_ker __attribute__ (( aligned ( 16 ) ));
00202 };
00203 #endif /* EFAB_NIC_H */
00204