iPXE
Data Structures | Macros | Functions
rdc.h File Reference

RDC R6040 network driver. More...

#include <stdint.h>
#include <ipxe/if_ether.h>
#include <ipxe/mii.h>

Go to the source code of this file.

Data Structures

struct  rdc_descriptor
 An RDC descriptor. More...
 
union  rdc_mac
 A MAC address. More...
 
struct  rdc_ring
 A descriptor ring. More...
 
struct  rdc_nic
 An RDC network card. More...
 

Macros

#define RDC_BAR_SIZE   256
 RDC BAR size. More...
 
#define RDC_FL_OWNED   0x8000
 Descriptor is owned by NIC. More...
 
#define RDC_FL_OK   0x4000
 Packet OK. More...
 
#define RDC_MCR0   0x00
 MAC control register 0. More...
 
#define RDC_MCR0_FD   0x8000
 Full duplex. More...
 
#define RDC_MCR0_TXEN   0x1000
 Transmit enable. More...
 
#define RDC_MCR0_PROMISC   0x0020
 Promiscuous mode. More...
 
#define RDC_MCR0_RXEN   0x0002
 Receive enable. More...
 
#define RDC_MCR1   0x04
 MAC control register 1. More...
 
#define RDC_MCR1_RST   0x0001
 MAC reset. More...
 
#define RDC_RESET_MAX_WAIT_MS   10
 Maximum time to wait for reset. More...
 
#define RDC_MTPR   0x14
 MAC transmit poll command register. More...
 
#define RDC_MTPR_TM2TX   0x0001
 Trigger MAC to transmit. More...
 
#define RDC_MRBSR   0x18
 MAC receive buffer size register. More...
 
#define RDC_MMDIO   0x20
 MAC MDIO control register. More...
 
#define RDC_MMDIO_MIIWR   0x4000
 MDIO write. More...
 
#define RDC_MMDIO_MIIRD   0x2000
 MDIO read. More...
 
#define RDC_MMDIO_PHYAD(x)   ( (x) << 8 )
 PHY address. More...
 
#define RDC_MMDIO_REGAD(x)   ( (x) << 0 )
 Register address. More...
 
#define RDC_MII_MAX_WAIT_US   2048
 Maximum time to wait for an MII read or write. More...
 
#define RDC_MMRD   0x24
 MAC MDIO read data register. More...
 
#define RDC_MMWD   0x28
 MAC MDIO write data register. More...
 
#define RDC_MTDSA   0x2c
 MAC transmit descriptor start address. More...
 
#define RDC_MRDSA   0x34
 MAC receive descriptor start address. More...
 
#define RDC_MxDSA_LO   0x0
 MAC descriptor start address low half. More...
 
#define RDC_MxDSA_HI   0x4
 MAC descriptor start address low half. More...
 
#define RDC_MISR   0x3c
 MAC interrupt status register. More...
 
#define RDC_MIRQ_LINK   0x0200
 Link status changed. More...
 
#define RDC_MIRQ_TX   0x0010
 Transmit complete. More...
 
#define RDC_MIRQ_RX_EARLY   0x0008
 Receive early interrupt. More...
 
#define RDC_MIRQ_RX_EMPTY   0x0002
 Receive descriptor unavailable. More...
 
#define RDC_MIRQ_RX   0x0001
 Receive complete. More...
 
#define RDC_MIER   0x40
 MAC interrupt enable register. More...
 
#define RDC_MID0   0x68
 MAC address word 0. More...
 
#define RDC_MID1   0x6a
 MAC address word 1. More...
 
#define RDC_MID2   0x6c
 MAC address word 2. More...
 
#define RDC_MPSCCR   0x88
 MAC PHY status change configuration register. More...
 
#define RDC_MPSCCR_EN   0x8000
 PHY status change enable. More...
 
#define RDC_MPSCCR_PHYAD(x)   ( (x) << 8 )
 PHY address. More...
 
#define RDC_MPSCCR_SLOW   0x0007
 Poll slowly. More...
 
#define RDC_MACSM   0xac
 MAC state machine register. More...
 
#define RDC_MACSM_RST   0x0002
 Reset state machine. More...
 
#define RDC_MACSM_RESET_DELAY_MS   10
 Time to wait after resetting MAC state machine. More...
 
#define RDC_NUM_TX_DESC   16
 Number of transmit descriptors. More...
 
#define RDC_NUM_RX_DESC   8
 Number of receive descriptors. More...
 
#define RDC_RX_MAX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
 Receive buffer length. More...
 

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 
static void rdc_init_ring (struct rdc_ring *ring, unsigned int count, unsigned int reg)
 Initialise descriptor ring. More...
 

Detailed Description

RDC R6040 network driver.

Definition in file rdc.h.

Macro Definition Documentation

◆ RDC_BAR_SIZE

#define RDC_BAR_SIZE   256

RDC BAR size.

Definition at line 17 of file rdc.h.

◆ RDC_FL_OWNED

#define RDC_FL_OWNED   0x8000

Descriptor is owned by NIC.

Definition at line 34 of file rdc.h.

◆ RDC_FL_OK

#define RDC_FL_OK   0x4000

Packet OK.

Definition at line 37 of file rdc.h.

◆ RDC_MCR0

#define RDC_MCR0   0x00

MAC control register 0.

Definition at line 40 of file rdc.h.

◆ RDC_MCR0_FD

#define RDC_MCR0_FD   0x8000

Full duplex.

Definition at line 41 of file rdc.h.

◆ RDC_MCR0_TXEN

#define RDC_MCR0_TXEN   0x1000

Transmit enable.

Definition at line 42 of file rdc.h.

◆ RDC_MCR0_PROMISC

#define RDC_MCR0_PROMISC   0x0020

Promiscuous mode.

Definition at line 43 of file rdc.h.

◆ RDC_MCR0_RXEN

#define RDC_MCR0_RXEN   0x0002

Receive enable.

Definition at line 44 of file rdc.h.

◆ RDC_MCR1

#define RDC_MCR1   0x04

MAC control register 1.

Definition at line 47 of file rdc.h.

◆ RDC_MCR1_RST

#define RDC_MCR1_RST   0x0001

MAC reset.

Definition at line 48 of file rdc.h.

◆ RDC_RESET_MAX_WAIT_MS

#define RDC_RESET_MAX_WAIT_MS   10

Maximum time to wait for reset.

Definition at line 51 of file rdc.h.

◆ RDC_MTPR

#define RDC_MTPR   0x14

MAC transmit poll command register.

Definition at line 54 of file rdc.h.

◆ RDC_MTPR_TM2TX

#define RDC_MTPR_TM2TX   0x0001

Trigger MAC to transmit.

Definition at line 55 of file rdc.h.

◆ RDC_MRBSR

#define RDC_MRBSR   0x18

MAC receive buffer size register.

Definition at line 58 of file rdc.h.

◆ RDC_MMDIO

#define RDC_MMDIO   0x20

MAC MDIO control register.

Definition at line 61 of file rdc.h.

◆ RDC_MMDIO_MIIWR

#define RDC_MMDIO_MIIWR   0x4000

MDIO write.

Definition at line 62 of file rdc.h.

◆ RDC_MMDIO_MIIRD

#define RDC_MMDIO_MIIRD   0x2000

MDIO read.

Definition at line 63 of file rdc.h.

◆ RDC_MMDIO_PHYAD

#define RDC_MMDIO_PHYAD (   x)    ( (x) << 8 )

PHY address.

Definition at line 64 of file rdc.h.

◆ RDC_MMDIO_REGAD

#define RDC_MMDIO_REGAD (   x)    ( (x) << 0 )

Register address.

Definition at line 65 of file rdc.h.

◆ RDC_MII_MAX_WAIT_US

#define RDC_MII_MAX_WAIT_US   2048

Maximum time to wait for an MII read or write.

Definition at line 68 of file rdc.h.

◆ RDC_MMRD

#define RDC_MMRD   0x24

MAC MDIO read data register.

Definition at line 71 of file rdc.h.

◆ RDC_MMWD

#define RDC_MMWD   0x28

MAC MDIO write data register.

Definition at line 74 of file rdc.h.

◆ RDC_MTDSA

#define RDC_MTDSA   0x2c

MAC transmit descriptor start address.

Definition at line 77 of file rdc.h.

◆ RDC_MRDSA

#define RDC_MRDSA   0x34

MAC receive descriptor start address.

Definition at line 80 of file rdc.h.

◆ RDC_MxDSA_LO

#define RDC_MxDSA_LO   0x0

MAC descriptor start address low half.

Definition at line 83 of file rdc.h.

◆ RDC_MxDSA_HI

#define RDC_MxDSA_HI   0x4

MAC descriptor start address low half.

Definition at line 86 of file rdc.h.

◆ RDC_MISR

#define RDC_MISR   0x3c

MAC interrupt status register.

Definition at line 89 of file rdc.h.

◆ RDC_MIRQ_LINK

#define RDC_MIRQ_LINK   0x0200

Link status changed.

Definition at line 90 of file rdc.h.

◆ RDC_MIRQ_TX

#define RDC_MIRQ_TX   0x0010

Transmit complete.

Definition at line 91 of file rdc.h.

◆ RDC_MIRQ_RX_EARLY

#define RDC_MIRQ_RX_EARLY   0x0008

Receive early interrupt.

Definition at line 92 of file rdc.h.

◆ RDC_MIRQ_RX_EMPTY

#define RDC_MIRQ_RX_EMPTY   0x0002

Receive descriptor unavailable.

Definition at line 93 of file rdc.h.

◆ RDC_MIRQ_RX

#define RDC_MIRQ_RX   0x0001

Receive complete.

Definition at line 94 of file rdc.h.

◆ RDC_MIER

#define RDC_MIER   0x40

MAC interrupt enable register.

Definition at line 97 of file rdc.h.

◆ RDC_MID0

#define RDC_MID0   0x68

MAC address word 0.

Definition at line 100 of file rdc.h.

◆ RDC_MID1

#define RDC_MID1   0x6a

MAC address word 1.

Definition at line 103 of file rdc.h.

◆ RDC_MID2

#define RDC_MID2   0x6c

MAC address word 2.

Definition at line 106 of file rdc.h.

◆ RDC_MPSCCR

#define RDC_MPSCCR   0x88

MAC PHY status change configuration register.

Definition at line 109 of file rdc.h.

◆ RDC_MPSCCR_EN

#define RDC_MPSCCR_EN   0x8000

PHY status change enable.

Definition at line 110 of file rdc.h.

◆ RDC_MPSCCR_PHYAD

#define RDC_MPSCCR_PHYAD (   x)    ( (x) << 8 )

PHY address.

Definition at line 111 of file rdc.h.

◆ RDC_MPSCCR_SLOW

#define RDC_MPSCCR_SLOW   0x0007

Poll slowly.

Definition at line 112 of file rdc.h.

◆ RDC_MACSM

#define RDC_MACSM   0xac

MAC state machine register.

Definition at line 115 of file rdc.h.

◆ RDC_MACSM_RST

#define RDC_MACSM_RST   0x0002

Reset state machine.

Definition at line 116 of file rdc.h.

◆ RDC_MACSM_RESET_DELAY_MS

#define RDC_MACSM_RESET_DELAY_MS   10

Time to wait after resetting MAC state machine.

Definition at line 119 of file rdc.h.

◆ RDC_NUM_TX_DESC

#define RDC_NUM_TX_DESC   16

Number of transmit descriptors.

This is a policy decision.

Definition at line 164 of file rdc.h.

◆ RDC_NUM_RX_DESC

#define RDC_NUM_RX_DESC   8

Number of receive descriptors.

This is a policy decision.

Definition at line 170 of file rdc.h.

◆ RDC_RX_MAX_LEN

#define RDC_RX_MAX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Receive buffer length.

Definition at line 173 of file rdc.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )

◆ rdc_init_ring()

static void rdc_init_ring ( struct rdc_ring ring,
unsigned int  count,
unsigned int  reg 
)
inlinestatic

Initialise descriptor ring.

Parameters
ringDescriptor ring
countNumber of descriptors
regStart address register 0

Definition at line 154 of file rdc.h.

154  {
155 
156  ring->count = count;
157  ring->reg = reg;
158 }
static unsigned int unsigned int reg
Definition: myson.h:162
unsigned int reg
Start address register 0.
Definition: rdc.h:143
unsigned int count
Number of descriptors.
Definition: rdc.h:141
uint16_t count
Number of entries.
Definition: ena.h:22

References count, rdc_ring::count, rdc_ring::reg, and reg.

Referenced by rdc_probe().