iPXE
tlan.h
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00001 /**************************************************************************
00002 *
00003 *    tlan.c -- Etherboot device driver for the Texas Instruments ThunderLAN
00004 *    Written 2003-2003 by Timothy Legge <tlegge@rogers.com>
00005 *
00006 *    This program is free software; you can redistribute it and/or modify
00007 *    it under the terms of the GNU General Public License as published by
00008 *    the Free Software Foundation; either version 2 of the License, or
00009 *    (at your option) any later version.
00010 *
00011 *    This program is distributed in the hope that it will be useful,
00012 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
00013 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014 *    GNU General Public License for more details.
00015 *
00016 *    You should have received a copy of the GNU General Public License
00017 *    along with this program; if not, write to the Free Software
00018 *    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00019 *    02110-1301, USA.
00020 *
00021 *    Portions of this code (almost all) based on:
00022 *               tlan.c: Linux ThunderLan Driver:
00023 *
00024 *                               by James Banks
00025 *
00026 *                               (C) 1997-1998 Caldera, Inc.
00027 *                               (C) 1998 James Banks
00028 *                               (C) 1999-2001 Torben Mathiasen
00029 *                               (C) 2002 Samuel Chessman
00030 *
00031 *    REVISION HISTORY:
00032 *    ================
00033 *    v1.0       07-08-2003      timlegge        Initial not quite working version
00034 *
00035 * Indent Style: indent -kr -i8
00036 ***************************************************************************/
00037 
00038 FILE_LICENCE ( GPL2_OR_LATER );
00039 
00040 /*****************************************************************
00041 * TLan Definitions
00042 *
00043 ****************************************************************/
00044 
00045 #define FALSE                   0
00046 #define TRUE                    1
00047 
00048 #define TLAN_MIN_FRAME_SIZE     64
00049 #define TLAN_MAX_FRAME_SIZE     1600
00050 
00051 #define TLAN_NUM_RX_LISTS       4
00052 #define TLAN_NUM_TX_LISTS       2
00053 
00054 #define TLAN_IGNORE             0
00055 #define TLAN_RECORD             1
00056 /*
00057 #define TLAN_DBG(lvl, format, args...)  if (debug&lvl) printf("TLAN: " format, ##args );
00058 */
00059 #define TLAN_DEBUG_GNRL         0x0001
00060 #define TLAN_DEBUG_TX           0x0002
00061 #define TLAN_DEBUG_RX           0x0004
00062 #define TLAN_DEBUG_LIST         0x0008
00063 #define TLAN_DEBUG_PROBE        0x0010
00064 
00065 #define TX_TIMEOUT              (10*HZ) /* We need time for auto-neg */
00066 #define MAX_TLAN_BOARDS         8       /* Max number of boards installed at a time */
00067 
00068 
00069         /*****************************************************************
00070          * Device Identification Definitions
00071          *
00072          ****************************************************************/
00073 
00074 #define PCI_DEVICE_ID_NETELLIGENT_10_T2                 0xB012
00075 #define PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100        0xB030
00076 #ifndef PCI_DEVICE_ID_OLICOM_OC2183
00077 #define PCI_DEVICE_ID_OLICOM_OC2183                     0x0013
00078 #endif
00079 #ifndef PCI_DEVICE_ID_OLICOM_OC2325
00080 #define PCI_DEVICE_ID_OLICOM_OC2325                     0x0012
00081 #endif
00082 #ifndef PCI_DEVICE_ID_OLICOM_OC2326
00083 #define PCI_DEVICE_ID_OLICOM_OC2326                     0x0014
00084 #endif
00085 
00086 typedef struct tlan_adapter_entry {
00087         u16 vendorId;
00088         u16 deviceId;
00089         char *deviceLabel;
00090         u32 flags;
00091         u16 addrOfs;
00092 } TLanAdapterEntry;
00093 
00094 #define TLAN_ADAPTER_NONE               0x00000000
00095 #define TLAN_ADAPTER_UNMANAGED_PHY      0x00000001
00096 #define TLAN_ADAPTER_BIT_RATE_PHY       0x00000002
00097 #define TLAN_ADAPTER_USE_INTERN_10      0x00000004
00098 #define TLAN_ADAPTER_ACTIVITY_LED       0x00000008
00099 
00100 #define TLAN_SPEED_DEFAULT      0
00101 #define TLAN_SPEED_10           10
00102 #define TLAN_SPEED_100          100
00103 
00104 #define TLAN_DUPLEX_DEFAULT     0
00105 #define TLAN_DUPLEX_HALF        1
00106 #define TLAN_DUPLEX_FULL        2
00107 
00108 
00109 
00110         /*****************************************************************
00111          * EISA Definitions
00112          *
00113          ****************************************************************/
00114 
00115 #define EISA_ID      0xc80      /* EISA ID Registers */
00116 #define EISA_ID0     0xc80      /* EISA ID Register 0 */
00117 #define EISA_ID1     0xc81      /* EISA ID Register 1 */
00118 #define EISA_ID2     0xc82      /* EISA ID Register 2 */
00119 #define EISA_ID3     0xc83      /* EISA ID Register 3 */
00120 #define EISA_CR      0xc84      /* EISA Control Register */
00121 #define EISA_REG0    0xc88      /* EISA Configuration Register 0 */
00122 #define EISA_REG1    0xc89      /* EISA Configuration Register 1 */
00123 #define EISA_REG2    0xc8a      /* EISA Configuration Register 2 */
00124 #define EISA_REG3    0xc8f      /* EISA Configuration Register 3 */
00125 #define EISA_APROM   0xc90      /* Ethernet Address PROM */
00126 
00127 
00128 
00129         /*****************************************************************
00130          * Rx/Tx List Definitions
00131          *
00132          ****************************************************************/
00133 
00134 #define TLAN_BUFFERS_PER_LIST   10
00135 #define TLAN_LAST_BUFFER        0x80000000
00136 #define TLAN_CSTAT_UNUSED       0x8000
00137 #define TLAN_CSTAT_FRM_CMP      0x4000
00138 #define TLAN_CSTAT_READY        0x3000
00139 #define TLAN_CSTAT_EOC          0x0800
00140 #define TLAN_CSTAT_RX_ERROR     0x0400
00141 #define TLAN_CSTAT_PASS_CRC     0x0200
00142 #define TLAN_CSTAT_DP_PR        0x0100
00143 
00144 
00145 
00146 
00147 
00148 
00149         /*****************************************************************
00150          * PHY definitions
00151          *
00152          ****************************************************************/
00153 
00154 #define TLAN_PHY_MAX_ADDR       0x1F
00155 #define TLAN_PHY_NONE           0x20
00156 
00157 
00158 
00159         /*****************************************************************
00160          * TLan Driver Timer Definitions
00161          *
00162          ****************************************************************/
00163 
00164 #define TLAN_TIMER_LINK_BEAT            1
00165 #define TLAN_TIMER_ACTIVITY             2
00166 #define TLAN_TIMER_PHY_PDOWN            3
00167 #define TLAN_TIMER_PHY_PUP              4
00168 #define TLAN_TIMER_PHY_RESET            5
00169 #define TLAN_TIMER_PHY_START_LINK       6
00170 #define TLAN_TIMER_PHY_FINISH_AN        7
00171 #define TLAN_TIMER_FINISH_RESET         8
00172 
00173 #define TLAN_TIMER_ACT_DELAY            (HZ/10)
00174 
00175 
00176 
00177 
00178         /*****************************************************************
00179          * TLan Driver Eeprom Definitions
00180          *
00181          ****************************************************************/
00182 
00183 #define TLAN_EEPROM_ACK         0
00184 #define TLAN_EEPROM_STOP        1
00185 
00186 
00187 
00188 
00189         /*****************************************************************
00190          * Host Register Offsets and Contents
00191          *
00192          ****************************************************************/
00193 
00194 #define TLAN_HOST_CMD                   0x00
00195 #define         TLAN_HC_GO              0x80000000
00196 #define         TLAN_HC_STOP            0x40000000
00197 #define         TLAN_HC_ACK             0x20000000
00198 #define         TLAN_HC_CS_MASK         0x1FE00000
00199 #define         TLAN_HC_EOC             0x00100000
00200 #define         TLAN_HC_RT              0x00080000
00201 #define         TLAN_HC_NES             0x00040000
00202 #define         TLAN_HC_AD_RST          0x00008000
00203 #define         TLAN_HC_LD_TMR          0x00004000
00204 #define         TLAN_HC_LD_THR          0x00002000
00205 #define         TLAN_HC_REQ_INT         0x00001000
00206 #define         TLAN_HC_INT_OFF         0x00000800
00207 #define         TLAN_HC_INT_ON          0x00000400
00208 #define         TLAN_HC_AC_MASK         0x000000FF
00209 #define TLAN_CH_PARM                    0x04
00210 #define TLAN_DIO_ADR                    0x08
00211 #define         TLAN_DA_ADR_INC         0x8000
00212 #define         TLAN_DA_RAM_ADR         0x4000
00213 #define TLAN_HOST_INT                   0x0A
00214 #define         TLAN_HI_IV_MASK         0x1FE0
00215 #define         TLAN_HI_IT_MASK         0x001C
00216 #define TLAN_DIO_DATA                   0x0C
00217 
00218 
00219 /* ThunderLAN Internal Register DIO Offsets */
00220 
00221 #define TLAN_NET_CMD                    0x00
00222 #define         TLAN_NET_CMD_NRESET     0x80
00223 #define         TLAN_NET_CMD_NWRAP      0x40
00224 #define         TLAN_NET_CMD_CSF        0x20
00225 #define         TLAN_NET_CMD_CAF        0x10
00226 #define         TLAN_NET_CMD_NOBRX      0x08
00227 #define         TLAN_NET_CMD_DUPLEX     0x04
00228 #define         TLAN_NET_CMD_TRFRAM     0x02
00229 #define         TLAN_NET_CMD_TXPACE     0x01
00230 #define TLAN_NET_SIO                    0x01
00231 #define         TLAN_NET_SIO_MINTEN     0x80
00232 #define         TLAN_NET_SIO_ECLOK      0x40
00233 #define         TLAN_NET_SIO_ETXEN      0x20
00234 #define         TLAN_NET_SIO_EDATA      0x10
00235 #define         TLAN_NET_SIO_NMRST      0x08
00236 #define         TLAN_NET_SIO_MCLK       0x04
00237 #define         TLAN_NET_SIO_MTXEN      0x02
00238 #define         TLAN_NET_SIO_MDATA      0x01
00239 #define TLAN_NET_STS                    0x02
00240 #define         TLAN_NET_STS_MIRQ       0x80
00241 #define         TLAN_NET_STS_HBEAT      0x40
00242 #define         TLAN_NET_STS_TXSTOP     0x20
00243 #define         TLAN_NET_STS_RXSTOP     0x10
00244 #define         TLAN_NET_STS_RSRVD      0x0F
00245 #define TLAN_NET_MASK                   0x03
00246 #define         TLAN_NET_MASK_MASK7     0x80
00247 #define         TLAN_NET_MASK_MASK6     0x40
00248 #define         TLAN_NET_MASK_MASK5     0x20
00249 #define         TLAN_NET_MASK_MASK4     0x10
00250 #define         TLAN_NET_MASK_RSRVD     0x0F
00251 #define TLAN_NET_CONFIG                 0x04
00252 #define         TLAN_NET_CFG_RCLK       0x8000
00253 #define         TLAN_NET_CFG_TCLK       0x4000
00254 #define         TLAN_NET_CFG_BIT        0x2000
00255 #define         TLAN_NET_CFG_RXCRC      0x1000
00256 #define         TLAN_NET_CFG_PEF        0x0800
00257 #define         TLAN_NET_CFG_1FRAG      0x0400
00258 #define         TLAN_NET_CFG_1CHAN      0x0200
00259 #define         TLAN_NET_CFG_MTEST      0x0100
00260 #define         TLAN_NET_CFG_PHY_EN     0x0080
00261 #define         TLAN_NET_CFG_MSMASK     0x007F
00262 #define TLAN_MAN_TEST                   0x06
00263 #define TLAN_DEF_VENDOR_ID              0x08
00264 #define TLAN_DEF_DEVICE_ID              0x0A
00265 #define TLAN_DEF_REVISION               0x0C
00266 #define TLAN_DEF_SUBCLASS               0x0D
00267 #define TLAN_DEF_MIN_LAT                0x0E
00268 #define TLAN_DEF_MAX_LAT                0x0F
00269 #define TLAN_AREG_0                     0x10
00270 #define TLAN_AREG_1                     0x16
00271 #define TLAN_AREG_2                     0x1C
00272 #define TLAN_AREG_3                     0x22
00273 #define TLAN_HASH_1                     0x28
00274 #define TLAN_HASH_2                     0x2C
00275 #define TLAN_GOOD_TX_FRMS               0x30
00276 #define TLAN_TX_UNDERUNS                0x33
00277 #define TLAN_GOOD_RX_FRMS               0x34
00278 #define TLAN_RX_OVERRUNS                0x37
00279 #define TLAN_DEFERRED_TX                0x38
00280 #define TLAN_CRC_ERRORS                 0x3A
00281 #define TLAN_CODE_ERRORS                0x3B
00282 #define TLAN_MULTICOL_FRMS              0x3C
00283 #define TLAN_SINGLECOL_FRMS             0x3E
00284 #define TLAN_EXCESSCOL_FRMS             0x40
00285 #define TLAN_LATE_COLS                  0x41
00286 #define TLAN_CARRIER_LOSS               0x42
00287 #define TLAN_ACOMMIT                    0x43
00288 #define TLAN_LED_REG                    0x44
00289 #define         TLAN_LED_ACT            0x10
00290 #define         TLAN_LED_LINK           0x01
00291 #define TLAN_BSIZE_REG                  0x45
00292 #define TLAN_MAX_RX                     0x46
00293 #define TLAN_INT_DIS                    0x48
00294 #define         TLAN_ID_TX_EOC          0x04
00295 #define         TLAN_ID_RX_EOF          0x02
00296 #define         TLAN_ID_RX_EOC          0x01
00297 
00298 
00299 
00300 /* ThunderLAN Interrupt Codes */
00301 
00302 #define TLAN_INT_NUMBER_OF_INTS 8
00303 
00304 #define TLAN_INT_NONE                   0x0000
00305 #define TLAN_INT_TX_EOF                 0x0001
00306 #define TLAN_INT_STAT_OVERFLOW          0x0002
00307 #define TLAN_INT_RX_EOF                 0x0003
00308 #define TLAN_INT_DUMMY                  0x0004
00309 #define TLAN_INT_TX_EOC                 0x0005
00310 #define TLAN_INT_STATUS_CHECK           0x0006
00311 #define TLAN_INT_RX_EOC                 0x0007
00312 
00313 
00314 
00315 /* ThunderLAN MII Registers */
00316 
00317 /* ThunderLAN Specific MII/PHY Registers */
00318 
00319 #define TLAN_TLPHY_ID                   0x10
00320 #define TLAN_TLPHY_CTL                  0x11
00321 #define         TLAN_TC_IGLINK          0x8000
00322 #define         TLAN_TC_SWAPOL          0x4000
00323 #define         TLAN_TC_AUISEL          0x2000
00324 #define         TLAN_TC_SQEEN           0x1000
00325 #define         TLAN_TC_MTEST           0x0800
00326 #define         TLAN_TC_RESERVED        0x07F8
00327 #define         TLAN_TC_NFEW            0x0004
00328 #define         TLAN_TC_INTEN           0x0002
00329 #define         TLAN_TC_TINT            0x0001
00330 #define TLAN_TLPHY_STS                  0x12
00331 #define         TLAN_TS_MINT            0x8000
00332 #define         TLAN_TS_PHOK            0x4000
00333 #define         TLAN_TS_POLOK           0x2000
00334 #define         TLAN_TS_TPENERGY        0x1000
00335 #define         TLAN_TS_RESERVED        0x0FFF
00336 #define TLAN_TLPHY_PAR                  0x19
00337 #define         TLAN_PHY_CIM_STAT       0x0020
00338 #define         TLAN_PHY_SPEED_100      0x0040
00339 #define         TLAN_PHY_DUPLEX_FULL    0x0080
00340 #define         TLAN_PHY_AN_EN_STAT     0x0400
00341 
00342 /* National Sem. & Level1 PHY id's */
00343 #define NAT_SEM_ID1                     0x2000
00344 #define NAT_SEM_ID2                     0x5C01
00345 #define LEVEL1_ID1                      0x7810
00346 #define LEVEL1_ID2                      0x0000
00347 
00348 #define CIRC_INC( a, b ) if ( ++a >= b ) a = 0
00349 
00350 /* Routines to access internal registers. */
00351 
00352 static inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr)
00353 {
00354         outw(internal_addr, base_addr + TLAN_DIO_ADR);
00355         return (inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3)));
00356 
00357 }                               /* TLan_DioRead8 */
00358 
00359 
00360 
00361 
00362 static inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr)
00363 {
00364         outw(internal_addr, base_addr + TLAN_DIO_ADR);
00365         return (inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2)));
00366 
00367 }                               /* TLan_DioRead16 */
00368 
00369 
00370 
00371 
00372 static inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr)
00373 {
00374         outw(internal_addr, base_addr + TLAN_DIO_ADR);
00375         return (inl(base_addr + TLAN_DIO_DATA));
00376 
00377 }                               /* TLan_DioRead32 */
00378 
00379 
00380 
00381 
00382 static inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data)
00383 {
00384         outw(internal_addr, base_addr + TLAN_DIO_ADR);
00385         outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3));
00386 
00387 }
00388 
00389 
00390 
00391 
00392 static inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data)
00393 {
00394         outw(internal_addr, base_addr + TLAN_DIO_ADR);
00395         outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
00396 
00397 }
00398 
00399 
00400 
00401 
00402 static inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)
00403 {
00404         outw(internal_addr, base_addr + TLAN_DIO_ADR);
00405         outl(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
00406 
00407 }
00408 
00409 
00410 
00411 #if 0
00412 static inline void TLan_ClearBit(u8 bit, u16 port)
00413 {
00414         outb_p(inb_p(port) & ~bit, port);
00415 }
00416 
00417 
00418 
00419 
00420 static inline int TLan_GetBit(u8 bit, u16 port)
00421 {
00422         return ((int) (inb_p(port) & bit));
00423 }
00424 
00425 
00426 
00427 
00428 static inline void TLan_SetBit(u8 bit, u16 port)
00429 {
00430         outb_p(inb_p(port) | bit, port);
00431 }
00432 #endif
00433 
00434 #define TLan_ClearBit( bit, port )      outb_p(inb_p(port) & ~bit, port)
00435 #define TLan_GetBit( bit, port )        ((int) (inb_p(port) & bit))
00436 #define TLan_SetBit( bit, port )        outb_p(inb_p(port) | bit, port)
00437 
00438 #ifdef I_LIKE_A_FAST_HASH_FUNCTION
00439 /* given 6 bytes, view them as 8 6-bit numbers and return the XOR of those */
00440 /* the code below is about seven times as fast as the original code */
00441 static inline u32 TLan_HashFunc(u8 * a)
00442 {
00443         u8 hash;
00444 
00445         hash = (a[0] ^ a[3]);   /* & 077 */
00446         hash ^= ((a[0] ^ a[3]) >> 6);   /* & 003 */
00447         hash ^= ((a[1] ^ a[4]) << 2);   /* & 074 */
00448         hash ^= ((a[1] ^ a[4]) >> 4);   /* & 017 */
00449         hash ^= ((a[2] ^ a[5]) << 4);   /* & 060 */
00450         hash ^= ((a[2] ^ a[5]) >> 2);   /* & 077 */
00451 
00452         return (hash & 077);
00453 }
00454 
00455 #else                           /* original code */
00456 
00457 static inline u32 xor(u32 a, u32 b)
00458 {
00459         return ((a && !b) || (!a && b));
00460 }
00461 
00462 #define XOR8( a, b, c, d, e, f, g, h )  xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) )
00463 #define DA( a, bit )                                    ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) )
00464 
00465 static inline u32 TLan_HashFunc(u8 * a)
00466 {
00467         u32 hash;
00468 
00469         hash =
00470             XOR8(DA(a, 0), DA(a, 6), DA(a, 12), DA(a, 18), DA(a, 24),
00471                  DA(a, 30), DA(a, 36), DA(a, 42));
00472         hash |=
00473             XOR8(DA(a, 1), DA(a, 7), DA(a, 13), DA(a, 19), DA(a, 25),
00474                  DA(a, 31), DA(a, 37), DA(a, 43)) << 1;
00475         hash |=
00476             XOR8(DA(a, 2), DA(a, 8), DA(a, 14), DA(a, 20), DA(a, 26),
00477                  DA(a, 32), DA(a, 38), DA(a, 44)) << 2;
00478         hash |=
00479             XOR8(DA(a, 3), DA(a, 9), DA(a, 15), DA(a, 21), DA(a, 27),
00480                  DA(a, 33), DA(a, 39), DA(a, 45)) << 3;
00481         hash |=
00482             XOR8(DA(a, 4), DA(a, 10), DA(a, 16), DA(a, 22), DA(a, 28),
00483                  DA(a, 34), DA(a, 40), DA(a, 46)) << 4;
00484         hash |=
00485             XOR8(DA(a, 5), DA(a, 11), DA(a, 17), DA(a, 23), DA(a, 29),
00486                  DA(a, 35), DA(a, 41), DA(a, 47)) << 5;
00487 
00488         return hash;
00489 
00490 }
00491 
00492 #endif                          /* I_LIKE_A_FAST_HASH_FUNCTION */