iPXE
PciIo.h
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1/** @file
2 EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
3 and DMA interfaces that a driver uses to access its PCI controller.
4
5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8**/
9
10#pragma once
11
12FILE_LICENCE ( BSD2_PATENT );
13FILE_SECBOOT ( PERMITTED );
14
15///
16/// Global ID for the PCI I/O Protocol
17///
18#define EFI_PCI_IO_PROTOCOL_GUID \
19 { \
20 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
21 }
22
24
25///
26/// *******************************************************
27/// EFI_PCI_IO_PROTOCOL_WIDTH
28/// *******************************************************
29///
45
46//
47// Complete PCI address generater
48//
49#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or I/O cycle through unchanged
50#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cycles
51#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit decode)
52#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
53#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
54#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
55#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
56#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
57#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
58#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined
59#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header
60#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header
61#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header
62#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
63#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
64#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device
65#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR
66#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC
67#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
68#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
69#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
70
71#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
72#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
73
74///
75/// *******************************************************
76/// EFI_PCI_IO_PROTOCOL_OPERATION
77/// *******************************************************
78///
79typedef enum {
80 ///
81 /// A read operation from system memory by a bus master.
82 ///
84 ///
85 /// A write operation from system memory by a bus master.
86 ///
88 ///
89 /// Provides both read and write access to system memory by both the processor and a
90 /// bus master. The buffer is coherent from both the processor's and the bus master's point of view.
91 ///
95
96///
97/// *******************************************************
98/// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
99/// *******************************************************
100///
101typedef enum {
102 ///
103 /// Retrieve the PCI controller's current attributes, and return them in Result.
104 ///
106 ///
107 /// Set the PCI controller's current attributes to Attributes.
108 ///
110 ///
111 /// Enable the attributes specified by the bits that are set in Attributes for this PCI controller.
112 ///
114 ///
115 /// Disable the attributes specified by the bits that are set in Attributes for this PCI controller.
116 ///
118 ///
119 /// Retrieve the PCI controller's supported attributes, and return them in Result.
120 ///
124
125/**
126 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
127 satisfied or after a defined duration.
128
129 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
130 @param Width Signifies the width of the memory or I/O operations.
131 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
132 base address for the memory operation to perform.
133 @param Offset The offset within the selected BAR to start the memory operation.
134 @param Mask Mask used for the polling criteria.
135 @param Value The comparison value used for the polling exit criteria.
136 @param Delay The number of 100 ns units to poll.
137 @param Result Pointer to the last value read from the memory location.
138
139 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
140 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
141 @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
142 @retval EFI_TIMEOUT Delay expired before a match occurred.
143 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
144 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
145
146**/
147typedef
152 IN UINT8 BarIndex,
153 IN UINT64 Offset,
154 IN UINT64 Mask,
155 IN UINT64 Value,
156 IN UINT64 Delay,
157 OUT UINT64 *Result
158 );
159
160/**
161 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
162
163 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
164 @param Width Signifies the width of the memory or I/O operations.
165 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
166 base address for the memory or I/O operation to perform.
167 @param Offset The offset within the selected BAR to start the memory or I/O operation.
168 @param Count The number of memory or I/O operations to perform.
169 @param Buffer For read operations, the destination buffer to store the results. For write
170 operations, the source buffer to write data from.
171
172 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
173 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
174 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
175 valid for the PCI BAR specified by BarIndex.
176 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
177 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
178
179**/
180typedef
185 IN UINT8 BarIndex,
186 IN UINT64 Offset,
187 IN UINTN Count,
189 );
190
191typedef struct {
192 ///
193 /// Read PCI controller registers in the PCI memory or I/O space.
194 ///
196 ///
197 /// Write PCI controller registers in the PCI memory or I/O space.
198 ///
201
202/**
203 Enable a PCI driver to access PCI controller registers in PCI configuration space.
204
205 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
206 @param Width Signifies the width of the memory operations.
207 @param Offset The offset within the PCI configuration space for the PCI controller.
208 @param Count The number of PCI configuration operations to perform.
209 @param Buffer For read operations, the destination buffer to store the results. For write
210 operations, the source buffer to write data from.
211
212
213 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
214 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
215 valid for the PCI configuration header of the PCI controller.
216 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
217 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
218
219**/
220typedef
225 IN UINT32 Offset,
226 IN UINTN Count,
228 );
229
230typedef struct {
231 ///
232 /// Read PCI controller registers in PCI configuration space.
233 ///
235 ///
236 /// Write PCI controller registers in PCI configuration space.
237 ///
240
241/**
242 Enables a PCI driver to copy one region of PCI memory space to another region of PCI
243 memory space.
244
245 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
246 @param Width Signifies the width of the memory operations.
247 @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the
248 base address for the memory operation to perform.
249 @param DestOffset The destination offset within the BAR specified by DestBarIndex to
250 start the memory writes for the copy operation.
251 @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the
252 base address for the memory operation to perform.
253 @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start
254 the memory reads for the copy operation.
255 @param Count The number of memory operations to perform. Bytes moved is Width
256 size * Count, starting at DestOffset and SrcOffset.
257
258 @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
259 @retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller.
260 @retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller.
261 @retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count
262 is not valid for the PCI BAR specified by DestBarIndex.
263 @retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is
264 not valid for the PCI BAR specified by SrcBarIndex.
265 @retval EFI_INVALID_PARAMETER Width is invalid.
266 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
267
268**/
269typedef
274 IN UINT8 DestBarIndex,
275 IN UINT64 DestOffset,
276 IN UINT8 SrcBarIndex,
277 IN UINT64 SrcOffset,
278 IN UINTN Count
279 );
280
281/**
282 Provides the PCI controller-specific addresses needed to access system memory.
283
284 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
285 @param Operation Indicates if the bus master is going to read or write to system memory.
286 @param HostAddress The system memory address to map to the PCI controller.
287 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
288 that were mapped.
289 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
290 access the hosts HostAddress.
291 @param Mapping A resulting value to pass to Unmap().
292
293 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
294 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
295 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
296 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
297 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
298
299**/
300typedef
305 IN VOID *HostAddress,
306 IN OUT UINTN *NumberOfBytes,
307 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
308 OUT VOID **Mapping
309 );
310
311/**
312 Completes the Map() operation and releases any corresponding resources.
313
314 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
315 @param Mapping The mapping value returned from Map().
316
317 @retval EFI_SUCCESS The range was unmapped.
318 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
319
320**/
321typedef
325 IN VOID *Mapping
326 );
327
328/**
329 Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
330 or EfiPciOperationBusMasterCommonBuffer64 mapping.
331
332 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
333 @param Type This parameter is not used and must be ignored.
334 @param MemoryType The type of memory to allocate, EfiBootServicesData or
335 EfiRuntimeServicesData.
336 @param Pages The number of pages to allocate.
337 @param HostAddress A pointer to store the base system memory address of the
338 allocated range.
339 @param Attributes The requested bit mask of attributes for the allocated range.
340
341 @retval EFI_SUCCESS The requested memory pages were allocated.
342 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
343 MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.
344 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
345 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
346
347**/
348typedef
353 IN EFI_MEMORY_TYPE MemoryType,
354 IN UINTN Pages,
355 OUT VOID **HostAddress,
356 IN UINT64 Attributes
357 );
358
359/**
360 Frees memory that was allocated with AllocateBuffer().
361
362 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
363 @param Pages The number of pages to free.
364 @param HostAddress The base system memory address of the allocated range.
365
366 @retval EFI_SUCCESS The requested memory pages were freed.
367 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
368 was not allocated with AllocateBuffer().
369
370**/
371typedef
375 IN UINTN Pages,
376 IN VOID *HostAddress
377 );
378
379/**
380 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
381
382 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
383
384 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
385 bridge to system memory.
386 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
387 host bridge due to a hardware error.
388
389**/
390typedef
394 );
395
396/**
397 Retrieves this PCI controller's current PCI bus number, device number, and function number.
398
399 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
400 @param SegmentNumber The PCI controller's current PCI segment number.
401 @param BusNumber The PCI controller's current PCI bus number.
402 @param DeviceNumber The PCI controller's current PCI device number.
403 @param FunctionNumber The PCI controller's current PCI function number.
404
405 @retval EFI_SUCCESS The PCI controller location was returned.
406 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
407
408**/
409typedef
413 OUT UINTN *SegmentNumber,
414 OUT UINTN *BusNumber,
415 OUT UINTN *DeviceNumber,
416 OUT UINTN *FunctionNumber
417 );
418
419/**
420 Performs an operation on the attributes that this PCI controller supports. The operations include
421 getting the set of supported attributes, retrieving the current attributes, setting the current
422 attributes, enabling attributes, and disabling attributes.
423
424 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
425 @param Operation The operation to perform on the attributes for this PCI controller.
426 @param Attributes The mask of attributes that are used for Set, Enable, and Disable
427 operations.
428 @param Result A pointer to the result mask of attributes that are returned for the Get
429 and Supported operations.
430
431 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
432 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
433 @retval EFI_UNSUPPORTED one or more of the bits set in
434 Attributes are not supported by this PCI controller or one of
435 its parent bridges when Operation is Set, Enable or Disable.
436
437**/
438typedef
443 IN UINT64 Attributes,
444 OUT UINT64 *Result OPTIONAL
445 );
446
447/**
448 Gets the attributes that this PCI controller supports setting on a BAR using
449 SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
450
451 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
452 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
453 base address for resource range. The legal range for this field is 0..5.
454 @param Supports A pointer to the mask of attributes that this PCI controller supports
455 setting for this BAR with SetBarAttributes().
456 @param Resources A pointer to the resource descriptors that describe the current
457 configuration of this BAR of the PCI controller.
458
459 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
460 controller supports are returned in Supports. If Resources
461 is not NULL, then the resource descriptors that the PCI
462 controller is currently using are returned in Resources.
463 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
464 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
465 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
466 Resources.
467**/
468typedef
472 IN UINT8 BarIndex,
473 OUT UINT64 *Supports OPTIONAL,
475 );
476
477/**
478 Sets the attributes for a range of a BAR on a PCI controller.
479
480 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
481 @param Attributes The mask of attributes to set for the resource range specified by
482 BarIndex, Offset, and Length.
483 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
484 base address for resource range. The legal range for this field is 0..5.
485 @param Offset A pointer to the BAR relative base address of the resource range to be
486 modified by the attributes specified by Attributes.
487 @param Length A pointer to the length of the resource range to be modified by the
488 attributes specified by Attributes.
489
490 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
491 range specified by BarIndex, Offset, and Length were
492 set on the PCI controller, and the actual resource range is returned
493 in Offset and Length.
494 @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
495 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
496 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
497 resource range specified by BarIndex, Offset, and
498 Length.
499
500**/
501typedef
505 IN UINT64 Attributes,
506 IN UINT8 BarIndex,
507 IN OUT UINT64 *Offset,
509 );
510
511///
512/// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration,
513/// and DMA interfaces used to abstract accesses to PCI controllers.
514/// There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus.
515/// A device driver that wishes to manage a PCI controller in a system will have to
516/// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller.
517///
534
535 ///
536 /// The size, in bytes, of the ROM image.
537 ///
539
540 ///
541 /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
542 /// for allocating memory for the ROM image, and copying the contents of the ROM to memory.
543 /// The contents of this buffer are either from the PCI option ROM that can be accessed
544 /// through the ROM BAR of the PCI controller, or it is from a platform-specific location.
545 /// The Attributes() function can be used to determine from which of these two sources
546 /// the RomImage buffer was initialized.
547 ///
549};
550
Resources
Definition 3c90x.h:226
UINT64 UINTN
Unsigned value of native width.
unsigned long long UINT64
8-byte unsigned value.
#define EFIAPI
unsigned char UINT8
1-byte unsigned value.
unsigned int UINT32
4-byte unsigned value.
UINT16 Mask
Definition Acpi10.h:156
UINT8 Type
Definition Acpi10.h:136
#define VOID
Undeclared type.
Definition Base.h:271
#define OPTIONAL
Passing the datum to the function is optional, and a NULL is passed if the value is not supplied.
Definition Base.h:292
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_GET_LOCATION)(IN EFI_PCI_IO_PROTOCOL *This, OUT UINTN *SegmentNumber, OUT UINTN *BusNumber, OUT UINTN *DeviceNumber, OUT UINTN *FunctionNumber)
Retrieves this PCI controller's current PCI bus number, device number, and function number.
Definition PciIo.h:411
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_CONFIG)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_PCI_IO_PROTOCOL_WIDTH Width, IN UINT32 Offset, IN UINTN Count, IN OUT VOID *Buffer)
Enable a PCI driver to access PCI controller registers in PCI configuration space.
Definition PciIo.h:222
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_FLUSH)(IN EFI_PCI_IO_PROTOCOL *This)
Flushes all PCI posted write transactions from a PCI host bridge to system memory.
Definition PciIo.h:392
EFI_PCI_IO_PROTOCOL_WIDTH
Definition PciIo.h:30
@ EfiPciIoWidthFillUint16
Definition PciIo.h:40
@ EfiPciIoWidthUint16
Definition PciIo.h:32
@ EfiPciIoWidthUint8
Definition PciIo.h:31
@ EfiPciIoWidthFillUint32
Definition PciIo.h:41
@ EfiPciIoWidthFillUint8
Definition PciIo.h:39
@ EfiPciIoWidthFillUint64
Definition PciIo.h:42
@ EfiPciIoWidthUint32
Definition PciIo.h:33
@ EfiPciIoWidthFifoUint64
Definition PciIo.h:38
@ EfiPciIoWidthUint64
Definition PciIo.h:34
@ EfiPciIoWidthFifoUint32
Definition PciIo.h:37
@ EfiPciIoWidthMaximum
Definition PciIo.h:43
@ EfiPciIoWidthFifoUint16
Definition PciIo.h:36
@ EfiPciIoWidthFifoUint8
Definition PciIo.h:35
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_MAP)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, IN VOID *HostAddress, IN OUT UINTN *NumberOfBytes, OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, OUT VOID **Mapping)
Provides the PCI controller-specific addresses needed to access system memory.
Definition PciIo.h:302
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES)(IN EFI_PCI_IO_PROTOCOL *This, IN UINT64 Attributes, IN UINT8 BarIndex, IN OUT UINT64 *Offset, IN OUT UINT64 *Length)
Sets the attributes for a range of a BAR on a PCI controller.
Definition PciIo.h:503
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)(IN EFI_PCI_IO_PROTOCOL *This, IN UINT8 BarIndex, OUT UINT64 *Supports OPTIONAL, OUT VOID **Resources OPTIONAL)
Gets the attributes that this PCI controller supports setting on a BAR using SetBarAttributes(),...
Definition PciIo.h:470
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_POLL_IO_MEM)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_PCI_IO_PROTOCOL_WIDTH Width, IN UINT8 BarIndex, IN UINT64 Offset, IN UINT64 Mask, IN UINT64 Value, IN UINT64 Delay, OUT UINT64 *Result)
Reads from the memory space of a PCI controller.
Definition PciIo.h:149
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_ALLOCATE_TYPE Type, IN EFI_MEMORY_TYPE MemoryType, IN UINTN Pages, OUT VOID **HostAddress, IN UINT64 Attributes)
Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer or EfiPciOperationBus...
Definition PciIo.h:350
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_COPY_MEM)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_PCI_IO_PROTOCOL_WIDTH Width, IN UINT8 DestBarIndex, IN UINT64 DestOffset, IN UINT8 SrcBarIndex, IN UINT64 SrcOffset, IN UINTN Count)
Enables a PCI driver to copy one region of PCI memory space to another region of PCI memory space.
Definition PciIo.h:271
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_FREE_BUFFER)(IN EFI_PCI_IO_PROTOCOL *This, IN UINTN Pages, IN VOID *HostAddress)
Frees memory that was allocated with AllocateBuffer().
Definition PciIo.h:373
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_ATTRIBUTES)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, IN UINT64 Attributes, OUT UINT64 *Result OPTIONAL)
Performs an operation on the attributes that this PCI controller supports.
Definition PciIo.h:440
EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
Definition PciIo.h:101
@ EfiPciIoAttributeOperationDisable
Disable the attributes specified by the bits that are set in Attributes for this PCI controller.
Definition PciIo.h:117
@ EfiPciIoAttributeOperationMaximum
Definition PciIo.h:122
@ EfiPciIoAttributeOperationGet
Retrieve the PCI controller's current attributes, and return them in Result.
Definition PciIo.h:105
@ EfiPciIoAttributeOperationEnable
Enable the attributes specified by the bits that are set in Attributes for this PCI controller.
Definition PciIo.h:113
@ EfiPciIoAttributeOperationSet
Set the PCI controller's current attributes to Attributes.
Definition PciIo.h:109
@ EfiPciIoAttributeOperationSupported
Retrieve the PCI controller's supported attributes, and return them in Result.
Definition PciIo.h:121
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_UNMAP)(IN EFI_PCI_IO_PROTOCOL *This, IN VOID *Mapping)
Completes the Map() operation and releases any corresponding resources.
Definition PciIo.h:323
EFI_PCI_IO_PROTOCOL_OPERATION
Definition PciIo.h:79
@ EfiPciIoOperationMaximum
Definition PciIo.h:93
@ EfiPciIoOperationBusMasterWrite
A write operation from system memory by a bus master.
Definition PciIo.h:87
@ EfiPciIoOperationBusMasterRead
A read operation from system memory by a bus master.
Definition PciIo.h:83
@ EfiPciIoOperationBusMasterCommonBuffer
Provides both read and write access to system memory by both the processor and a bus master.
Definition PciIo.h:92
EFI_GUID gEfiPciIoProtocolGuid
struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL
Definition PciIo.h:23
EFI_STATUS(EFIAPI * EFI_PCI_IO_PROTOCOL_IO_MEM)(IN EFI_PCI_IO_PROTOCOL *This, IN EFI_PCI_IO_PROTOCOL_WIDTH Width, IN UINT8 BarIndex, IN UINT64 Offset, IN UINTN Count, IN OUT VOID *Buffer)
Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
Definition PciIo.h:182
UINT64 EFI_PHYSICAL_ADDRESS
64-bit physical memory address.
RETURN_STATUS EFI_STATUS
Function return status for EFI API.
GUID EFI_GUID
128-bit buffer containing a unique identifier value.
EFI_MEMORY_TYPE
Enumeration of memory types introduced in UEFI.
EFI_ALLOCATE_TYPE
Enumeration of EFI memory allocation types.
Definition UefiSpec.h:31
#define FILE_LICENCE(_licence)
Declare a particular licence as applying to a file.
Definition compiler.h:921
#define FILE_SECBOOT(_status)
Declare a file's UEFI Secure Boot permission status.
Definition compiler.h:951
#define IN
Definition mlx_utils.h:28
#define OUT
Definition mlx_utils.h:29
SEGOFF16_t Buffer
Buffer address.
Definition pxe_api.h:8
UINT8_t Length
Length of this structure.
Definition pxe_api.h:13
EFI_PCI_IO_PROTOCOL_IO_MEM Write
Write PCI controller registers in the PCI memory or I/O space.
Definition PciIo.h:199
EFI_PCI_IO_PROTOCOL_IO_MEM Read
Read PCI controller registers in the PCI memory or I/O space.
Definition PciIo.h:195
EFI_PCI_IO_PROTOCOL_CONFIG Read
Read PCI controller registers in PCI configuration space.
Definition PciIo.h:234
EFI_PCI_IO_PROTOCOL_CONFIG Write
Write PCI controller registers in PCI configuration space.
Definition PciIo.h:238
The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration, and DMA interfaces used to...
Definition PciIo.h:518
EFI_PCI_IO_PROTOCOL_FLUSH Flush
Definition PciIo.h:529
EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci
Definition PciIo.h:523
EFI_PCI_IO_PROTOCOL_ACCESS Mem
Definition PciIo.h:521
EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem
Definition PciIo.h:524
EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo
Definition PciIo.h:520
EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer
Definition PciIo.h:527
VOID * RomImage
A pointer to the in memory copy of the ROM image.
Definition PciIo.h:548
EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem
Definition PciIo.h:519
UINT64 RomSize
The size, in bytes, of the ROM image.
Definition PciIo.h:538
EFI_PCI_IO_PROTOCOL_ACCESS Io
Definition PciIo.h:522
EFI_PCI_IO_PROTOCOL_UNMAP Unmap
Definition PciIo.h:526
EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes
Definition PciIo.h:531
EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation
Definition PciIo.h:530
EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes
Definition PciIo.h:532
EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes
Definition PciIo.h:533
EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer
Definition PciIo.h:528
EFI_PCI_IO_PROTOCOL_MAP Map
Definition PciIo.h:525