iPXE
PciRootBridgeIo.h
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1 /** @file
2  PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.
3 
4  PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
5  and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
6  defferent types of bus mastering DMA.
7 
8  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9  SPDX-License-Identifier: BSD-2-Clause-Patent
10 
11 **/
12 
13 #ifndef __PCI_ROOT_BRIDGE_IO_H__
14 #define __PCI_ROOT_BRIDGE_IO_H__
15 
16 FILE_LICENCE ( BSD2_PATENT );
17 
19 
20 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
21  { \
22  0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
23  }
24 
26 
27 ///
28 /// *******************************************************
29 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
30 /// *******************************************************
31 ///
32 typedef enum {
47 
48 ///
49 /// *******************************************************
50 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
51 /// *******************************************************
52 ///
53 typedef enum {
54  ///
55  /// A read operation from system memory by a bus master that is not capable of producing
56  /// PCI dual address cycles.
57  ///
59  ///
60  /// A write operation from system memory by a bus master that is not capable of producing
61  /// PCI dual address cycles.
62  ///
64  ///
65  /// Provides both read and write access to system memory by both the processor and a bus
66  /// master that is not capable of producing PCI dual address cycles.
67  ///
69  ///
70  /// A read operation from system memory by a bus master that is capable of producing PCI
71  /// dual address cycles.
72  ///
74  ///
75  /// A write operation to system memory by a bus master that is capable of producing PCI
76  /// dual address cycles.
77  ///
79  ///
80  /// Provides both read and write access to system memory by both the processor and a bus
81  /// master that is capable of producing PCI dual address cycles.
82  ///
86 
87 #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
88 #define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
89 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
90 #define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
91 #define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
92 #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
93 #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
94 #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
95 #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
96 #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
97 #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
98 #define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
99 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
100 #define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
101 
102 #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
103 
104 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
105 
106 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
107  (UINT64) ( \
108  (((UINTN) bus) << 24) | \
109  (((UINTN) dev) << 16) | \
110  (((UINTN) func) << 8) | \
111  (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
112 
113 typedef struct {
120 
121 /**
122  Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
123  satisfied or after a defined duration.
124 
125  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
126  @param Width Signifies the width of the memory or I/O operations.
127  @param Address The base address of the memory or I/O operations.
128  @param Mask Mask used for the polling criteria.
129  @param Value The comparison value used for the polling exit criteria.
130  @param Delay The number of 100 ns units to poll.
131  @param Result Pointer to the last value read from the memory location.
132 
133  @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
134  @retval EFI_TIMEOUT Delay expired before a match occurred.
135  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
136  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
137 
138 **/
139 typedef
144  IN UINT64 Address,
145  IN UINT64 Mask,
146  IN UINT64 Value,
147  IN UINT64 Delay,
148  OUT UINT64 *Result
149  );
150 
151 /**
152  Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
153 
154  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
155  @param Width Signifies the width of the memory operations.
156  @param Address The base address of the memory operations.
157  @param Count The number of memory operations to perform.
158  @param Buffer For read operations, the destination buffer to store the results. For write
159  operations, the source buffer to write data from.
160 
161  @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
162  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
163  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
164 
165 **/
166 typedef
171  IN UINT64 Address,
172  IN UINTN Count,
173  IN OUT VOID *Buffer
174  );
175 
176 typedef struct {
177  ///
178  /// Read PCI controller registers in the PCI root bridge memory space.
179  ///
181  ///
182  /// Write PCI controller registers in the PCI root bridge memory space.
183  ///
186 
187 /**
188  Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
189  root bridge memory space.
190 
191  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
192  @param Width Signifies the width of the memory operations.
193  @param DestAddress The destination address of the memory operation.
194  @param SrcAddress The source address of the memory operation.
195  @param Count The number of memory operations to perform.
196 
197  @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
198  @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
199  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
200 
201 **/
202 typedef
207  IN UINT64 DestAddress,
208  IN UINT64 SrcAddress,
209  IN UINTN Count
210  );
211 
212 /**
213  Provides the PCI controller-specific addresses required to access system memory from a
214  DMA bus master.
215 
216  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
217  @param Operation Indicates if the bus master is going to read or write to system memory.
218  @param HostAddress The system memory address to map to the PCI controller.
219  @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
220  that were mapped.
221  @param DeviceAddress The resulting map address for the bus master PCI controller to use to
222  access the hosts HostAddress.
223  @param Mapping A resulting value to pass to Unmap().
224 
225  @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
226  @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
227  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
228  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
229  @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
230 
231 **/
232 typedef
237  IN VOID *HostAddress,
238  IN OUT UINTN *NumberOfBytes,
239  OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
240  OUT VOID **Mapping
241  );
242 
243 /**
244  Completes the Map() operation and releases any corresponding resources.
245 
246  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
247  @param Mapping The mapping value returned from Map().
248 
249  @retval EFI_SUCCESS The range was unmapped.
250  @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
251  @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
252 
253 **/
254 typedef
258  IN VOID *Mapping
259  );
260 
261 /**
262  Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
263  EfiPciOperationBusMasterCommonBuffer64 mapping.
264 
265  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
266  @param Type This parameter is not used and must be ignored.
267  @param MemoryType The type of memory to allocate, EfiBootServicesData or
268  EfiRuntimeServicesData.
269  @param Pages The number of pages to allocate.
270  @param HostAddress A pointer to store the base system memory address of the
271  allocated range.
272  @param Attributes The requested bit mask of attributes for the allocated range.
273 
274  @retval EFI_SUCCESS The requested memory pages were allocated.
275  @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
276  MEMORY_WRITE_COMBINE and MEMORY_CACHED.
277  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
278  @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
279 
280 **/
281 typedef
286  IN EFI_MEMORY_TYPE MemoryType,
287  IN UINTN Pages,
288  IN OUT VOID **HostAddress,
289  IN UINT64 Attributes
290  );
291 
292 /**
293  Frees memory that was allocated with AllocateBuffer().
294 
295  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
296  @param Pages The number of pages to free.
297  @param HostAddress The base system memory address of the allocated range.
298 
299  @retval EFI_SUCCESS The requested memory pages were freed.
300  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
301  was not allocated with AllocateBuffer().
302 
303 **/
304 typedef
308  IN UINTN Pages,
309  IN VOID *HostAddress
310  );
311 
312 /**
313  Flushes all PCI posted write transactions from a PCI host bridge to system memory.
314 
315  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
316 
317  @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
318  bridge to system memory.
319  @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
320  host bridge due to a hardware error.
321 
322 **/
323 typedef
327  );
328 
329 /**
330  Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
331  attributes that a PCI root bridge is currently using.
332 
333  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
334  @param Supports A pointer to the mask of attributes that this PCI root bridge supports
335  setting with SetAttributes().
336  @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently
337  using.
338 
339  @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root
340  bridge supports is returned in Supports. If Attributes is
341  not NULL, then the attributes that the PCI root bridge is currently
342  using is returned in Attributes.
343  @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
344 
345 
346 **/
347 typedef
351  OUT UINT64 *Supports,
352  OUT UINT64 *Attributes
353  );
354 
355 /**
356  Sets attributes for a resource range on a PCI root bridge.
357 
358  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
359  @param Attributes The mask of attributes to set.
360  @param ResourceBase A pointer to the base address of the resource range to be modified by the
361  attributes specified by Attributes.
362  @param ResourceLength A pointer to the length of the resource range to be modified by the
363  attributes specified by Attributes.
364 
365  @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
366  range specified by ResourceBase and ResourceLength
367  were set on the PCI root bridge, and the actual resource range is
368  returned in ResuourceBase and ResourceLength.
369  @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root
370  Bridge.
371  @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
372  resource range specified by BaseAddress and Length.
373  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
374 
375 **/
376 typedef
380  IN UINT64 Attributes,
381  IN OUT UINT64 *ResourceBase,
382  IN OUT UINT64 *ResourceLength
383  );
384 
385 /**
386  Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI
387  resource descriptors.
388 
389  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
390  @param Resources A pointer to the resource descriptors that describe the current
391  configuration of this PCI root bridge.
392 
393  @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
394  Resources.
395  @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be
396  retrieved.
397 
398 **/
399 typedef
403  OUT VOID **Resources
404  );
405 
406 ///
407 /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are
408 /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.
409 ///
411  ///
412  /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
413  ///
429 
430  ///
431  /// The segment number that this PCI root bridge resides.
432  ///
434 };
435 
437 
438 #endif
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer
A read operation from system memory by a bus master that is capable of producing PCI dual address cyc...
UINT16 Mask
Definition: Acpi10.h:156
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush
UINT8 Type
Definition: Acpi10.h:136
128 bit buffer containing a unique identifier value.
Definition: Base.h:215
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINT64 Mask, IN UINT64 Value, IN UINT64 Delay, OUT UINT64 *Result)
Reads from the I/O space of a PCI Root Bridge.
EFI_HANDLE ParentHandle
The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer
EFI_GUID gEfiPciRootBridgeIoProtocolGuid
unsigned int UINT32
Definition: ProcessorBind.h:98
A write operation to system memory by a bus master that is capable of producing PCI dual address cycl...
unsigned char UINT8
UINT64 EFI_PHYSICAL_ADDRESS
64-bit physical memory address.
Definition: UefiBaseType.h:52
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN UINT64 Attributes, IN OUT UINT64 *ResourceBase, IN OUT UINT64 *ResourceLength)
Sets attributes for a resource range on a PCI root bridge.
#define OUT
Definition: mlx_utils.h:29
EFI_MEMORY_TYPE
Enumeration of memory types introduced in UEFI.
Provides both read and write access to system memory by both the processor and a bus master that is c...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write
Write PCI controller registers in the PCI root bridge memory space.
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
Provides string functions, linked list functions, math functions, synchronization functions,...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo
#define EFIAPI
UINT32 SegmentNumber
The segment number that this PCI root bridge resides.
SEGOFF16_t Buffer
Buffer address.
Definition: pxe_api.h:65
A write operation from system memory by a bus master that is not capable of producing PCI dual addres...
UINT64 UINTN
Unsigned value of native width.
A read operation from system memory by a bus master that is not capable of producing PCI dual address...
unsigned long Address
Definition: etherboot.h:21
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN VOID *Mapping)
Completes the Map() operation and releases any corresponding resources.
#define VOID
Undeclared type.
Definition: Base.h:271
unsigned long long UINT64
Definition: ProcessorBind.h:96
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
Provides both read and write access to system memory by both the processor and a bus master that is n...
#define IN
Definition: mlx_utils.h:28
Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are used to abstract acces...
EFI_ALLOCATE_TYPE
Enumeration of EFI memory allocation types.
Definition: UefiSpec.h:31
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes
FILE_LICENCE(BSD2_PATENT)
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This)
Flushes all PCI posted write transactions from a PCI host bridge to system memory.
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes
RETURN_STATUS EFI_STATUS
Function return status for EFI API.
Definition: UefiBaseType.h:31
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, OUT VOID **Resources)
Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI resource...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_ALLOCATE_TYPE Type, IN EFI_MEMORY_TYPE MemoryType, IN UINTN Pages, IN OUT VOID **HostAddress, IN UINT64 Attributes)
Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or EfiPciOperationBusMa...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read
Read PCI controller registers in the PCI root bridge memory space.
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 DestAddress, IN UINT64 SrcAddress, IN UINTN Count)
Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI root...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN UINTN Pages, IN VOID *HostAddress)
Frees memory that was allocated with AllocateBuffer().
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, IN VOID *HostAddress, IN OUT UINTN *NumberOfBytes, OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, OUT VOID **Mapping)
Provides the PCI controller-specific addresses required to access system memory from a DMA bus master...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map
Definition: efi.h:59
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN OUT VOID *Buffer)
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
Resources
Definition: 3c90x.h:226
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, OUT UINT64 *Supports, OUT UINT64 *Attributes)
Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the attributes ...