iPXE
PciRootBridgeIo.h
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1 /** @file
2  PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.
3 
4  PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
5  and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
6  defferent types of bus mastering DMA.
7 
8  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9  SPDX-License-Identifier: BSD-2-Clause-Patent
10 
11 **/
12 
13 #ifndef __PCI_ROOT_BRIDGE_IO_H__
14 #define __PCI_ROOT_BRIDGE_IO_H__
15 
16 FILE_LICENCE ( BSD2_PATENT );
17 FILE_SECBOOT ( PERMITTED );
18 
20 
21 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
22  { \
23  0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
24  }
25 
27 
28 ///
29 /// *******************************************************
30 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
31 /// *******************************************************
32 ///
33 typedef enum {
48 
49 ///
50 /// *******************************************************
51 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
52 /// *******************************************************
53 ///
54 typedef enum {
55  ///
56  /// A read operation from system memory by a bus master that is not capable of producing
57  /// PCI dual address cycles.
58  ///
60  ///
61  /// A write operation from system memory by a bus master that is not capable of producing
62  /// PCI dual address cycles.
63  ///
65  ///
66  /// Provides both read and write access to system memory by both the processor and a bus
67  /// master that is not capable of producing PCI dual address cycles.
68  ///
70  ///
71  /// A read operation from system memory by a bus master that is capable of producing PCI
72  /// dual address cycles.
73  ///
75  ///
76  /// A write operation to system memory by a bus master that is capable of producing PCI
77  /// dual address cycles.
78  ///
80  ///
81  /// Provides both read and write access to system memory by both the processor and a bus
82  /// master that is capable of producing PCI dual address cycles.
83  ///
87 
88 #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
89 #define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
90 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
91 #define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
92 #define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
93 #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
94 #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
95 #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
96 #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
97 #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
98 #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
99 #define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
100 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
101 #define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
102 
103 #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
104 
105 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
106 
107 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
108  (UINT64) ( \
109  (((UINTN) bus) << 24) | \
110  (((UINTN) dev) << 16) | \
111  (((UINTN) func) << 8) | \
112  (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
113 
114 typedef struct {
121 
122 /**
123  Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
124  satisfied or after a defined duration.
125 
126  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
127  @param Width Signifies the width of the memory or I/O operations.
128  @param Address The base address of the memory or I/O operations.
129  @param Mask Mask used for the polling criteria.
130  @param Value The comparison value used for the polling exit criteria.
131  @param Delay The number of 100 ns units to poll.
132  @param Result Pointer to the last value read from the memory location.
133 
134  @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
135  @retval EFI_TIMEOUT Delay expired before a match occurred.
136  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
137  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
138 
139 **/
140 typedef
145  IN UINT64 Address,
146  IN UINT64 Mask,
147  IN UINT64 Value,
148  IN UINT64 Delay,
149  OUT UINT64 *Result
150  );
151 
152 /**
153  Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
154 
155  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
156  @param Width Signifies the width of the memory operations.
157  @param Address The base address of the memory operations.
158  @param Count The number of memory operations to perform.
159  @param Buffer For read operations, the destination buffer to store the results. For write
160  operations, the source buffer to write data from.
161 
162  @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
163  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
164  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
165 
166 **/
167 typedef
172  IN UINT64 Address,
173  IN UINTN Count,
174  IN OUT VOID *Buffer
175  );
176 
177 typedef struct {
178  ///
179  /// Read PCI controller registers in the PCI root bridge memory space.
180  ///
182  ///
183  /// Write PCI controller registers in the PCI root bridge memory space.
184  ///
187 
188 /**
189  Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
190  root bridge memory space.
191 
192  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
193  @param Width Signifies the width of the memory operations.
194  @param DestAddress The destination address of the memory operation.
195  @param SrcAddress The source address of the memory operation.
196  @param Count The number of memory operations to perform.
197 
198  @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
199  @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
200  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
201 
202 **/
203 typedef
208  IN UINT64 DestAddress,
209  IN UINT64 SrcAddress,
210  IN UINTN Count
211  );
212 
213 /**
214  Provides the PCI controller-specific addresses required to access system memory from a
215  DMA bus master.
216 
217  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
218  @param Operation Indicates if the bus master is going to read or write to system memory.
219  @param HostAddress The system memory address to map to the PCI controller.
220  @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
221  that were mapped.
222  @param DeviceAddress The resulting map address for the bus master PCI controller to use to
223  access the hosts HostAddress.
224  @param Mapping A resulting value to pass to Unmap().
225 
226  @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
227  @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
228  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
229  @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
230  @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
231 
232 **/
233 typedef
238  IN VOID *HostAddress,
239  IN OUT UINTN *NumberOfBytes,
240  OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
241  OUT VOID **Mapping
242  );
243 
244 /**
245  Completes the Map() operation and releases any corresponding resources.
246 
247  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
248  @param Mapping The mapping value returned from Map().
249 
250  @retval EFI_SUCCESS The range was unmapped.
251  @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
252  @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
253 
254 **/
255 typedef
259  IN VOID *Mapping
260  );
261 
262 /**
263  Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
264  EfiPciOperationBusMasterCommonBuffer64 mapping.
265 
266  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
267  @param Type This parameter is not used and must be ignored.
268  @param MemoryType The type of memory to allocate, EfiBootServicesData or
269  EfiRuntimeServicesData.
270  @param Pages The number of pages to allocate.
271  @param HostAddress A pointer to store the base system memory address of the
272  allocated range.
273  @param Attributes The requested bit mask of attributes for the allocated range.
274 
275  @retval EFI_SUCCESS The requested memory pages were allocated.
276  @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
277  MEMORY_WRITE_COMBINE and MEMORY_CACHED.
278  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
279  @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
280 
281 **/
282 typedef
287  IN EFI_MEMORY_TYPE MemoryType,
288  IN UINTN Pages,
289  IN OUT VOID **HostAddress,
290  IN UINT64 Attributes
291  );
292 
293 /**
294  Frees memory that was allocated with AllocateBuffer().
295 
296  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
297  @param Pages The number of pages to free.
298  @param HostAddress The base system memory address of the allocated range.
299 
300  @retval EFI_SUCCESS The requested memory pages were freed.
301  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
302  was not allocated with AllocateBuffer().
303 
304 **/
305 typedef
309  IN UINTN Pages,
310  IN VOID *HostAddress
311  );
312 
313 /**
314  Flushes all PCI posted write transactions from a PCI host bridge to system memory.
315 
316  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
317 
318  @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
319  bridge to system memory.
320  @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
321  host bridge due to a hardware error.
322 
323 **/
324 typedef
328  );
329 
330 /**
331  Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
332  attributes that a PCI root bridge is currently using.
333 
334  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
335  @param Supports A pointer to the mask of attributes that this PCI root bridge supports
336  setting with SetAttributes().
337  @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently
338  using.
339 
340  @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root
341  bridge supports is returned in Supports. If Attributes is
342  not NULL, then the attributes that the PCI root bridge is currently
343  using is returned in Attributes.
344  @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
345 
346 
347 **/
348 typedef
352  OUT UINT64 *Supports,
353  OUT UINT64 *Attributes
354  );
355 
356 /**
357  Sets attributes for a resource range on a PCI root bridge.
358 
359  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
360  @param Attributes The mask of attributes to set.
361  @param ResourceBase A pointer to the base address of the resource range to be modified by the
362  attributes specified by Attributes.
363  @param ResourceLength A pointer to the length of the resource range to be modified by the
364  attributes specified by Attributes.
365 
366  @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
367  range specified by ResourceBase and ResourceLength
368  were set on the PCI root bridge, and the actual resource range is
369  returned in ResuourceBase and ResourceLength.
370  @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root
371  Bridge.
372  @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
373  resource range specified by BaseAddress and Length.
374  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
375 
376 **/
377 typedef
381  IN UINT64 Attributes,
382  IN OUT UINT64 *ResourceBase,
383  IN OUT UINT64 *ResourceLength
384  );
385 
386 /**
387  Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI
388  resource descriptors.
389 
390  @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
391  @param Resources A pointer to the resource descriptors that describe the current
392  configuration of this PCI root bridge.
393 
394  @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
395  Resources.
396  @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be
397  retrieved.
398 
399 **/
400 typedef
404  OUT VOID **Resources
405  );
406 
407 ///
408 /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are
409 /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.
410 ///
412  ///
413  /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
414  ///
430 
431  ///
432  /// The segment number that this PCI root bridge resides.
433  ///
435 };
436 
438 
439 #endif
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer
A read operation from system memory by a bus master that is capable of producing PCI dual address cyc...
UINT16 Mask
Definition: Acpi10.h:157
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush
UINT8 Type
Definition: Acpi10.h:137
128 bit buffer containing a unique identifier value.
Definition: Base.h:216
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem
FILE_SECBOOT(PERMITTED)
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINT64 Mask, IN UINT64 Value, IN UINT64 Delay, OUT UINT64 *Result)
Reads from the I/O space of a PCI Root Bridge.
EFI_HANDLE ParentHandle
The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer
EFI_GUID gEfiPciRootBridgeIoProtocolGuid
unsigned int UINT32
Definition: ProcessorBind.h:99
A write operation to system memory by a bus master that is capable of producing PCI dual address cycl...
unsigned char UINT8
UINT64 EFI_PHYSICAL_ADDRESS
64-bit physical memory address.
Definition: UefiBaseType.h:53
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN UINT64 Attributes, IN OUT UINT64 *ResourceBase, IN OUT UINT64 *ResourceLength)
Sets attributes for a resource range on a PCI root bridge.
#define OUT
Definition: mlx_utils.h:29
EFI_MEMORY_TYPE
Enumeration of memory types introduced in UEFI.
Provides both read and write access to system memory by both the processor and a bus master that is c...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write
Write PCI controller registers in the PCI root bridge memory space.
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
Provides string functions, linked list functions, math functions, synchronization functions,...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo
#define EFIAPI
UINT32 SegmentNumber
The segment number that this PCI root bridge resides.
SEGOFF16_t Buffer
Buffer address.
Definition: pxe_api.h:65
A write operation from system memory by a bus master that is not capable of producing PCI dual addres...
UINT64 UINTN
Unsigned value of native width.
A read operation from system memory by a bus master that is not capable of producing PCI dual address...
unsigned long Address
Definition: etherboot.h:21
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN VOID *Mapping)
Completes the Map() operation and releases any corresponding resources.
#define VOID
Undeclared type.
Definition: Base.h:272
unsigned long long UINT64
Definition: ProcessorBind.h:97
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
Provides both read and write access to system memory by both the processor and a bus master that is n...
#define IN
Definition: mlx_utils.h:28
Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are used to abstract acces...
EFI_ALLOCATE_TYPE
Enumeration of EFI memory allocation types.
Definition: UefiSpec.h:32
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes
FILE_LICENCE(BSD2_PATENT)
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This)
Flushes all PCI posted write transactions from a PCI host bridge to system memory.
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes
RETURN_STATUS EFI_STATUS
Function return status for EFI API.
Definition: UefiBaseType.h:32
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, OUT VOID **Resources)
Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI resource...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_ALLOCATE_TYPE Type, IN EFI_MEMORY_TYPE MemoryType, IN UINTN Pages, IN OUT VOID **HostAddress, IN UINT64 Attributes)
Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or EfiPciOperationBusMa...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read
Read PCI controller registers in the PCI root bridge memory space.
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 DestAddress, IN UINT64 SrcAddress, IN UINTN Count)
Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI root...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN UINTN Pages, IN VOID *HostAddress)
Frees memory that was allocated with AllocateBuffer().
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, IN VOID *HostAddress, IN OUT UINTN *NumberOfBytes, OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, OUT VOID **Mapping)
Provides the PCI controller-specific addresses required to access system memory from a DMA bus master...
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map
Definition: efi.h:62
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN OUT VOID *Buffer)
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
Resources
Definition: 3c90x.h:226
EFI_STATUS(EFIAPI * EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, OUT UINT64 *Supports, OUT UINT64 *Attributes)
Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the attributes ...