iPXE
Macros | Functions
bios_mp.c File Reference

BIOS multiprocessor API implementation. More...

#include <registers.h>
#include <ipxe/uaccess.h>
#include <ipxe/timer.h>
#include <ipxe/msr.h>
#include <ipxe/mp.h>

Go to the source code of this file.

Macros

#define MSR_APIC_BASE   0x0000001b
 Local APIC base address MSR. More...
 
#define MSR_APIC_BASE_X2APIC   0x400
 Local APIC is in x2APIC mode. More...
 
#define MSR_APIC_BASE_MASK   ( ~0xfffULL )
 Local APIC base address mask. More...
 
#define APIC_ICR   0x0300
 Interrupt command register. More...
 
#define MSR_X2APIC_ICR   0x830
 Interrupt command register (x2APIC) More...
 
#define APIC_ICR_ALL_NOT_SELF   0x000c0000
 Interrupt command register: send to all excluding self. More...
 
#define APIC_ICR_LEVEL   0x00008000
 Interrupt command register: level mode. More...
 
#define APIC_ICR_LEVEL_ASSERT   0x00004000
 Interrupt command register: level asserted. More...
 
#define APIC_ICR_INIT   0x00000500
 Interrupt command register: INIT. More...
 
#define APIC_ICR_SIPI(vector)   ( 0x00000600 | (vector) )
 Interrupt command register: SIPI. More...
 
#define IPI_WAIT_MS   10
 Time to wait for an IPI to complete. More...
 
#define SIPI_VECTOR   0x08
 Startup IPI vector. More...
 

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 
void __asmcall mp_jump (mp_addr_t func, mp_addr_t opaque)
 Protected-mode startup IPI handler. More...
 
static void bios_mp_exec_boot (mp_func_t func, void *opaque)
 Execute a multiprocessor function on the boot processor. More...
 
static void bios_mp_ipi (void *apic, int x2apic, uint32_t icr)
 Send an interprocessor interrupt. More...
 
static void bios_mp_start_all (mp_func_t func, void *opaque)
 Start a multiprocessor function on all application processors. More...
 
 PROVIDE_MPAPI_INLINE (pcbios, mp_address)
 
 PROVIDE_MPAPI (pcbios, mp_exec_boot, bios_mp_exec_boot)
 
 PROVIDE_MPAPI (pcbios, mp_start_all, bios_mp_start_all)
 

Detailed Description

BIOS multiprocessor API implementation.

Definition in file bios_mp.c.

Macro Definition Documentation

◆ MSR_APIC_BASE

#define MSR_APIC_BASE   0x0000001b

Local APIC base address MSR.

Definition at line 39 of file bios_mp.c.

◆ MSR_APIC_BASE_X2APIC

#define MSR_APIC_BASE_X2APIC   0x400

Local APIC is in x2APIC mode.

Definition at line 42 of file bios_mp.c.

◆ MSR_APIC_BASE_MASK

#define MSR_APIC_BASE_MASK   ( ~0xfffULL )

Local APIC base address mask.

Definition at line 45 of file bios_mp.c.

◆ APIC_ICR

#define APIC_ICR   0x0300

Interrupt command register.

Definition at line 48 of file bios_mp.c.

◆ MSR_X2APIC_ICR

#define MSR_X2APIC_ICR   0x830

Interrupt command register (x2APIC)

Definition at line 51 of file bios_mp.c.

◆ APIC_ICR_ALL_NOT_SELF

#define APIC_ICR_ALL_NOT_SELF   0x000c0000

Interrupt command register: send to all excluding self.

Definition at line 54 of file bios_mp.c.

◆ APIC_ICR_LEVEL

#define APIC_ICR_LEVEL   0x00008000

Interrupt command register: level mode.

Definition at line 57 of file bios_mp.c.

◆ APIC_ICR_LEVEL_ASSERT

#define APIC_ICR_LEVEL_ASSERT   0x00004000

Interrupt command register: level asserted.

Definition at line 60 of file bios_mp.c.

◆ APIC_ICR_INIT

#define APIC_ICR_INIT   0x00000500

Interrupt command register: INIT.

Definition at line 63 of file bios_mp.c.

◆ APIC_ICR_SIPI

#define APIC_ICR_SIPI (   vector)    ( 0x00000600 | (vector) )

Interrupt command register: SIPI.

Definition at line 66 of file bios_mp.c.

◆ IPI_WAIT_MS

#define IPI_WAIT_MS   10

Time to wait for an IPI to complete.

Definition at line 69 of file bios_mp.c.

◆ SIPI_VECTOR

#define SIPI_VECTOR   0x08

Startup IPI vector.

The real-mode startup IPI code must be copied to a page boundary in base memory. We fairly arbitrarily choose to place this at 0x8000.

Definition at line 77 of file bios_mp.c.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )

◆ mp_jump()

void __asmcall mp_jump ( mp_addr_t  func,
mp_addr_t  opaque 
)

Protected-mode startup IPI handler.

Referenced by bios_mp_start_all().

◆ bios_mp_exec_boot()

static void bios_mp_exec_boot ( mp_func_t  func,
void *  opaque 
)
static

Execute a multiprocessor function on the boot processor.

Parameters
funcMultiprocessor function
opaqueOpaque data pointer

Definition at line 88 of file bios_mp.c.

88  {
89 
90  /* Call multiprocessor function with physical addressing */
91  __asm__ __volatile__ ( PHYS_CODE ( "pushl %k2\n\t"
92  "pushl %k1\n\t"
93  "call *%k0\n\t"
94  "addl $8, %%esp\n\t" )
95  : : "r" ( mp_address ( mp_call ) ),
96  "r" ( mp_address ( func ) ),
97  "r" ( mp_address ( opaque ) ) );
98 }
PHYS_CODE
#define PHYS_CODE(asm_code_str)
Definition: librm.h:281
mp_address
static mp_address(void *address)
Calculate address as seen by a multiprocessor function.
Definition: efi_mp.h:25
mp_call
void __asmcall mp_call(mp_addr_t func, mp_addr_t opaque)
Call a multiprocessor function from C code on the current CPU.
__volatile__
__asm__ __volatile__("\n1:\n\t" "movb -1(%3,%1), %%al\n\t" "stosb\n\t" "loop 1b\n\t" "xorl %%eax, %%eax\n\t" "mov %4, %1\n\t" "rep stosb\n\t" :"=&D"(discard_D), "=&c"(discard_c), "+m"(*value) :"r"(data), "g"(pad_len), "0"(value0), "1"(len) :"eax")
__asm__
__asm__(".section \".rodata\", \"a\", " PROGBITS "\n\t" "\nprivate_key_data:\n\t" ".size private_key_data, ( . - private_key_data )\n\t" ".equ private_key_len, ( . - private_key_data )\n\t" ".previous\n\t")

References __asm__(), __volatile__(), mp_address(), mp_call(), and PHYS_CODE.

◆ bios_mp_ipi()

static void bios_mp_ipi ( void *  apic,
int  x2apic,
uint32_t  icr 
)
static

Send an interprocessor interrupt.

Parameters
apicAPIC base address
x2apicx2APIC mode enabled
icrInterrupt control register value

Definition at line 107 of file bios_mp.c.

107  {
108 
109  /* Write ICR according to APIC/x2APIC mode */
110  DBGC ( MSR_APIC_BASE, "BIOSMP sending IPI %#08x\n", icr );
111  if ( x2apic ) {
112  wrmsr ( MSR_X2APIC_ICR, icr );
113  } else {
114  writel ( icr, ( apic + APIC_ICR ) );
115  }
116 
117  /* Allow plenty of time for delivery to complete */
118  mdelay ( IPI_WAIT_MS );
119 }
IPI_WAIT_MS
#define IPI_WAIT_MS
Time to wait for an IPI to complete.
Definition: bios_mp.c:69
APIC_ICR
#define APIC_ICR
Interrupt command register.
Definition: bios_mp.c:48
DBGC
#define DBGC(...)
Definition: compiler.h:505
writel
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
MSR_APIC_BASE
#define MSR_APIC_BASE
Local APIC base address MSR.
Definition: bios_mp.c:39
mdelay
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
MSR_X2APIC_ICR
#define MSR_X2APIC_ICR
Interrupt command register (x2APIC)
Definition: bios_mp.c:51

References APIC_ICR, DBGC, IPI_WAIT_MS, mdelay(), MSR_APIC_BASE, MSR_X2APIC_ICR, and writel().

Referenced by bios_mp_start_all().

◆ bios_mp_start_all()

static void bios_mp_start_all ( mp_func_t  func,
void *  opaque 
)
static

Start a multiprocessor function on all application processors.

Parameters
funcMultiprocessor function
opaqueOpaque data pointer

Definition at line 127 of file bios_mp.c.

127  {
128  struct i386_regs regs;
129  uint64_t base;
130  uint32_t ipi;
131  void *apic;
132  int x2apic;
133 
134  /* Prepare SIPI handler */
135  regs.eax = mp_address ( func );
136  regs.edx = mp_address ( opaque );
137  setup_sipi ( SIPI_VECTOR, virt_to_phys ( mp_jump ), &regs );
138 
139  /* Get local APIC base address and mode */
140  base = rdmsr ( MSR_APIC_BASE );
141  x2apic = ( base & MSR_APIC_BASE_X2APIC );
142  DBGC ( MSR_APIC_BASE, "BIOSMP local %sAPIC base %#llx\n",
143  ( x2apic ? "x2" : "" ), ( ( unsigned long long ) base ) );
144 
145  /* Map local APIC */
146  apic = ioremap ( ( base & MSR_APIC_BASE_MASK ), PAGE_SIZE );
147  if ( ! apic )
148  goto err_ioremap;
149 
150  /* Assert INIT IPI */
151  ipi = ( APIC_ICR_ALL_NOT_SELF | APIC_ICR_LEVEL |
152  APIC_ICR_LEVEL_ASSERT | APIC_ICR_INIT );
153  bios_mp_ipi ( apic, x2apic, ipi );
154 
155  /* Clear INIT IPI */
156  ipi &= ~APIC_ICR_LEVEL_ASSERT;
157  bios_mp_ipi ( apic, x2apic, ipi );
158 
159  /* Send SIPI */
160  ipi = ( APIC_ICR_ALL_NOT_SELF | APIC_ICR_SIPI ( SIPI_VECTOR ) );
161  bios_mp_ipi ( apic, x2apic, ipi );
162 
163  iounmap ( apic );
164  err_ioremap:
165  /* No way to handle errors: caller must check that
166  * multiprocessor function executed as expected.
167  */
168  return;
169 }
DBGC
#define DBGC(...)
Definition: compiler.h:505
mp_address
static mp_address(void *address)
Calculate address as seen by a multiprocessor function.
Definition: efi_mp.h:25
uint64_t
unsigned long long uint64_t
Definition: stdint.h:13
SIPI_VECTOR
#define SIPI_VECTOR
Startup IPI vector.
Definition: bios_mp.c:77
PAGE_SIZE
#define PAGE_SIZE
Page size.
Definition: io.h:27
i386_regs::eax
uint32_t eax
Definition: registers.h:109
MSR_APIC_BASE_MASK
#define MSR_APIC_BASE_MASK
Local APIC base address mask.
Definition: bios_mp.c:45
base
static const void * base
Base address.
Definition: crypto.h:335
virt_to_phys
static __always_inline unsigned long virt_to_phys(volatile const void *addr)
Convert virtual address to a physical address.
Definition: uaccess.h:287
APIC_ICR_INIT
#define APIC_ICR_INIT
Interrupt command register: INIT.
Definition: bios_mp.c:63
APIC_ICR_LEVEL
#define APIC_ICR_LEVEL
Interrupt command register: level mode.
Definition: bios_mp.c:57
APIC_ICR_SIPI
#define APIC_ICR_SIPI(vector)
Interrupt command register: SIPI.
Definition: bios_mp.c:66
uint32_t
unsigned int uint32_t
Definition: stdint.h:12
regs
struct i386_regs regs
Definition: registers.h:15
setup_sipi
void setup_sipi(unsigned int vector, uint32_t handler, struct i386_regs *regs)
Set up startup IPI handler.
Definition: librm_mgmt.c:415
APIC_ICR_ALL_NOT_SELF
#define APIC_ICR_ALL_NOT_SELF
Interrupt command register: send to all excluding self.
Definition: bios_mp.c:54
i386_regs
A 32-bit general register dump.
Definition: registers.h:62
MSR_APIC_BASE
#define MSR_APIC_BASE
Local APIC base address MSR.
Definition: bios_mp.c:39
mp_jump
void __asmcall mp_jump(mp_addr_t func, mp_addr_t opaque)
Protected-mode startup IPI handler.
MSR_APIC_BASE_X2APIC
#define MSR_APIC_BASE_X2APIC
Local APIC is in x2APIC mode.
Definition: bios_mp.c:42
APIC_ICR_LEVEL_ASSERT
#define APIC_ICR_LEVEL_ASSERT
Interrupt command register: level asserted.
Definition: bios_mp.c:60
iounmap
void iounmap(volatile const void *io_addr)
Unmap I/O address.
i386_regs::edx
uint32_t edx
Definition: registers.h:93
ioremap
void * ioremap(unsigned long bus_addr, size_t len)
Map bus address as an I/O address.
bios_mp_ipi
static void bios_mp_ipi(void *apic, int x2apic, uint32_t icr)
Send an interprocessor interrupt.
Definition: bios_mp.c:107

References APIC_ICR_ALL_NOT_SELF, APIC_ICR_INIT, APIC_ICR_LEVEL, APIC_ICR_LEVEL_ASSERT, APIC_ICR_SIPI, base, bios_mp_ipi(), DBGC, i386_regs::eax, i386_regs::edx, ioremap(), iounmap(), mp_address(), mp_jump(), MSR_APIC_BASE, MSR_APIC_BASE_MASK, MSR_APIC_BASE_X2APIC, PAGE_SIZE, regs, setup_sipi(), SIPI_VECTOR, and virt_to_phys().

◆ PROVIDE_MPAPI_INLINE()

PROVIDE_MPAPI_INLINE ( pcbios  ,
mp_address   
)

◆ PROVIDE_MPAPI() [1/2]

PROVIDE_MPAPI ( pcbios  ,
mp_exec_boot  ,
bios_mp_exec_boot   
)

◆ PROVIDE_MPAPI() [2/2]

PROVIDE_MPAPI ( pcbios  ,
mp_start_all  ,
bios_mp_start_all   
)
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