iPXE
Data Structures | Macros | Typedefs | Functions | Variables
registers.h File Reference

i386 registers. More...

#include <stdint.h>

Go to the source code of this file.

Data Structures

union  __attribute__
 A 16-bit general register. More...
 
union  __attribute__
 A 16-bit general register. More...
 
struct  i386_regs
 A 32-bit general register dump. More...
 
struct  i386_seg_regs
 A segment register dump. More...
 
struct  i386_all_regs
 A full register dump. More...
 
struct  segoff
 

Macros

#define CF   ( 1 << 0 )
 
#define PF   ( 1 << 2 )
 
#define AF   ( 1 << 4 )
 
#define ZF   ( 1 << 6 )
 
#define SF   ( 1 << 7 )
 
#define OF   ( 1 << 11 )
 

Typedefs

typedef struct segoff segoff_t
 

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 
struct i386_regs __attribute__ ((packed))
 

Variables

typedef __attribute__
 
union {
   uint8_t   l
 
   uint8_t   byte
 
}; 
 
uint8_t h
 
union {
   uint8_t   l
 
   uint8_t   byte
 
}; 
 
uint8_t bl
 
uint8_t bh
 
uint8_t dl
 
uint8_t dh
 
uint8_t cl
 
uint8_t ch
 
uint8_t al
 
uint8_t ah
 
union {
   uint16_t   si
 
   uint32_t   esi
 
}; 
 
union {
   uint16_t   bp
 
   uint32_t   ebp
 
}; 
 
union {
   uint16_t   sp
 
   uint32_t   esp
 
}; 
 
union {
   uint16_t   bx
 
   uint32_t   ebx
 
}; 
 
union {
   uint16_t   dx
 
   uint32_t   edx
 
}; 
 
union {
   uint16_t   cx
 
   uint32_t   ecx
 
}; 
 
union {
   uint16_t   ax
 
   uint32_t   eax
 
}; 
 
uint16_t cs
 
uint16_t ss
 
uint16_t ds
 
uint16_t es
 
uint16_t fs
 
uint16_t gs
 
struct i386_seg_regs segs
 
struct i386_regs regs
 
uint32_t flags
 
uint16_t offset
 
uint16_t segment
 

Detailed Description

i386 registers.

This file defines data structures that allow easy access to i386 register dumps.

Definition in file registers.h.

Macro Definition Documentation

◆ CF

#define CF   ( 1 << 0 )

Definition at line 181 of file registers.h.

◆ PF

#define PF   ( 1 << 2 )

Definition at line 182 of file registers.h.

◆ AF

#define AF   ( 1 << 4 )

Definition at line 183 of file registers.h.

◆ ZF

#define ZF   ( 1 << 6 )

Definition at line 184 of file registers.h.

◆ SF

#define SF   ( 1 << 7 )

Definition at line 185 of file registers.h.

◆ OF

#define OF   ( 1 << 11 )

Definition at line 186 of file registers.h.

Typedef Documentation

◆ segoff_t

typedef struct segoff segoff_t

Definition at line 196 of file registers.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )

◆ __attribute__()

struct i386_regs __attribute__ ( (packed)  )

Variable Documentation

◆ __attribute__

union { ... } __attribute__

◆ l

Definition at line 15 of file registers.h.

◆ byte

Definition at line 16 of file registers.h.

◆ @596

union { ... }

◆ h

Definition at line 18 of file registers.h.

◆ @600

union { ... }

◆ bl

uint8_t bl

Definition at line 78 of file registers.h.

Referenced by border(), and wborder().

◆ bh

uint8_t bh

Definition at line 79 of file registers.h.

◆ dl

uint8_t dl

Definition at line 80 of file registers.h.

◆ dh

uint8_t dh

Definition at line 81 of file registers.h.

◆ cl

uint8_t cl

Definition at line 82 of file registers.h.

◆ ch

uint8_t ch

◆ al

uint8_t al

Definition at line 84 of file registers.h.

◆ ah

uint8_t ah

Definition at line 85 of file registers.h.

Referenced by __ath9k_hw_4k_fill_eeprom(), __ath9k_hw_ar9287_fill_eeprom(), __ath9k_hw_def_fill_eeprom(), __ath9k_hw_init(), __ath9k_hw_usb_4k_fill_eeprom(), __ath9k_hw_usb_ar9287_fill_eeprom(), __ath9k_hw_usb_def_fill_eeprom(), ar5008_hw_ani_cache_ini_regs(), ar5008_hw_ani_control_new(), ar5008_hw_ani_control_old(), ar5008_hw_attach_phy_ops(), ar5008_hw_do_getnf(), ar5008_hw_force_bias(), ar5008_hw_init_bb(), ar5008_hw_init_chain_masks(), ar5008_hw_mark_phy_inactive(), ar5008_hw_override_ini(), ar5008_hw_process_ini(), ar5008_hw_rf_alloc_ext_banks(), ar5008_hw_rf_free_ext_banks(), ar5008_hw_rfbus_done(), ar5008_hw_rfbus_req(), ar5008_hw_set_channel(), ar5008_hw_set_channel_regs(), ar5008_hw_set_delta_slope(), ar5008_hw_set_nf_limits(), ar5008_hw_set_radar_conf(), ar5008_hw_set_radar_params(), ar5008_hw_set_rf_regs(), ar5008_hw_set_rfmode(), ar5008_hw_spur_mitigate(), ar5008_restore_chainmask(), ar5008_set_diversity(), ar5008_write_rf_array(), ar9002_hw_adc_dccal_calibrate(), ar9002_hw_adc_dccal_collect(), ar9002_hw_adc_gaincal_calibrate(), ar9002_hw_adc_gaincal_collect(), ar9002_hw_antdiv_comb_conf_get(), ar9002_hw_antdiv_comb_conf_set(), ar9002_hw_attach_calib_ops(), ar9002_hw_attach_mac_ops(), ar9002_hw_attach_ops(), ar9002_hw_attach_phy_ops(), ar9002_hw_calibrate(), ar9002_hw_cck_chan14_spread(), ar9002_hw_compute_pll_control(), ar9002_hw_configpcipowersave(), ar9002_hw_do_getnf(), ar9002_hw_enable_async_fifo(), ar9002_hw_enable_wep_aggregation(), ar9002_hw_get_isr(), ar9002_hw_get_radiorev(), ar9002_hw_init_cal(), ar9002_hw_init_cal_settings(), ar9002_hw_init_mode_gain_regs(), ar9002_hw_init_mode_regs(), ar9002_hw_iqcal_collect(), ar9002_hw_iqcalibrate(), ar9002_hw_is_cal_supported(), ar9002_hw_load_ani_reg(), ar9002_hw_olc_temp_compensation(), ar9002_hw_pa_cal(), ar9002_hw_per_calibration(), ar9002_hw_proc_txdesc(), ar9002_hw_rf_claim(), ar9002_hw_rx_enable(), ar9002_hw_set11n_txdesc(), ar9002_hw_set_channel(), ar9002_hw_set_nf_limits(), ar9002_hw_setup_calibration(), ar9002_hw_spur_mitigate(), ar9002_hw_update_async_fifo(), ar9002_olc_init(), ar9003_get_paprd_scale_factor(), ar9003_get_pll_sqsum_dvc(), ar9003_get_spur_chan_ptr(), ar9003_hw_ani_cache_ini_regs(), ar9003_hw_ani_control(), ar9003_hw_ant_ctrl_apply(), ar9003_hw_ant_ctrl_chain_get(), ar9003_hw_ant_ctrl_common_2_get(), ar9003_hw_ant_ctrl_common_get(), ar9003_hw_antdiv_comb_conf_get(), ar9003_hw_antdiv_comb_conf_set(), ar9003_hw_apply_tuning_caps(), ar9003_hw_attach_calib_ops(), ar9003_hw_attach_ops(), ar9003_hw_attach_phy_ops(), ar9003_hw_atten_apply(), ar9003_hw_atten_chain_get(), ar9003_hw_atten_chain_get_margin(), ar9003_hw_cal_pier_get(), ar9003_hw_calc_iq_corr(), ar9003_hw_calibrate(), ar9003_hw_calibration_apply(), ar9003_hw_configpcipowersave(), ar9003_hw_disable_phy_restart(), ar9003_hw_do_getnf(), ar9003_hw_drive_strength_apply(), ar9003_hw_eeprom_get_cck_tgt_pwr(), ar9003_hw_eeprom_get_ht20_tgt_pwr(), ar9003_hw_eeprom_get_ht40_tgt_pwr(), ar9003_hw_eeprom_get_tgt_pwr(), ar9003_hw_get_isr(), ar9003_hw_get_rx_gain_idx(), ar9003_hw_get_tx_gain_idx(), ar9003_hw_init_bb(), ar9003_hw_init_cal(), ar9003_hw_init_cal_settings(), ar9003_hw_init_mode_gain_regs(), ar9003_hw_init_mode_regs(), ar9003_hw_internal_regulator_apply(), ar9003_hw_iqcal_collect(), ar9003_hw_iqcalibrate(), ar9003_hw_mark_phy_inactive(), ar9003_hw_override_ini(), ar9003_hw_per_calibration(), ar9003_hw_power_control_override(), ar9003_hw_proc_txdesc(), ar9003_hw_process_ini(), ar9003_hw_prog_ini(), ar9003_hw_rfbus_done(), ar9003_hw_rfbus_req(), ar9003_hw_set11n_aggr_first(), ar9003_hw_set11n_txdesc(), ar9003_hw_set_chain_masks(), ar9003_hw_set_channel(), ar9003_hw_set_channel_regs(), ar9003_hw_set_delta_slope(), ar9003_hw_set_diversity(), ar9003_hw_set_nf_limits(), ar9003_hw_set_power_per_rate_table(), ar9003_hw_set_radar_conf(), ar9003_hw_set_radar_params(), ar9003_hw_set_rfmode(), ar9003_hw_set_target_power_eeprom(), ar9003_hw_setup_calibration(), ar9003_hw_spur_mitigate(), ar9003_hw_spur_mitigate_mrc_cck(), ar9003_hw_spur_mitigate_ofdm(), ar9003_hw_spur_ofdm(), ar9003_hw_spur_ofdm_clear(), ar9003_hw_spur_ofdm_work(), ar9003_hw_tx_iq_cal_post_proc(), ar9003_hw_tx_iq_cal_run(), ar9003_hw_tx_iqcal_load_avg_2_passes(), ar9003_hw_tx_power_regwrite(), ar9003_hw_xpa_bias_level_apply(), ar9003_hw_xpa_bias_level_get(), ar9003_rx_gain_table_apply(), ar9003_tx_gain_table_apply(), ar9271_hw_pa_cal(), ar9280_20_hw_init_rxgain_ini(), ar9280_20_hw_init_txgain_ini(), ar9280_hw_olc_temp_compensation(), ar9285_hw_cl_cal(), ar9285_hw_clc(), ar9285_hw_pa_cal(), ar9287_eeprom_get_tx_gain_index(), ar9287_eeprom_olpc_set_pdadcs(), ar9287_hw_olc_temp_compensation(), ar9300_check_eeprom_header(), ar9300_compress_decision(), ar9300_eeprom_restore_flash(), ar9300_eeprom_restore_internal(), ar9300_otp_read_word(), ar9300_read_eeprom(), ar9300_read_otp(), ath5k_attach(), ath5k_calibrate(), ath5k_channel_ok(), ath5k_combine_linear_pcdac_curves(), ath5k_combine_pwr_to_pdadc_curves(), ath5k_config(), ath5k_configure_filter(), ath5k_copy_channels(), ath5k_eeprom_convert_pcal_info_2413(), ath5k_eeprom_convert_pcal_info_5111(), ath5k_eeprom_convert_pcal_info_5112(), ath5k_eeprom_detach(), ath5k_eeprom_free_pcal_info(), ath5k_eeprom_init(), ath5k_eeprom_init_11a_pcal_freq(), ath5k_eeprom_init_11bg_2413(), ath5k_eeprom_init_header(), ath5k_eeprom_init_modes(), ath5k_eeprom_is_hb63(), ath5k_eeprom_read_ants(), ath5k_eeprom_read_ctl_info(), ath5k_eeprom_read_freq_list(), ath5k_eeprom_read_mac(), ath5k_eeprom_read_modes(), ath5k_eeprom_read_pcal_info(), ath5k_eeprom_read_pcal_info_2413(), ath5k_eeprom_read_pcal_info_5111(), ath5k_eeprom_read_pcal_info_5112(), ath5k_eeprom_read_target_rate_pwr_info(), ath5k_eeprom_read_turbo_modes(), ath5k_fill_pwr_to_pcdac_table(), ath5k_get_chan_pcal_surrounding_piers(), ath5k_get_max_ctl_power(), ath5k_get_pcdac_intercepts(), ath5k_get_rate_pcal_data(), ath5k_hw_attach(), ath5k_hw_chan_has_spur_noise(), ath5k_hw_channel(), ath5k_hw_commit_eeprom_settings(), ath5k_hw_detach(), ath5k_hw_eeprom_read(), ath5k_hw_gainf_calibrate(), ath5k_hw_get_ack_timeout(), ath5k_hw_get_capability(), ath5k_hw_get_cts_timeout(), ath5k_hw_get_def_antenna(), ath5k_hw_get_gpio(), ath5k_hw_get_isr(), ath5k_hw_get_lladdr(), ath5k_hw_get_rx_filter(), ath5k_hw_get_rxdp(), ath5k_hw_get_txdp(), ath5k_hw_ini_mode_registers(), ath5k_hw_ini_registers(), ath5k_hw_init_desc_functions(), ath5k_hw_is_intr_pending(), ath5k_hw_nic_reset(), ath5k_hw_nic_wakeup(), ath5k_hw_noise_floor_calibration(), ath5k_hw_phy_calibrate(), ath5k_hw_phy_disable(), ath5k_hw_post(), ath5k_hw_radio_revision(), ath5k_hw_reg_read(), ath5k_hw_reg_write(), ath5k_hw_release_tx_queue(), ath5k_hw_request_rfgain_probe(), ath5k_hw_reset(), ath5k_hw_reset_key(), ath5k_hw_reset_tx_queue(), ath5k_hw_rf2425_channel(), ath5k_hw_rf5110_calibrate(), ath5k_hw_rf5110_channel(), ath5k_hw_rf5111_channel(), ath5k_hw_rf5112_channel(), ath5k_hw_rf511x_calibrate(), ath5k_hw_rf_check_gainf_readback(), ath5k_hw_rf_gainf_adjust(), ath5k_hw_rf_gainf_corr(), ath5k_hw_rfb_op(), ath5k_hw_rfgain_init(), ath5k_hw_rfgain_opt_init(), ath5k_hw_rfregs_init(), ath5k_hw_set_ack_bitrate_high(), ath5k_hw_set_ack_timeout(), ath5k_hw_set_associd(), ath5k_hw_set_bssid_mask(), ath5k_hw_set_capabilities(), ath5k_hw_set_cts_timeout(), ath5k_hw_set_def_antenna(), ath5k_hw_set_gpio(), ath5k_hw_set_gpio_input(), ath5k_hw_set_gpio_intr(), ath5k_hw_set_gpio_output(), ath5k_hw_set_imr(), ath5k_hw_set_lladdr(), ath5k_hw_set_mcast_filter(), ath5k_hw_set_opmode(), ath5k_hw_set_rx_filter(), ath5k_hw_set_rxdp(), ath5k_hw_set_slot_time(), ath5k_hw_set_tx_queueprops(), ath5k_hw_set_txdp(), ath5k_hw_set_txpower_limit(), ath5k_hw_setup_2word_tx_desc(), ath5k_hw_setup_4word_tx_desc(), ath5k_hw_setup_tx_queue(), ath5k_hw_start_rx_dma(), ath5k_hw_start_rx_pcu(), ath5k_hw_start_tx_dma(), ath5k_hw_stop_rx_dma(), ath5k_hw_stop_rx_pcu(), ath5k_hw_stop_tx_dma(), ath5k_hw_tweak_initval_settings(), ath5k_hw_txpower(), ath5k_hw_update_tx_triglevel(), ath5k_hw_wake(), ath5k_hw_write_initvals(), ath5k_hw_write_ofdm_timings(), ath5k_hw_write_rate_duration(), ath5k_init(), ath5k_irq(), ath5k_mode_setup(), ath5k_poll(), ath5k_reset(), ath5k_rfkill_hw_start(), ath5k_rfkill_hw_stop(), ath5k_rfkill_set_intr(), ath5k_rx_start(), ath5k_rx_stop(), ath5k_rxbuf_setup(), ath5k_setup_bands(), ath5k_setup_channel_powertable(), ath5k_setup_pcdac_table(), ath5k_setup_pwr_to_pdadc_table(), ath5k_setup_rate_powertable(), ath5k_stop_hw(), ath5k_txbuf_setup(), ath5k_txq_cleanup(), ath5k_txq_setup(), ath9k_adjust_pdadc_values(), ath9k_ani_reset(), ath9k_ani_reset_old(), ath9k_ani_restart(), ath9k_bss_info_changed(), ath9k_change_gain_boundary_setting(), ath9k_cmn_get_curchannel(), ath9k_cmn_update_txpow(), ath9k_config(), ath9k_get_txgain_index(), ath9k_hw_4k_check_eeprom(), ath9k_hw_4k_fill_eeprom(), ath9k_hw_4k_get_eeprom(), ath9k_hw_4k_get_eeprom_rev(), ath9k_hw_4k_get_eeprom_ver(), ath9k_hw_4k_get_spur_channel(), ath9k_hw_4k_set_addac(), ath9k_hw_4k_set_board_values(), ath9k_hw_4k_set_gain(), ath9k_hw_4k_set_txpower(), ath9k_hw_abort_tx_dma(), ath9k_hw_abortpcurecv(), ath9k_hw_addrxbuf_edma(), ath9k_hw_analog_shift_regwrite(), ath9k_hw_analog_shift_rmw(), ath9k_hw_ani_cache_ini_regs(), ath9k_hw_ani_cck_err_trigger(), ath9k_hw_ani_cck_err_trigger_old(), ath9k_hw_ani_control(), ath9k_hw_ani_init(), ath9k_hw_ani_lower_immunity(), ath9k_hw_ani_lower_immunity_old(), ath9k_hw_ani_monitor(), ath9k_hw_ani_ofdm_err_trigger(), ath9k_hw_ani_ofdm_err_trigger_old(), ath9k_hw_ani_read_counters(), ath9k_hw_ani_setup(), ath9k_hw_antdiv_comb_conf_get(), ath9k_hw_antdiv_comb_conf_set(), ath9k_hw_apply_gpio_override(), ath9k_hw_ar9287_check_eeprom(), ath9k_hw_ar9287_fill_eeprom(), ath9k_hw_ar9287_get_eeprom(), ath9k_hw_ar9287_get_eeprom_rev(), ath9k_hw_ar9287_get_eeprom_ver(), ath9k_hw_ar9287_get_spur_channel(), ath9k_hw_ar9287_set_board_values(), ath9k_hw_ar9287_set_txpower(), ath9k_hw_ar9300_fill_eeprom(), ath9k_hw_ar9300_get_eeprom(), ath9k_hw_ar9300_get_eeprom_ver(), ath9k_hw_ar9300_set_board_values(), ath9k_hw_ar9300_set_txpower(), ath9k_hw_attach_ops(), ath9k_hw_calibrate(), ath9k_hw_cfg_gpio_input(), ath9k_hw_cfg_output(), ath9k_hw_channel_change(), ath9k_hw_check_alive(), ath9k_hw_chip_reset(), ath9k_hw_chip_test(), ath9k_hw_clr11n_aggr(), ath9k_hw_common(), ath9k_hw_compute_pll_control(), ath9k_hw_computetxtime(), ath9k_hw_configpcipowersave(), ath9k_hw_def_check_eeprom(), ath9k_hw_def_fill_eeprom(), ath9k_hw_def_get_eeprom(), ath9k_hw_def_get_eeprom_rev(), ath9k_hw_def_get_eeprom_ver(), ath9k_hw_def_get_spur_channel(), ath9k_hw_def_set_addac(), ath9k_hw_def_set_board_values(), ath9k_hw_def_set_gain(), ath9k_hw_def_set_txpower(), ath9k_hw_deinit(), ath9k_hw_disable(), ath9k_hw_disable_interrupts(), ath9k_hw_disablepcie(), ath9k_hw_do_getnf(), ath9k_hw_eeprom_init(), ath9k_hw_enable_interrupts(), ath9k_hw_fill_cap_info(), ath9k_hw_filltxdesc(), ath9k_hw_get_default_nf(), ath9k_hw_get_desc_link(), ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_get_legacy_target_powers(), ath9k_hw_get_nf_limits(), ath9k_hw_get_nf_thresh(), ath9k_hw_get_target_powers(), ath9k_hw_getdefantenna(), ath9k_hw_getisr(), ath9k_hw_getnf(), ath9k_hw_getrxfilter(), ath9k_hw_gettxintrtxqs(), ath9k_hw_gpio_cfg_output_mux(), ath9k_hw_gpio_get(), ath9k_hw_init(), ath9k_hw_init_bb(), ath9k_hw_init_cal(), ath9k_hw_init_cal_settings(), ath9k_hw_init_config(), ath9k_hw_init_defaults(), ath9k_hw_init_global_settings(), ath9k_hw_init_interrupt_masks(), ath9k_hw_init_macaddr(), ath9k_hw_init_mode_gain_regs(), ath9k_hw_init_mode_regs(), ath9k_hw_init_pll(), ath9k_hw_intrpend(), ath9k_hw_loadnf(), ath9k_hw_mac_to_clks(), ath9k_hw_mark_phy_inactive(), ath9k_hw_name(), ath9k_hw_nf_sanitize(), ath9k_hw_numtxpending(), ath9k_hw_ops(), ath9k_hw_phy_disable(), ath9k_hw_post_init(), ath9k_hw_private_ops(), ath9k_hw_process_ini(), ath9k_hw_putrxbuf(), ath9k_hw_puttxbuf(), ath9k_hw_read_revisions(), ath9k_hw_regulatory(), ath9k_hw_releasetxqueue(), ath9k_hw_reset(), ath9k_hw_reset_calibration(), ath9k_hw_reset_calvalid(), ath9k_hw_reset_txstatus_ring(), ath9k_hw_resettxqueue(), ath9k_hw_restore_chainmask(), ath9k_hw_rf_alloc_ext_banks(), ath9k_hw_rf_free_ext_banks(), ath9k_hw_rf_set_freq(), ath9k_hw_rfbus_done(), ath9k_hw_rfbus_req(), ath9k_hw_rxena(), ath9k_hw_rxprocdesc(), ath9k_hw_set11n_aggr_first(), ath9k_hw_set11n_aggr_last(), ath9k_hw_set11n_aggr_middle(), ath9k_hw_set11n_ratescenario(), ath9k_hw_set11n_txdesc(), ath9k_hw_set11nmac2040(), ath9k_hw_set_4k_power_cal_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ack_timeout(), ath9k_hw_set_ar9287_power_cal_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_cck_nil(), ath9k_hw_set_channel_regs(), ath9k_hw_set_clockrate(), ath9k_hw_set_clrdmask(), ath9k_hw_set_cts_timeout(), ath9k_hw_set_def_power_cal_table(), ath9k_hw_set_def_power_per_rate_table(), ath9k_hw_set_delta_slope(), ath9k_hw_set_desc_link(), ath9k_hw_set_diversity(), ath9k_hw_set_dma(), ath9k_hw_set_global_txtimeout(), ath9k_hw_set_gpio(), ath9k_hw_set_interrupts(), ath9k_hw_set_ofdm_nil(), ath9k_hw_set_operating_mode(), ath9k_hw_set_power_awake(), ath9k_hw_set_reset(), ath9k_hw_set_reset_power_on(), ath9k_hw_set_reset_reg(), ath9k_hw_set_rf_regs(), ath9k_hw_set_rfmode(), ath9k_hw_set_rx_bufsize(), ath9k_hw_set_txpowerlimit(), ath9k_hw_set_txq_interrupts(), ath9k_hw_set_txq_props(), ath9k_hw_setantenna(), ath9k_hw_setmcastfilter(), ath9k_hw_setopmode(), ath9k_hw_setpower(), ath9k_hw_setrxabort(), ath9k_hw_setrxfilter(), ath9k_hw_setslottime(), ath9k_hw_setup_calibration(), ath9k_hw_setup_statusring(), ath9k_hw_setuprxdesc(), ath9k_hw_setuptxqueue(), ath9k_hw_spur_mitigate_freq(), ath9k_hw_start_nfcal(), ath9k_hw_startpcureceive(), ath9k_hw_stopdmarecv(), ath9k_hw_txprocdesc(), ath9k_hw_txstart(), ath9k_hw_update_mibstats(), ath9k_hw_update_nfcal_hist_buffer(), ath9k_hw_update_regulatory_maxpower(), ath9k_hw_updatetxtriglevel(), ath9k_hw_usb_gen_fill_eeprom(), ath9k_hw_wait(), ath9k_hw_write_array(), ath9k_hw_write_associd(), ath9k_init_band_txpower(), ath9k_init_nfcal_hist_buffer(), ath9k_init_softc(), ath9k_init_txpower_limits(), ath9k_ioread32(), ath9k_iowrite32(), ath9k_irq(), ath9k_olc_get_pdadcs(), ath9k_olc_init(), ath9k_reg_rmw(), ath9k_rx_accept(), ath9k_set_power_sleep(), ath9k_start(), ath9k_stop(), ath9k_tasklet(), ath_ani_calibrate(), ath_drain_all_txq(), ath_get_next_rx_buf(), ath_hw_cycle_counters_update(), ath_hw_keyreset(), ath_hw_setbssidmask(), ath_isr(), ath_opmode_init(), ath_pci_eeprom_read(), ath_radio_disable(), ath_reset(), ath_rx_buf_link(), ath_rx_tasklet(), ath_set_channel(), ath_start_ani(), ath_startrecv(), ath_stoprecv(), ath_tx_processq(), ath_tx_setup_buffer(), ath_tx_txqaddbuf(), ath_txchainmask_reduction(), ath_txq_setup(), ath_update_survey_nf(), ath_update_survey_stats(), is_pmu_set(), and use_new_ani().

◆ di

Definition at line 15 of file registers.h.

◆ edi

uint32_t edi

Definition at line 16 of file registers.h.

◆ si

Definition at line 19 of file registers.h.

◆ esi

uint32_t esi

Definition at line 20 of file registers.h.

◆ @623

union { ... }

◆ bp

Definition at line 23 of file registers.h.

Referenced by ar5008_hw_spur_mitigate(), ar9002_hw_spur_mitigate(), b44_cam_write(), b44_chip_reset(), b44_close(), b44_free_rx_ring(), b44_free_tx_ring(), b44_halt(), b44_init_hw(), b44_init_rx_ring(), b44_init_tx_ring(), b44_irq(), b44_load_mac_and_phy_addr(), b44_open(), b44_phy_read(), b44_phy_reset(), b44_phy_write(), b44_poll(), b44_populate_rx_descriptor(), b44_probe(), b44_process_rx_packets(), b44_read_eeprom(), b44_remove(), b44_rx_refill(), b44_set_mac_addr(), b44_set_rx_mode(), b44_transmit(), b44_tx_complete(), b44_wait_bit(), bflush(), bnx2_5706s_linkup(), bnx2_5708s_linkup(), bnx2_alloc_bad_rbuf(), bnx2_alloc_mem(), bnx2_copper_linkup(), bnx2_ctx_wr(), bnx2_disable(), bnx2_disable_int(), bnx2_disable_nvram_access(), bnx2_enable_nvram_access(), bnx2_fw_sync(), bnx2_init_5706s_phy(), bnx2_init_5708s_phy(), bnx2_init_board(), bnx2_init_chip(), bnx2_init_context(), bnx2_init_copper_phy(), bnx2_init_cpus(), bnx2_init_nic(), bnx2_init_nvram(), bnx2_init_phy(), bnx2_init_rx_ring(), bnx2_init_tx_ring(), bnx2_phy_get_pause_adv(), bnx2_poll(), bnx2_poll_link(), bnx2_probe(), bnx2_read_phy(), bnx2_reg_rd_ind(), bnx2_reg_wr_ind(), bnx2_report_fw_link(), bnx2_report_link(), bnx2_reset_chip(), bnx2_reset_nic(), bnx2_reset_phy(), bnx2_resolve_flow_ctrl(), bnx2_set_link(), bnx2_set_mac_addr(), bnx2_set_mac_link(), bnx2_set_power_state_0(), bnx2_set_rx_mode(), bnx2_setup_copper_phy(), bnx2_setup_phy(), bnx2_setup_serdes_phy(), bnx2_transmit(), bnx2_write_phy(), bnxt_adv_cq_index(), bnxt_adv_nq_index(), bnxt_alloc_mem(), bnxt_alloc_rx_iob(), bnxt_close(), bnxt_db_cq(), bnxt_db_nq(), bnxt_db_rx(), bnxt_db_tx(), bnxt_down_pci(), bnxt_free_mem(), bnxt_free_rx_iob(), bnxt_get_device_address(), bnxt_get_link_speed(), bnxt_get_pci_info(), bnxt_get_phy_link(), bnxt_get_vlan(), bnxt_hwrm_assign_resources(), bnxt_hwrm_backing_store_cfg(), bnxt_hwrm_backing_store_qcfg(), bnxt_hwrm_cfa_l2_filter_alloc(), bnxt_hwrm_cfa_l2_filter_free(), bnxt_hwrm_func_cfg_req(), bnxt_hwrm_func_drv_rgtr(), bnxt_hwrm_func_drv_unrgtr(), bnxt_hwrm_func_qcaps_req(), bnxt_hwrm_func_qcfg_req(), bnxt_hwrm_func_reset_req(), bnxt_hwrm_func_resource_qcaps(), bnxt_hwrm_nvm_get_variable_req(), bnxt_hwrm_port_mac_cfg(), bnxt_hwrm_port_phy_cfg(), bnxt_hwrm_port_phy_qcfg(), bnxt_hwrm_queue_qportcfg(), bnxt_hwrm_ring_alloc(), bnxt_hwrm_ring_alloc_cq(), bnxt_hwrm_ring_alloc_grp(), bnxt_hwrm_ring_alloc_nq(), bnxt_hwrm_ring_alloc_rx(), bnxt_hwrm_ring_alloc_tx(), bnxt_hwrm_ring_free(), bnxt_hwrm_ring_free_cq(), bnxt_hwrm_ring_free_grp(), bnxt_hwrm_ring_free_nq(), bnxt_hwrm_ring_free_rx(), bnxt_hwrm_ring_free_tx(), bnxt_hwrm_run(), bnxt_hwrm_set_async_event(), bnxt_hwrm_set_rx_mask(), bnxt_hwrm_stat_ctx_alloc(), bnxt_hwrm_stat_ctx_free(), bnxt_hwrm_ver_get(), bnxt_hwrm_vnic_alloc(), bnxt_hwrm_vnic_cfg(), bnxt_hwrm_vnic_free(), bnxt_init_one(), bnxt_link_evt(), bnxt_mm_init(), bnxt_mm_nic(), bnxt_open(), bnxt_post_rx_buffers(), bnxt_query_phy_link(), bnxt_remove_one(), bnxt_reset_rx_mask(), bnxt_rx_complete(), bnxt_rx_drop(), bnxt_rx_process(), bnxt_service_cq(), bnxt_service_nq(), bnxt_set_link(), bnxt_set_ring_info(), bnxt_set_rx_mask(), bnxt_set_txq(), bnxt_tx(), bnxt_tx_adjust_pkt(), bnxt_tx_avail(), bnxt_tx_complete(), bnxt_vlan_drop(), br32(), bw32(), gdbmach_find(), gdbmach_set_breakpoint(), hwrm_init(), hwrm_write_req(), load_cpu_fw(), load_rv2p_fw(), parse_eeprom(), pending_rx_index(), pending_tx_index(), short_hwrm_cmd_req(), ssb_core_disable(), ssb_core_reset(), ssb_get_core_rev(), ssb_is_core_up(), ssb_pci_setup(), thor_db(), and wait_resp().

◆ ebp

uint32_t ebp

Definition at line 24 of file registers.h.

◆ @625

union { ... }

◆ sp

Definition at line 27 of file registers.h.

Referenced by interrupt_dump(), and sec80211_detect_ie().

◆ esp

uint32_t esp

Definition at line 28 of file registers.h.

◆ @627

union { ... }

◆ bx

Definition at line 35 of file registers.h.

◆ ebx

uint32_t ebx

Definition at line 36 of file registers.h.

◆ @629

union { ... }

◆ dx

Definition at line 43 of file registers.h.

Referenced by ar9003_hw_power_interpolate().

◆ edx

uint32_t edx

Definition at line 44 of file registers.h.

◆ @631

union { ... }

◆ cx

Definition at line 51 of file registers.h.

Referenced by bios_handle_cup(), efi_handle_cup(), and fbcon_handle_cup().

◆ ecx

uint32_t ecx

Definition at line 52 of file registers.h.

◆ @633

union { ... }

◆ ax

Definition at line 59 of file registers.h.

◆ eax

uint32_t eax

Definition at line 60 of file registers.h.

◆ @635

union { ... }

◆ cs

Definition at line 14 of file registers.h.

◆ ss

Definition at line 15 of file registers.h.

◆ ds

Definition at line 16 of file registers.h.

◆ es

Definition at line 17 of file registers.h.

◆ fs

Definition at line 18 of file registers.h.

◆ gs

Definition at line 19 of file registers.h.

◆ segs

struct i386_seg_regs segs

Definition at line 14 of file registers.h.

◆ regs

struct i386_regs regs

◆ flags

uint32_t flags

Definition at line 16 of file registers.h.

◆ offset

uint16_t offset

Definition at line 14 of file registers.h.

◆ segment

uint16_t segment

Definition at line 15 of file registers.h.