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iPXE
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IC+ network driver. More...
Go to the source code of this file.
Data Structures | |
| union | icplus_fragment |
| Data fragment. More... | |
| struct | icplus_descriptor |
| Transmit or receive descriptor. More... | |
| struct | icplus_ring |
| Descriptor ring. More... | |
| struct | icplus_nic |
| An IC+ network card. More... | |
Macros | |
| #define | ICP_BAR_SIZE 0x200 |
| BAR size. | |
| #define | ICP_ALIGN 0x8 |
| Alignment requirement. | |
| #define | ICP_BASE_LO 0x0 |
| Base address low register offset. | |
| #define | ICP_BASE_HI 0x4 |
| Base address high register offset. | |
| #define | ICP_ASICCTRL 0x30 |
| ASIC control register (double word) | |
| #define | ICP_ASICCTRL_PHYSPEED1000 0x00000040UL |
| PHY speed 1000. | |
| #define | ICP_ASICCTRL_GLOBALRESET 0x00010000UL |
| Global reset. | |
| #define | ICP_ASICCTRL_DMA 0x00080000UL |
| DMA. | |
| #define | ICP_ASICCTRL_FIFO 0x00100000UL |
| FIFO. | |
| #define | ICP_ASICCTRL_NETWORK 0x00200000UL |
| Network. | |
| #define | ICP_ASICCTRL_HOST 0x00400000UL |
| Host. | |
| #define | ICP_ASICCTRL_AUTOINIT 0x00800000UL |
| Auto init. | |
| #define | ICP_ASICCTRL_RESETBUSY 0x04000000UL |
| Reset busy. | |
| #define | ICP_RESET_MAX_WAIT_MS 1000 |
| Maximum time to wait for reset. | |
| #define | ICP_DMACTRL 0x00 |
| DMA control register (word/double word) | |
| #define | ICP_DMACTRL_RXPOLLNOW 0x0010 |
| Receive poll now. | |
| #define | ICP_DMACTRL_TXPOLLNOW 0x1000 |
| Transmit poll now. | |
| #define | ICP_EEPROMCTRL 0x4a |
| EEPROM control register (word) | |
| #define | ICP_EEPROMCTRL_ADDRESS(x) |
| Address. | |
| #define | ICP_EEPROMCTRL_OPCODE(x) |
| Opcode. | |
| #define | ICP_EEPROMCTRL_OPCODE_READ ICP_EEPROMCTRL_OPCODE ( 2 ) |
| Read register. | |
| #define | ICP_EEPROMCTRL_BUSY 0x8000 |
| EEPROM busy. | |
| #define | ICP_EEPROM_MAX_WAIT_MS 1000 |
| Maximum time to wait for reading EEPROM. | |
| #define | ICP_EEPROM_WORD_LEN_LOG2 1 |
| EEPROM word length. | |
| #define | ICP_EEPROM_MIN_SIZE_WORDS 0x20 |
| Minimum EEPROM size, in words. | |
| #define | ICP_EEPROM_MAC 0x10 |
| Address of MAC address within EEPROM. | |
| #define | ICP_EEPROMDATA 0x48 |
| EEPROM data register (word) | |
| #define | ICP_INTSTATUS 0x5e |
| Interupt status register (word) | |
| #define | ICP_INTSTATUS_TXCOMPLETE 0x0004 |
| TX complete. | |
| #define | ICP_INTSTATUS_LINKEVENT 0x0100 |
| Link event. | |
| #define | ICP_INTSTATUS_RXDMACOMPLETE 0x0400 |
| RX DMA complete. | |
| #define | ICP_MACCTRL 0x6c |
| MAC control register (double word) | |
| #define | ICP_MACCTRL_DUPLEX 0x00000020UL |
| Duplex select. | |
| #define | ICP_MACCTRL_TXENABLE 0x01000000UL |
| TX enable. | |
| #define | ICP_MACCTRL_TXDISABLE 0x02000000UL |
| TX disable. | |
| #define | ICP_MACCTRL_RXENABLE 0x08000000UL |
| RX enable. | |
| #define | ICP_MACCTRL_RXDISABLE 0x10000000UL |
| RX disable. | |
| #define | ICP_PHYCTRL 0x76 |
| PHY control register (byte) | |
| #define | ICP_PHYCTRL_MGMTCLK 0x01 |
| Management clock. | |
| #define | ICP_PHYCTRL_MGMTDATA 0x02 |
| Management data. | |
| #define | ICP_PHYCTRL_MGMTDIR 0x04 |
| Management direction. | |
| #define | ICP_PHYCTRL_LINKSPEED 0xc0 |
| Link speed. | |
| #define | ICP_RXMODE 0x88 |
| Receive mode register (word) | |
| #define | ICP_RXMODE_UNICAST 0x0001 |
| Receive unicast. | |
| #define | ICP_RXMODE_MULTICAST 0x0002 |
| Receice multicast. | |
| #define | ICP_RXMODE_BROADCAST 0x0004 |
| Receive broadcast. | |
| #define | ICP_RXMODE_ALLFRAMES 0x0008 |
| Receive all frames. | |
| #define | ICP_RFDLISTPTR 0x1c |
| List pointer receive register. | |
| #define | ICP_TFDLISTPTR 0x10 |
| List pointer transmit register. | |
| #define | ICP_TXSTATUS 0x60 |
| Transmit status register. | |
| #define | ICP_TXSTATUS_ERROR 0x00000001UL |
| TX error. | |
| #define | ICP_DONE 0x80 |
| Descriptor complete. | |
| #define | ICP_TX_UNALIGN 0x01 |
| Transmit alignment disabled. | |
| #define | ICP_TX_INDICATE 0x40 |
| Request transmit completion. | |
| #define | ICP_TX_SOLE_FRAG 0x01 |
| Sole transmit fragment. | |
| #define | ICP_RX_ERR_OVERRUN 0x01 |
| Recieve frame overrun error. | |
| #define | ICP_RX_ERR_RUNT 0x02 |
| Receive runt frame error. | |
| #define | ICP_RX_ERR_ALIGN 0x04 |
| Receive alignment error. | |
| #define | ICP_RX_ERR_FCS 0x08 |
| Receive FCS error. | |
| #define | ICP_RX_ERR_OVERSIZED 0x10 |
| Receive oversized frame error. | |
| #define | ICP_RX_ERR_LEN 0x20 |
| Recieve length error. | |
| #define | ICP_NUM_DESC 4 |
| Number of descriptors. | |
| #define | ICP_RX_MAX_LEN ETH_FRAME_LEN |
| Maximum receive packet length. | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
IC+ network driver.
Definition in file icplus.h.
| #define ICP_BAR_SIZE 0x200 |
| #define ICP_ALIGN 0x8 |
| #define ICP_BASE_LO 0x0 |
Base address low register offset.
Definition at line 22 of file icplus.h.
Referenced by icplus_set_base().
| #define ICP_BASE_HI 0x4 |
Base address high register offset.
Definition at line 25 of file icplus.h.
Referenced by icplus_set_base().
| #define ICP_ASICCTRL 0x30 |
ASIC control register (double word)
Definition at line 28 of file icplus.h.
Referenced by icplus_init_phy(), and icplus_reset().
| #define ICP_ASICCTRL_PHYSPEED1000 0x00000040UL |
| #define ICP_ASICCTRL_GLOBALRESET 0x00010000UL |
| #define ICP_ASICCTRL_DMA 0x00080000UL |
| #define ICP_ASICCTRL_FIFO 0x00100000UL |
| #define ICP_ASICCTRL_NETWORK 0x00200000UL |
| #define ICP_ASICCTRL_HOST 0x00400000UL |
| #define ICP_ASICCTRL_AUTOINIT 0x00800000UL |
| #define ICP_ASICCTRL_RESETBUSY 0x04000000UL |
| #define ICP_RESET_MAX_WAIT_MS 1000 |
Maximum time to wait for reset.
Definition at line 39 of file icplus.h.
Referenced by icplus_reset().
| #define ICP_DMACTRL 0x00 |
DMA control register (word/double word)
Definition at line 42 of file icplus.h.
Referenced by icplus_refill_rx(), and icplus_transmit().
| #define ICP_DMACTRL_RXPOLLNOW 0x0010 |
| #define ICP_DMACTRL_TXPOLLNOW 0x1000 |
| #define ICP_EEPROMCTRL 0x4a |
EEPROM control register (word)
Definition at line 47 of file icplus.h.
Referenced by icplus_read_eeprom().
| #define ICP_EEPROMCTRL_ADDRESS | ( | x | ) |
| #define ICP_EEPROMCTRL_OPCODE | ( | x | ) |
| #define ICP_EEPROMCTRL_OPCODE_READ ICP_EEPROMCTRL_OPCODE ( 2 ) |
Read register.
Definition at line 50 of file icplus.h.
Referenced by icplus_read_eeprom().
| #define ICP_EEPROMCTRL_BUSY 0x8000 |
| #define ICP_EEPROM_MAX_WAIT_MS 1000 |
Maximum time to wait for reading EEPROM.
Definition at line 55 of file icplus.h.
Referenced by icplus_read_eeprom().
| #define ICP_EEPROM_WORD_LEN_LOG2 1 |
| #define ICP_EEPROM_MIN_SIZE_WORDS 0x20 |
Minimum EEPROM size, in words.
Definition at line 61 of file icplus.h.
Referenced by icplus_init_eeprom().
| #define ICP_EEPROM_MAC 0x10 |
Address of MAC address within EEPROM.
Definition at line 64 of file icplus.h.
Referenced by icplus_probe().
| #define ICP_EEPROMDATA 0x48 |
EEPROM data register (word)
Definition at line 67 of file icplus.h.
Referenced by icplus_read_eeprom().
| #define ICP_INTSTATUS 0x5e |
Interupt status register (word)
Definition at line 70 of file icplus.h.
Referenced by icplus_poll().
| #define ICP_INTSTATUS_TXCOMPLETE 0x0004 |
| #define ICP_INTSTATUS_LINKEVENT 0x0100 |
| #define ICP_INTSTATUS_RXDMACOMPLETE 0x0400 |
| #define ICP_MACCTRL 0x6c |
MAC control register (double word)
Definition at line 76 of file icplus.h.
Referenced by icplus_open().
| #define ICP_MACCTRL_DUPLEX 0x00000020UL |
| #define ICP_MACCTRL_TXENABLE 0x01000000UL |
| #define ICP_MACCTRL_RXENABLE 0x08000000UL |
| #define ICP_PHYCTRL 0x76 |
PHY control register (byte)
Definition at line 84 of file icplus.h.
Referenced by icplus_check_link(), icplus_mii_read_bit(), and icplus_mii_write_bit().
| #define ICP_PHYCTRL_LINKSPEED 0xc0 |
| #define ICP_RXMODE 0x88 |
| #define ICP_RXMODE_UNICAST 0x0001 |
| #define ICP_RXMODE_MULTICAST 0x0002 |
| #define ICP_RXMODE_BROADCAST 0x0004 |
| #define ICP_RXMODE_ALLFRAMES 0x0008 |
| #define ICP_RFDLISTPTR 0x1c |
List pointer receive register.
Definition at line 98 of file icplus.h.
Referenced by icplus_probe().
| #define ICP_TFDLISTPTR 0x10 |
List pointer transmit register.
Definition at line 101 of file icplus.h.
Referenced by icplus_create_ring(), and icplus_probe().
| #define ICP_TXSTATUS 0x60 |
| #define ICP_TXSTATUS_ERROR 0x00000001UL |
| #define ICP_DONE 0x80 |
Descriptor complete.
Definition at line 141 of file icplus.h.
Referenced by icplus_create_ring(), icplus_poll_rx(), and icplus_poll_tx().
| #define ICP_TX_UNALIGN 0x01 |
Transmit alignment disabled.
Definition at line 144 of file icplus.h.
Referenced by icplus_create_ring().
| #define ICP_TX_INDICATE 0x40 |
Request transmit completion.
Definition at line 147 of file icplus.h.
Referenced by icplus_create_ring().
| #define ICP_TX_SOLE_FRAG 0x01 |
Sole transmit fragment.
Definition at line 150 of file icplus.h.
Referenced by icplus_create_ring(), and icplus_transmit().
| #define ICP_RX_ERR_OVERRUN 0x01 |
Recieve frame overrun error.
Definition at line 153 of file icplus.h.
Referenced by icplus_poll_rx().
| #define ICP_RX_ERR_RUNT 0x02 |
| #define ICP_RX_ERR_ALIGN 0x04 |
| #define ICP_RX_ERR_FCS 0x08 |
| #define ICP_RX_ERR_OVERSIZED 0x10 |
Receive oversized frame error.
Definition at line 165 of file icplus.h.
Referenced by icplus_poll_rx().
| #define ICP_RX_ERR_LEN 0x20 |
| #define ICP_NUM_DESC 4 |
Number of descriptors.
Definition at line 183 of file icplus.h.
Referenced by icplus_close(), icplus_create_ring(), icplus_destroy_ring(), icplus_poll_rx(), icplus_poll_tx(), icplus_refill_rx(), and icplus_transmit().
| #define ICP_RX_MAX_LEN ETH_FRAME_LEN |
Maximum receive packet length.
Definition at line 186 of file icplus.h.
Referenced by icplus_refill_rx().
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |