1 #ifndef INCLUDE_PUBLIC_MLX_PCI_GW_H_ 2 #define INCLUDE_PUBLIC_MLX_PCI_GW_H_ 27 #define PCI_GW_FIRST_CAPABILITY_POINTER_OFFSET 0x34 29 #define PCI_GW_CAPABILITY_ID 0x9 31 #define PCI_GW_CAPABILITY_ID_OFFSET 0x0 32 #define PCI_GW_CAPABILITY_NEXT_POINTER_OFFSET 0x1 33 #define PCI_GW_CAPABILITY_SPACE_OFFSET 0x4 34 #define PCI_GW_CAPABILITY_STATUS_OFFSET 0x7 35 #define PCI_GW_CAPABILITY_COUNTER_OFFSET 0x8 36 #define PCI_GW_CAPABILITY_SEMAPHORE_OFFSET 0xC 37 #define PCI_GW_CAPABILITY_ADDRESS_OFFSET 0x10 38 #define PCI_GW_CAPABILITY_FLAG_OFFSET 0x10 39 #define PCI_GW_CAPABILITY_DATA_OFFSET 0x14 41 #define PCI_GW_SEMPHORE_TRIES 3000000 42 #define PCI_GW_GET_OWNERSHIP_TRIES 5000 43 #define PCI_GW_READ_FLAG_TRIES 3000000 45 #define PCI_GW_WRITE_FLAG 0x80000000 47 #define PCI_GW_SPACE_NODNIC 0x4 48 #define PCI_GW_SPACE_ALL_ICMD 0x3 49 #define PCI_GW_SPACE_SEMAPHORE 0xa 50 #define PCI_GW_SPACE_CR0 0x2 mlx_status mlx_pci_gw_read(IN mlx_utils *utils, IN mlx_pci_gw_space space, IN mlx_uint32 address, OUT mlx_pci_gw_buffer *buffer)
FILE_LICENCE(GPL2_OR_LATER)
uint64_t address
Base address.
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
mlx_status mlx_pci_gw_init(IN mlx_utils *utils)
mlx_status mlx_pci_gw_write(IN mlx_utils *utils, IN mlx_pci_gw_space space, IN mlx_uint32 address, IN mlx_pci_gw_buffer buffer)
mlx_status mlx_pci_gw_teardown(IN mlx_utils *utils)
mlx_uint32 mlx_pci_gw_buffer
mlx_uint16 mlx_pci_gw_space