6 #ifndef __XEN_PUBLIC_PHYSDEV_H__ 7 #define __XEN_PUBLIC_PHYSDEV_H__ 24 #define PHYSDEVOP_eoi 12 39 #define PHYSDEVOP_pirq_eoi_gmfn_v1 17 47 #define PHYSDEVOP_pirq_eoi_gmfn_v2 28 59 #define PHYSDEVOP_irq_status_query 5 70 #define _XENIRQSTAT_needs_eoi (0) 71 #define XENIRQSTAT_needs_eoi (1U<<_XENIRQSTAT_needs_eoi) 74 #define _XENIRQSTAT_shared (1) 75 #define XENIRQSTAT_shared (1U<<_XENIRQSTAT_shared) 81 #define PHYSDEVOP_set_iopl 6 93 #define PHYSDEVOP_set_iobitmap 7 96 #if __XEN_INTERFACE_VERSION__ >= 0x00030205 110 #define PHYSDEVOP_apic_read 8 111 #define PHYSDEVOP_apic_write 9 126 #define PHYSDEVOP_alloc_irq_vector 10 127 #define PHYSDEVOP_free_irq_vector 11 137 #define MAP_PIRQ_TYPE_MSI 0x0 138 #define MAP_PIRQ_TYPE_GSI 0x1 139 #define MAP_PIRQ_TYPE_UNKNOWN 0x2 140 #define MAP_PIRQ_TYPE_MSI_SEG 0x3 141 #define MAP_PIRQ_TYPE_MULTI_MSI 0x4 143 #define PHYSDEVOP_map_pirq 13 164 #define PHYSDEVOP_unmap_pirq 14 174 #define PHYSDEVOP_manage_pci_add 15 175 #define PHYSDEVOP_manage_pci_remove 16 185 #define PHYSDEVOP_restore_msi 19 194 #define PHYSDEVOP_manage_pci_add_ext 20 227 #define PHYSDEVOP_setup_gsi 21 244 #define PHYSDEVOP_get_free_pirq 23 255 #define XEN_PCI_MMCFG_RESERVED 0x1 257 #define PHYSDEVOP_pci_mmcfg_reserved 24 268 #define XEN_PCI_DEV_EXTFN 0x1 269 #define XEN_PCI_DEV_VIRTFN 0x2 270 #define XEN_PCI_DEV_PXM 0x4 272 #define PHYSDEVOP_pci_device_add 25 293 #define PHYSDEVOP_pci_device_remove 26 294 #define PHYSDEVOP_restore_msi_ext 27 299 #define PHYSDEVOP_prepare_msix 30 300 #define PHYSDEVOP_release_msix 31 310 #define PHYSDEVOP_DBGP_RESET_PREPARE 1 311 #define PHYSDEVOP_DBGP_RESET_DONE 2 313 #define PHYSDEVOP_DBGP_BUS_UNKNOWN 0 314 #define PHYSDEVOP_DBGP_BUS_PCI 1 316 #define PHYSDEVOP_dbgp_op 29 333 #define PHYSDEVOP_IRQ_UNMASK_NOTIFY 4 335 #if __XEN_INTERFACE_VERSION__ < 0x00040600 341 #define PHYSDEVOP_IRQ_STATUS_QUERY PHYSDEVOP_irq_status_query 342 #define PHYSDEVOP_SET_IOPL PHYSDEVOP_set_iopl 343 #define PHYSDEVOP_SET_IOBITMAP PHYSDEVOP_set_iobitmap 344 #define PHYSDEVOP_APIC_READ PHYSDEVOP_apic_read 345 #define PHYSDEVOP_APIC_WRITE PHYSDEVOP_apic_write 346 #define PHYSDEVOP_ASSIGN_VECTOR PHYSDEVOP_alloc_irq_vector 347 #define PHYSDEVOP_FREE_VECTOR PHYSDEVOP_free_irq_vector 348 #define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi 349 #define PHYSDEVOP_IRQ_SHARED XENIRQSTAT_shared 352 #if __XEN_INTERFACE_VERSION__ < 0x00040200 353 #define PHYSDEVOP_pirq_eoi_gmfn PHYSDEVOP_pirq_eoi_gmfn_v1 355 #define PHYSDEVOP_pirq_eoi_gmfn PHYSDEVOP_pirq_eoi_gmfn_v2
physdev_set_iopl_t set_iopl
physdev_irq_status_query_t irq_status_query
unsigned long apic_physbase
struct physdev_manage_pci_ext::@670 physfn
unsigned long long uint64_t
uint32_t optarr[XEN_FLEX_ARRAY_DIM]
struct physdev_pci_device_add::@672 physfn
DEFINE_XEN_GUEST_HANDLE(physdev_eoi_t)
union physdev_dbgp_op::@673 u
physdev_set_iobitmap_t set_iobitmap
#define XEN_FLEX_ARRAY_DIM
#define XEN_GUEST_HANDLE(name)